CN111917293B - A Switched Capacitor DC-DC Converter with Multi-Voltage Domain Compound Feedback Mode - Google Patents

A Switched Capacitor DC-DC Converter with Multi-Voltage Domain Compound Feedback Mode Download PDF

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CN111917293B
CN111917293B CN202010572010.8A CN202010572010A CN111917293B CN 111917293 B CN111917293 B CN 111917293B CN 202010572010 A CN202010572010 A CN 202010572010A CN 111917293 B CN111917293 B CN 111917293B
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feedback
current
load
voltage
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CN111917293A (en
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刘新宁
平东岳
肖如吉
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Southeast University
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    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M3/00—Conversion of DC power input into DC power output
    • H02M3/02—Conversion of DC power input into DC power output without intermediate conversion into AC
    • H02M3/04—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters
    • H02M3/06—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider
    • H02M3/07—Conversion of DC power input into DC power output without intermediate conversion into AC by static converters using resistors or capacitors, e.g. potential divider using capacitors charged and discharged alternately by semiconductor devices with control electrode, e.g. charge pumps
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0003—Details of control, feedback or regulation circuits
    • H02M1/0032—Control circuits allowing low power mode operation, e.g. in standby mode
    • H—ELECTRICITY
    • H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M1/00—Details of apparatus for conversion
    • H02M1/0048—Circuits or arrangements for reducing losses
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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  • Power Engineering (AREA)
  • Dc-Dc Converters (AREA)

Abstract

本发明公开了一种多电压域复合反馈模式的开关电容DC‑DC转换器，供电切换模块包括第一电压端Vin、第二电压端Vout，分别为转换器的各模块供电，低功耗电压基准电路的第一、第二电压输出端分别对接电平检测反馈模块的正向输入端、负载电流自适应反馈模块的第一输入端，电平检测反馈模块的输出端、供电切换模块的输出端、负载电流自适应反馈模块的电流输出端分别对接时钟产生模块的三个输入端，控制时钟产生模块连接电容器模块；电容器模块的输出端输出VSC，并分别连接电平检测反馈模块的负向输入端、负载电流自适应反馈模块的第二输入端。本发明降低了开关电容DC‑DC转换器的控制电路损耗，通过复合反馈模式改善了宽负载条件下不同负载条件下的转换效率。

Figure 202010572010

The invention discloses a switched capacitor DC-DC converter in a multi-voltage domain composite feedback mode. The power supply switching module includes a first voltage terminal V in and a second voltage terminal V out , which respectively supply power to each module of the converter. The first and second voltage output terminals of the voltage consumption reference circuit are respectively connected to the forward input terminal of the level detection feedback module, the first input terminal of the load current adaptive feedback module, the output terminal of the level detection feedback module, and the power supply switching module. The output terminal and the current output terminal of the load current adaptive feedback module are respectively connected to the three input terminals of the clock generation module, and the control clock generation module is connected to the capacitor module; the output terminal of the capacitor module outputs VSC and is respectively connected to the level detection feedback module. The negative input terminal and the second input terminal of the load current adaptive feedback module. The invention reduces the loss of the control circuit of the switched capacitor DC-DC converter, and improves the conversion efficiency under different load conditions under wide load conditions through the composite feedback mode.

Figure 202010572010

Description

Switched capacitor DC-DC converter in multi-voltage domain composite feedback mode
Technical Field
The invention belongs to the technical field of power management chips, and particularly relates to a switched capacitor DC-DC converter in a multi-voltage domain composite feedback mode.
Background
With the rise of the internet of things, Micro Control Units (MCUs) which are often used in wireless sensor networks and integrate microprocessors, internal memories and IO interfaces are now widely used. The progress of the CMOS technology enables the Internet of things based on low-power-consumption devices and circuits to be realized, and the low-power-consumption devices are mainly characterized by small volume and long service life of batteries. In order to maintain the long life of the battery, it is necessary to improve the efficiency of low power devices. Therefore, circuit designers have been investigating to reduce the power consumption of the circuit to achieve a longer service life with available battery capacity.
The power management chip is always a common module in most chip systems, and performs proper management on voltage, power and leakage of the SoC. The power management chip adopts the technologies of dynamic self-adaptive voltage compression and amplification and the like to reduce the power consumption, and the dynamic voltage scaling is an important means for realizing the optimal energy point of the SoC by reducing the working voltage power supply, so that the power supply voltage scaling and the frequency scaling are jointly used, and the key requirement for reducing the power consumption is met.
The switched capacitor DC-DC converter is very suitable for solving the power supply problem of the low-power consumption MCU, because the relation between the area and the efficiency is well compromised, and full integration can be realized. However, in a low-load application scenario, the switched capacitor converter is limited by losses caused by the switching tube and the capacitor, and thus some technical means are required to improve the efficiency of the switched capacitor converter under the low load. The traditional single voltage domain and single feedback mode switch capacitor converter cannot give consideration to the efficiency of light and heavy loads when working in a load range with larger difference.
Disclosure of Invention
The purpose of the invention is as follows: the switched capacitor DC-DC converter is in a multi-voltage-domain composite feedback mode, and the switched capacitor DC-DC converter can work in a working mode with optimal efficiency all the time, improves the load range and reduces the output voltage ripple.
The technical scheme is as follows: the invention provides a switched capacitor DC-DC converter in a multi-voltage domain load feedback mode, which is used for converting the power supply voltage of a load and comprises a power supply switching module, a control clock generating module, a level detection feedback module, a low-power-consumption voltage reference circuit and a load current self-adaptive feedback module;
the first voltage end of the power supply switching module, the power end of the capacitor module, the power end of the low-power-consumption voltage reference circuit and the power end of the load self-current adaptive feedback module are respectively butted to serve as an input voltage V of a first voltage domainin(ii) a The voltage output end of the load current self-adaptive feedback module is used as the output voltage V of a third voltage domainoutAnd respectively connected with the second voltage input end of the power supply switching module, the power end of the level detection feedback module and the load RLPositive electrode of (2), load RLThe negative electrode of (2) is grounded;
a first voltage output end of the low-power-consumption voltage reference circuit is connected with a positive input end of the level detection feedback module, and a second voltage output end of the low-power-consumption voltage reference circuit is connected with a first input end of the load current self-adaptive feedback module; the output end of the level detection feedback module is connected with the control clock generation moduleThe output end of the power supply switching module is connected with the voltage input end of the control clock generation module, and the output end of the control clock generation module is connected with the input end of the capacitor module; the output of the capacitor module is output as a capacitor module output V of the second voltage domainscThe negative input end of the level detection feedback module, the second input end of the load current self-adaptive feedback module and the third voltage input end of the power supply switching module are respectively connected; and the current output end of the load current self-adaptive feedback module is connected with the feedback signal input end of the control clock generation module.
Further comprises a load capacitor CL(ii) a The load capacitor CLIs connected to a load RLPositive electrode of (2), load capacitance CLThe other end of the connecting rod is connected with the anode and the cathode of the load; the negative pole of the load is grounded.
The power supply switching module comprises a stable signal generating module, a first phase inverter, a first switch and a second switch;
the input end of the stable signal generating module forms a third input end of the power supply switching module; the output end of the stable signal generating module is connected with the input end of the first phase inverter and the control end of the first switch, and one end of the first switch forms a first voltage input end of the power supply switching module; the output end of the first phase inverter is connected with the control end of the second switch, and one end of the second switch forms a second voltage input end of the power supply switching module; the other end of the first switch is connected with the other end of the second switch to form an output end of the power supply switching module.
The load current adaptive feedback module comprises: the device comprises an error amplifier op1, a master-slave power tube array and a load self-adaptive bias and feedback current generation module;
the width-length ratio of the master power tube array to the slave power tube array is 1: n, wherein N is an integer greater than 1, and the master power tube and the slave power tube comprise a master power tube and a slave power tube; the power supply end of the error amplifier op1 forms the power supply end of the load current self-adaptive feedback module, the positive input end of the error amplifier op1 forms the first input end of the load current self-adaptive feedback module, and the output end of the error amplifier op1 is connected with the grid electrode of each power tube in the master-slave power tube array; the drain electrode of the main power tube is connected with the drain electrode of the auxiliary power tube, and a connection point forms a second input end of the load current self-adaptive feedback module; the source electrode of the main power tube, the negative input end of the error amplifier op1 and the first input end of the load self-adaptive bias and feedback current generation module are connected, and the connection point forms the voltage output end of the load self-adaptive feedback module; the first output end of the load self-adaptive bias and feedback current generation module forms the current output end of the load current self-adaptive feedback module;
the source electrode of the slave power tube is connected with the second input end of the load self-adaptive bias and feedback current generation module; and the second output end of the load self-adaptive bias and feedback current generation module is connected with the bias current input end of the error amplifier.
The master power tube is an NMOS tube MN1, and the slave power tube is an NMOS tube MN 2;
the load adaptive bias and feedback current generation module comprises: NMOS transistor MN3, NMOS transistor MN4, NMOS transistor MN5, NMOS transistor MN6, NMOS transistor MN7, NMOS transistor MN8, PMOS transistor MP1, PMOS transistor MP2, PMOS transistor MP3, PMOS transistor MP4, and compensation current source IC1；
The source electrode of the PMOS pipe MP1 forms a first input end of the load self-adaptive bias and feedback current generation module; the source electrode of the PMOS pipe MP2 forms a second input end of the load self-adaptive bias and feedback current generation module; the drain electrode of the PMOS tube MP1 is respectively connected with the drain electrode of the NMOS tube MN3, the grid electrode of the NOMS tube MN3, the grid electrode of the NOMS tube MN4 and the grid electrode of the NOMS tube MN 5; the grid electrode of the PMOS tube MP1 is respectively connected with the grid electrode of the PMOS tube MP2, the drain electrode of the PMOS tube MP2 and the drain electrode of the NMOS tube MN 4;
the drain electrode of the NOMS tube MN5 is respectively connected with the drain electrode of the PMOS tube MP3, the grid electrode of the PMOS tube MP3 and the grid electrode of the PMOS tube MP 4; the source electrode of the PMOS transistor MP3, the source electrode of the PMOS transistor MP4 and the compensation current source IC1Is connected to an input voltage V as a first voltage domainin(ii) a Drain electrode of PMOS transistor MP4 and compensation current source IC1The output end of the NMOS transistor, the drain electrode of the MN6 of the NMOS transistor, the grid electrode of the MN6 of the NMOS transistor, the grid electrode of the MN7 of the NMOS transistor and the grid electrode of the MN8 of the NMOS transistor are connected; the drain electrode of the NMOS tube MN7 forms a second output end of the load self-adaptive bias and feedback current generation module(ii) a The drain electrode of the NMOS tube MN8 forms the current output end of the load current self-adaptive feedback module;
the source electrode of the NMOS transistor MN3, the source electrode of the NMOS transistor MN4, the source electrode of the NMOS transistor MN5, the source electrode of the NMOS transistor MN6, the source electrode of the NMOS transistor MN7 and the source electrode of the NMOS transistor MN8 are connected, and the connection point is grounded.
The control clock generation module comprises a current-controlled oscillator, a feedback signal processing module, two non-overlapping clock processing modules and a level conversion circuit;
the first input end of the current-controlled oscillator, the third input end of the feedback signal processing module and the third input end of the two non-overlapped clocks are connected, and the connection point forms the voltage input end of the control clock generation module; the second input end of the current-controlled oscillator forms a feedback signal input end of the control clock generation module, the output end of the current-controlled oscillator is connected with the first input end of the feedback signal processing module, and the second input end of the feedback signal processing module forms a control signal input end of the control clock generation module; the first output end and the second output end of the feedback signal processing module are respectively connected with the first input end and the second input end of the two non-overlapped clocks in a one-to-one correspondence manner; the first output end and the second output end of the two non-overlapped clocks are respectively connected with the first input end and the second input end of the level conversion circuit in a one-to-one correspondence manner, and the output end of the level conversion circuit forms the output end of the control clock generation module;
the current-controlled oscillator is used for collecting feedback current output by the load current self-adaptive feedback module and generating a periodic signal with frequency in direct proportion to the magnitude of the feedback current; the feedback signal processing module is used for processing a periodic signal with the frequency which is generated by the current-controlled oscillator and is in direct proportion to the magnitude of the feedback current according to the feedback signal of the comparator, sequentially outputting the processing result to the two non-overlapping clock generating modules and the level converting circuit for processing, and outputting the processing result to the capacitor module.
The feedback signal processing module comprises a second inverter, a third inverter, a fourth inverter and a NAND gate;
one end of the second phase inverter forms a second input end of the feedback signal processing module, the other end of the second phase inverter is connected with one end of the third phase inverter, the other end of the third phase inverter is connected with an A end of the NAND gate, a B end of the NAND gate forms a first input end of the feedback signal processing module, a C end of the NAND gate is connected with one end of the fourth phase inverter, the connection point forms a first output end of the feedback signal processing module, and the other end of the fourth phase inverter forms a second output end of the feedback signal processing module.
The current-controlled oscillator is a current starvation type current-controlled oscillator; the current starvation type current-controlled oscillator comprises a PMOS tube MP5, a PMOS tube MP6, a PMOS tube MP7, an NMOS tube MN9, an NMOS tube MN10, a fifth phase inverter, a sixth phase inverter and a plurality of units A;
each A unit comprises a PMOS pipe MP8, a seventh inverter and an NMOS pipe MN 11; the drain electrode of the PMOS tube MP8 is connected with the first input end of the seventh inverter, and the second input end of the seventh inverter is connected with the drain electrode of the NMOS tube MN 11; the seventh phase inverters in the units A are sequentially connected with the third input end through the output ends and the third input ends of the seventh phase inverters; the third input end of the seventh inverter in the A unit at the head end is connected with the output end of the seventh inverter in the A unit at the tail end and the third input end of the sixth inverter; the output end of the sixth inverter is connected with the third input end of the fifth inverter;
the source electrode of the PMOS tube MP5, the source electrode of the PMOS tube MP6, the source electrode of the PMOS tube MP8 in each A unit, the source electrode of the PMOS tube MP7 and the first input end of the fifth inverter are connected, and the connection point forms the first input end of the current starvation type current-controlled oscillator; the grid electrode of the PMOS tube MP5, the grid electrode of the PMOS tube MP6, the grid electrode of the PMOS tube MP8 in each A unit, the grid electrode of the PMOS tube MP7, the drain electrode of the PMOS tube MP5, the source electrode of the NMOS tube MN9, the source electrode of the NMOS tube MN10, the source electrode of the NMOS tube MN11 in each A unit and the second input end of the fifth phase inverter are connected, and the connecting point forms the second input end of the current starvation type current-controlled oscillator; the output end of the fifth inverter forms the output end of the current starvation type current-controlled oscillator;
the drain electrode of the PMOS tube MP6, the drain electrode of the NMOS tube MN9, the gate electrode of the NMOS tube MN9, the gate electrode of the NMOS tube MN11 in each A unit and the gate electrode of the NMOS tube MN10 are connected.
Has the advantages that: compared with the prior art, the switched capacitor DC-DC converter in the multi-voltage domain composite feedback mode can adaptively optimize the switching frequency and the offset of the error amplifier according to the load change, dynamically adjust the equivalent clock frequency input to the capacitor module according to the change of the output Vsc of the capacitor module in the second voltage domain, realize that the switched capacitor DC converter always works in the working mode with the optimal efficiency under different load conditions, effectively improve the load range of the converter in the composite feedback mode, and reduce the ripple of the output voltage.
Drawings
Fig. 1 is an overall schematic diagram of a switched capacitor DC-DC converter in a multi-voltage domain composite feedback mode provided by the present invention;
FIG. 2 is a schematic circuit diagram of a power supply switching module and a control clock generating module according to an embodiment of the invention;
FIG. 3 is a circuit diagram of a load current adaptive feedback module provided according to an embodiment of the present invention;
fig. 4 is a circuit diagram of a current starved current controlled oscillator for controlling a clock generation module according to an embodiment of the present invention.
Detailed Description
The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
Referring to fig. 1, the switched capacitor DC-DC converter of the multi-voltage domain composite feedback mode provided by the present invention includes a power supply switching module, a control clock generating module, a level detection feedback module, a low power consumption voltage reference circuit, and a load current adaptive feedback module; the level detection feedback module is composed of a comparator;
the switched capacitor DC-DC converter in the multi-voltage domain composite feedback mode comprises three voltage domains: input voltage VinFor the first voltage domain, the capacitor module outputs VscIn a second voltage domain, outputting a voltage VoutA third voltage domain;
first voltage terminal and power supply switching moduleThe power end of the container module, the power end of the low-power-consumption voltage reference circuit and the power end of the load self-current adaptive feedback module are respectively butted with an input voltage V serving as a first voltage domainin(ii) a The voltage output end of the load current self-adaptive feedback module is used as the output voltage V of a third voltage domainoutAnd respectively connected with the second voltage input terminal of the power supply switching module, the power supply terminal of the level detection feedback module, the anode of the load, and the load capacitor CLOne end of (a); negative pole of load and load capacitance CLThe other end of which is connected and grounded.
The first voltage output end of the low-power-consumption voltage reference circuit outputs a first reference voltage Vref1The first voltage output end is connected with the positive input end of the level detection feedback module, and the second voltage output end of the low-power-consumption voltage reference circuit outputs a second reference voltage Vref2The second voltage output end is connected with the first input end of the load current self-adaptive feedback module; the output end of the level detection feedback module is connected with the signal control end of the control clock generation module, the output end of the power supply switching module is connected with the voltage input end of the control clock generation module, and the output end of the control clock generation module is connected with the input end of the capacitor module; the capacitor module is controlled by a control clock output by the control clock generation module, periodically switched between a charging state and a discharging state, and generates a level V capable of supplying powerscNamely: the output of the capacitor module is output as a capacitor module output V of the second voltage domainscThe negative input end of the level detection feedback module, the second input end of the load current self-adaptive feedback module and the third voltage input end of the power supply switching module are respectively connected; v output from the output of the capacitor modulescThe second input end of the load current self-adaptive feedback module is connected with the second input end of the load current self-adaptive feedback module and is used for supplying power to a master power tube array and a slave power tube array in the load current self-adaptive feedback module; according to capacitor module output VscThe level state provides different power supply levels to the control clock generation module in different stable circuit starting states; and the current output end of the load current self-adaptive feedback module is connected with the feedback signal input end of the control clock generation module.
Referring to fig. 2, the power supply switching module includes a stable signal generating module, a first inverter, a first switch, and a second switch;
the input end of the stable signal generating module forms a third input end of the power supply switching module; the output end of the stable signal generating module is connected with the input end of the first phase inverter and the control end of the first switch, and one end of the first switch forms a first voltage input end of the power supply switching module; the output end of the first phase inverter is connected with the control end of the second switch, and one end of the second switch forms a second voltage input end of the power supply switching module; the other end of the first switch is connected with the other end of the second switch to form an output end of the power supply switching module.
Referring to fig. 2, the control clock generating module includes a current-controlled oscillator, a feedback signal processing module, two non-overlapping clock processing modules, and a level shift circuit, which are electrically connected in sequence;
the first input end of the current-controlled oscillator, the third input end of the feedback signal processing module and the third input end of the two non-overlapped clocks are connected, and the connection point forms the voltage input end of the control clock generation module; the second input end of the current-controlled oscillator forms a feedback signal input end of the control clock generation module, the output end of the current-controlled oscillator is connected with the first input end of the feedback signal processing module, and the second input end of the feedback signal processing module forms a control signal input end of the control clock generation module; the first output end and the second output end of the feedback signal processing module are respectively connected with the first input end and the second input end of the two non-overlapped clocks in a one-to-one correspondence manner; the first output end and the second output end of the two non-overlapped clocks are respectively connected with the first input end and the second input end of the level conversion circuit in a one-to-one correspondence mode, and the output end of the level conversion circuit forms the output end of the control clock generation module.
The current-controlled oscillator is used for collecting feedback current output by the load current self-adaptive feedback module and generating a periodic signal with the frequency in direct proportion to the magnitude of the feedback current; the feedback signal processing module is used for processing a periodic signal with the frequency which is generated by the current-controlled oscillator and is in direct proportion to the magnitude of the feedback current according to the feedback signal of the comparator, sequentially outputting the processing result to the two non-overlapping clock generating modules and the level converting circuit for processing, and outputting the processing result to the capacitor module.
The feedback signal processing module comprises a first inverter, a second inverter, a third inverter and a NAND gate;
one end of the first phase inverter forms a second input end of the feedback signal processing module, the other end of the first phase inverter is connected with one end of the second phase inverter, the other end of the second phase inverter is connected with an A end of the NAND gate, a B end of the NAND gate forms a first input end of the feedback signal processing module, a C end of the NAND gate is connected with one end of the third phase inverter, the connection point forms a first output end of the feedback signal processing module, and the other end of the third phase inverter forms a second output end of the feedback signal processing module.
Referring to fig. 3, the load current adaptive feedback module includes: the device comprises an error amplifier op1, a master-slave power tube array, a load self-adaptive bias and feedback current generation module and an adjustable current source; the function of the current collector is to collect load current and pass 1/N of the load current through a compensation current IC1After compensation processing, the current is used as micro current and feedback current of an error amplifier; the width-length ratio of the master power tube array to the slave power tube array is 1: n, where N is an integer greater than 1, and in this embodiment, N takes the value of 1000; the master-slave power tube comprises a master power tube MN1 and a slave power tube MN 2.
The power supply end of the error amplifier op1 forms the power supply end of the load current self-adaptive feedback module, the positive input end of the error amplifier op1 forms the first input end of the load current self-adaptive feedback module, and the output end of the error amplifier op1 is connected with the grid electrode of each power tube in the master-slave power tube array; the drain electrode of the main power tube MN1 is connected with the drain electrode of the auxiliary power tube MN2, and the connection point forms a second input end of the load current self-adaptive feedback module; the source electrode of the main power tube MN1, the negative input end of the error amplifier op1 and the first input end of the load self-adaptive bias and feedback current generation module are connected, and the connection point forms the voltage input end of the load self-adaptive feedback module; the first output end of the load self-adaptive bias and feedback current generation module forms a current output end of the load current self-adaptive feedback module.
The source electrode of the slave power tube is connected with the second input end of the load self-adaptive bias and feedback current generation module; the second output end of the load self-adaptive bias and feedback current generation module is connected with the control end of the adjustable current source, the input end of the adjustable current source is connected with the error amplifier op1, and the output end of the adjustable current source is grounded.
In this embodiment, the master power transistor is an NMOS transistor MN1, and the slave power transistor is an NMOS transistor MN 2.
The load adaptive bias and feedback current generation module comprises: NMOS transistor MN3, NMOS transistor MN4, NMOS transistor MN5, NMOS transistor MN6, NMOS transistor MN7, NMOS transistor MN8, PMOS transistor MP1, PMOS transistor MP2, PMOS transistor MP3, PMOS transistor MP4, and compensation current source IC1；
The source electrode of the PMOS pipe MP1 forms a first input end of the load self-adaptive bias and feedback current generation module; the source electrode of the PMOS pipe MP2 forms a second input end of the load self-adaptive bias and feedback current generation module; the drain electrode of the PMOS tube MP1 is respectively connected with the drain electrode of the NMOS tube MN3, the grid electrode of the NOMS tube MN3, the grid electrode of the NOMS tube MN4 and the grid electrode of the NOMS tube MN 5; the grid electrode of the PMOS tube MP1 is respectively connected with the grid electrode and the drain electrode of the PMOS tube MP2 and the drain electrode of the NMOS tube MN 4.
The drain electrode of the NOMS transistor MN5 is respectively connected with the drain electrode of the PMOS transistor MP3, the grid electrode of the PMOS transistor MP3 and the grid electrode of the PMOS transistor MP 4.
The source electrode of the PMOS transistor MP3, the source electrode of the PMOS transistor MP4 and the compensation current source IC1Is connected to an input voltage V as a first voltage domainin。
Drain electrode of PMOS transistor MP4 and compensation current source IC1The output end of the NMOS transistor, the drain electrode of the MN6 of the NMOS transistor, the grid electrode of the MN6 of the NMOS transistor, the grid electrode of the MN7 of the NMOS transistor and the grid electrode of the MN8 of the NMOS transistor are connected; the drain electrode of the NMOS tube MN7 forms the output end of the load self-adaptive bias and feedback current generation module; the drain electrode of the NMOS tube MN8 forms the current output end of the load current self-adaptive feedback module;
the source electrode of the NMOS transistor MN3, the source electrode of the NMOS transistor MN4, the source electrode of the NMOS transistor MN5, the source electrode of the NMOS transistor MN6, the source electrode of the NMOS transistor MN7 and the source electrode of the NMOS transistor MN8 are connected, and the connection point is grounded.
Referring to fig. 4, the current starved current controlled oscillator controlling the clock generation module includes: PMOS pipe MP5, PMOS pipe MP6, PMOS pipe MP7, NMOS pipe MN9, NMOS pipe MN10, fifth inverter, sixth inverter, and a plurality of A units.
Each A unit comprises a PMOS pipe MP8, a seventh inverter and an NMOS pipe MN 11; the drain electrode of the PMOS tube MP8 is connected with the first input end of the seventh inverter, and the second input end of the seventh inverter is connected with the drain electrode of the NMOS tube MN 11; the seventh phase inverters in the units A are sequentially connected with the third input end through the output ends and the third input ends of the seventh phase inverters; the third input end of the seventh inverter in the A unit at the head end is connected with the output end of the seventh inverter in the A unit at the tail end and the third input end of the sixth inverter; and the output end of the sixth inverter is connected with the third input end of the fifth inverter.
The source electrode of the PMOS tube MP5, the source electrode of the PMOS tube MP6, the source electrode of the PMOS tube MP8 in each A unit, the source electrode of the PMOS tube MP7 and the first input end of the fifth inverter are connected, and the connection point forms the first input end of the current starvation type current-controlled oscillator; the grid electrode of the PMOS tube MP5, the grid electrode of the PMOS tube MP6, the grid electrode of the PMOS tube MP8 in each A unit, the grid electrode of the PMOS tube MP7, the drain electrode of the PMOS tube MP5, the source electrode of the NMOS tube MN9, the source electrode of the NMOS tube MN10, the source electrode of the NMOS tube MN11 in each A unit and the second input end of the fifth phase inverter are connected, and the connecting point forms the second input end of the current starvation type current-controlled oscillator; the output end of the fifth inverter forms the output end of the current starvation type current-controlled oscillator;
the drain electrode of the PMOS tube MP6, the drain electrode of the NMOS tube MN9, the gate electrode of the NMOS tube MN9, the gate electrode of the NMOS tube MN11 in each A unit and the gate electrode of the NMOS tube MN10 are connected.
The three voltage domain working modes of the embodiment of the invention are as follows: first of all from an input voltage V as a first voltage domaininFor all circuit blocks except the comparator, the comparator is directly powered by VOUTAnd (5) supplying power. The capacitor module is clocked to generate a capacitor module output V as a second voltage domainSCIn combination with VSCThe load current self-adaptive feedback module supplies power to the master power tube and the slave power tube in the load current self-adaptive feedback module, and the load current self-adaptive module supplies power to the master power tube and the slave power tube in the load current self-adaptive feedback moduleSCFurther converted to an output voltage V as a third voltage domainOUTRealizing the input voltage V of the switched capacitor converterINTo an output voltage VOUTThe conversion of (1). Meanwhile, when the power supply switching module detects the second voltage node V, the power supply switching module supplies power to the power supply switching moduleSCAfter the voltage is stabilized, outputting a stable READY signal, and controlling the supply voltage of the clock generation module from the input voltage V by the READY signal through a control switch tubeINSwitch to VOUTTherefore, the power supply voltage is reduced, and the power consumption of the circuit is reduced.
Level sensing feedback As shown in FIG. 2, the comparator continuously monitors the capacitor module output Vsc, and the first output reference voltage V generated by the low-power voltage reference circuitref1Comparison when V isSCWhen the voltage is too large, the output end of the comparator outputs low level to the control clock generation module to shield clock pulse, so that the switched capacitor network outputs VSCDescending; vSCWhen smaller, the comparator outputs a high level, not masking the clock signal.
The load self-adaptive feedback module is shown in fig. 3, and has the functions that the load self-adaptive feedback module detects the magnitude of load current through a master power tube and a slave power tube, 1/N of the load current is collected and used through the action of an error amplifier, one part of the load self-adaptive feedback module is used as tail current of the error amplifier to realize load self-bias, and the load self-bias is used as feedback current after compensation of a compensation current source to control the frequency of a controlled oscillator. The frequency size adaptive to the load can be provided under different loads, and the load range is expanded. Since the NMOS is used as the master and slave power transistors in this example, a self-bias circuit is added to fix the source voltages of the master and slave power transistors, and the output of the error amplifier adjusts the gate voltage thereof, thereby establishing a current mirror function. Since the characteristics of the self-bias circuit require the addition of an additional start-up circuit, it is common and not illustrated in the drawings. It should be noted that the present invention includes the case of using NMOS as the master-slave power transistor but is not limited to NMOS.
The invention reduces the control circuit loss of the switch capacitor DC-DC converter through a multi-voltage domain technology, and improves the conversion efficiency under different load conditions under the wide load condition through a composite feedback mode.
Specific embodiments of the present invention have been described above in detail. It should be understood that numerous modifications and variations could be devised by those skilled in the art in light of the present teachings without departing from the inventive concepts. Therefore, the technical solutions available to those skilled in the art through logic analysis, reasoning and limited experiments based on the prior art according to the concept of the present invention should be within the scope of protection defined by the claims.

Claims (7)

1.一种多电压域复合反馈模式的开关电容DC-DC转换器，用于对负载的供电电压进行转换，其特征在于，包括供电切换模块、控制时钟产生模块、电平检测反馈模块、低功耗电压基准电路和负载电流自适应反馈模块；1. a switched capacitor DC-DC converter of a multi-voltage domain composite feedback mode, for converting the power supply voltage of the load, it is characterized in that, comprising a power supply switching module, a control clock generation module, a level detection feedback module, a low Power consumption voltage reference circuit and load current adaptive feedback module; 供电切换模块的第一电压端、电容器模块的电源端、低功耗电压基准电路的电源端、负载自电流自适应反馈模块的电源端分别对接作为第一电压域的输入电压Vin；负载电流自适应反馈模块的电压输出端作为第三电压域的输出电压Vout，并分别对接供电切换模块的第二电压输入端、电平检测反馈模块的电源端、负载RL的正极，负载RL的负极接地；The first voltage terminal of the power supply switching module, the power terminal of the capacitor module, the power terminal of the low-power voltage reference circuit, and the power terminal of the load self-current adaptive feedback module are respectively connected to the input voltage V in of the first voltage domain; the load current The voltage output terminal of the adaptive feedback module is used as the output voltage V out of the third voltage domain, and is respectively connected to the second voltage input terminal of the power supply switching module, the power supply terminal of the level detection feedback module, the positive pole of the load RL , and the load RL The negative pole is grounded; 低功耗电压基准电路的第一电压输出端连接电平检测反馈模块的正向输入端，低功耗电压基准电路的第二电压输出端连接负载电流自适应反馈模块的第一输入端；电平检测反馈模块的输出端连接控制时钟产生模块的信号控制端，供电切换模块的输出端连接控制时钟产生模块的电压输入端，控制时钟产生模块的输出端连接电容器模块的输入端；电容器模块的输出端输出作为第二电压域的电容器模块输出Vsc，并分别连接电平检测反馈模块的负向输入端、负载电流自适应反馈模块的第二输入端、供电切换模块的第三电压输入端；负载电流自适应反馈模块的电流输出端连接控制时钟产生模块的反馈信号输入端；The first voltage output end of the low power consumption voltage reference circuit is connected to the forward input end of the level detection feedback module, and the second voltage output end of the low power consumption voltage reference circuit is connected to the first input end of the load current adaptive feedback module; The output end of the level detection feedback module is connected to the signal control end of the control clock generation module, the output end of the power supply switching module is connected to the voltage input end of the control clock generation module, and the output end of the control clock generation module is connected to the input end of the capacitor module; The output terminal outputs the capacitor module output V sc as the second voltage domain, and is respectively connected to the negative input terminal of the level detection feedback module, the second input terminal of the load current adaptive feedback module, and the third voltage input terminal of the power supply switching module. ; The current output terminal of the load current adaptive feedback module is connected to the feedback signal input terminal of the control clock generation module; 所述控制时钟产生模块包括流控振荡器、反馈信号处理模块、两项不交叠时钟处理模块和电平转换电路；The control clock generation module includes a flow-controlled oscillator, a feedback signal processing module, two non-overlapping clock processing modules and a level conversion circuit; 流控振荡器的第一输入端、反馈信号处理模块的第三输入端、两项不交叠时钟的第三输入端相连，连接点构成控制时钟产生模块的电压输入端；流控振荡器的第二输入端构成控制时钟产生模块的反馈信号输入端，流控振荡器的输出端和反馈信号处理模块的第一输入端相连，反馈信号处理模块的第二输入端构成控制时钟产生模块的控制信号输入端；反馈信号处理模块的第一输出端、第二输出端，分别与两项不交叠时钟的第一输入端、第二输入端一一对应连接；两项不交叠时钟的第一输出端、第二输出端分别与电平转换电路的第一输入端、第二输入端一一对应连接，电平转换电路的输出端构成控制时钟产生模块的输出端；The first input end of the flow-controlled oscillator, the third input end of the feedback signal processing module, and the third input ends of the two non-overlapping clocks are connected, and the connection point constitutes the voltage input end of the control clock generation module; The second input terminal constitutes the feedback signal input terminal of the control clock generation module, the output terminal of the flow-controlled oscillator is connected to the first input terminal of the feedback signal processing module, and the second input terminal of the feedback signal processing module constitutes the control clock generation module. Signal input terminal; the first output terminal and the second output terminal of the feedback signal processing module are respectively connected with the first input terminal and the second input terminal of the two non-overlapping clocks in one-to-one correspondence; An output terminal and a second output terminal are respectively connected with the first input terminal and the second input terminal of the level conversion circuit in a one-to-one correspondence, and the output terminal of the level conversion circuit constitutes the output terminal of the control clock generation module; 所述流控振荡器用于采集由负载电流自适应反馈模块输出的反馈电流，并产生一个频率与反馈电流大小呈正比的周期信号；反馈信号处理模块用于根据比较器的反馈信号处理流控振荡器产生的频率与反馈电流大小呈正比的周期信号，并将处理结果依次输出至两项不交叠时钟产生模块、电平转换电路进行处理，并将处理结果输出至电容器模块。The current control oscillator is used to collect the feedback current output by the load current adaptive feedback module, and generate a periodic signal whose frequency is proportional to the feedback current; the feedback signal processing module is used to process the current control according to the feedback signal of the comparator The oscillator generates a periodic signal whose frequency is proportional to the feedback current, and outputs the processing results to the two non-overlapping clock generation modules and the level conversion circuit for processing, and outputs the processing results to the capacitor module. 2.根据权利要求1所述的多电压域复合反馈模式的开关电容DC-DC转换器，其特征在于，还包括负载电容CL；所述负载电容CL的一端连接负载RL的正极，负载电容CL的另一端连接负载的负极。2. The switched-capacitor DC-DC converter in multi-voltage domain composite feedback mode according to claim 1, further comprising a load capacitor CL ; one end of the load capacitor CL is connected to the positive electrode of the load RL , The other end of the load capacitor CL is connected to the negative pole of the load. 3.根据权利要求1所述的多电压域复合反馈模式的开关电容DC-DC转换器，其特征在于，所述供电切换模块包括稳定信号产生模块、第一反相器、第一开关和第二开关；3 . The switched capacitor DC-DC converter in multi-voltage domain composite feedback mode according to claim 1 , wherein the power supply switching module comprises a stable signal generation module, a first inverter, a first switch and a first two switches; 所述稳定信号产生模块的输入端构成供电切换模块的第三输入端；稳定信号产生模块的输出端连接第一反相器的输入端、第一开关的控制端，第一开关的一端构成供电切换模块的第一电压输入端；第一反相器的输出端连接第二开关的控制端，第二开关的一端构成供电切换模块的第二电压输入端；第一开关的另一端与第二开关的另一端相连，构成供电切换模块的输出端 。The input end of the stable signal generation module constitutes the third input end of the power supply switching module; the output end of the stable signal generation module is connected to the input end of the first inverter and the control end of the first switch, and one end of the first switch constitutes the power supply The first voltage input end of the switching module; the output end of the first inverter is connected to the control end of the second switch, and one end of the second switch constitutes the second voltage input end of the power supply switching module; the other end of the first switch is connected to the second voltage input end of the second switch. The other end of the switch is connected to form the output end of the power supply switching module. 4.根据权利要求1所述的多电压域复合反馈模式的开关电容DC-DC转换器，其特征在于，所述负载电流自适应反馈模块包括：误差放大器op1、主从功率管阵列，以及负载自适应偏置及反馈电流产生模块；4. The switched capacitor DC-DC converter in multi-voltage domain composite feedback mode according to claim 1, wherein the load current adaptive feedback module comprises: an error amplifier op1, a master-slave power tube array, and a load Adaptive bias and feedback current generation module; 所述主从功率管阵列宽长比为1：N，其中N为大于1的整数，主从功率管包括主功率管和从功率管；误差放大器op1的电源端构成负载电流自适应反馈模块的电源端，误差放大器op1的正向输入端构成负载电流自适应反馈模块的第一输入端，误差放大器op1的输出端连接主从功率管阵列中各个功率管的栅极；主功率管的漏极和从功率管的漏极相连，连接点构成负载电流自适应反馈模块的第二输入端；主功率管的源极、误差放大器op1的负向输入端、负载自适应偏置及反馈电流产生模块的第一输入端相连，连接点构成负载自适应反馈模块的电压输出端；负载自适应偏置及反馈电流产生模块的第一输出端构成负载电流自适应反馈模块的电流输出端；The width-length ratio of the master-slave power tube array is 1:N, where N is an integer greater than 1, and the master-slave power tube includes a master power tube and a slave power tube; the power supply end of the error amplifier op1 constitutes the load current adaptive feedback module. At the power supply end, the forward input end of the error amplifier op1 constitutes the first input end of the load current adaptive feedback module, and the output end of the error amplifier op1 is connected to the gates of each power tube in the master-slave power tube array; the drain of the master power tube It is connected to the drain of the slave power tube, and the connection point constitutes the second input terminal of the load current adaptive feedback module; the source of the main power tube, the negative input terminal of the error amplifier op1, the load adaptive bias and the feedback current generation module The first input end of the load adaptive feedback module is connected, and the connection point constitutes the voltage output end of the load adaptive feedback module; the first output end of the load adaptive bias and feedback current generation module constitutes the current output end of the load current adaptive feedback module; 从功率管的源极连接负载自适应偏置及反馈电流产生模块的第二输入端；负载自适应偏置及反馈电流产生模块的第二输出端连接误差放大器的偏置电流输入端。The source of the power tube is connected to the second input terminal of the load adaptive bias and feedback current generation module; the second output terminal of the load adaptive bias and feedback current generation module is connected to the bias current input terminal of the error amplifier. 5.根据权利要求4所述的多电压域复合反馈模式的开关电容DC-DC转换器，其特征在于，所述主功率管为NMOS管MN1，所述从功率管为NMOS管MN2；5. The switched capacitor DC-DC converter in multi-voltage domain composite feedback mode according to claim 4, wherein the master power transistor is an NMOS transistor MN1, and the slave power transistor is an NMOS transistor MN2; 所述负载自适应偏置及反馈电流产生模块包括：NMOS管MN3、NMOS管MN4、NMOS管MN5、NMOS管MN6、NMOS管MN7、NMOS管MN8、PMOS管MP1、PMOS管MP2、PMOS管MP3、PMOS管MP4和补偿电流源IC1；The load adaptive bias and feedback current generation module includes: NMOS transistor MN3, NMOS transistor MN4, NMOS transistor MN5, NMOS transistor MN6, NMOS transistor MN7, NMOS transistor MN8, PMOS transistor MP1, PMOS transistor MP2, PMOS transistor MP3, PMOS tube MP4 and compensation current source I C1 ; PMOS管MP1的源极构成负载自适应偏置及反馈电流产生模块的第一输入端；PMOS管MP2的源极构成负载自适应偏置及反馈电流产生模块的第二输入端；PMOS管MP1的漏极分别和NMOS管MN3的漏极、NOMS管MN3的栅极、NOMS管MN4的栅极、NOMS管MN5的栅极相连；PMOS管MP1的栅极分别和PMOS管MP2的栅极、PMOS管MP2的漏极、NMOS管MN4的漏极相连；The source of the PMOS transistor MP1 constitutes the first input terminal of the load adaptive bias and feedback current generation module; the source of the PMOS transistor MP2 constitutes the second input terminal of the load adaptive bias and feedback current generation module; The drain is connected to the drain of the NMOS transistor MN3, the gate of the NOMS transistor MN3, the gate of the NOMS transistor MN4, and the gate of the NOMS transistor MN5 respectively; the gate of the PMOS transistor MP1 is respectively connected to the gate of the PMOS transistor MP2, the gate of the PMOS transistor The drain of MP2 is connected to the drain of NMOS transistor MN4; NOMS管MN5的漏极分别和PMOS管MP3的漏极、PMOS管MP3的栅极、PMOS管MP4的栅极相连；PMOS管MP3的源极、PMOS管MP4的源极、补偿电流源IC1的输入端相连，对接作为第一电压域的输入电压Vin；PMOS管MP4的漏极和补偿电流源IC1的输出端、NMOS管的MN6的漏极、NMOS管的MN6的栅极、NMOS管的MN7的栅极、NMOS管的MN8的栅极相连；NMOS管MN7的漏极构成负载自适应偏置及反馈电流产生模块的第二输出端；NMOS管MN8的漏极构成负载电流自适应反馈模块的电流输出端；The drain of the NOMS tube MN5 is connected to the drain of the PMOS tube MP3, the gate of the PMOS tube MP3, and the gate of the PMOS tube MP4 respectively; the source of the PMOS tube MP3, the source of the PMOS tube MP4, the compensation current source I C1 The input terminals are connected to each other and connected to the input voltage Vin as the first voltage domain; the drain of the PMOS tube MP4 and the output terminal of the compensation current source I C1 , the drain of the MN6 of the NMOS tube, the gate of the MN6 of the NMOS tube, the gate of the NMOS tube The gate of MN7 is connected to the gate of MN8 of the NMOS transistor; the drain of the NMOS transistor MN7 constitutes the second output terminal of the load adaptive bias and feedback current generation module; the drain of the NMOS transistor MN8 constitutes the load current adaptive feedback module The current output terminal of ; NMOS管MN3的源极、NMOS管MN4的源极、NMOS管MN5的源极、NMOS管MN6的源极、NMOS管MN7的源极、NMOS管MN8的源极相连，连接点接地。The source of NMOS transistor MN3, the source of NMOS transistor MN4, the source of NMOS transistor MN5, the source of NMOS transistor MN6, the source of NMOS transistor MN7, and the source of NMOS transistor MN8 are connected, and the connection point is grounded. 6.根据权利要求1所述的多电压域复合反馈模式的开关电容DC-DC转换器，其特征在于，所述反馈信号处理模块包括第二反相器、第三反相器、第四反相器和与非门；6 . The switched capacitor DC-DC converter in multi-voltage domain composite feedback mode according to claim 1 , wherein the feedback signal processing module comprises a second inverter, a third inverter, a fourth inverter Phaser and NAND gate; 所述第二反相器的一端构成反馈信号处理模块的第二输入端，第二反相器的另一端和第三反相器的一端相连，第三反相器的另一端和与非门的A端连接，与非门的B端构成反馈信号处理模块的第一输入端，与非门的C端和第四反相器的一端相连，连接点构成反馈信号处理模块的第一输出端，第四反相器的另一端构成反馈信号处理模块的第二输出端。One end of the second inverter forms the second input end of the feedback signal processing module, the other end of the second inverter is connected to one end of the third inverter, and the other end of the third inverter is connected to the NAND gate The A end of the NAND gate is connected, the B end of the NAND gate constitutes the first input end of the feedback signal processing module, the C end of the NAND gate is connected to one end of the fourth inverter, and the connection point constitutes the first output end of the feedback signal processing module , the other end of the fourth inverter constitutes the second output end of the feedback signal processing module. 7.根据权利要求1所述的多电压域复合反馈模式的开关电容DC-DC转换器，其特征在于，所述流控振荡器为电流饥饿型流控振荡器；所述电流饥饿型流控振荡器包括PMOS管MP5、PMOS管MP6、PMOS管MP7、NMOS管MN9、NMOS管MN10、第五反相器、第六反相器和多个A单元；7 . The switched capacitor DC-DC converter in multi-voltage domain compound feedback mode according to claim 1 , wherein the current-controlled oscillator is a current-starved current-controlled oscillator; The oscillator includes a PMOS transistor MP5, a PMOS transistor MP6, a PMOS transistor MP7, an NMOS transistor MN9, an NMOS transistor MN10, a fifth inverter, a sixth inverter and a plurality of A units; 所述各个A单元包括PMOS管MP8、第七反相器和NMOS管MN11；PMOS管MP8的漏极连接第七反相器的第一输入端相连，第七反相器的第二输入端和NMOS管MN11的漏极相连；所述各个A单元中的第七反相器通过各第七反相器的输出端和第三输入端依次连接；首端的A单元中的第七反相器的第三输入端和尾端的A单元中的第七反相器的输出端，以及第六反相器的第三输入端连接；第六反相器的输出端和第五反相器的第三输入端相连；Each A unit includes a PMOS transistor MP8, a seventh inverter and an NMOS transistor MN11; the drain of the PMOS transistor MP8 is connected to the first input end of the seventh inverter, and the second input end of the seventh inverter is connected to the first input end of the seventh inverter. The drains of the NMOS transistor MN11 are connected to each other; the seventh inverters in the respective A units are sequentially connected through the output terminals of the seventh inverters and the third input terminals; The third input end and the output end of the seventh inverter in the A unit of the tail end are connected to the third input end of the sixth inverter; the output end of the sixth inverter is connected to the third input end of the fifth inverter connected to the input; PMOS管MP5的源极、PMOS管MP6的源极、各个A单元中的PMOS管MP8的源极、PMOS管MP7的源极、第五反相器的第一输入端相连，连接点构成电流饥饿型流控振荡器的第一输入端；PMOS管MP5的栅极、PMOS管MP6的栅极、各个A单元中PMOS管MP8的栅极、PMOS管MP7的栅极、PMOS管MP5的漏极、NMOS管MN9的源极、NMOS管MN10的源极、各个A单元中NMOS管MN11的源极、第五反相器的第二输入端相连，连接点构成电流饥饿型流控振荡器的第二输入端；第五反相器的输出端构成电流饥饿型流控振荡器的输出端；The source of the PMOS transistor MP5, the source of the PMOS transistor MP6, the source of the PMOS transistor MP8 in each A unit, the source of the PMOS transistor MP7, and the first input of the fifth inverter are connected, and the connection point constitutes a current starvation The first input terminal of the type flow-controlled oscillator; the gate of the PMOS tube MP5, the gate of the PMOS tube MP6, the gate of the PMOS tube MP8 in each A unit, the gate of the PMOS tube MP7, the drain of the PMOS tube MP5, The source of the NMOS transistor MN9, the source of the NMOS transistor MN10, the source of the NMOS transistor MN11 in each A unit, and the second input of the fifth inverter are connected, and the connection point constitutes the second part of the current-starved current-controlled oscillator. the input end; the output end of the fifth inverter constitutes the output end of the current-starved current-controlled oscillator; PMOS管MP6的漏极、NMOS管MN9的漏极、NMOS管MN9的栅极、各个A单元中NMOS管MN11的栅极、NMOS管MN10的栅极相连。The drain of the PMOS transistor MP6, the drain of the NMOS transistor MN9, the gate of the NMOS transistor MN9, the gate of the NMOS transistor MN11 in each A unit, and the gate of the NMOS transistor MN10 are connected to each other.
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