CN111883039A - Drive chip and display device - Google Patents
Drive chip and display device Download PDFInfo
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- CN111883039A CN111883039A CN202010761614.7A CN202010761614A CN111883039A CN 111883039 A CN111883039 A CN 111883039A CN 202010761614 A CN202010761614 A CN 202010761614A CN 111883039 A CN111883039 A CN 111883039A
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- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
Abstract
The invention discloses a driving chip and a display device. The driving chip comprises a first area, a second area and a third area; along the first direction, the distance between each output terminal positioned in the first area and the first edge is gradually reduced, and the distance between each output terminal positioned in the third area and the first edge is gradually increased; the distances between the output terminals in the second area and the first edge are equal and smaller than the distances between the first edge of the output terminal in the first area and the first edge of the output terminal in the second area; the distances between the input terminals and the first edge are equal; the output terminal group is positioned between the input terminal group and the first edge; and a region surrounded by the output terminal, the first edge and the third edge of the first region, and a region surrounded by the output terminal, the first edge and the fourth edge of the third region are provided with a cushion layer, wherein the first direction is parallel to the plane of the driving chip and the first edge of the driving chip. The technical scheme provided by the embodiment of the invention improves the problem of uneven stress of the driving chip and avoids the damage of the driving chip.
Description
Technical Field
The embodiment of the invention relates to the technical field of display, in particular to a driving chip and a display device.
Background
The driving chip is used for providing various driving signals required by the normal operation of the display panel, and is one of the important components of the display device.
The driver chip is generally mounted on the display panel in a Chip On Glass (COG) manner, and specifically, the driver chip includes a plurality of input terminals and a plurality of output terminals, the display panel includes a plurality of input bonding pads and a plurality of output bonding pads, the input bonding pads are electrically connected to the input terminals in a one-to-one correspondence, and the output bonding pads are electrically connected to the output terminals in a one-to-one correspondence. The input terminal and the output terminal of the driving chip are both of a protruding structure and have a height difference with other regions, and after the driving chip is in contact with the display panel, a gap is reserved between the region, away from one side of the input terminal, of the output terminal in the driving chip and the display panel, so that the driving chip is not stressed uniformly and is easy to damage in the binding process.
Disclosure of Invention
The invention provides a driving chip and a display device, which are used for solving the problem of uneven stress of the driving chip in the binding process and avoiding the damage of the driving chip.
In a first aspect, an embodiment of the present invention provides a driving chip, including:
an output terminal group and an input terminal group; the output terminal group includes a plurality of output terminals; the input terminal group includes a plurality of input terminals;
the driving chip comprises a first edge, a second edge, a third edge and a fourth edge; the first edge and the second edge are opposite; the third side is opposite to the fourth side; the third edge is respectively connected with the first edge and the second edge; the fourth edge is respectively connected with the first edge and the second edge; the first direction is parallel to the plane of the driving chip and is parallel to the first edge of the driving chip;
and along the first direction, the driving chip comprises a first area, a second area and a third area;
in the first direction, a distance between each output terminal located in the first region and the first edge gradually decreases, and a distance between each output terminal located in the third region and the first edge gradually increases; the distances between the output terminals in the second region and the first edge are equal and smaller than the distances between the output terminals in the first region and the first edge in the third region; the distances between the input terminals and the first side are equal; the output terminal group is positioned between the input terminal group and the first edge;
an area surrounded by the output terminal, the first edge, and the third edge of the first region, and an area surrounded by the output terminal, the first edge, and the fourth edge of the third region are provided with a cushioning layer.
In a second aspect, an embodiment of the present invention further provides a display device, including a display panel and the driving chip of the first aspect;
the display panel comprises a display area and a non-display area surrounding the display area; the non-display area is provided with a plurality of fanout lines and a plurality of binding pads; one end of the fanout line is electrically connected with the binding pad; the other end of the fanout line is electrically connected with the signal line of the display area; and each output terminal of the driving chip is electrically connected with each binding pad in a one-to-one correspondence manner.
The driving chip provided by the embodiment of the invention comprises a first area, a second area and a third area which are arranged along a first direction, wherein the first direction is parallel to the plane of the driving chip and a first side of the driving chip, in the first direction, the distance between each output terminal positioned in the first area and the first side is gradually reduced, the distance between each output terminal positioned in the third area and the first side is gradually increased, the distance between each output terminal positioned in the second area and the first side is equal and smaller than the distance between the first side of the output terminals in the first area and the third area, the distance between each input terminal and the first side is equal, an output terminal group is positioned between an input terminal group and the first side, the area surrounded by the output terminals, the first side and the third side of the first area, and the area surrounded by the output terminals, the first side and the fourth side of the third area are provided with a cushion layer, so that in the binding process of the driving chip, the high layer of pad can play the supporting role, and then improves the uneven problem of driver chip atress, avoids driver chip to damage.
Drawings
Other features, objects and advantages of the invention will become more apparent upon reading of the detailed description of non-limiting embodiments made with reference to the following drawings:
FIG. 1 is a schematic diagram of a partial cross-sectional structure of a display device in the prior art;
fig. 2 is a schematic structural diagram of a driving chip according to an embodiment of the present invention;
fig. 3 is a schematic structural diagram of another driving chip according to an embodiment of the present invention;
FIG. 4 is a schematic cross-sectional view taken along the dashed line AB in FIG. 3;
FIG. 5 is a schematic view of a further cross-sectional configuration taken along the dashed line AB of FIG. 3;
fig. 6 is a schematic partial cross-sectional view of a display device according to an embodiment of the invention;
fig. 7 is a schematic structural diagram of another driving chip according to an embodiment of the present invention;
FIG. 8 is a schematic structural diagram of another driving chip according to an embodiment of the present invention;
fig. 9 is a schematic structural diagram of another driving chip according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of another driving chip according to an embodiment of the present invention;
fig. 11 is a schematic partial structure diagram of a display device according to an embodiment of the present invention;
FIG. 12 is a schematic structural diagram of the display panel of FIG. 11;
fig. 13 is a schematic cross-sectional view taken along the dashed line CD in fig. 11.
Detailed Description
To further illustrate the technical means and effects of the present invention adopted to achieve the predetermined objects, the following detailed description will be given to specific embodiments, structures, features and effects of a driving chip and a display device according to the present invention with reference to the accompanying drawings and preferred embodiments.
An embodiment of the present invention provides a driver chip, including:
an output terminal group and an input terminal group; the output terminal group includes a plurality of output terminals; the input terminal group includes a plurality of input terminals;
the driving chip comprises a first edge, a second edge, a third edge and a fourth edge; the first edge and the second edge are opposite; the third side is opposite to the fourth side; the third edge is respectively connected with the first edge and the second edge; the fourth edge is respectively connected with the first edge and the second edge; the first direction is parallel to the plane of the driving chip and is parallel to the first edge of the driving chip;
and along the first direction, the driving chip comprises a first area, a second area and a third area;
in the first direction, a distance between each output terminal located in the first region and the first edge gradually decreases, and a distance between each output terminal located in the third region and the first edge gradually increases; the distances between the output terminals in the second region and the first edge are equal and smaller than the distances between the output terminals in the first region and the first edge in the third region; the distances between the input terminals and the first side are equal; the output terminal group is positioned between the input terminal group and the first edge;
an area surrounded by the output terminal, the first edge, and the third edge of the first region, and an area surrounded by the output terminal, the first edge, and the fourth edge of the third region are provided with a cushioning layer.
The driving chip provided by the embodiment of the invention comprises a first area, a second area and a third area which are arranged along a first direction, wherein the first direction is parallel to the plane of the driving chip and a first side of the driving chip, in the first direction, the distance between each output terminal positioned in the first area and the first side is gradually reduced, the distance between each output terminal positioned in the third area and the first side is gradually increased, the distance between each output terminal positioned in the second area and the first side is equal and smaller than the distance between the first side of the output terminals in the first area and the third area, the distance between each input terminal and the first side is equal, an output terminal group is positioned between an input terminal group and the first side, the area surrounded by the output terminals, the first side and the third side of the first area, and the area surrounded by the output terminals, the first side and the fourth side of the third area are provided with a cushion layer, so that in the binding process of the driving chip, the high layer of pad can play the supporting role, and then improves the uneven problem of driver chip atress, avoids driver chip to damage.
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments obtained by a person of ordinary skill in the art based on the embodiments of the present invention without any creative work belong to the protection scope of the present invention.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other embodiments that depart from the specific details disclosed herein, and it will be recognized by those skilled in the art that the present invention may be practiced without these specific details.
Next, the present invention is described in detail with reference to the schematic drawings, and in the detailed description of the embodiments of the present invention, the schematic drawings showing the structure of the device are not partially enlarged in general scale for convenience of description, and the schematic drawings are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and height should be included in the actual fabrication.
Fig. 1 is a schematic partial cross-sectional view of a display device in the prior art. As shown in fig. 1, the display device includes a driving chip 100 and a display panel 200, the driving chip 100 is mounted on a bonding area 22 of the display panel 200 in a COG manner, and the display panel 200 includes a display area 10 and a fan-out area 21 in addition to the bonding area 22. After the driving chip 100 is aligned with the display panel 200, a gap H is formed between the driving chip 100 and the region 211 between the bonding pad 220 and the fan-out region 21 in the bonding region 22, so that the driving chip 100 is stressed unevenly and is easy to damage in the bonding process. Especially, in the display panel 200 with the bonding pads 220 arranged in a two-end sinking manner, the problem of uneven stress when the driver chip 100 is bonded is particularly serious.
In order to solve the above problem, embodiments of the present invention provide a driving chip, in which a pad layer is disposed at a position opposite to a region between an output bonding pad and a fan-out region in a display panel, so as to effectively improve the problem of uneven stress on the driving chip and prevent the driving chip from being damaged.
Specifically, fig. 2 is a schematic structural diagram of a driving chip according to an embodiment of the present invention. As shown in fig. 2, the driving chip includes an output terminal group 140 and an input terminal group 150, the output terminal group 140 includes a plurality of output terminals 141, and the input terminal group 150 includes a plurality of input terminals 151.
The driving chip comprises a first edge 101, a second edge 102, a third edge 103 and a fourth edge 104, wherein the first edge 101 is opposite to the second edge 102, the third edge 103 is opposite to the fourth edge 104, the third edge 103 is respectively connected with the first edge 101 and the second edge 102, the fourth edge 104 is respectively connected with the first edge 101 and the second edge 102, the first direction X is parallel to the plane where the driving chip is located and is parallel to the first edge 101 of the driving chip, and along the first direction X, the driving chip comprises a first area 110, a second area 120 and a third area 130.
In the first direction X, the distance k between each output terminal 141 located in the first region 110 and the first side 101 gradually decreases, the distance k between each output terminal 141 located in the third region 130 and the first side 101 gradually increases, the distance k between each output terminal 141 located in the second region 120 and the first side 101 is equal and smaller than the distance k between the output terminal 141 and the first side 101 in the first region 110 and the third region 130, the distance p between each input terminal 151 and the first side 101 is equal, the output terminal group 140 is located between the input terminal group 150 and the first side 101, a region 160 surrounded by the output terminal 141, the first side 101, and the third side 103 of the first region 110, and a region 170 surrounded by the output terminal 141, the first side 101, and the fourth side 104 of the third region 130 are provided with the cushion layer 300.
It should be noted that fig. 1 only illustrates the overall structure of the raised layer 300 as a triangle, but not limited thereto, in other embodiments of the present embodiment, the raised layer 300 may include a plurality of independent sub-portions, and the sub-portions may have the same structure as the output terminal 141 or the input terminal 151, for example.
In this embodiment, the plurality of output terminals 141 are arranged in one or more rows, the plurality of input terminals 151 are arranged in one or more rows, and the specific arrangement manner of the plurality of output terminals 141 and the plurality of input terminals 151 is not limited in this embodiment, and all the manners of "along the first direction X, the distance k between each output terminal 141 located in the first region 110 and the first edge 101 gradually decreases, the distance k between each output terminal 141 located in the third region 130 and the first edge 101 gradually increases, the distance k between each output terminal 141 located in the second region 120 and the first edge 101 is equal and smaller than the distance k between each output terminal 141 and the first edge 101 in the first region 110 and the third region 130, and the distance p between each input terminal 151 and the first edge 101 is equal" are within the protection scope of this embodiment.
It should be further noted that, the output terminals 141 in the output terminal group 140 are arranged in a two-end sinking manner, and such an arrangement manner enables the plurality of output bonding pads, which are arranged corresponding to the output terminal group 140, of the display panel to be arranged in a two-end sinking manner when the driving chip is bonded on the display panel by COG, and the bending region of the fan-out line can be arranged in the bonding region, so that the width of the frame where the fan-out region is located in the display device is reduced, and a narrow frame is realized.
In this embodiment, the pad layer 300 is disposed in the area 160 surrounded by the output terminal 141 of the first region 110, the first side 101, and the third side 103, and the area 170 surrounded by the output terminal 141 of the third region 130, the first side 101, and the fourth side 104, so as to increase the heights of the area 160 and the area 170, and prevent gaps from being formed between the area 160 and the area 170 and the display panel after the driver chip is aligned with the display panel, and thus the stress of the driver chip is more uniform in the binding process.
The driving chip provided by this embodiment includes a first region, a second region and a third region arranged along a first direction, the first direction is parallel to a plane where the driving chip is located and a first side of the driving chip, and along the first direction, distances between output terminals located in the first region and the first side gradually decrease, distances between output terminals located in the third region and the first side gradually increase, distances between output terminals located in the second region and the first side are equal and smaller than distances between first sides of output terminals in the first region and the third region, distances between input terminals and the first side are equal, an output terminal group is located between the input terminal group and the first side, a region surrounded by the output terminals, the first side and the third side of the first region, and a region surrounded by the output terminals, the first side and the fourth side of the third region is provided with a high-level pad layer, so that in a binding process of the driving chip, the high layer of pad can play the supporting role, and then improves the uneven problem of driver chip atress, avoids driver chip to damage.
Fig. 3 is a schematic structural diagram of another driving chip according to an embodiment of the present invention. As shown in fig. 3, the elevating layer 300 includes a plurality of dummy terminals 310 arranged on a plane where the driving chip 100 is located.
It should be noted that, this arrangement can reduce the material required for the cushion layer 300 while obtaining a good supporting effect, thereby reducing the production cost. On the other hand, the dummy terminal 310 may have the same shape as the output terminal 141 or the input terminal 151, so that the overall design and manufacture of the dummy terminal 310 and the output terminal 141 or the input terminal 151 inherent in the driver chip is achieved, which is beneficial to reducing the difficulty in designing and manufacturing the driver chip.
Illustratively, fig. 4 is a schematic cross-sectional view along the dashed line AB in fig. 3. The dummy terminal 310 may be formed in the same process as the output terminal 141, and the thickness of the dummy terminal 310 is the same as that of the output terminal 141 in a direction Z perpendicular to the plane of the driving chip 100.
It should be noted that, in such an arrangement manner, a dedicated film layer and a dedicated process are not required to be arranged for the dummy terminal 310, which is beneficial to reducing the difficulty in manufacturing the driving chip.
Alternatively, fig. 5 is a schematic view of another cross-sectional structure along the dashed line AB in fig. 3. As shown in fig. 5, the thickness of the dummy terminal 310 is smaller than that of the output terminal 141 in a direction Z perpendicular to the plane of the driving chip 100.
Fig. 6 is a schematic partial cross-sectional view of a display device according to an embodiment of the invention. As shown in fig. 6, the driving chip 100 is bonded to the display panel 200 in a COG manner, and the output terminal 141 of the driving chip 100 is electrically connected in contact with an output bonding pad 210 correspondingly disposed on the display panel 200.
The display panel 200 includes a display area 10, a fan-out area 21, and a bonding area 22, as well as a substrate 207, and a driving circuit layer 208, a planarization layer 201, a touch routing layer 203, a common electrode layer 204, and a pixel electrode layer 205 sequentially formed on the substrate 207, where the touch routing layer 203 includes a plurality of touch signal lines electrically connected to touch electrodes disposed in the display area 10 for transmitting touch electrical signals. The driving circuit layer 208 includes a plurality of thin film transistors 202, the pixel electrode layer 205 includes a plurality of pixel electrodes, and the thin film transistors 202 are electrically connected to the pixel electrodes in a one-to-one correspondence. In the normal operation of the display panel 200, a voltage is applied to both the pixel electrode layer 205 and the common electrode layer 204, an electric field is formed between the two, liquid crystal molecules (not shown in fig. 6) in the display panel rotate under the control of the electric field, and the adjustment of the amount of transmitted light by the liquid crystal layer (not shown in fig. 6) is realized, so that image display is realized. In addition, the driving circuit layer 208 further includes a light-shielding layer 206 for shielding light incident on the thin film transistor 202 from the substrate 207 side to prevent the thin film transistor 202 from generating a leakage current.
In this embodiment, the relative positions of the common electrode layer 204 and the pixel electrode layer 205 are not limited, that is, the common electrode layer 204 may be located on a side of the pixel electrode layer 205 close to the substrate 207, or may be located on a side of the pixel electrode layer 205 far from the substrate 207. The driving circuit layer 208 includes a gate metal layer and a source-drain metal layer, the gate of the thin film transistor 202 is located on the gate metal layer, the source and the drain of the thin film transistor 202 are located on the source-drain metal layer, and the gate metal layer, the source-drain metal layer and the touch routing layer 203 can be used as routing film layers of signal lines such as data lines in the display area 10. The touch routing layer 203 can be increased or decreased according to whether the display panel has a touch function, and the display panel without the touch function can not include the touch routing layer 203.
As shown in fig. 6, the output bonding pad 210 in the display panel 200 may include three conductive structures stacked in sequence and electrically connected in sequence, the three conductive structures are respectively disposed on the same layer as at least one of the gate metal layer, the source drain metal layer, and the common electrode layer and the pixel electrode layer, and the signal lines in the gate metal layer and the source drain metal layer may be directly electrically connected to the conductive structures on the same layer in the output bonding pad 210, for example, integrally formed, so as to simplify the electrical connection design between the signal lines and the output bonding pad 210.
Specifically, in order to facilitate the preparation of the output bonding pad 210, the electrical performance of the output bonding pad 210 is improved, and meanwhile, the electrical signals between the adjacent metal layers in the bonding region 22 are ensured not to interfere with each other, except for the region 211 between the output bonding pad 210 and the fan-out region 21, the planarization layer 201 in the other region 212 of the bonding region 22 is removed, so that the height of the region 211 between the output bonding pad 210 and the fan-out region 21 is greater than the height of the other region 212 of the bonding region 22. In this embodiment, the thickness of the dummy terminal 310 is smaller than that of the output terminal 141, so that after the driver chip 100 is bonded, the surface thereof away from the display panel 200 is flat, and the bonding stability is good.
It should be noted that fig. 6 is only an example in which the display panel is a liquid crystal display panel, and is not limited thereto, and in another embodiment of the present embodiment, the display panel may be an organic light emitting display panel, for example, and the present embodiment is not particularly limited thereto.
Fig. 7 is a schematic structural diagram of another driving chip according to an embodiment of the present invention. As shown in fig. 7, the plurality of dummy terminals 310 disposed in the area 160 surrounded by the output terminal 141 of the first region 110, the first side 101, and the third side 103 are arranged along the first side 101 and the third side 103, and the plurality of dummy terminals 310 disposed in the area 170 surrounded by the output terminal 141 of the third region 130, the first side 101, and the fourth side 104 are arranged along the first side 101 and the fourth side 104.
It should be noted that the dummy terminals 310 are disposed at the edges of the area 160 and the area 170, and in the bonding process of the driving chip, the dummy terminals 310 can effectively support the area 160 and the area 170, so as to prevent the driving chip from being damaged due to uneven stress. And while ensuring that the above-mentioned effects are achieved, the number of the dummy terminals 310 disposed in the region 160 and the region 170 is small, which is convenient for design and manufacture and low in cost.
Fig. 8 is a schematic structural diagram of another driving chip according to an embodiment of the present invention. As shown in fig. 8, the plurality of dummy terminals 310 are uniformly arranged in the area 160 surrounded by the output terminal 141, the first side 101, and the third side 103 of the first region 110, and the plurality of dummy terminals 310 are uniformly arranged in the area 170 surrounded by the output terminal 141, the first side 101, and the fourth side 104 of the third region 130.
It should be noted that the dummy terminals 310 are uniformly arranged in the area 160 and the area 170, so that the area 160 and the area 170 have a uniform supporting force during the bonding process of the driver chip, and the driver chip is stressed more uniformly and is not easily damaged.
It should be noted that, in the present embodiment, a specific arrangement manner of the dummy terminals 310 is not limited, and may be a regular row-column arrangement shown in fig. 8, or may be another uniform arrangement manner. The dummy terminal 310 may have any shape, and may be appropriately disposed according to actual needs.
Fig. 9 is a schematic structural diagram of another driving chip according to an embodiment of the present invention. As shown in fig. 9, a plurality of dummy terminals 310 are located at corners of an area 160 surrounded by the output terminals 141, the first side 101, and the third side 103 of the first region 110, and a plurality of dummy terminals 310 are located at corners of an area 170 surrounded by the output terminals 141, the first side 101, and the fourth side 104 of the third region 130.
It should be noted that, the size of the region 160 and the region 170 is usually smaller, so the dummy terminals 310 disposed at the corners can effectively support the region 160 and the region 170, the strength of the driving chip in the region is improved, the number of the required dummy terminals 310 is extremely small, the manufacturing is convenient, and the effect of improving the stress uniformity of the driving chip is good.
Illustratively, as shown in fig. 9, four dummy terminals 310 arranged in a matrix shape are disposed at corners of the area 160 and the area 170 near the second area 120, and eight dummy terminals 310 arranged in two rows and four columns are disposed at corners of the area 160 and the area 170 far from the second area 120. It is understood that the number of the dummy terminals 310 to be disposed at the corners of the regions 160 and 170 may be different according to the conditions of the size of the driving chip, the arrangement of the output terminals 141, the size of the output terminals 141, and the like, and may be appropriately set according to actual needs, and is not limited to the specific implementation provided in this embodiment.
Fig. 10 is a schematic structural diagram of another driving chip according to an embodiment of the present invention. As shown in fig. 10, the driving chip may further include a first electrostatic conductive ring 400, the first electrostatic conductive ring 400 is grounded, and a vertical projection of the padding layer 300 on a plane of the driving chip is located in an area surrounded by the vertical projection of the first electrostatic conductive ring 400 on the plane of the driving chip.
In a display device in which a driver chip is bonded by a COG method, static electricity is likely to be generated in a region to which the spacer layer 300 belongs, and thus, static electricity damage is likely to occur in components of the display panel. In order to avoid the above problems, the first electrostatic conductive ring 400 is disposed on the driving chip around the pad layer 300, and the first electrostatic conductive ring 400 is used to conduct away the static electricity generated in the region where the pad layer 300 belongs, so as to ensure that the normal operation of the display device is not affected by the static electricity.
It should be noted that fig. 10 only illustrates the first electrostatic conductive ring 400 as having a triangular structure, but is not limited thereto, and in other embodiments of the present embodiment, the first electrostatic conductive ring 400 may have other shapes, and all shapes that can completely surround the pad layer 300 are within the protection scope of the present embodiment.
The embodiment of the invention also provides a display device. Fig. 11 is a schematic partial structure diagram of a display device according to an embodiment of the present invention. As shown in fig. 11, the display device 1 includes a display panel 200 and a driving chip 100 according to any embodiment of the present invention.
Fig. 12 is a schematic structural diagram of the display panel in fig. 11. As shown in fig. 12, the display panel 200 includes a display region 10 and a non-display region 20 surrounding the display region 10, the non-display region 20 is provided with a plurality of fan-out lines 401 and a plurality of bonding pads 220, one end of the fan-out line 401 is electrically connected to the bonding pads 220, and the other end of the fan-out line 401 is electrically connected to a signal line 402 of the display region 10. Fig. 13 is a schematic cross-sectional view taken along the dashed line CD in fig. 11. As shown in fig. 13, the output terminals 141 of the driver chip 100 are electrically connected to the bonding pads 220 in a one-to-one correspondence.
Alternatively, the bonding pad 220 may be, for example, an output bonding pad, and on this basis, the non-display area 20 of the display panel 200 may further include an input bonding pad 230 disposed corresponding to an input terminal in the driver chip 100, as shown in fig. 12.
The display device 1 provided in the embodiment of the present invention includes the display panel 200 according to any embodiment of the present invention, has the technical features of the display panel 200 according to any embodiment of the present invention, and has the same or corresponding beneficial effects as the display panel 200 included therein, which are not described herein again.
With continued reference to fig. 12 and 13, the non-display area 20 of the display panel 200 is provided with a second electrostatic conductive ring 500, the second electrostatic conductive ring 500 is grounded, and a vertical projection of the pad-up layer 300 in the driving chip 100 on the plane of the driving chip 100 is located in an area surrounded by a vertical projection of the second electrostatic conductive ring 500 on the plane of the driving chip 100.
It should be noted that static electricity is easily generated in the region 211 where the padding layer 300 is disposed, so as to affect the normal operation of the display panel, and the second electrostatic conductive ring 500 is disposed to conduct away the static electricity generated in the region 211, so as to protect the display panel from being damaged by the static electricity.
It can be understood that the second electrostatic conductive ring 500 and the first electrostatic conductive ring on the driving chip 100 both have electrostatic conductive functions, and can prevent static electricity generated in the region 211 where the padding layer 300 is disposed from damaging the display panel, and therefore, the display device may include either the second electrostatic conductive ring 500 or the first electrostatic conductive ring, or both the second electrostatic conductive ring 500 and the first electrostatic conductive ring, and in the latter case, the shapes of the second electrostatic conductive ring 500 and the first electrostatic conductive ring are not affected by each other, and may be the same or different.
For example, in order to make the second electrostatic discharge ring 500 and the first electrostatic discharge ring have good electrostatic discharge capability, the second electrostatic discharge ring 500 and the first electrostatic discharge ring are formed by using a material with high conductivity, and the forming material may be, for example, metal.
It is to be noted that the foregoing is only illustrative of the preferred embodiments of the present invention and the technical principles employed. It will be understood by those skilled in the art that the present invention is not limited to the particular embodiments described herein, but is capable of various obvious modifications, rearrangements, combinations and substitutions as will now become apparent to those skilled in the art without departing from the scope of the invention. Therefore, although the present invention has been described in greater detail by the above embodiments, the present invention is not limited to the above embodiments, and may include other equivalent embodiments without departing from the spirit of the present invention, and the scope of the present invention is determined by the scope of the appended claims.
Claims (10)
1. A driver chip, comprising:
an output terminal group and an input terminal group; the output terminal group includes a plurality of output terminals; the input terminal group includes a plurality of input terminals;
the driving chip comprises a first edge, a second edge, a third edge and a fourth edge; the first edge and the second edge are opposite; the third side is opposite to the fourth side; the third edge is respectively connected with the first edge and the second edge; the fourth edge is respectively connected with the first edge and the second edge; the first direction is parallel to the plane of the driving chip and is parallel to the first edge of the driving chip;
and along the first direction, the driving chip comprises a first area, a second area and a third area;
in the first direction, a distance between each output terminal located in the first region and the first edge gradually decreases, and a distance between each output terminal located in the third region and the first edge gradually increases; the distances between the output terminals in the second region and the first edge are equal and smaller than the distances between the output terminals in the first region and the first edge in the third region; the distances between the input terminals and the first side are equal; the output terminal group is positioned between the input terminal group and the first edge;
an area surrounded by the output terminal, the first edge, and the third edge of the first region, and an area surrounded by the output terminal, the first edge, and the fourth edge of the third region are provided with a cushioning layer.
2. The driver chip of claim 1, wherein the pad level comprises a plurality of dummy terminals arranged in a plane in which the driver chip is located.
3. The driver chip of claim 2, wherein the dummy terminal and the output terminal are formed in the same process;
in a direction perpendicular to a plane in which the driving chip is located, the thickness of the dummy terminal is the same as that of the output terminal.
4. The driver chip according to claim 2, wherein the thickness of the dummy terminal is smaller than the thickness of the output terminal in a direction perpendicular to a plane in which the driver chip is located.
5. The driver chip according to claim 2, wherein a plurality of dummy terminals provided in an area surrounded by the output terminal, the first edge, and the third edge of the first region are arranged along the first edge and the third edge;
a plurality of dummy terminals provided in an area surrounded by the output terminal, the first edge, and the fourth edge of the third area are arranged along the first edge and the fourth edge.
6. The driver chip according to claim 2, wherein a plurality of the dummy terminals are arranged uniformly in an area surrounded by the output terminal, the first edge, and the third edge of the first region;
the plurality of dummy terminals are uniformly arranged in an area surrounded by the output terminal, the first edge, and the fourth edge of the third area.
7. The driver chip according to claim 2, wherein a plurality of the dummy terminals are located at corners of an area surrounded by the output terminal, the first edge, and the third edge of the first region;
a plurality of the dummy terminals are located at corners of an area surrounded by the output terminals, the first edge, and the fourth edge of the third area.
8. The driver chip of claim 1, further comprising a first electrostatic conductive ring; the first electrostatic conductive ring is grounded, and the vertical projection of the padding layer on the plane of the driving chip is located in an area surrounded by the vertical projection of the first electrostatic conductive ring on the plane of the driving chip.
9. A display device comprising a display panel and the driver chip according to any one of claims 1 to 8;
the display panel comprises a display area and a non-display area surrounding the display area; the non-display area is provided with a plurality of fanout lines and a plurality of binding pads; one end of the fanout line is electrically connected with the binding pad; the other end of the fanout line is electrically connected with the signal line of the display area; and each output terminal of the driving chip is electrically connected with each binding pad in a one-to-one correspondence manner.
10. The display device according to claim 9, wherein the non-display region of the display panel is provided with a second electrostatic conductive ring; the second electrostatic conductive ring is grounded, and the vertical projection of the padding layer on the plane of the driving chip is located in an area surrounded by the vertical projection of the second electrostatic conductive ring on the plane of the driving chip.
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Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112242099A (en) * | 2020-11-09 | 2021-01-19 | 上海中航光电子有限公司 | Array substrate, display panel and display device |
| CN112860115A (en) * | 2021-03-04 | 2021-05-28 | 武汉华星光电半导体显示技术有限公司 | Display panel and test system and test method thereof |
| CN113421909A (en) * | 2021-06-24 | 2021-09-21 | 云谷（固安）科技有限公司 | Display panel and display device |
| CN114373390A (en) * | 2022-01-06 | 2022-04-19 | 武汉华星光电半导体显示技术有限公司 | Display panel and driving chip |
| CN114389064A (en) * | 2022-01-07 | 2022-04-22 | 武汉华星光电半导体显示技术有限公司 | Display module |
| WO2023050474A1 (en) * | 2021-09-30 | 2023-04-06 | 武汉华星光电技术有限公司 | Display panel and display device |
| WO2023050494A1 (en) * | 2021-09-30 | 2023-04-06 | 武汉华星光电技术有限公司 | Driving chip and display panel |
| WO2023108679A1 (en) * | 2021-12-16 | 2023-06-22 | 武汉华星光电技术有限公司 | Display panel and display device |
Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080049912A (en) * | 2006-12-01 | 2008-06-05 | 엘지디스플레이 주식회사 | Driving ic and display apparatus having the same |
| CN103941497A (en) * | 2013-06-28 | 2014-07-23 | 上海中航光电子有限公司 | Thin film transistor array substrate, manufacturing method and liquid crystal display panel |
| CN104571720A (en) * | 2015-02-06 | 2015-04-29 | 京东方科技集团股份有限公司 | Array substrate, embedded touch panel and display device |
| CN106501983A (en) * | 2016-12-23 | 2017-03-15 | 厦门天马微电子有限公司 | Array base palte, display floater and display device |
| CN107490909A (en) * | 2016-11-05 | 2017-12-19 | 思博半导体股份有限公司 | Narrow frame display module and data output device |
| CN109559644A (en) * | 2017-09-27 | 2019-04-02 | 上海和辉光电有限公司 | A kind of flexible display panels and display device |
| CN110579917A (en) * | 2019-10-15 | 2019-12-17 | 上海中航光电子有限公司 | display module and display device |
| US20200211428A1 (en) * | 2018-12-28 | 2020-07-02 | Xiamen Tianma Micro-Electronics Co., Ltd. | Display panel and display apparatus |
| CN111383554A (en) * | 2019-11-06 | 2020-07-07 | 上海中航光电子有限公司 | Display panel and display device |
-
2020
- 2020-07-31 CN CN202010761614.7A patent/CN111883039B/en active Active
Patent Citations (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| KR20080049912A (en) * | 2006-12-01 | 2008-06-05 | 엘지디스플레이 주식회사 | Driving ic and display apparatus having the same |
| CN103941497A (en) * | 2013-06-28 | 2014-07-23 | 上海中航光电子有限公司 | Thin film transistor array substrate, manufacturing method and liquid crystal display panel |
| CN104571720A (en) * | 2015-02-06 | 2015-04-29 | 京东方科技集团股份有限公司 | Array substrate, embedded touch panel and display device |
| CN107490909A (en) * | 2016-11-05 | 2017-12-19 | 思博半导体股份有限公司 | Narrow frame display module and data output device |
| CN106501983A (en) * | 2016-12-23 | 2017-03-15 | 厦门天马微电子有限公司 | Array base palte, display floater and display device |
| CN109559644A (en) * | 2017-09-27 | 2019-04-02 | 上海和辉光电有限公司 | A kind of flexible display panels and display device |
| US20200211428A1 (en) * | 2018-12-28 | 2020-07-02 | Xiamen Tianma Micro-Electronics Co., Ltd. | Display panel and display apparatus |
| CN110579917A (en) * | 2019-10-15 | 2019-12-17 | 上海中航光电子有限公司 | display module and display device |
| CN111383554A (en) * | 2019-11-06 | 2020-07-07 | 上海中航光电子有限公司 | Display panel and display device |
Cited By (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112242099A (en) * | 2020-11-09 | 2021-01-19 | 上海中航光电子有限公司 | Array substrate, display panel and display device |
| CN112860115A (en) * | 2021-03-04 | 2021-05-28 | 武汉华星光电半导体显示技术有限公司 | Display panel and test system and test method thereof |
| CN113421909A (en) * | 2021-06-24 | 2021-09-21 | 云谷（固安）科技有限公司 | Display panel and display device |
| WO2023050474A1 (en) * | 2021-09-30 | 2023-04-06 | 武汉华星光电技术有限公司 | Display panel and display device |
| WO2023050494A1 (en) * | 2021-09-30 | 2023-04-06 | 武汉华星光电技术有限公司 | Driving chip and display panel |
| WO2023108679A1 (en) * | 2021-12-16 | 2023-06-22 | 武汉华星光电技术有限公司 | Display panel and display device |
| CN114373390A (en) * | 2022-01-06 | 2022-04-19 | 武汉华星光电半导体显示技术有限公司 | Display panel and driving chip |
| CN114373390B (en) * | 2022-01-06 | 2023-06-02 | 武汉华星光电半导体显示技术有限公司 | Display panel and driving chip |
| CN114389064A (en) * | 2022-01-07 | 2022-04-22 | 武汉华星光电半导体显示技术有限公司 | Display module |
| CN114389064B (en) * | 2022-01-07 | 2023-06-02 | 武汉华星光电半导体显示技术有限公司 | Display module |
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