CN111859485A - Simulation design method for water cooling plate - Google Patents

Simulation design method for water cooling plate Download PDF

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Publication number
CN111859485A
CN111859485A CN202010719725.1A CN202010719725A CN111859485A CN 111859485 A CN111859485 A CN 111859485A CN 202010719725 A CN202010719725 A CN 202010719725A CN 111859485 A CN111859485 A CN 111859485A
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chip
cooling plate
power module
model
simulation
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孙微
范涛
温旭辉
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Institute of Electrical Engineering of CAS
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Institute of Electrical Engineering of CAS
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/10Geometric CAD
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F30/00Computer-aided design [CAD]
    • G06F30/20Design optimisation, verification or simulation
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F2119/00Details relating to the type or aim of the analysis or the optimisation
    • G06F2119/08Thermal analysis or thermal optimisation

Abstract

The invention discloses a simulation design method of a water cooling plate, which comprises the following steps: establishing a simplified thermal resistance model of the power module in simulation software according to the layout of an internal chip of the power module, chip parameters and the size of a substrate; arranging a water cooling plate runner structure in a chip area of the power module simplified thermal resistance model to obtain a water cooling plate model; and establishing a simulation model according to the heat productivity in the actual working condition of the power module, the simplified thermal resistance model and the water cooling plate model, and optimizing the flow passage structure of the water cooling plate according to the simulation result. According to the invention, a double-thermal-resistance model of each chip is established, a simplified thermal-resistance model of the power module is established according to the chip layout, the chip size and each double-thermal-resistance model, a water-cooling plate runner structure is arranged in the chip area to obtain a simulation model, and after simulation, the water-cooling plate runner structure is optimized according to the junction temperature of each chip, so that the hot spot area obtained by simulation is consistent with the hot spot area in the actual working condition, and the heat dissipation capability of the water-cooling plate is reasonably utilized.

Description

Simulation design method for water cooling plate
Technical Field
The invention relates to the technical field of heat dissipation equipment, in particular to a simulation design method of a water cooling plate.
Background
Modern electronic equipment further improves the requirements on reliability, performance indexes, power density and the like, and the thermal design of the electronic equipment is more and more important. The power device is a key device in most electronic equipment, and the reliability, safety and service life of the whole machine are directly affected by the working state of the power device. In the heat dissipation design, the power modules are generally assumed to be uniformly heated on the whole power module substrate, the modeling method is simple and easy to operate, but the concentrated heating of chips in the power modules is ignored, so the calculation result is lower than the actual calculation result, and the junction temperature of the power modules cannot be directly obtained. The heat sources in the general simulation model are uniformly distributed, so the highest temperature point of the water cooling plate is usually in the center of the heating area. However, since the internal heat sources (chips) of the power module are actually distributed discretely, the highest point of the temperature of the water cooling plate is actually right below each chip. That is, the simulation has a large difference from the actual hot spot location, and therefore, the local optimization design cannot be performed for the actual hot spot area.
Disclosure of Invention
Therefore, the technical problem to be solved by the invention is to overcome the defects that in the simulation design of the water-cooling plate in the prior art, the heating point of the power module is not accurately positioned and the junction temperature of the chip cannot be directly obtained, so that the simulation design method of the water-cooling plate is provided.
In order to achieve the purpose, the invention provides the following technical scheme:
the embodiment of the invention provides a simulation design method of a water cooling plate, wherein the water cooling plate is used for radiating heat for a power module, the power module comprises a substrate and a plurality of chips, the chips are fixed on the substrate, and the simulation design method of the water cooling plate comprises the following steps: establishing a simplified thermal resistance model of the power module in simulation software according to the layout of an internal chip of the power module, chip parameters and the size of a substrate; arranging a water cooling plate runner structure in a chip area of a simplified thermal resistance model of the power module to obtain a water cooling plate model; and establishing a simulation model according to the heat productivity in the actual working condition of the power module, simplifying a thermal resistance model and a water cooling plate model, and optimizing the flow passage structure of the water cooling plate according to the simulation result after the simulation.
In one embodiment, the chip parameters include the thermal resistance of the internal components of the chip, the thermal contact resistance from the chip to the water-cooling plate, and the normal working temperature range of the chip.
In one embodiment, the process of establishing a simplified thermal resistance model of a power module in simulation software according to the layout of an internal chip of the power module, chip parameters and the size of a substrate includes: taking the size of the substrate of the power module as the size of the substrate of the simplified thermal resistance model, and determining the material of the substrate of the simplified thermal resistance model according to the material of the substrate of the power module; obtaining thermal resistance parameters of each chip according to the thermal resistance of internal components of all chips of the power module and the thermal contact resistance from the chip to the water cooling plate; obtaining a double-thermal-resistance model of each chip according to the thermal-resistance parameters and the size of each chip; and establishing a simplified thermal resistance model of the power module in simulation software according to the layout of all chips of the power module and the double thermal resistance model of each chip.
In an embodiment, the process of obtaining the water-cooled plate model by arranging the water-cooled plate runner structure in the chip region of the simplified thermal resistance model of the power module includes: determining a heating source area according to the heating value of the power module, the size of each chip and the chip layout; and designing the size of a water cooling plate flow channel structure according to the heating source area, wherein the size of the water cooling plate flow channel structure is smaller than the size of a substrate of the power module, and the size of the water cooling plate flow channel structure is larger than the heating source area.
In one embodiment, the process of determining the heat generation source region according to the heat generation amount of the power module, the size of each chip and the chip layout includes: calculating the heat productivity of each chip according to the total loss of the power module under the actual working condition; and determining a heating source area according to the heating value of each chip, the size of each chip and the chip layout.
In an embodiment, a process of establishing a simulation model according to a calorific value in an actual working condition of the power module, the simplified thermal resistance model, and the water cooling plate model, and optimizing a flow channel structure of the water cooling plate according to a simulation result after the simulation is performed includes: establishing a simulation model according to the simplified thermal resistance model and the water-cooling plate model of the power module; setting the heat productivity of each chip, the inlet temperature and the inlet flow of a cooling medium according to the heat productivity of the actual working condition of the power module, and obtaining the junction temperature of the double-thermal-resistance model of each chip in the simplified thermal-resistance model after the water-cooled plate heat dissipation simulation is carried out on the simulation model; judging whether the junction temperature of the double-thermal-resistance model of each chip is within the normal working temperature range of the double-thermal-resistance model of each chip and whether the junction temperature deviation between the chips exceeds a preset deviation value according to the junction temperature and working temperature requirements of the double-thermal-resistance model of each chip; and when the junction temperature of the double-thermal resistance model of at least one chip is not in the normal working temperature range of the double-thermal resistance model or the junction temperature deviation among the chips exceeds a preset deviation value, optimizing the flow channel structure of the water cooling plate.
In one embodiment, the process of optimizing the flow channel structure of the water-cooling plate includes: the method comprises the following steps of optimizing the flow channel structure of the water cooling plate by a preset optimization method, wherein the preset optimization method comprises the following steps: and a fluid disturbance method is added, the heat exchange area between the water cooling plate flow passage structure and the chip is increased, and the flow velocity of a cooling medium is increased.
The technical scheme of the invention has the following advantages:
the simulation design method of the water cooling plate provided by the invention considers the concentrated heating condition of the chip area in the power module in the actual working condition, obtains the simulation model by establishing the double thermal resistance model of each chip in the power module, establishes the simplified thermal resistance model of the power module according to the layout, the chip size and the double thermal resistance model of each chip, arranges the water cooling plate runner structure in the chip area to obtain the simulation model, directly obtains the junction temperature of each chip after simulating the simulation model, and optimizes the water cooling plate runner structure according to the junction temperature of each chip, so that the hot spot area obtained by simulation is consistent with the hot spot area in the actual working condition, reasonably utilizes the heat dissipation capacity of the water cooling plate, and improves the heat dissipation capacity of the water cooling plate on the power module.
Drawings
In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, and it is obvious that the drawings in the following description are some embodiments of the present invention, and other drawings can be obtained by those skilled in the art without creative efforts.
Fig. 1 is a flowchart of a specific example of a simulation design method for a water-cooling plate according to an embodiment of the present invention;
FIG. 2 is a flowchart of a specific example of a process for establishing a simplified thermal resistance model according to an embodiment of the present invention;
fig. 3 is a schematic diagram of a specific example of a layout of a chip inside a power module according to an embodiment of the present invention;
FIG. 4 is a flowchart of a specific example of establishing a water-cooled plate model according to an embodiment of the present invention;
FIG. 5 is a flowchart illustrating another exemplary method for creating a water-cooled plate model according to an embodiment of the present invention;
FIG. 6 is a diagram illustrating a specific example of a simulation model provided by an embodiment of the invention;
fig. 7 is a flowchart of a specific example of simulating a simulation model according to an embodiment of the present invention.
Detailed Description
The technical solutions of the present invention will be described clearly and completely with reference to the accompanying drawings, and it should be understood that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
In the description of the present invention, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicate orientations or positional relationships based on the orientations or positional relationships shown in the drawings, and are only for convenience of description and simplicity of description, but do not indicate or imply that the device or element being referred to must have a particular orientation, be constructed and operated in a particular orientation, and thus, should not be construed as limiting the present invention. Furthermore, the terms "first," "second," and "third" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance.
In the description of the present invention, it should be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; can be mechanically or electrically connected; the two elements may be directly connected or indirectly connected through an intermediate medium, or may be communicated with each other inside the two elements, or may be wirelessly connected or wired connected. The specific meanings of the above terms in the present invention can be understood in specific cases to those skilled in the art.
In addition, the technical features involved in the different embodiments of the present invention described below may be combined with each other as long as they do not conflict with each other.
Example 1
The embodiment of the invention provides a water-cooling plate simulation design method, which is applied to occasions needing heat dissipation of power electronic components, wherein the water-cooling plate is used for dissipating heat of a power module, the power module comprises a substrate, a DBC (direct bonded capacitor), a solder, a bonding wire, a plurality of chips, a packaging shell and internal gel, the chips are welded on the substrate through the DBC, and as shown in figure 1, the water-cooling plate simulation design method comprises the following steps:
step S11: and establishing a simplified thermal resistance model of the power module in simulation software according to the layout of an internal chip of the power module, the chip parameters and the size of the substrate. The chip parameters comprise the thermal resistance of components inside the chip, the thermal contact resistance from the chip to the water-cooling plate and the normal working temperature range of the chip.
In the prior art, most of the flow channel regions of the water cooling plate are approximately the same as the substrate size of the power module, or most of the flow channels of the water cooling plate are distributed on all the substrates, and most of the heat sources in a general simulation model are considered to be uniformly distributed in the substrate regions, so the highest point of the temperature of the water cooling plate is usually in the central position of the heating region, but the highest point of the temperature of the actual water cooling plate is right below each chip because the internal heat sources of the power module are actually distributed discretely, so the general simulation model and the actual hot point position have a large difference And establishing a simplified thermal resistance model of the power module in simulation software by using the double thermal resistance model and the substrate model of each chip.
Step S12: and arranging a water cooling plate runner structure in a chip area of the simplified thermal resistance model of the power module to obtain a water cooling plate model.
According to the embodiment of the invention, the size of the chip area is obtained according to the size of each chip and the layout of each chip in the power module, and then the flow channel structure of the water cooling plate is designed according to the size of the chip area, so that the heat dissipation of the whole power substrate is changed into the heat dissipation of the heating source of the power substrate.
Step S13: and establishing a simulation model according to the heat productivity in the actual working condition of the power module, simplifying a thermal resistance model and a water cooling plate model, and optimizing the flow passage structure of the water cooling plate according to the simulation result after the simulation.
The embodiment of the invention establishes a simulation model in simulation software according to a simplified thermal resistance model of a water cooling plate model and a power module, wherein a runner structure of the water cooling plate model is arranged in a chip area of the simplified thermal resistance model, the material and the cooling medium of a heating water cooling plate of each chip are set according to the heating value of the power module in actual working conditions, the parameters such as the flow rate and the inlet temperature of the cooling medium are set, then the simulation model is simulated, the junction temperature of the simplified thermal resistance model is directly obtained according to the simulation result, finally, the junction temperature of the simplified thermal resistance model is compared with the normal working temperature range of the chip, and if the junction temperature does not meet the normal working temperature range requirement of the chip or the junction temperature deviation among the chips is large, the runner structure of the water cooling plate is optimized, wherein the optimization method can comprise the following steps: the method for improving the heat exchange efficiency of the chip includes a plurality of mature optimization methods such as increasing a fluid disturbance method, increasing a heat exchange area between a flow channel structure of the water cooling plate and the chip, and increasing a flow velocity of a cooling medium, and specifically, a flow boundary layer may be damaged by changing local fins into irregular structures such as a saw-tooth structure, so that a convection heat exchange coefficient is increased to enhance a heat exchange effect.
The simulation design method of the water cooling plate provided by the invention considers the concentrated heating condition of the chip area in the power module in the actual working condition, obtains the simulation model by establishing the double thermal resistance model of each chip in the power module, establishes the simplified thermal resistance model of the power module according to the layout, the chip size and the double thermal resistance model of each chip, arranges the water cooling plate runner structure in the chip area to obtain the simulation model, directly obtains the junction temperature of each chip after simulating the simulation model, and optimizes the water cooling plate runner structure according to the junction temperature of each chip, so that the hot spot area obtained by simulation is consistent with the hot spot area in the actual working condition, reasonably utilizes the heat dissipation capacity of the water cooling plate, and improves the heat dissipation capacity of the water cooling plate on the power module.
In an embodiment, as shown in fig. 2, a process of establishing a simplified thermal resistance model of a power module in simulation software according to a layout of an internal chip of the power module, chip parameters and a size of a substrate includes:
step S21: and determining the material of the substrate of the simplified thermal resistance model according to the material of the substrate of the power module.
In order to realize accurate simulation of heat dissipation of the power module in the actual working condition, the embodiment of the invention takes the size of the substrate of the power module in the actual working condition as the size of the substrate of the simplified thermal resistance model, and sets the material of the substrate of the power module as the material of the substrate of the simplified thermal resistance model in simulation software, thereby obtaining the substrate model of the power module.
Step S22: and obtaining the thermal resistance parameter of each chip according to the thermal resistance of internal components of all chips of the power module and the thermal contact resistance from the chip to the water cooling plate.
According to the embodiment of the invention, the thermal resistance parameter of each chip is obtained according to the thermal resistance of internal components of each chip and the thermal resistance from the chip to the water-cooling plate (the thermal resistance from the chip to the water-cooling plate is the thermal resistance of the heat-conducting interface material), for example, if a power module is composed of two bridge arms, each bridge arm is formed by connecting 3 groups of chips in parallel, each group of chips is composed of an IGBT and an anti-parallel diode, the thermal resistance of the internal components of the chip is the junction-shell thermal resistance of the IGBT and the diode, the sum of the junction-shell thermal resistance of the IGBT and the thermal resistance from the IGBT to the water-cooling plate is used as the thermal resistance parameter of the IGBT, the sum of the junction-shell thermal resistance of the diode and the thermal resistance from the diode to the water-cooling plate is used as the thermal resistance parameter of the diode.
It should be noted that, in the embodiment of the present invention, the thermal resistance of the internal chip is junction-shell thermal resistance of the IGBT and the diode, but when the power module is formed by other components (for example, MOSFET, GTO, GTR, and the like), the thermal resistance of the internal chip is determined according to a data manual specific to the chip.
Step S23: and obtaining a double thermal resistance model of each chip according to the size and the thermal resistance parameters of each chip.
According to the embodiment of the invention, the double-thermal-resistance model of each chip is established according to the size of each chip, and the double-thermal-resistance model of each chip is set according to the thermal resistance parameter of each chip. Specifically, for example, the power module is composed of a plurality of groups of chips, each group of chips includes an IGBT chip and a diode chip, a dual thermal resistance model of the IGBT chip is established according to thermal resistance parameters of the IGBT chip, and a dual thermal resistance model of the diode is established according to thermal resistance parameters of the diode chip.
Step S24: and establishing a simplified thermal resistance model of the power module in simulation software according to the layout of all chips of the power module and the double thermal resistance model of each chip.
The layout of each chip in the power module is shown in fig. 3, in the embodiment of the present invention, the dual thermal resistance model of each chip is placed at the corresponding position of the substrate model of the power module according to the position of each chip in the power module, and then the simplified thermal resistance model of the power module is obtained according to the substrate model after layout and the dual thermal resistance model of each chip.
In an embodiment, as shown in fig. 4, a process of setting a water-cooling plate flow channel structure in a chip region of a simplified thermal resistance model of a power module to obtain a water-cooling plate model includes:
step S31: and determining a heating source area according to the heating value of the power module, the size of each chip and the chip layout.
As shown in fig. 5, the specific implementation process of step S31 includes:
step S41: and calculating the heat productivity of each chip according to the total loss of the power module under the actual working condition.
Step S42: and determining a heating source area according to the heating value of each chip, the size of each chip and the chip layout.
The embodiment of the invention assumes that the internal heating of the power module is uniform, converts the heating value of the power module in the actual working condition (generally the peak working condition of the controller) into a single chip, and then calculates to obtain the heating source area according to the size of each chip, the heating value of each chip and the layout of each chip in the power module.
Step S32: the size of the water cooling plate flow channel structure is designed according to the heating source area, the size of the water cooling plate flow channel structure is smaller than the size of a base plate of the power module, and the size of the water cooling plate flow channel area is larger than that of the heating source area.
According to the embodiment of the invention, the size of the flow passage structure of the water cooling plate is set to be larger than the area of the heating source but smaller than the area of the substrate model, so that the chips in the power module are ensured to be subjected to centralized heat dissipation.
As shown in fig. 6, a water cooling plate flow channel structure is arranged at a chip area position to establish a water cooling plate model, and the method for arranging the flow channel structure may be a flow channel design method in the prior art.
In a specific embodiment, as shown in fig. 7, a process of establishing a simulation model according to a calorific value in an actual working condition of the power module, the simplified thermal resistance model, and the water-cooling plate model, and after performing simulation, optimizing a flow channel structure of the water-cooling plate according to a simulation result includes:
step S51: and establishing a simulation model according to the simplified thermal resistance model and the water-cooling plate model of the power module.
After the simulation model is established, the embodiment of the invention does not need to set the material of the double thermal resistance model, and the material of the water cooling plate and the material of the substrate model of the power module are set according to the actual working conditions, such as: the material of the substrate of the power module is copper, the material of the water-cooling plate is aluminum alloy or cast aluminum, and the cooling medium is water or antifreeze according to the application condition of the controller.
Step S52: and according to the heating value of the actual working condition of the power module, the inlet temperature and the inlet flow of the cooling medium, performing water-cooling plate heat dissipation simulation on the simulation model to obtain the junction temperature of the double-thermal-resistance model of each chip in the simplified thermal-resistance model of the power module.
Because the simplified thermal resistance model of the power module and the simulation model of the chip are the double thermal resistance model, the junction temperature of each chip (the junction temperature of the double thermal resistance model) can be directly measured after simulation, and the problem that whether the junction temperature of the chip exceeds the normal working temperature of the chip cannot be directly judged in the simulation design of the water cooling plate in the prior art is solved.
Step S53: and judging whether the junction temperature of the double-thermal-resistance model of each chip is within the normal working temperature range of the double-thermal-resistance model of each chip and whether the junction temperature deviation between the chips exceeds a preset deviation value according to the junction temperature and working temperature requirements of the double-thermal-resistance model of each chip.
Step S54: and when the junction temperature of the double-thermal resistance model of at least one chip is not in the normal working temperature range of the double-thermal resistance model or the junction temperature deviation among the chips exceeds a preset deviation value, optimizing the flow channel structure of the water cooling plate.
The embodiment of the invention directly compares the junction temperature obtained by simulation with the normal working temperature of the corresponding chip, and when the junction temperature exceeds the normal working temperature, the runner structure is further optimized to reduce the junction temperature. When the junction temperature is too low, the design margin of the water-cooling plate may be too large, and the runner structure needs to be optimized to reduce the resistance loss of the runner of the water-cooling plate, so that the energy consumption and the cost are reduced. Or when the junction temperature deviation among the chips is large, the distribution of current is affected due to the large junction temperature deviation, so the flow channel structure of the water cooling plate should be optimized.
The simulation design method of the water cooling plate provided by the invention considers the centralized heating condition of the chips in the power module in the actual working condition, obtains the simulation model by establishing the double thermal resistance model of each chip in the power module, establishes the simplified thermal resistance model of the power module according to the layout, the chip size and the double thermal resistance model of each chip, arranges the flow passage structure of the water cooling plate in the chip area to obtain the simulation model, directly obtains the junction temperature of each chip after simulating the simulation model, and optimizes the flow passage structure of the water cooling plate according to the junction temperature of each chip, so that the hot spot area obtained by simulation is consistent with the hot spot area in the actual working condition, reasonably utilizes the heat dissipation capacity of the water cooling plate, and improves the heat dissipation capacity of the water cooling plate on the power module.
It should be understood that the above examples are only for clarity of illustration and are not intended to limit the embodiments. Other variations and modifications will be apparent to persons skilled in the art in light of the above description. And are neither required nor exhaustive of all embodiments. And obvious variations or modifications of the invention may be made without departing from the spirit or scope of the invention.

Claims (7)

1. A water cooling plate simulation design method is characterized in that the water cooling plate is used for radiating heat for a power module, the power module comprises a substrate and a plurality of chips, and the water cooling plate simulation design method comprises the following steps:
establishing a simplified thermal resistance model of the power module in simulation software according to the layout of an internal chip of the power module, the chip parameters and the size of a substrate;
arranging a water cooling plate runner structure in a chip area of the simplified thermal resistance model of the power module to obtain a water cooling plate model;
and establishing a simulation model according to the heat productivity in the actual working condition of the power module, the simplified thermal resistance model and the water cooling plate model, and optimizing the flow passage structure of the water cooling plate according to the simulation result after the simulation.
2. The water-cooling plate simulation design method of claim 1, wherein the chip parameters comprise chip internal component thermal resistance, chip-to-water-cooling plate contact thermal resistance, and chip normal operating temperature range.
3. The simulation design method of the water-cooling plate according to claim 2, wherein the process of establishing the simplified thermal resistance model of the power module in the simulation software according to the layout of the internal chip of the power module, the chip parameters and the size of the substrate comprises the following steps:
taking the size of the substrate of the power module as the size of the substrate of the simplified thermal resistance model, and determining the material of the substrate of the simplified thermal resistance model according to the material of the substrate of the power module;
obtaining thermal resistance parameters of each chip according to the thermal resistance of internal components of all chips of the power module and the thermal contact resistance from the chip to the water cooling plate;
obtaining a double-thermal-resistance model of each chip according to the thermal-resistance parameters and the size of each chip;
and establishing a simplified thermal resistance model of the power module in simulation software according to the layout of all chips of the power module and the double thermal resistance model of each chip.
4. The simulation design method of the water-cooling plate according to claim 1, wherein the process of obtaining the water-cooling plate model by arranging the water-cooling plate flow channel structure in the chip area of the simplified thermal resistance model of the power module comprises:
determining a heating source area according to the heating value of the power module, the size of each chip and the chip layout;
and designing the size of a water cooling plate flow channel structure according to the heating source area, wherein the size of the water cooling plate flow channel structure is smaller than the size of the substrate of the power module, and the size of the water cooling plate flow channel structure is larger than the heating source area.
5. The simulation design method of the water-cooling plate as claimed in claim 4, wherein the process of determining the heating source region according to the heating value of the power module, the size of each chip and the layout of the chips comprises:
calculating the heat productivity of each chip according to the total loss of the power module under the actual working condition;
and determining a heating source area according to the heating value of each chip, the size of each chip and the chip layout.
6. The water-cooling plate simulation design method of claim 1, wherein a simulation model is established according to the calorific value in the actual working condition of the power module, the simplified thermal resistance model and the water-cooling plate model, and after simulation, the process of optimizing the flow channel structure of the water-cooling plate according to the simulation result comprises the following steps:
establishing a simulation model according to the simplified thermal resistance model and the water-cooling plate model of the power module;
setting the heat productivity of each chip, the inlet temperature and the inlet flow of a cooling medium according to the heat productivity of the actual working condition of the power module, and obtaining the junction temperature of a double-thermal-resistance model of each chip in the simplified thermal-resistance model of the power module after performing water-cooled plate heat dissipation simulation on the simulation model;
judging whether the junction temperature of the double-thermal-resistance model of each chip is within the normal working temperature range of the double-thermal-resistance model of each chip and whether the junction temperature deviation between the chips exceeds a preset deviation value according to the junction temperature and working temperature requirements of the double-thermal-resistance model of each chip;
and when the junction temperature of the double-thermal resistance model of at least one chip is not in the normal working temperature range of the double-thermal resistance model or the junction temperature deviation among the chips exceeds a preset deviation value, optimizing the flow channel structure of the water cooling plate.
7. The simulation design method of the water cooling plate as claimed in claim 6, wherein the process of optimizing the flow passage structure of the water cooling plate comprises:
optimizing the flow channel structure of the water cooling plate by a preset optimization method, wherein the preset optimization method comprises the following steps: and a fluid disturbance method is added, the heat exchange area between the water cooling plate flow passage structure and the chip is increased, and the flow velocity of a cooling medium is increased.
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CN112833518A (en) * 2020-12-17 2021-05-25 北京达佳互联信息技术有限公司 Air conditioner control system for data center
CN113985122A (en) * 2021-11-01 2022-01-28 苏州亿马半导体科技有限公司 SiC power analysis method based on SolidWorks Flow Simulation

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