CN111801660B - 补偿usb 2.0高速应用中的直流损耗 - Google Patents
补偿usb 2.0高速应用中的直流损耗 Download PDFInfo
- Publication number
- CN111801660B CN111801660B CN201980016418.2A CN201980016418A CN111801660B CN 111801660 B CN111801660 B CN 111801660B CN 201980016418 A CN201980016418 A CN 201980016418A CN 111801660 B CN111801660 B CN 111801660B
- Authority
- CN
- China
- Prior art keywords
- voltage threshold
- coupled
- input
- threshold comparator
- switch
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Active
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
- G06F13/4295—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus using an embedded synchronisation
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4004—Coupling between buses
- G06F13/4022—Coupling between buses using switching circuits, e.g. switching matrix, connection or expansion network
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/40—Bus structure
- G06F13/4063—Device-to-bus coupling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/38—Information transfer, e.g. on bus
- G06F13/42—Bus transfer protocol, e.g. handshake; Synchronisation
- G06F13/4282—Bus transfer protocol, e.g. handshake; Synchronisation on a serial bus, e.g. I2C bus, SPI bus
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04B—TRANSMISSION
- H04B3/00—Line transmission systems
- H04B3/02—Details
- H04B3/04—Control of transmission; Equalising
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L25/00—Baseband systems
- H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
- H04L25/0264—Arrangements for coupling to transmission lines
- H04L25/028—Arrangements specific to the transmitter end
- H04L25/0282—Provision for current-mode coupling
-
- G—PHYSICS
- G06—COMPUTING OR CALCULATING; COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F2213/00—Indexing scheme relating to interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F2213/0042—Universal serial bus [USB]
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
- H03K5/1534—Transition or edge detectors
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
- H03K5/22—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral
- H03K5/24—Circuits having more than one input and one output for comparing pulses or pulse trains with each other according to input signal characteristics, e.g. slope, integral the characteristic being amplitude
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02D—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN INFORMATION AND COMMUNICATION TECHNOLOGIES [ICT], I.E. INFORMATION AND COMMUNICATION TECHNOLOGIES AIMING AT THE REDUCTION OF THEIR OWN ENERGY USE
- Y02D10/00—Energy efficient computing, e.g. low power processors, power management or thermal management
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- General Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Mathematical Physics (AREA)
- Power Engineering (AREA)
- Logic Circuits (AREA)
- Dc Digital Transmission (AREA)
- Information Transfer Systems (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202410757828.5A CN118606248A (zh) | 2018-01-11 | 2019-01-11 | 补偿usb 2.0高速应用中的直流损耗 |
Applications Claiming Priority (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201862616201P | 2018-01-11 | 2018-01-11 | |
| US62/616,201 | 2018-01-11 | ||
| US15/967,883 US10733129B2 (en) | 2018-01-11 | 2018-05-01 | Compensating DC loss in USB 2.0 high speed applications |
| US15/967,883 | 2018-05-01 | ||
| PCT/US2019/013271 WO2019140246A1 (en) | 2018-01-11 | 2019-01-11 | Compensating dc loss in usb 2.0 high speed applications |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410757828.5A Division CN118606248A (zh) | 2018-01-11 | 2019-01-11 | 补偿usb 2.0高速应用中的直流损耗 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111801660A CN111801660A (zh) | 2020-10-20 |
| CN111801660B true CN111801660B (zh) | 2024-10-18 |
Family
ID=67139849
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201980016418.2A Active CN111801660B (zh) | 2018-01-11 | 2019-01-11 | 补偿usb 2.0高速应用中的直流损耗 |
| CN202410757828.5A Pending CN118606248A (zh) | 2018-01-11 | 2019-01-11 | 补偿usb 2.0高速应用中的直流损耗 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202410757828.5A Pending CN118606248A (zh) | 2018-01-11 | 2019-01-11 | 补偿usb 2.0高速应用中的直流损耗 |
Country Status (5)
| Country | Link |
|---|---|
| US (4) | US10733129B2 (https=) |
| EP (1) | EP3738043A4 (https=) |
| JP (1) | JP7393088B2 (https=) |
| CN (2) | CN111801660B (https=) |
| WO (1) | WO2019140246A1 (https=) |
Families Citing this family (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US11843376B2 (en) * | 2021-05-12 | 2023-12-12 | Gowin Semiconductor Corporation | Methods and apparatus for providing a high-speed universal serial bus (USB) interface for a field-programmable gate array (FPGA) |
| US11689201B2 (en) | 2021-07-26 | 2023-06-27 | Qualcomm Incorporated | Universal serial bus (USB) host data switch with integrated equalizer |
| US12003237B2 (en) * | 2022-01-28 | 2024-06-04 | Texas Instruments Incorporated | Methods and apparatus for arc reduction in power delivery systems |
| US11764672B1 (en) * | 2022-06-28 | 2023-09-19 | Diodes Incorporated | Signal boosting in serial interfaces |
| US12362717B2 (en) | 2022-11-16 | 2025-07-15 | Qualcomm Incorporated | Second-order equalizer for high-speed data lines |
| US20240402739A1 (en) * | 2023-06-02 | 2024-12-05 | Texas Instruments Incorporated | Methods and apparatus to compensate for ground shift |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104937579A (zh) * | 2013-01-24 | 2015-09-23 | 德克萨斯仪器股份有限公司 | 信号调整器 |
Family Cites Families (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4524291A (en) * | 1983-01-06 | 1985-06-18 | Motorola, Inc. | Transition detector circuit |
| US6867631B1 (en) * | 2003-04-18 | 2005-03-15 | Apple Computer, Inc. | Synchronous frequency convertor for timebase signal generation |
| US7161392B2 (en) * | 2004-06-23 | 2007-01-09 | Teradyne, Inc. | Comparator feedback peak detector |
| JP4578316B2 (ja) * | 2005-05-02 | 2010-11-10 | ザインエレクトロニクス株式会社 | 送信装置 |
| US8185682B2 (en) * | 2007-06-01 | 2012-05-22 | International Business Machines Corporation | USB 2.0 bi-directional bus channel with boost circuitry |
| US7394281B1 (en) * | 2008-01-31 | 2008-07-01 | International Business Machines Corporation | Bi-directional universal serial bus booster circuit |
| US8269522B2 (en) * | 2009-12-14 | 2012-09-18 | St-Ericsson Sa | Active eye opener for current-source driven, high-speed serial links |
| JP5730520B2 (ja) * | 2010-09-03 | 2015-06-10 | スパンション エルエルシー | スイッチングレギュレータ |
| US8610456B2 (en) * | 2011-09-23 | 2013-12-17 | Qualcomm Incorporated | Load detecting impedance matching buffer |
| US9800235B2 (en) * | 2014-06-04 | 2017-10-24 | Texas Instruments Incorporated | Adaptive edge-rate boosting driver with programmable strength for signal conditioning |
| US9483435B2 (en) * | 2014-07-06 | 2016-11-01 | Freescale Semiconductor, Inc. | USB transceiver |
| US10002101B2 (en) * | 2015-03-06 | 2018-06-19 | Apple Inc. | Methods and apparatus for equalization of a high speed serial bus |
-
2018
- 2018-05-01 US US15/967,883 patent/US10733129B2/en active Active
-
2019
- 2019-01-11 WO PCT/US2019/013271 patent/WO2019140246A1/en not_active Ceased
- 2019-01-11 JP JP2020538839A patent/JP7393088B2/ja active Active
- 2019-01-11 EP EP19738227.8A patent/EP3738043A4/en active Pending
- 2019-01-11 CN CN201980016418.2A patent/CN111801660B/zh active Active
- 2019-01-11 CN CN202410757828.5A patent/CN118606248A/zh active Pending
-
2020
- 2020-06-29 US US16/915,751 patent/US20200327082A1/en not_active Abandoned
-
2022
- 2022-10-19 US US17/968,978 patent/US12026115B2/en active Active
-
2024
- 2024-05-23 US US18/672,723 patent/US12517854B2/en active Active
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104937579A (zh) * | 2013-01-24 | 2015-09-23 | 德克萨斯仪器股份有限公司 | 信号调整器 |
Also Published As
| Publication number | Publication date |
|---|---|
| JP2021510874A (ja) | 2021-04-30 |
| US12026115B2 (en) | 2024-07-02 |
| EP3738043A1 (en) | 2020-11-18 |
| US20200327082A1 (en) | 2020-10-15 |
| US20230039848A1 (en) | 2023-02-09 |
| CN118606248A (zh) | 2024-09-06 |
| US12517854B2 (en) | 2026-01-06 |
| US10733129B2 (en) | 2020-08-04 |
| US20190213158A1 (en) | 2019-07-11 |
| WO2019140246A1 (en) | 2019-07-18 |
| CN111801660A (zh) | 2020-10-20 |
| EP3738043A4 (en) | 2021-02-24 |
| JP7393088B2 (ja) | 2023-12-06 |
| US20240320178A1 (en) | 2024-09-26 |
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| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
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