CN111708308B

CN111708308B - Single-board power supply control circuit and electronic equipment

Info

Publication number: CN111708308B
Application number: CN202010638249.0A
Authority: CN
Inventors: 何明; 宋攀攀
Original assignee: Maipu Communication Technology Co Ltd
Current assignee: Maipu Communication Technology Co Ltd
Priority date: 2020-07-03
Filing date: 2020-07-03
Publication date: 2022-03-22
Anticipated expiration: 2040-07-03
Also published as: CN111708308A

Abstract

The application provides a single-board power supply control circuit and electronic equipment, and relates to the technical field of electronic circuits. The single-board power control circuit comprises a power-off control module, a restarting control module, a control signal combining module and a power conversion module, wherein the power-off control module comprises a first reset chip and a D trigger, the restarting control module comprises a second reset chip, a third reset chip and a first output unit, the control signal combining module comprises an OR gate chip and a second output unit, the power-off control module and the restarting control module are used for sending control signals to the control signal combining module based on restarting signals sent by a processor, and the control signal combining module is used for controlling the power conversion module to be powered off and not restarted or restarted based on the control signals. The circuit realizes the normal power-on, power-off and automatic power-on functions after power-off of the system by utilizing the self-carrying processing function of the single-board system, reduces the circuit complexity and saves the hardware design cost and the maintenance cost.

Description

Single-board power supply control circuit and electronic equipment

Technical Field

The application relates to the technical field of electronic circuits, in particular to a single-board power supply control circuit and electronic equipment.

Background

With the development of communication technology, the requirements on reliability, fault protection capability and maintainability of communication equipment are higher and higher, and meanwhile, the design cost requirement is lower and lower. The single board power control system, one of the most important components in the communication equipment, is a very important help for the maintainability and fault protection of the equipment.

The power-off alarm and the power-off automatic restart are two most important functions in the single-board power control system, for example, when the system is over-temperature due to environmental reasons, the system needs to perform intelligent judgment in order to avoid fire or destroy a rear-stage hardware circuit, the power-off alarm function is started, the single-board power system is disconnected to protect equipment, and meanwhile, the maintenance personnel are prompted with alarm information.

Usually, such a single board power control system is designed, and is implemented by adding an additional Micro Control Unit (MCU), where the MCU is used as an independent power management control function, and enters a working state in advance, and then performs functions such as power on, power off, or power off restart on the single board power.

The existing scheme needs to additionally increase an MCU controller, can directly increase the hardware design cost, and simultaneously needs an independent software management system, which increases the design and maintenance cost. Especially for a remote control system, the MCU system is required to be simultaneously connected to the network control management platform, which greatly increases the maintenance and management cost.

Disclosure of Invention

In view of this, an object of the embodiments of the present application is to provide a single board power control circuit and an electronic device, so as to solve the problems in the prior art that an MCU needs to be added to implement power-off restart, and the circuit structure is complex, and the hardware design cost and the maintenance cost are high.

The embodiment of the application provides a single-board power control circuit, which comprises a power-off control module, a restart control module, a control signal combining module and a power conversion module, wherein the power-off control module comprises a first reset chip and a D trigger, the restart control module comprises a second reset chip, a third reset chip and a first output unit, the control signal combining module comprises an OR gate chip and a second output unit, and the power conversion module comprises a direct current converter and a discharging unit; the first reset chip is respectively connected with a standby power supply and the D trigger, the D trigger is connected with a processor of a single-board power supply, the second reset chip is respectively connected with the third reset chip, the processor and the standby power supply, the third reset chip is respectively connected with the standby power supply and the first output unit, the OR gate chip is respectively connected with the first output unit, the second output unit and the D trigger, the second output unit is connected with the DC converter, and the DC converter is also respectively connected with the discharging unit and a single-board power supply load; the power-off control module and the restarting control module are used for sending control signals to the control signal combining module based on restarting signals sent by the processor, and the control signal combining module is used for controlling the power supply conversion module to be not restarted or restarted after power-off based on the control signals.

In the implementation mode, the single-board power supply self processor is adopted to output signals, and the reset control logic is built based on the reset chip and the OR gate chip combined with the control signals, so that the automatic power-on of the single-board power supply is realized, and the functions of power-off non-restart and power-off restart which need to be realized after the system normally works can be completed. The control is simple, the software design complexity is reduced, an additional MCU control system is not needed, the hardware design cost and the maintenance cost are saved, and the method is suitable for communication equipment and other types of electronic systems.

Optionally, a power pin of the first reset chip is connected to the standby power supply, a reset pin of the first reset chip is connected to a clear pin of the D flip-flop, a power-off signal input pin of the D flip-flop is connected to a power-off control signal output pin of the processor, a clock input pin of the D flip-flop is connected to a clock output pin of the processor, and the power-off control signal output pin of the D flip-flop is connected to an input terminal of the or gate chip; when the single-board power supply needs to be powered off and not restarted, the power-off control signal output pin of the processor is used for outputting a high level to the power-off signal input pin, the clock output pin of the processor is used for outputting clock pulses to the clock input pin, and the power-off control signal output pin of the D flip-flop is used for outputting a high level to the input end of the or gate chip; the restarting control module is used for outputting a low level to the input end of the OR gate chip; the OR gate chip is used for outputting a high level to the second output unit based on the high level of the power-off control signal output pin, and the second output unit is used for outputting a low level to the power chip enable pin of the DC converter after inverting the received high level so as to close the DC converter.

In the implementation mode, the processor, the first reset chip, the D trigger and/or the gate chip form a logic circuit to realize normal single-board-loading and power-off non-restarting functions of the single-board power supply, the voltage detection starting reset operation is carried out based on the first reset chip, and the D trigger is matched to form reset logic.

Optionally, the second output unit is a triode, a base of the second output unit is connected with an output end of the or gate chip, an emitter of the second output unit is connected with an output end of the or gate chip and grounded, and a collector of the second output unit is connected with an enable pin of the power chip of the dc converter.

In the implementation manner, the second output unit performs high-low level conversion, so that the level signal can be matched with the overall control logic to realize the power-off control function of the single-board power supply.

Optionally, the power-off control module further includes a pull-down resistor, and the power-off signal input pin and the clock input pin are grounded through the pull-down resistor respectively; when the single-board power supply needs to be normally powered on, the standby power supply is powered on, the power-off signal input pin and the clock input pin input low level due to the pull-down resistor, and the power-off control signal output pin of the D trigger is used for outputting low level to the input end of the OR gate chip; the restarting control module is used for outputting a low level to the input end of the OR gate chip; the OR gate chip is used for outputting a low level to the second output unit based on the low level output by the power-off control signal output pin, and the second output unit is used for outputting a high level to the power chip enable pin of the DC converter after inverting the low level so as to start the DC converter.

In the implementation manner, the power-off signal input pin and the clock input pin are at a low level based on the functional logic characteristic of the D flip-flop and the pull-down resistor, so that the single-board power supply is started after the standby power supply is powered on based on the level signal output by the D flip-flop, and normal single-board power supply is realized.

Optionally, the power-off control module further includes a light emitting diode, an anode of the light emitting diode is connected to a diode control signal output pin of the D flip-flop, and an output level of the diode control signal output pin is the same as an output level of the power-off control signal output pin.

In the implementation mode, the power-off control module comprises a light-emitting diode, and the light-emitting diode is used for early warning a user when the power is off, so that the system where the single-board power supply is located can be protected, and meanwhile, warning information can be prompted to a user and a maintainer.

Optionally, the restart control module further includes an input unit, an input end of the input unit is connected to a restart signal output pin of the processor, a clear pin of the second reset chip is connected to an output end of the input unit and the standby power supply, a reset pin of the second reset chip is connected to a clear pin of the third reset chip, a reset pin of the third reset chip is connected to an input end of the first output unit, a power pin of the second reset chip and a power pin of the third reset chip are connected to the standby power supply, and an output end of the first output unit is connected to an input end of the or gate chip; when the single-board power supply is powered off and restarted, the restart signal output pin of the processor is used for outputting a high level to the input end of the input unit, and the input unit is used for inputting a low level to the zero clearing pin of the second reset chip after negating the high level, so that the second reset chip is reset after the standby power supply is powered on; the third reset chip is used for outputting a delayed low level to the input end of the first output unit, and the first output unit is used for outputting a high level to the input end of the or gate chip after inverting the delayed low level; the power-off control module is used for outputting a low level to the OR gate chip; the OR gate chip is used for outputting a high level to the second output unit based on the high level input by the first output unit, and the second output unit is used for outputting a low level to an enable pin of a power supply chip of the DC converter after inverting the high level so as to close the DC converter; the discharge unit is used for accelerating discharge of residual voltage of the direct current converter; the output of a reset pin of the third reset chip is pulled high to a high level, and the first output unit is used for outputting a low level to the input end of the OR gate chip after inverting the high level; the OR gate chip is used for outputting a low level to the second output unit based on a low level input by the first output unit and a low level input by the power-off control module, and the second output unit is used for outputting a high level to an enable pin of a power chip of the DC converter after inverting the low level so as to start the DC converter.

In the implementation mode, the processor, the second reset chip, the third reset chip and the OR gate chip form a logic circuit, so that the automatic restarting function of the single-board power supply after power failure is realized, the circuit connection relation is simple, the judgment and execution based on the power failure restarting of the reset chip and the OR gate chip are rapid, and the hardware cost is reduced.

Optionally, the input unit and the first output unit are triodes; the base electrode of the input unit is the input end of the input unit, the collector electrode of the input unit is the output end of the input unit, and the emitter electrode of the input unit is connected with the input end of the input unit and grounded; the base electrode of the first output unit is the input end of the first output unit, the emitter electrode of the first output unit is connected with the input end of the first output unit and grounded, and the collector electrode of the first output unit is used as the output end and connected with the input end of the OR gate chip.

In the implementation manner, the first output unit performs high-low level conversion, so that the level signal can be matched with the overall control logic to realize the power-off restart function of the single-board power supply.

Optionally, the discharge unit includes a first discharge resistor and a second discharge resistor, and the output terminal of the dc converter is grounded through the first discharge resistor and the second discharge resistor connected in parallel.

In the implementation mode, the two parallel resistors form a discharge unit, and the discharge unit is adopted to accelerate discharge of the DC converter when the power supply of the single board is cut off, so that the function of the chip is not affected after restart.

Optionally, the second reset chip and the third reset chip are chips including a # MR pin.

In the implementation mode, the power reset chip can delay at least 200ms after power supply and can output a delay again by pulling down the designated pin, so that the single-board power supply can be restarted after discharging is finished, and meanwhile, the complexity and the hardware cost of the whole circuit are reduced based on the characteristics of simple structure and low cost.

The embodiment of the application also provides electronic equipment, and the electronic equipment comprises any one of the single-board power supply control circuits.

Drawings

In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments of the present application will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and that those skilled in the art can also obtain other related drawings based on the drawings without inventive efforts.

Fig. 1 is a schematic block diagram of a single-board power control circuit according to an embodiment of the present disclosure.

Fig. 2 is a circuit diagram of a power failure control module according to an embodiment of the present application.

Fig. 3 is a reset timing diagram of a first reset chip according to an embodiment of the present disclosure.

Fig. 4 is a circuit diagram of a restart control module according to an embodiment of the present disclosure.

Fig. 5 is a circuit diagram of a control signal combining module according to an embodiment of the present application.

Icon: 10-a single-board power control circuit; 11-a power-off control module; 12-restart the control module; 13-control signal combining module; 14-a power conversion module; 141-a direct current converter; 142-discharge cells.

Detailed Description

The technical solution in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application.

The applicant finds that, when the existing communication circuit generally adopts a programmable logic device, for example, a Complex Programmable Logic Device (CPLD), during online function upgrade, due to the inherent characteristics of the CPLD, after the CPLD is upgraded, a new upgrade code can be enabled to take effect only after power failure and restart, and then the control system needs to be powered on automatically after power failure. For example, after software of other system components is upgraded, the power of the single-board power supply needs to be cut off, and then the system components can take effect; when a certain functional component in the system is abnormal, the functional component cannot be recovered through simple system reset, and the functional component can be recovered only by powering off the chip. The "power off auto restart" function is required at this time. The current single-board power supply control system needs to be realized by adding an additional MCU controller system outside a single-board power supply processor, and an MCU as an independent power supply management control function enters a working state in advance and then has the functions of powering on, powering off or powering off and restarting the single-board power supply. The scheme needs to additionally increase an MCU controller, the hardware design cost can be directly increased, and meanwhile, an independent software management system is needed, so that the design and maintenance cost is increased. Especially for a remote control system, the MCU system is required to be simultaneously connected to the network control management platform, which greatly increases the maintenance and management cost.

In order to solve the above problem, the present embodiment provides a single-board power control circuit 10. Referring to fig. 1, fig. 1 is a schematic block diagram of a single-board power control circuit according to an embodiment of the present disclosure.

The single-board power control circuit 10 includes a power-off control module 11, a restart control module 12, a control signal combining module 13, and a power conversion module 14. The power-off control module 11 includes a first reset chip U1 and a D flip-flop U2, the restart control module 12 includes a second reset chip U3, a third reset chip U4 and a first output unit Q1, the control signal combiner module 13 includes an or gate chip U5 and a second output unit Q2, and the power converter module 14 includes a dc converter 141 and a discharging unit 142.

The connection relationship between the single-board power control circuits 10 is briefly described below, the first reset chip U1 in the power-off control module 11 is connected to the standby power supply and the D flip-flop U2, the D flip-flop U2 is connected to the processor of the single-board power supply, the second reset chip U3 of the restart control module 12 is connected to the third reset chip U4, the processor and the standby power supply, the third reset chip U4 is connected to the standby power supply and the first output unit Q1, the or chip U5 in the control signal combining module 13 is connected to the first output unit Q1, the second output unit Q2 and the D flip-flop U2, the second output unit Q2 is connected to the dc converter 141, and the dc converter 141 is connected to the discharging unit 142 and the single-board power load.

In this embodiment, the power-off control module 11 and the restart control module 12 are configured to send a control signal to the control signal combining module 13 based on a restart signal sent by the processor, and the control signal combining module 13 is configured to control the power conversion module 14 to perform power-off restarting or restarting based on the control signal.

Referring to fig. 2, fig. 2 is a circuit diagram of a power-off control module 11 according to an embodiment of the present disclosure.

The power supply pin of the first RESET chip U1 is connected with a standby power supply, the RESET pin RESET of the first RESET chip U1 is connected with the clearing pin # CLR of the D flip-flop U2, the power-off signal input pin 8D of the D flip-flop U2 is connected with the power-off control signal output pin of the processor, the clock input pin CLK of the D flip-flop U2 is connected with the clock output pin of the processor, and the power-off control signal output pin 8Q of the D flip-flop U2 is connected with the input end of the OR gate chip U5.

Optionally, the standby power supply in this embodiment is a 3.3V power supply required for converting a 12V power supply into a power-off control module 11, a restart control module 12, and other control circuits to operate. Specifically, the standby power supply may be a power supply for providing a standby voltage for power supply and system wake-up after the system is turned off.

The power reset chip is used for resetting the power supply by the power reset chip, and specifically can control the reset state of a Central Processing Unit (CPU) during power-on or reset, so that the CPU can be kept in the reset state instead of working immediately after power-on or reset, thereby preventing the CPU from sending out wrong instructions and executing wrong operations, and improving the electromagnetic compatibility.

Alternatively, the first RESET chip U1 may be a general RESET chip or other common power RESET chip, and when power is supplied to the chip, the # RESET pin outputs a low level signal delayed by at least 200ms, and then holds the high level signal, specifically referring to fig. 3, where fig. 3 is a RESET timing diagram of the first RESET chip according to an embodiment of the present disclosure. The first RESET chip U1 pulls the output level of the RESET pin RESET high after a delay of a preset time after the power pin VCC is powered on.

Optionally, a power supply pin VCC of the first reset chip U1 is connected to a first end of the first resistor R1, a second end of the first resistor R1 is connected to an output end of the standby power supply, a first end of the first resistor R1 is further connected to a first end of the first capacitor C1, and a second end of the first capacitor C1 is grounded; the RESET pin RESET of the first RESET chip U1 is respectively connected to the first end of the second resistor R2, the first end of the third resistor R3, and the first end of the second capacitor C2, the second end of the second resistor R2 and the second end of the second capacitor C2 are connected to the ground pin GND of the first RESET chip U1 and grounded, and the second end of the third resistor R3 is connected to the clear pin # CLR of the D flip-flop U2.

Alternatively, the D flip-flop U2 may be 74HC273 or another D flip-flop with a clock function, and the D flip-flop U2 outputs a low level from the power-down control signal output pin 8Q when the clear pin # CLR is low, and outputs the same level from the power-down control signal output pin 8Q as the power-down signal input pin 8D when the clear pin # CLR is high.

Optionally, the pin 7D of the D flip-flop U2 is connected to the power-off control signal output pin 8Q and grounded through a resistor, the clock input pin CLK is grounded through a fourth resistor R4, the power-off control signal output pin 8Q is connected to the fifth resistor R5 or the input terminal of the gate chip U5, the pin VDD of the D flip-flop U2 is connected to the standby power supply and the first end of the third capacitor C3, and the second end of the third capacitor C3 is connected to the pin GND of the D flip-flop U2 and grounded.

In order to implement the power-off early warning function, the power-off control module 11 of this embodiment may further include a light emitting diode LED, the pin 7Q of the D flip-flop U2 is connected to the anode of the light emitting diode LED through a series resistor, and the cathode of the light emitting diode LED is grounded.

When the single-board power supply needs to be powered off and not restarted, a power-off control signal output pin of the processor outputs a high level to a power-off signal input pin 8D of the D flip-flop U2, a clock output pin of the processor outputs clock pulses to a clock input pin CLK of the D flip-flop U2, and a power-off control signal output pin 8Q of the D flip-flop U2 outputs a high level to an input end of an OR gate chip U5; the restart control module 12 outputs a low level to the input terminal of the or gate chip U5; the or gate chip U5 outputs a high level to the second output unit Q2 based on the high level of the power-off control signal output pin 8Q of the D flip-flop U2, and the second output unit Q2 inverts the received high level and outputs a low level to the power chip enable pin of the dc converter 141 to turn off the dc converter 141.

Referring to fig. 4, fig. 4 is a circuit diagram of a restart control module according to an embodiment of the present disclosure.

Optionally, the restart control module 12 in this embodiment further includes an input unit Q3, an input terminal of the input unit Q3 is connected to a restart signal output pin of the processor, a clear pin # MR of the second RESET chip U3 is connected to an output terminal of the input unit Q3 and a standby power supply, a RESET pin # RESET of the second RESET chip U3 is connected to a clear pin # MR of the third RESET chip U4, a RESET pin # RESET of the third RESET chip U4 is connected to an input terminal of the first output unit Q1, a power supply pin VCC of the second RESET chip U3 and a power supply pin VCC of the third RESET chip U4 are connected to the standby power supply, and an output terminal of the first output unit Q1 is connected to an input terminal of the or gate chip U5.

Alternatively, the second reset chip U3 and the third reset chip U4 may be general purpose reset chips including a # MR pin or other common power reset chips. Compared with the first RESET chip U1, the second RESET chip U3 and the third RESET chip U4 have the # MR RESET function added, after the second RESET chip U3 or the third RESET chip U4 is powered on to complete the # RESET output, if the # MR pin receives the us-level low-level signal, the RESET function of the RESET chip is re-triggered, the # MR pin can be pulled down to re-output the low-level signal for at least 200ms, and then the high-level signal is maintained.

Optionally, the input unit Q3 is a triode, a base (an input end) of the input unit Q3 is connected to the restart signal output pin of the processor, the first end of the sixth resistor R6 and the first end of the fourth capacitor C4, an emitter of the input unit Q3 is connected to the second end of the sixth resistor R6 and the second end of the fourth capacitor C4, and is grounded, a collector (an output end) of the input unit Q3 is connected to the clear pin # MR of the second reset chip U3, the first end of the sixth resistor R6 and the first end of the fifth capacitor C5, the second end of the sixth resistor R6 is connected to the standby power supply, and the second end of the fifth capacitor C5 is grounded.

Optionally, the power pin VCC of the second RESET chip U3 is connected to the first end of the seventh resistor R7 and the first end of the sixth capacitor C6, the second end of the seventh resistor R7 is connected to the standby power supply, the second end of the sixth capacitor C6 is grounded, the RESET pin # RESET of the second RESET chip U3 is connected to the first end of the eighth resistor R8, the first end of the ninth resistor R9, and the first end of the seventh capacitor C7, the ground pin GND of the second RESET chip U3 is connected to the second end of the eighth resistor R8 and the second end of the seventh capacitor C7 and grounded, and the second end of the ninth resistor R9 is connected to the clear pin # MR of the third RESET chip U4.

Optionally, the power pin VCC of the third RESET chip U4 is connected to the first end of the tenth resistor R10 and the first end of the eighth capacitor C8, respectively, the second end of the tenth resistor R10 is connected to the standby power supply, the second end of the eighth capacitor C8 is grounded, the ground pin GND of the third RESET chip U4 is grounded, the RESET pin # RESET of the third RESET chip U4 is connected to the first end of the ninth capacitor C9, the first end of the eleventh resistor R11, and the first end of the twelfth resistor R12, the second end of the ninth capacitor C9 is grounded, the second end of the eleventh resistor R11 is connected to the input terminal of the first output unit Q1, and the second end of the twelfth resistor R12 is grounded.

Alternatively, the first output unit Q1 may be a triode, the input terminal of the first output unit Q1 is a base, the output terminal is a collector, the base and the emitter thereof are connected through a twelfth resistor R12 and a tenth capacitor C10 in parallel and are grounded, and the collector thereof is connected with the standby power supply through a thirteenth resistor R13.

When the single-board power supply is powered off and restarted, a restarting signal output pin of the processor outputs a high level to an input end of the input unit Q3, the input unit Q3 inverts the high level and then inputs a low level to a zero clearing pin # MR of the second reset chip U3, so that the second reset chip U3 is reset after the standby power supply supplies power; the third reset chip U4 outputs a delayed low level to the input terminal of the first output unit Q1, and the first output unit Q1 inverts the delayed low level and outputs a high level to the input terminal of the or gate chip U5; the power-off control module 11 is configured to output a low level to the or gate chip U5; the or gate chip U5 outputs a high level to the second output unit Q2 based on the high level input from the first output unit Q1, and the second output unit Q2 inverts the high level and outputs a low level to the power chip enable pin of the dc converter 141 to turn off the dc converter 141; the discharge unit 142 is used for performing accelerated discharge on the residual voltage of the dc converter 141; the output of the RESET pin # RESET of the third RESET chip U4 is pulled high, and the first output unit Q1 inverts the high level and outputs a low level to the input terminal of the or gate chip U5; the or gate chip U5 outputs a low level to the second output unit Q2 based on the low level input from the first output unit Q1 and the low level input from the power-off control module 11, and the second output unit Q2 inverts the low level and outputs a high level to the power chip enable pin of the dc converter 141 to start the dc converter 141.

Referring to fig. 5, fig. 5 is a circuit diagram of a control signal combining module according to an embodiment of the present disclosure.

The control signal combining module 13 includes an or gate chip U5 and a second output unit Q2.

Alternatively, the or gate chip U5 may be 74HC32D or another or gate chip, which is used to output an active level (high level in this embodiment) when an active signal (high level in this embodiment) is taken from any input terminal.

Alternatively, the input terminal of the or gate chip U5 includes a pin a0 and a pin B0, the pin a0 is connected to the power-off control signal output pin 8Q of the D flip-flop U2, the pin B0 is connected to the RESET pin # RESET of the third RESET chip U4, the or gate chip U5 further includes a pin a1, a pin B1, a pin a2, a pin B2, a pin A3, and a pin B3, which are respectively connected to the ground pin GND of the or gate chip U5 through a resistor and are grounded, or the output terminal of the gate chip U5 is a pin Y0, the pin Y0 is connected to the input terminal of the second output unit Q2 through a resistor, or the power supply pin VCC of the gate chip U5 is grounded through a capacitor and is connected to the standby power supply.

Alternatively, the second output unit Q2 may be a triode, the base of which is connected to the pin Y0 of the or gate chip U5 of the second output unit Q2, the base of the second output unit Q2 is connected to its emitter through a resistor and a capacitor connected in parallel and grounded, and the collector of the second output unit Q2 is connected to the power chip enable pin of the single-board power supply through a resistor as the output terminal of the second output unit Q2.

When the single-board power supply needs to be powered off and not restarted, a power-off control signal output pin of the processor outputs a high level to a power-off signal input pin 8D of a D flip-flop U2, a clock output pin of the processor is used for outputting clock pulses to a clock input pin CLK of a D flip-flop U2, the power-off control module 11 processes an input signal and outputs a high level to an input pin A0 of an OR gate chip U5, a restart signal output pin of the processor inputs a low level to an input unit Q3 of the restart control module 12, the restart control module 12 processes the input signal and inputs a low level to an input pin B0 of the OR gate chip U5, the or gate chip U5 inputs a high level to the second output unit Q2 through the pin Y0, and the second output unit Q2 inverts the high level and outputs a low level to the power chip enable pin of the single board power supply to turn off the dc converter 141.

When the single-board power supply is powered off and restarted, a power-off control signal output pin of the processor inputs a low level to the power-off control module 11, the power-off control module 11 processes the input low level and inputs a low level to a pin a0 of an or gate chip U5, a restart signal output pin of the processor outputs a high level to the restart control module 12, the restart control module 12 processes the input high level and outputs a high level to a pin B0 of an input end of the or gate chip U5, or the gate chip U5 outputs a high level to a second output unit Q2 through a pin Y0, the second output unit Q2 inverts the high level and outputs a low level to a power chip enable pin of the dc converter 141 to turn off the dc converter 141, the discharge unit 142 accelerates the discharge of the residual voltage of the dc converter 141, the restart control module 12 outputs a low level to a pin B0 of the or gate chip U5 based on the reset pull-up level, the or gate chip U5 outputs a low level to the second output unit Q2, and the second output unit Q2 inverts the low level and outputs a high level to the power chip enable pin of the dc converter 141 to start the dc converter 141.

Alternatively, the processor of the single board power supply in this embodiment may be a CPU or a Programmable Logic Device (PLD) control unit, the processor is connected to and controls the power-off control module 11 through a power-off control signal output pin and a clock output pin, and the processor is connected to and controls the restart control module 12 through a restart signal output pin.

The power conversion module 14 includes a dc converter 141 and a discharge unit 142, wherein a chip enable pin of the dc converter 141 is connected to an output terminal of the second output unit Q2, and an output terminal of the dc converter 141 is connected to a single-board power load.

Alternatively, the discharge unit 142 may be two or more ground resistors connected in parallel at the output terminal of the dc converter 141. The discharge unit 142 is used to discharge the residual current in the dc converter 141.

The embodiment of the present application further provides an electronic device, which includes any one of the above single-board power control circuits 10. Optionally, the electronic device may be a single board power supply, or may be an electronic device including a single board power supply and applied to communication or any other functional fields.

In summary, the embodiment of the present application provides a single-board power control circuit and an electronic device, where the single-board power control circuit includes a power-off control module, a restart control module, a control signal combining module and a power conversion module, the power-off control module includes a first reset chip and a D flip-flop, the restart control module includes a second reset chip, a third reset chip and a first output unit, the control signal combining module includes an or chip and a second output unit, and the power conversion module includes a dc converter and a discharge unit; the first reset chip is respectively connected with a standby power supply and the D trigger, the D trigger is connected with a processor of a single-board power supply, the second reset chip is respectively connected with the third reset chip, the processor and the standby power supply, the third reset chip is respectively connected with the standby power supply and the first output unit, the OR gate chip is respectively connected with the first output unit, the second output unit and the D trigger, the second output unit is connected with the DC converter, and the DC converter is also respectively connected with the discharging unit and a single-board power supply load; the power-off control module and the restarting control module are used for sending control signals to the control signal combining module based on restarting signals sent by the processor, and the control signal combining module is used for controlling the power supply conversion module to be not restarted or restarted after power-off based on the control signals.

In the embodiments provided in the present application, it should be understood that the disclosed apparatus may be implemented in other manners. The apparatus embodiments described above are merely illustrative, and for example, the block diagrams in the figures illustrate the architecture, functionality, and operation of possible implementations of devices according to various embodiments of the present application. In this regard, each block in the block diagrams may represent a module, segment, or portion of code, which comprises one or more executable instructions for implementing the specified logical function(s). It should also be noted that, in some alternative implementations, the functions noted in the block may occur out of the order noted in the figures. For example, two blocks shown in succession may, in fact, be executed substantially concurrently, or the blocks may sometimes be executed in the reverse order, depending upon the functionality involved. It will also be noted that each block of the block diagrams, and combinations of blocks in the block diagrams, can be implemented by special purpose hardware-based systems which perform the specified functions or acts, or combinations of special purpose hardware and computer instructions.

In addition, functional modules in the embodiments of the present application may be integrated together to form an independent part, or each module may exist separately, or two or more modules may be integrated to form an independent part.

The functions, if implemented in the form of software functional modules and sold or used as a stand-alone product, may be stored in a computer readable storage medium. Therefore, the present embodiment further provides a readable storage medium, in which computer program instructions are stored, and when the computer program instructions are read and executed by a processor, the computer program instructions perform the steps of any of the block data storage methods. Based on such understanding, the technical solution of the present application or portions thereof that substantially contribute to the prior art may be embodied in the form of a software product stored in a storage medium and including instructions for causing a computer device (which may be a personal computer, a server, or a network device) to execute all or part of the steps of the method according to the embodiments of the present application. And the aforementioned storage medium includes: a U-disk, a removable hard disk, a Read-only memory (ROM), a Random Access Memory (RAM), a magnetic disk or an optical disk, and various media capable of storing program codes.

The above description is only an example of the present application and is not intended to limit the scope of the present application, and various modifications and changes may be made by those skilled in the art. Any modification, equivalent replacement, improvement and the like made within the spirit and principle of the present application shall be included in the protection scope of the present application. It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.

The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any person skilled in the art can easily conceive of the changes or substitutions within the technical scope of the present application, and shall be covered by the scope of the present application.

It is noted that, herein, relational terms such as first and second, and the like may be used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Also, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising … …" does not exclude the presence of other identical elements in a process, method, article, or apparatus that comprises the element.

Claims

1. A single-board power control circuit is characterized by comprising a power-off control module, a restart control module, a control signal combining module and a power conversion module, wherein the power-off control module comprises a first reset chip and a D trigger, the restart control module comprises a second reset chip, a third reset chip and a first output unit, the control signal combining module comprises an OR gate chip and a second output unit, and the power conversion module comprises a direct current converter and a discharging unit;

the first reset chip is respectively connected with a standby power supply and the D trigger, the D trigger is connected with a processor of a single-board power supply, the second reset chip is respectively connected with the third reset chip, the processor and the standby power supply, the third reset chip is respectively connected with the standby power supply and the first output unit, the OR gate chip is respectively connected with the first output unit, the second output unit and the D trigger, the second output unit is connected with the DC converter, and the DC converter is also respectively connected with the discharging unit and a single-board power supply load;

the power-off control module and the restarting control module are used for sending control signals to the control signal combining module based on restarting signals sent by the processor, and the control signal combining module is used for controlling the power supply conversion module to be not restarted or restarted after power-off based on the control signals.

2. The single-board power control circuit according to claim 1, wherein a power pin of the first reset chip is connected to the standby power, a reset pin of the first reset chip is connected to a clear pin of the D flip-flop, a power-off signal input pin of the D flip-flop is connected to a power-off control signal output pin of the processor, a clock input pin of the D flip-flop is connected to a clock output pin of the processor, and a power-off control signal output pin of the D flip-flop is connected to an input terminal of the or gate chip;

when the single-board power supply needs to be powered off and not restarted, the power-off control signal output pin of the processor is used for outputting a high level to the power-off signal input pin, the clock output pin of the processor is used for outputting clock pulses to the clock input pin, and the power-off control signal output pin of the D flip-flop is used for outputting a high level to the input end of the or gate chip; the restarting control module is used for outputting a low level to the input end of the OR gate chip; the OR gate chip is used for outputting a high level to the second output unit based on the high level of the power-off control signal output pin, and the second output unit is used for outputting a low level to the power chip enable pin of the DC converter after inverting the received high level so as to close the DC converter.

3. The single-board power control circuit according to claim 2, wherein the second output unit is a triode, a base of the second output unit is connected to the output terminal of the or gate chip, an emitter of the second output unit is connected to the output terminal of the or gate chip and grounded, and a collector of the second output unit is connected to an enable pin of the power chip of the dc converter.

4. The single-board power control circuit according to claim 2, wherein the power-off control module further comprises a pull-down resistor, and the power-off signal input pin and the clock input pin are grounded through the pull-down resistor, respectively;

when the single-board power supply needs to be normally powered on, the standby power supply is powered on, the power-off signal input pin and the clock input pin input low level due to the pull-down resistor, and the power-off control signal output pin of the D trigger is used for outputting low level to the input end of the OR gate chip; the restarting control module is used for outputting a low level to the input end of the OR gate chip; the OR gate chip is used for outputting a low level to the second output unit based on the low level output by the power-off control signal output pin, and the second output unit is used for outputting a high level to the power chip enable pin of the DC converter after inverting the low level so as to start the DC converter.

5. The on-board power control circuit according to any one of claims 2-4, wherein the power-down control module further includes a light emitting diode, an anode of the light emitting diode is connected to a diode control signal output pin of the D flip-flop, and an output level of the diode control signal output pin is the same as an output level of the power-down control signal output pin.

6. The single-board power control circuit according to claim 1, wherein the restart control module further includes an input unit, an input terminal of the input unit is connected to a restart signal output pin of the processor, a clear pin of the second reset chip is connected to an output terminal of the input unit and the standby power supply, a reset pin of the second reset chip is connected to a clear pin of the third reset chip, a reset pin of the third reset chip is connected to an input terminal of the first output unit, a power pin of the second reset chip and a power pin of the third reset chip are connected to the standby power supply, an output terminal of the first output unit is connected to an input terminal of the or gate chip;

when the single-board power supply needs to be powered off and restarted, the restart signal output pin of the processor is used for outputting a high level to the input end of the input unit, and the input unit is used for inputting a low level to a zero clearing pin of the second reset chip after inverting the high level, so that the second reset chip is reset after the standby power supply supplies power; the third reset chip is used for outputting a delayed low level to the input end of the first output unit, and the first output unit is used for outputting a high level to the input end of the or gate chip after inverting the delayed low level; the power-off control module is used for outputting a low level to the OR gate chip; the OR gate chip is used for outputting a high level to the second output unit based on the high level input by the first output unit, and the second output unit is used for outputting a low level to an enable pin of a power supply chip of the DC converter after inverting the high level so as to close the DC converter; the discharge unit is used for accelerating discharge of residual voltage of the direct current converter; the output of a reset pin of the third reset chip is pulled high to a high level, and the first output unit is used for outputting a low level to the input end of the OR gate chip after inverting the high level; the OR gate chip is used for outputting a low level to the second output unit based on a low level input by the first output unit and a low level input by the power-off control module, and the second output unit is used for outputting a high level to an enable pin of a power chip of the DC converter after inverting the low level so as to start the DC converter.

7. The single-board power control circuit according to claim 6, wherein the input unit and the first output unit are transistors;

the base electrode of the input unit is the input end of the input unit, the collector electrode of the input unit is the output end of the input unit, and the emitter electrode of the input unit is connected with the input end of the input unit and grounded;

the base electrode of the first output unit is the input end of the first output unit, the emitter electrode of the first output unit is connected with the input end of the first output unit and grounded, and the collector electrode of the first output unit is used as the output end and connected with the input end of the OR gate chip.

8. The single-board power control circuit according to claim 1, wherein the discharging unit includes a first discharging resistor and a second discharging resistor, and an output terminal of the dc converter is grounded via the first discharging resistor and the second discharging resistor connected in parallel.

9. The single board power control circuit of claim 1, wherein the second reset chip and the third reset chip are reset chips including a # MR pin.

10. An electronic device, characterized in that the electronic device comprises a single-board power control circuit according to any one of claims 1-9.