CN209265384U - A kind of upgrading power-down protection circuit system for urban traffic guidance terminal - Google Patents
A kind of upgrading power-down protection circuit system for urban traffic guidance terminal Download PDFInfo
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- CN209265384U CN209265384U CN201821606885.XU CN201821606885U CN209265384U CN 209265384 U CN209265384 U CN 209265384U CN 201821606885 U CN201821606885 U CN 201821606885U CN 209265384 U CN209265384 U CN 209265384U
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Abstract
The utility model discloses a kind of upgrading power-down protection circuit systems for urban traffic guidance terminal; including MCU chip, fpga chip, FLASH chip and electric power management circuit, the electric power management circuit, which is given, provides power supply including MCU chip, fpga chip and FLASH chip；The MCU chip and fpga chip and FLASH chip signal feedback link each other, the fpga chip and FLASH chip also signal feedback link each other.The utility model has many advantages, such as that easy to operate, practical, the safe and reliable property of remote upgrade is high.Detection circuit, the programming circuitry for devising corresponding function simultaneously, improve practicability, the safety of circuit system, it is ensured that the safety of remote upgrade procedure.
Description
Technical field
The utility model relates to a kind of upgrading power-down protection circuit systems for urban traffic guidance terminal, belong to communication
Electronic technology field.
Background technique
With communication and the development of electronic technology, the requirement to the safety and reliability of network transmission is higher and higher, each
The security reliability transmitted under kind emergency case can have protection system, and normally starting and operation become measurement reliability later
One of essential standard.In the case where equipment unexpected power down, since the various pieces of system are in uncontrollable level
State, program file and data may be destroyed, and influence system normal operation.Therefore, in the high equipment of reliability requirement,
There must be the defencive function of upgrading power down.Currently on the market commonly upgrading mode generally before factory by replication tool,
Program has been arrived if there is BUG needs to upgrade in user hand, and remote upgrade is a kind of simple and quick method, but is encountered in escalation process
The abnormal conditions such as power down, technical staff can only arrive at scene using upgrading tool field upgrade, bring big inconvenience to using
It is prompt.
Summary of the invention
The purpose of this utility model is to overcome can not normally rise extremely to power down during terminal device online upgrading
The deficiency of grade, provide it is a kind of utilize equipment existing resource, realize still safe under FPGA configuration file power down abnormal conditions rise
The guard method of abnormal conditions in remote online terminal upgrade may be implemented in the defencive function of grade, the system.
The utility model is achieved through the following technical solutions:
A kind of upgrading power-down protection circuit system for urban traffic guidance terminal, including MCU chip, fpga chip,
FLASH chip and electric power management circuit, the electric power management circuit is given to be provided including MCU chip, fpga chip and FLASH chip
Power supply；The MCU chip and fpga chip and FLASH chip signal feedback link each other, the fpga chip and FLASH core
Piece also signal feedback link each other.
After electric power management circuit starting, electric power management circuit gives MCU chip, fpga chip and FLASH chip power supply respectively,
When MCU chip monitoring is less than the normal heartbeat signal of the fpga chip, the MCU chip immediately will be in the FLASH chip
Alternate program is read and is write in the FPGA loading area of the FLASH chip, and after write-in, the MCU chip is logical
It crosses its pin PA0 and triggers the FPGA and reload program in the FLASH chip, run system, carry out at this time again
Online upgrading；Data packet is upgraded to the FLASH chip by the fpga chip, and the fpga chip completes upgrading, described
Fpga chip notifies the MCU chip burning to complete, and the MCU chip gives one low level trigger signal of the fpga chip,
The fpga chip is set to reload upgrading data packet in the FLASH chip, system operates normally after reading.
The specific connection type of MCU chip are as follows: the PA1 pin of the MCU chip passes through network connection label MCU
FPGA is realized to the I/O pin of fpga chip and is monitored the FPGA heartbeat in real time；
The PA0 pin of the MCU chip is realized by the PROGRAM pin of network connection label PRO B to fpga chip
It triggers the fpga chip and reloads program in the FLASH chip；
The PA7/SPI1_MOSI pin of the MCU chip passes through network connection label SPI MOSI to the fpga chip
IO_MOSI pin, while connecting the DI pin of the FLASH chip, realize main hair from receiving function；
The PA6/SPI1_MIS0 pin of the MCU chip passes through network connection label SPI MISO to the fpga chip
IO_MISO pin, while connecting the DO pin of the FLASH chip, realize main receive from hair function；
The IO_ that the MCU chip PA5/SPI1_SCK pin passes through network connection label SPI SCK to the fpga chip
CLK pin, while the CLK pin of the FLASH chip is connected, realize the timing function of operating when input and output；
The PA4/SPI1_NSS pin of the MCU chip passes through network connection label SPI CS to the fpga chip
IO_CS pin, while the CS# pin of the FLASH chip is connected, realize chip select functionality；
The VSS pin of the MCU chip connects ground terminal GND；
The VDD pin of the MCU chip connects power end VCC；
The VDDA pin of the MCU chip connects power end VCC.
The specific connection type of FLASH chip are as follows: the GND pin of the FLASH chip connects ground terminal GND；
The VCC connection power end VCC of the FLASH chip；
The HOLD# pin of the FLASH chip is connected with resistance R2, resistance R2 other end connection VCC, described in realization
FLASH chip lock state；
The WP# pin of the FLASH chip is connected with resistance R1, the resistance R1 other end connection VCC, described in realization
FLASH chip is readable can write state.
The resistance R2, resistance R1 select pull-up resistor.
The voltage for the power supply VCC that the MCU chip is connected with FLASH chip is 3V3.
From the above technical solution of the present invention shows that, the beneficial effects of the present invention are:
The utility model has many advantages, such as that easy to operate, practical, the safe and reliable property of remote upgrade is high.It designs simultaneously
The detection circuit of corresponding function, programming circuitry, improve practicability, the safety of circuit system, it is ensured that remote update system
The stability of circuit.
The utility model is suitable for remote online upgrading power down leads to blank screen phenomenon extremely, avoids to scene cd-rom recorder
Upgrading mode.
Detailed description of the invention
Fig. 1 is the integrated connection state diagram of the utility model,
Fig. 2 is the MCU chip structure chart of the utility model,
Fig. 3 is the fpga chip structure chart of the utility model,
Fig. 4 is the FLASH chip structure chart of the utility model.
Specific embodiment
In order to make related personnel know more about technology contents of the invention, now specific embodiment is said in conjunction with institute's accompanying drawings
It is bright as follows.
In conjunction with Fig. 1, the utility model is used for the upgrading power-down protection circuit system of urban traffic guidance terminal, power management
After circuit start, electric power management circuit is connected with other three parts respectively and is powered to it, when MCU chip monitoring less than
Alternate program in FLASH chip is read immediately and writes FLASH chip by the normal heartbeat signal of fpga chip, MCU chip
In FPGA loading area, after write-in, MCU chip triggers FPGA by its pin PAO and reloads the journey in FLASH chip
Sequence runs system, carries out online upgrading again at this time；Data packet is upgraded to FLASH chip by fpga chip, and fpga chip is complete
At upgrading, fpga chip notifies MCU chip burning to complete, and MCU chip gives fpga chip one low level trigger signal, makes FPGA
Chip reloads upgrading data packet in FLASH chip, and system operates normally after reading.
In conjunction with Fig. 2, Fig. 3 and Fig. 4, the specific connection type of MCU chip are as follows: MCU chip PA1 pin passes through network connection label
MCUFPGA to the IO of fpga chip, realizes real time monitoring FPGA heartbeat；MCU chip PAO pin passes through network connection label PROB
To the PROGRAM of fpga chip, realize that triggering fpga chip reloads the program in FLASH chip；MCU chip PA7/
SPI1_MOSI pin connects FLASH chip by being connected to the network label SPI MOSI to fpga chip IO_MOSI pin
DI pin realize it is main hair from receive function；MCU chip PA6/SPI1_MISO pin is arrived by being connected to the network label SPI MISO
Fpga chip IO_MISO pin, while the DO pin for connecting FLASH chip realizes main receive from hair function；MCU chip PA5/
SPI1_SCK pin connects FLASH chip by being connected to the network label SPI SCK to fpga chip IO_CLK pin
CLK pin realizes the timing function of operating when input and output；MCU chip PA4/SPI1_NSS pin passes through network connection label
SPI CS is to fpga chip IO_CS pin, while the CS# pin for connecting FLASH chip realizes chip select functionality；MCU chip VSS draws
Foot connects GND；MCU chip VDD pin connects VCC3V3；MCU chip VDDA pin connects VCC3V3；The GND of FLASH chip draws
Foot connects GND；FLASH chip VCC connection VCC3V3；The HOLD# pin of FLASH chip is connected with resistance R2, and resistance R2 is another
End connection VCC3V3, resistance R2 is pull-up resistor, realizes FLASH chip lock state；The WP# pin and resistance of FLASH chip
R1 series connection, the R1 other end connect VCC3V3, resistance R1 is pull-up resistor, realize FLASH chip is readable can write state.
Normal upgrading process of the utility model for the upgrading power-down protection circuit system of urban traffic guidance terminal are as follows:
Step 1: data packet is upgraded to the FLASH chip by the fpga chip, and the fpga chip completes upgrading, the FPGA
MCU chip burning described in chip informing is completed, and the MCU gives one low level trigger signal of the fpga chip, is made described
Fpga chip reloads upgrading data packet in the FLASH chip, and system operates normally after reading.Abnormal upgrading process
Are as follows: step 2: happen suddenly power-down conditions during online upgrading, causes program run-time error, power-on error program can not be extensive again
Multiple correct operation, when normal heartbeat signal of the MCU chip monitoring less than the fpga chip, the MCU chip immediately will
Alternate program is read and is write in the FPGA loading area of the FLASH chip in the FLASH chip, and write-in finishes
Afterwards, the MCU chip triggers the FPGA by its pin PAO and reloads program in the FLASH chip, transports system
Row, carries out online upgrading again at this time, enters step one.
The above descriptions are merely preferred embodiments of the present invention, is not limited to utility model.In embodiment
It is only the working principle for illustrating the utility model by taking the upgrading power down protection system and method for FPGA as an example, is not limited in
The upgrading power down protection system and method for FPGA.With within principle, made any modification is equal all spirit in utility model
Replacement, improvement etc., should be included within the protection scope of utility model.
Although the present invention has been disclosed as a preferred embodiment, however, it is not to limit the invention.Skill belonging to the present invention
Has usually intellectual in art field, without departing from the spirit and scope of the present invention, when can be used for a variety of modifications and variations.Cause
This, the scope of protection of the present invention is defined by those of the claims.
Claims (4)
1. a kind of upgrading power-down protection circuit system for urban traffic guidance terminal, it is characterised in that: including MCU chip,
Fpga chip, FLASH chip and electric power management circuit, the electric power management circuit give including MCU chip, fpga chip and
FLASH chip provides power supply；The MCU chip and fpga chip and FLASH chip signal feedback link each other, the FPGA
Chip and FLASH chip also signal feedback link each other.
2. a kind of upgrading power-down protection circuit system for urban traffic guidance terminal according to claim 1, special
Sign is:
The specific connection type of MCU chip are as follows: the PA1 pin of the MCU chip is arrived by being connected to the network label MCU FPGA
The I/O pin of fpga chip is realized and monitors the FPGA heartbeat in real time；
The PA0 pin of the MCU chip realizes triggering by the PROGRAM pin of network connection label PRO B to fpga chip
The fpga chip reloads the program in the FLASH chip；
The IO_ that the PA7/SPI1_MOSI pin of the MCU chip passes through network connection label SPI MOSI to the fpga chip
MOSI pin, while the DI pin of the FLASH chip is connected, realize main hair from receipts function；
The IO_ that the PA6/SPI1_MIS0 pin of the MCU chip passes through network connection label SPI MISO to the fpga chip
MISO pin, while the DO pin of the FLASH chip is connected, realize main receive from hair function；
The IO_CLK that the MCU chip PA5/SPI1_SCK pin passes through network connection label SPI SCK to the fpga chip
Pin, while the CLK pin of the FLASH chip is connected, realize the timing function of operating when input and output；
The IO_CS that the PA4/SPI1_NSS pin of the MCU chip passes through network connection label SPI CS to the fpga chip
Pin, while the CS# pin of the FLASH chip is connected, realize chip select functionality；
The VSS pin of the MCU chip connects ground terminal GND；
The VDD pin of the MCU chip connects power end VCC；
The VDDA pin of the MCU chip connects power end VCC.
3. a kind of upgrading power-down protection circuit system for urban traffic guidance terminal according to claim 1, special
Sign is:
The specific connection type of FLASH chip are as follows: the GND pin of the FLASH chip connects ground terminal GND；
The VCC connection power end VCC of the FLASH chip；
The HOLD# pin of the FLASH chip is connected with resistance R2, and the resistance R2 other end connects VCC, realizes the FLASH core
Piece lock state；
The WP# pin of the FLASH chip is connected with resistance R1, and the resistance R1 other end connects VCC, realizes the FLASH
Chip is readable can write state.
4. a kind of upgrading power-down protection circuit system for urban traffic guidance terminal according to claim 1, special
Sign is:
The voltage for the power supply VCC that the MCU chip is connected with FLASH chip is 3V3.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821606885.XU CN209265384U (en) | 2018-09-29 | 2018-09-29 | A kind of upgrading power-down protection circuit system for urban traffic guidance terminal |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201821606885.XU CN209265384U (en) | 2018-09-29 | 2018-09-29 | A kind of upgrading power-down protection circuit system for urban traffic guidance terminal |
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| CN209265384U true CN209265384U (en) | 2019-08-16 |
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| CN201821606885.XU Active CN209265384U (en) | 2018-09-29 | 2018-09-29 | A kind of upgrading power-down protection circuit system for urban traffic guidance terminal |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110941510A (en) * | 2019-11-14 | 2020-03-31 | 中国航空工业集团公司西安航空计算技术研究所 | FPGA (field programmable Gate array) online reloading circuit and method |
-
2018
- 2018-09-29 CN CN201821606885.XU patent/CN209265384U/en active Active
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN110941510A (en) * | 2019-11-14 | 2020-03-31 | 中国航空工业集团公司西安航空计算技术研究所 | FPGA (field programmable Gate array) online reloading circuit and method |
| CN110941510B (en) * | 2019-11-14 | 2023-05-05 | 中国航空工业集团公司西安航空计算技术研究所 | Online reloading circuit and method for FPGA |
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