CN109032318B - Power supply monitoring system and storage server system - Google Patents

Power supply monitoring system and storage server system Download PDF

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CN109032318B
CN109032318B CN201810799625.7A CN201810799625A CN109032318B CN 109032318 B CN109032318 B CN 109032318B CN 201810799625 A CN201810799625 A CN 201810799625A CN 109032318 B CN109032318 B CN 109032318B
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level signal
resistor
output
switch tube
voltage
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CN109032318A (en
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张兆峰
张军明
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Zhengzhou Yunhai Information Technology Co Ltd
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Zhengzhou Yunhai Information Technology Co Ltd
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    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/28Supervision thereof, e.g. detecting power-supply failure by out of limits supervision

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Abstract

The invention discloses a power supply monitoring system and a storage server system, comprising: a monitoring module for acquiring PowThe output voltage of the output end of the er IC generates an auxiliary signal according to the output voltage, wherein the auxiliary signal is a low level signal or a high level signal; the management module is used for receiving the auxiliary signal and a feedback signal output by a PG pin of the Power IC and judging whether the auxiliary signal and the feedback signal have a high level signal or not, if so, outputting a PG high level signal, and if not, outputting a PG low level signal; and the CPLD is used for executing the next stage of enabling operation after receiving the PG high-level signal and executing power-off operation after receiving the PG low-level signal. The invention effectively avoids when V isinWhen the UVLO of the Power IC is triggered by fluctuation, the conditions of CPLD misoperation and system error reporting triggering are caused, and the reliable operation of the storage server system is guaranteed.

Description

Power supply monitoring system and storage server system
Technical Field
The present invention relates to the field of storage, and in particular, to a power supply monitoring system and a storage server system.
Background
In the cloud computing era, mass data storage and transmission require a large-capacity storage carrier platform, and in order to ensure that the Power supply timing sequence meets the industrial standard during the operation of a storage server system, the output state of a Power supply is monitored, usually a CPLD (Complex Programmable Logic Device) receives a feedback signal (including a high level signal and a low level signal) output by a PG pin of a Power Integrated Circuit (Power Integrated Circuit) to realize a Power-on timing sequence or a Power-off timing sequence.
Specifically, in the operation process of the conventional storage server system, after receiving the PG high level signal of the upper unit, the CPLD sends a high level enable signal to the Power IC, the level of the enable pin EN of the Power IC is pulled high, and the output voltage V of the Power IC is increasedoutAt VoutIn normal operation, the Power supply VCC of the Power IC pulls up the level of the PG pin, the PG pin outputs a high-level signal to the CPLD to realize the monitoring of the output state of the Power supply by the CPLD, and meanwhile, the CPLD uses the high-level signal output by the PG pin as an enabling signal of the next-stage Power IC to execute the enabling operation of the next stage. In actual use, however, if the power supply V of the server system is storedinWhen the Voltage level of PG pin is pulled down instantaneously due to the fluctuation, the UVLO (Under Voltage Lock Out) of Power IC is triggered by mistake or the protection action of Power IC is taken, and at this time, even if the output Voltage V of Power IC is outputoutStill, the CPLD will output due to the reception of PG pinThe low level signal of the storage server system triggers the system to report an error by mistake, and the system is shut down to influence the normal operation of the storage server system.
Therefore, how to provide a solution to the above technical problem is a problem that needs to be solved by those skilled in the art.
Disclosure of Invention
The invention aims to provide a power supply monitoring system which effectively avoids the current VinWhen the UVLO of the Power IC is triggered by fluctuation, the situations of CPLD misoperation and system error reporting triggering are caused, and the reliable operation of the storage server system is guaranteed; it is another object of the present invention to provide a storage server system including the above power supply monitoring system.
To solve the above technical problem, the present invention provides a power supply monitoring system, including:
the monitoring module is used for acquiring the output voltage of the output end of the Power IC and generating an auxiliary signal according to the output voltage, wherein the auxiliary signal is a low level signal or a high level signal;
the management module is used for receiving the auxiliary signal and a feedback signal output by a PG pin of the Power IC and judging whether the auxiliary signal and the feedback signal have the high level signal or not, if so, outputting a PG high level signal, and if not, outputting a PG low level signal;
and the complex programmable logic device CPLD is used for executing next-stage enabling operation after receiving the PG high-level signal and executing power-off operation after receiving the PG low-level signal.
Preferably, the monitoring module includes a voltage dividing module, a first switch tube, a second switch tube, a first resistor and a second resistor, wherein:
the input end of the voltage division module is connected with the output end of the Power IC, the output end of the voltage division module is connected with the control end of the first switch tube, the first end of the first switch tube is respectively connected with the first end of the first resistor and the control end of the second switch tube, the first end of the second switch tube is respectively connected with the first end of the second resistor and the management module, the second end of the first switch tube and the second end of the second switch tube are both connected with the ground, and the second end of the first resistor and the second end of the second resistor are both connected with the Power module;
the voltage division module is used for acquiring the output voltage and outputting a starting voltage according to the output voltage;
the first switch tube is used for conducting when the starting voltage is greater than or equal to the self conducting voltage so as to control the second switch tube to output the high-level signal; and the second switch tube is also used for switching off when the starting voltage is smaller than the conducting voltage so as to control the second switch tube to output the low-level signal.
Preferably, the voltage dividing module includes a third resistor and a fourth resistor, wherein:
the first end of the third resistor is used as the input end of the voltage division module, the second end of the third resistor is connected with the first end of the fourth resistor, the common end of the third resistor is used as the output end of the voltage division module, and the second end of the fourth resistor is connected with the ground.
Preferably, the first switch tube includes a first NMOS tube and a first diode, and the second switch tube includes a second NMOS tube and a second diode, wherein:
the gate of the first NMOS transistor is used as the control end of the first switch transistor, the drain of the first NMOS transistor is connected with the cathode of the first diode, the common end of the first NMOS transistor is used as the first end of the first switch transistor, the source of the first NMOS transistor is connected with the anode of the first diode, and the common end of the first NMOS transistor is used as the second end of the first switch transistor;
the gate of the second NMOS transistor is used as the control end of the second switch transistor, the drain of the second NMOS transistor is connected to the cathode of the second diode, the common end of the second NMOS transistor is used as the first end of the second switch transistor, the source of the second NMOS transistor is connected to the anode of the second diode, and the common end of the second NMOS transistor is used as the second end of the second switch transistor.
Preferably, the management module is an or gate.
Preferably, the power supply monitoring system further includes:
and the alarm module is used for alarming when receiving the low level signal output by the PG pin of the Power IC.
Preferably, the alarm module is further configured to alarm when the PG low level signal is received.
Preferably, the alarm module comprises a buzzer and/or an indicator light.
In order to solve the technical problem, the present invention further provides a storage server system including the power supply monitoring system as described in any one of the above.
The present invention provides a power supply monitoring system, comprising: the monitoring module is used for acquiring the output voltage of the output end of the Power IC and generating an auxiliary signal according to the output voltage, wherein the auxiliary signal is a low level signal or a high level signal; the management module is used for receiving the auxiliary signal and a feedback signal output by a PG pin of the Power IC and judging whether the auxiliary signal and the feedback signal have a high level signal or not, if so, outputting a PG high level signal, and if not, outputting a PG low level signal; and the complex programmable logic device CPLD is used for executing the next stage of enabling operation after receiving the PG high level signal and executing power-off operation after receiving the PG low level signal.
Therefore, in practical application, by adopting the scheme of the invention and arranging the monitoring module and the management module for outputting the auxiliary signal, the redundant design effectively avoids the situation that the current V is used as the reference V on the one handinWhen the UVLO of the Power IC is triggered by fluctuation, the level of the PG pin is instantly pulled down, the CPLD malfunction and the triggering system report errors are caused, and the storage server system can normally operate as long as a high-level signal exists in the auxiliary signal and the feedback signal, so that the reliability of the storage server system is guaranteed; on the other hand, the correctness of circuit design is ensured, the reliability of products is improved, and the competitiveness of the products is increased.
The invention also provides a storage server system which has the same beneficial effects as the power supply monitoring system.
Drawings
In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the drawings needed in the prior art and the embodiments will be briefly described below, and it is obvious that the drawings in the following description are only some embodiments of the present invention, and it is obvious for those skilled in the art to obtain other drawings without creative efforts.
FIG. 1 is a schematic diagram of a power monitoring system according to the present invention;
fig. 2 is a schematic partial structure diagram of a power monitoring system according to the present invention.
Detailed Description
The core of the invention is to provide a power supply monitoring system which effectively avoids the current VinWhen the UVLO of the PowerIC is triggered by fluctuation, the situations of CPLD misoperation and system error reporting triggering are caused, and the reliable operation of the storage server system is guaranteed; another core of the present invention is to provide a storage server system including the above power supply monitoring system.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all, embodiments of the present invention. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of a power monitoring system provided in the present invention, including:
the monitoring module 1 is used for acquiring output voltage of an output end of the Power IC and generating an auxiliary signal according to the output voltage, wherein the auxiliary signal is a low level signal or a high level signal;
specifically, the monitoring module 1 of the present invention is a redundant design, the monitoring module 1 is used for outputting the auxiliary signal of the PG level signal, and the monitoring module 1 obtains the output voltage V of the Power ICoutWhen the output voltage V isoutWhen the voltage is greater than or equal to the preset value, i.e. the output voltage VoutWhen the working voltage of the memory cell is satisfied, the monitoring module 1 outputs a high level signal, and when the output voltage V isoutWhen the voltage is less than the preset value, the monitoring module 1 outputs a low level signal.
The management module 2 is used for receiving the auxiliary signal and a feedback signal output by a PG pin of the Power IC, judging whether a high-level signal exists in the auxiliary signal and the feedback signal, if so, outputting a PG high-level signal, and if not, outputting a PG low-level signal;
specifically, it should be noted in advance that the CPLD determines whether to perform the power-down operation according to the level of the received PG signal (including the low level signal and the high level signal), and when the CPLD receives the PG signal as the low level signal, the CPLD starts to perform the power-down operation. Considering the practical application when the power supply voltage V of the storage server systeminWhen the UVLO of the Power IC is triggered by mistake, the feedback signal output by the PG pin of the Power IC is pulled down instantaneously, that is, the feedback signal output by the PG pin received by the CPLD 3 is a low level signal, the output terminal of the default Power IC of the CPLD 3 has no voltage output, and the Power-down operation is started, but actually, the output voltage Vout may be in a normal output state, that is, greater than or equal to a preset value, then the auxiliary signal output by the monitoring module 1 is a high level signal, it is considered that the management module 2 preprocesses the PG signal before the CPLD 3 receives the PG signal, that is, the feedback signal output by the PG pin is sent to the management module 2, and the auxiliary signal output by the monitoring module 1 is also sent to the management module 2, wherein the feedback signal includes a high level signal and a low level signal, and the auxiliary signal includes a high level signal and a low level signal, if one high level signal or both high point level signals exist in the feedback signal and the auxiliary signal received by the management module 2, the PG high level signal is output, otherwise, the PG low level signal is output, so that UVLO or other misoperation of the Power IC can be prevented from being triggered by mistake, and the reliability of the storage server system is improved
And the complex programmable logic device CPLD 3 is used for executing the next stage of enabling operation after receiving the PG high-level signal and executing power-off operation after receiving the PG low-level signal.
Specifically, the CPLD 3 performs a next power enable operation when receiving the PG high level signal, and performs a power-off operation when receiving the PG low level signal, where the power-off operation includes controlling the storage server system to perform data backup and shutdown.
The present invention provides a power supply monitoring system, comprising: the monitoring module is used for acquiring the output voltage of the output end of the Power IC and generating an auxiliary signal according to the output voltage, wherein the auxiliary signal is a low level signal or a high level signal; the management module is used for receiving the auxiliary signal and a feedback signal output by a PG pin of the Power IC and judging whether the auxiliary signal and the feedback signal have a high level signal or not, if so, outputting a PG high level signal, and if not, outputting a PG low level signal; and the complex programmable logic device CPLD is used for executing the next stage of enabling operation after receiving the PG high level signal and executing power-off operation after receiving the PG low level signal.
Therefore, in practical application, by adopting the scheme of the invention and arranging the monitoring module and the management module for outputting the auxiliary signal, the redundant design effectively avoids the situation that the current V is used as the reference V on the one handinWhen the UVLO of the Power IC is triggered by fluctuation, the level of the PG pin is instantly pulled down, the CPLD malfunction and the triggering system report errors are caused, and the storage server system can normally operate as long as a high-level signal exists in the auxiliary signal and the feedback signal, so that the reliability of the storage server system is guaranteed; on the other hand, the correctness of circuit design is ensured, the reliability of products is improved, and the competitiveness of the products is increased.
On the basis of the above-described embodiment:
as a preferred embodiment, the monitoring module 1 comprises a voltage dividing module 11, a first switch tube 12, a second switch tube 13, a first resistor R1And a second resistor R2Wherein:
the input end of the voltage division module 11 is connected with the output end of the Power IC, and the output end of the voltage division module 11 is connected with the first switchThe control end of the tube 12 is connected, and the first end of the first switch tube 12 is connected with the first resistor R1Is connected with the control end of the second switch tube 13, the first end of the second switch tube 13 is respectively connected with the second resistor R2The first end of the first switch tube 12 and the second end of the second switch tube 13 are connected with the ground, the first resistor R is connected with the management module 21Second terminal and second resistor R2The second ends of the first and second power supply modules are connected with a power supply module;
the voltage division module 11 is used for acquiring output voltage and outputting starting voltage according to the output voltage;
the first switch tube 12 is used for conducting when the starting voltage is greater than or equal to the self conducting voltage so as to control the second switch tube 13 to output a high-level signal; and is also used for switching off when the turn-on voltage is less than the turn-on voltage, so as to control the second switch tube 13 to output a low level signal.
As a preferred embodiment, the voltage dividing module 11 includes a third resistor R3And a fourth resistor R4Wherein:
a first terminal of the third resistor R3 is used as an input terminal of the voltage divider module 11, a second terminal of the third resistor R3 and the fourth resistor R4Has a common terminal as the output terminal of the voltage division module 11, and a fourth resistor R4Is connected to ground.
As a preferred embodiment, the first switch tube 12 includes a first NMOS tube M1And a first diode D1The second switch transistor 13 comprises a second NMOS transistor M2And a second diode D2Wherein:
first NMOS transistor M1The gate of the first NMOS transistor M is used as the control terminal of the first switch transistor 121And the first diode D1A common terminal of the first NMOS transistor M is used as a first terminal of the first switch tube 121Source electrode of and first diode D1The common terminal of the anode connection of (1) is used as the second terminal of the first switch tube 12;
second NMOS transistor M2The gate of the first NMOS transistor M is used as the control terminal of the second switch transistor 132And a second diode D2With the common terminal as the first terminal of the second switch transistor 13, and a second NMOS transistor M2Source electrode of and a second diode D2And the common terminal thereof is the second terminal of the second switching tube 13.
Specifically, the output voltage Vout of the Power IC is divided by the voltage dividing module 11 to obtain an on-voltage, it can be understood that the on-voltage is used to turn on the first switch tube 12, when the on-voltage is greater than the on-voltage of the first switch tube 12 itself, the first switch tube 12 is turned on, the first end of the first switch tube 12 is at a low level, the first end of the second switch tube 13 connected thereto is pulled up by the Power module P3V3_ AUX to output a high level signal, otherwise, when the on-voltage is less than the on-voltage of the first switch tube 12 itself, the first switch tube 12 is turned off, the first end thereof is at a high level, and the first end of the second switch tube 13 connected thereto outputs a low level, specifically, as shown in fig. 2, the third resistor R may be selected to pass through to output the low level3And a fourth resistor R4Partial pressure is carried out. In addition, the invention is provided with a first resistor R1And a second resistor R2The purpose of (1) is to prevent the power supply module from being directly connected to ground.
As a preferred embodiment, the management module 2 is an or gate.
Specifically, the or gate is used as the management module 2, the or gate is convenient for signal calculation, high in precision, low in power consumption and stable, rapidness and accuracy of the management module 2 for receiving the feedback signal and the auxiliary signal are guaranteed, integration design of the or gate is convenient, and cost is low.
As a preferred embodiment, the power supply monitoring system further comprises:
and the alarm module is used for alarming when receiving a low level signal output by a PG pin of the Power IC.
In a preferred embodiment, the alarm module is further configured to alarm when a PG low signal is received.
As a preferred embodiment, the alarm module comprises a buzzer and/or an indicator light.
Specifically, the alarm module alarms when receiving a PG low level signal, and only outputs the PG low level signal when the feedback signal and the auxiliary signal received by the management module 2 are low level signals, so that an alarm is given, a worker can be reminded to pay attention to the state of the storage server system, and whether manual intervention is needed or not is judged, so that the next processing work is performed.
The alarm module may include a buzzer and/or an indicator light, and the specific alarm may be a buzzer or an indicator light flashing.
Accordingly, the present invention also provides a storage server system comprising a power supply monitoring system as in any one of the above.
The storage server system provided by the invention has the same beneficial effects as the power supply monitoring system.
For an introduction of the storage server system provided by the present invention, please refer to the above embodiments, and the present invention is not described herein again.
The embodiments in the present description are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same and similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims (8)

1. A power supply monitoring system, comprising:
the monitoring module is used for acquiring the output voltage of the output end of the PowerIC and generating an auxiliary signal according to the output voltage, wherein the auxiliary signal is a low level signal or a high level signal;
the management module is used for receiving the auxiliary signal and a feedback signal output by a PG pin of the PowerIC and judging whether the auxiliary signal and the feedback signal have the high level signal or not, if so, outputting a PG high level signal, and if not, outputting a PG low level signal;
the complex programmable logic device CPLD is used for executing next-stage enabling operation after receiving the PG high-level signal and executing power-off operation after receiving the PG low-level signal;
the monitoring module comprises a voltage division module, a first switch tube, a second switch tube, a first resistor and a second resistor, wherein:
the input end of the voltage division module is connected with the output end of the PowerIC, the output end of the voltage division module is connected with the control end of the first switch tube, the first end of the first switch tube is respectively connected with the first end of the first resistor and the control end of the second switch tube, the first end of the second switch tube is respectively connected with the first end of the second resistor and the management module, the second end of the first switch tube and the second end of the second switch tube are both connected with the ground, and the second end of the first resistor and the second end of the second resistor are both connected with the power module;
the voltage division module is used for acquiring the output voltage and outputting a starting voltage according to the output voltage;
the first switch tube is used for conducting when the starting voltage is greater than or equal to the self conducting voltage so as to control the second switch tube to output the high-level signal; and the second switch tube is also used for switching off when the starting voltage is smaller than the conducting voltage so as to control the second switch tube to output the low-level signal.
2. The power monitoring system of claim 1, wherein the voltage divider module comprises a third resistor and a fourth resistor, wherein:
the first end of the third resistor is used as the input end of the voltage division module, the second end of the third resistor is connected with the first end of the fourth resistor, the common end of the third resistor is used as the output end of the voltage division module, and the second end of the fourth resistor is connected with the ground.
3. The power monitoring system of claim 2, wherein the first switch tube comprises a first NMOS tube and a first diode, and the second switch tube comprises a second NMOS tube and a second diode, wherein:
the gate of the first NMOS transistor is used as the control end of the first switch transistor, the drain of the first NMOS transistor is connected with the cathode of the first diode, the common end of the first NMOS transistor is used as the first end of the first switch transistor, the source of the first NMOS transistor is connected with the anode of the first diode, and the common end of the first NMOS transistor is used as the second end of the first switch transistor;
the gate of the second NMOS transistor is used as the control end of the second switch transistor, the drain of the second NMOS transistor is connected to the cathode of the second diode, the common end of the second NMOS transistor is used as the first end of the second switch transistor, the source of the second NMOS transistor is connected to the anode of the second diode, and the common end of the second NMOS transistor is used as the second end of the second switch transistor.
4. The power monitoring system of any one of claims 1-3, wherein the management module is an OR gate.
5. The power monitoring system of claim 4, further comprising:
and the alarm module is used for alarming when receiving the low level signal output by the PG pin of the PowerIC.
6. The power monitoring system of claim 5,
and the alarm module is also used for alarming when the PG low level signal is received.
7. The power monitoring system of claim 6, wherein the alarm module comprises a buzzer and/or an indicator light.
8. A storage server system comprising a power monitoring system according to any one of claims 1 to 7.
CN201810799625.7A 2018-07-18 2018-07-18 Power supply monitoring system and storage server system Active CN109032318B (en)

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CN109933377A (en) * 2019-03-22 2019-06-25 浪潮商用机器有限公司 A kind of method for managing power supply and relevant apparatus of CPLD
CN109917307B (en) * 2019-04-15 2021-02-02 苏州浪潮智能科技有限公司 Method and device for avoiding signal abnormal oscillation in UVLO test
CN110687957B (en) * 2019-09-12 2021-07-02 苏州浪潮智能科技有限公司 Control circuit
CN113835510A (en) * 2021-09-27 2021-12-24 新华三信息安全技术有限公司 Power supply control method and system

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