CN216145175U - Self-power-off restarting circuit - Google Patents

Abstract

The utility model provides a self-power-off restarting circuit, which relates to the technical field of restarting circuits and is characterized in that: the device comprises a signal amplification circuit, a counter U1 and a core programming device power supply circuit; the counter U1 includes a signal input port VI1, a signal input port VI2, and an output port VOUT; the signal amplification circuit is connected with the core programming device and used for receiving and amplifying the square wave signal output by the core programming device; the signal amplifying circuit is also connected with the signal input port VI1 and the signal input port VI2 and is used for transmitting the amplified square wave signal to the counter U1; the output port VOUT is connected with the power supply circuit of the core programming device and is used for outputting a level signal to the power supply circuit of the core programming device; the core programming device power supply circuit is connected with the core programming device and used for providing a working power supply for the core programming device, so that the core programming device can automatically recover to a normal working state when the core programming device is abnormal.

Description

Self-power-off restarting circuit

Technical Field

The utility model relates to the technical field of restart circuits, in particular to a self-power-off restart circuit.

Background

The programming device is a core device in a circuit, such as a single chip microcomputer, and plays a key role in the circuit, so the programming device is widely applied to various circuits, and due to the core function of the programming device, when the core programming device works abnormally, the influence on the circuit is often great, and the whole circuit, device or equipment stops working in many cases, so that a circuit capable of automatically recovering the core programming device to a normal state when the core programming device works abnormally is urgently needed, so as to reduce the influence caused by the abnormality of the core programming device.

SUMMERY OF THE UTILITY MODEL

In order to overcome the defects of the prior art, the utility model provides a self-power-off restart circuit.

The technical scheme adopted by the utility model for solving the technical problems is as follows: in a self-powered down restart circuit, the improvement comprising: the device comprises a signal amplification circuit, a counter U1 and a core programming device power supply circuit; the counter U1 includes a signal input port VI1, a signal input port VI2, and an output port VOUT; the signal amplification circuit is connected with the core programming device and used for receiving and amplifying the square wave signal output by the core programming device; the signal amplifying circuit is also connected with the signal input port VI1 and the signal input port VI2 and is used for transmitting the amplified square wave signal to the counter U1; the output port VOUT is connected with the power supply circuit of the core programming device and is used for outputting a level signal to the power supply circuit of the core programming device; the core programming device power supply circuit is connected with the core programming device and used for providing working power supply for the core programming device.

In the above circuit, the counter U1 further includes a power port VCC, and the power port VCC is connected to the first power supply and is used for providing an operating voltage to the counter U1, so that the counter U1 is always in an operating state.

In the circuit, the signal amplifying circuit comprises a transistor Q1 and a capacitor C3,

the base electrode of the triode Q1 is connected with the core programming device, the collector electrode of the triode Q1 is connected with the signal input port VI1, a first connecting point is arranged between the collector electrode of the triode Q1 and the signal input port VI1, the first connecting point is connected with the signal input port VI2, and the emitter electrode of the triode Q1 is grounded;

one end of the capacitor C3 is connected to the first connection point, and the other end is grounded.

In the circuit, the core programming device power supply circuit comprises a triode Q2 and a P-MOS transistor Q3;

the base electrode of the triode Q2 is connected with the output port VOUT, the emitter electrode of the triode Q2 is connected with the first power supply, the collector electrode of the triode Q2 is connected with the grid electrode of the P-MOS tube Q3, the source electrode of the P-MOS tube Q3 is connected with the first power supply, and the drain electrode of the P-MOS tube Q3 is connected with the core programming device.

In the above circuit, the signal amplifying circuit further comprises a resistor R3, a capacitor C2, a resistor R4 and a diode D11,

the resistor R3 and the capacitor C2 are arranged between the core programming device and the base electrode of the triode Q1, one end of the resistor R3 is connected with the core programming device, the other end of the resistor R3 is connected with the capacitor C2, the other end of the capacitor C2 is connected with the base electrode of the triode Q1, a second connection point is arranged between the capacitor C2 and the base electrode of the triode Q1, the second connection point is connected with the resistor R4, and the other end of the resistor R4 is grounded; the second connection point is also connected to the cathode of diode D11, and the anode of diode D11 is connected to ground.

The utility model has the beneficial effects that: when the core programming device is abnormal, the core programming device is automatically powered off and restarted, so that the core programming device is automatically recovered to a normal working state, the influence caused by the abnormality of the core programming device is reduced, the circuit uses few electronic devices, is quick in response, can be quickly recovered to a normal state, and is simple in structure and low in cost.

Drawings

Fig. 1 is a circuit diagram of a self-power-off restart circuit according to the present invention.

Detailed Description

The utility model is further illustrated with reference to the following figures and examples.

The conception, the specific structure, and the technical effects produced by the present invention will be clearly and completely described below in conjunction with the embodiments and the accompanying drawings to fully understand the objects, the features, and the effects of the present invention. It is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and those skilled in the art can obtain other embodiments without inventive effort based on the embodiments of the present invention, and all embodiments are within the protection scope of the present invention. In addition, all the connection/connection relations referred to in the patent do not mean that the components are directly connected, but mean that a better connection structure can be formed by adding or reducing connection auxiliary components according to specific implementation conditions. All technical characteristics in the utility model can be interactively combined on the premise of not conflicting with each other.

Referring to fig. 1, the present invention discloses a self-power-off restart circuit, which includes a signal amplifying circuit 10, a counter U1 and a core programming device power circuit 20; the counter U1 includes a signal input port VI1, a signal input port VI2, a power port VCC connected to the first power source VIN, and an output port VOUT for providing a working voltage to the counter U1, so that the counter U1 is always in a working state.

The signal amplification circuit 10 comprises a triode Q1, a capacitor C3, a resistor R3, a capacitor C2, a resistor R4 and a diode D11, wherein one end of the resistor R3 is connected with a core programming device and receives a normal square wave signal WDI periodically and continuously output by the core programming device, the core programming device can be a single chip microcomputer and the like, the other end of the resistor R3 is connected with the capacitor C2, the other end of the capacitor C2 is connected with a base electrode of the triode Q1, a collector electrode of the triode Q1 is connected with the signal input port VI1, a first connecting point 30 is arranged between the collector electrode of the triode Q1 and the signal input port VI1, the first connecting point 30 is connected with the signal input port VI2, and an emitter electrode of the triode Q1 is grounded; one end of the capacitor C3 is connected with the first connection point 30, and the other end is grounded, so that a received square wave signal WDI is amplified by the triode Q1 and the capacitor C3 and then transmitted to the counter U1 through the signal input port VI1 and the signal input port VI2, a second connection point 40 is arranged between the capacitor C2 and the base electrode of the triode Q1, the second connection point 40 is connected with the resistor R4, and the other end of the resistor R4 is grounded; the second connection point is also connected to the cathode of diode D11, and the anode of diode D11 is connected to ground.

The core programming device power circuit 20 comprises a triode Q2 and a P-MOS tube Q3; the base electrode of the triode Q2 is connected with the output port VOUT and receives the level signal output by the counter U1, the emitter electrode of the triode Q2 is connected with the first power supply VIN, the collector electrode of the triode Q2 is connected with the grid electrode of the P-MOS transistor Q3, the source electrode of the P-MOS transistor Q3 is connected with the first power supply VIN, and the drain electrode of the P-MOS transistor Q3 is connected with the core programming device.

The transistor Q1 is an NPN type transistor with the model number of S9014, the transistor Q2 is a PNP type transistor with the model number of S9015, the P-MOS transistor Q3 is AO3407, and a signal of the counter U1 is ICM 7555. When the core programming device works normally, the normal square wave signal WDI is periodically and continuously output; after the signals are received by the resistor R3 and amplified by the triode Q1 and the capacitor C3, the signals are transmitted to the counter U1 through the signal input port VI1 and the signal input port VI2, the output end VOUT of the counter U1 continuously outputs high level, the base electrode of the triode Q2 receives the high level, the triode Q2 is cut off, so that the P-MOS transistor Q3 is controlled to be switched on, a first power supply VIN connected with the source electrode of the P-MOS transistor Q3 provides a working power supply for a core programming device, and the core programming device can continuously and normally work; when the core programming device works abnormally, the normal square wave signal WDI can not be continuously and periodically provided, the level output by the output terminal VOUT of the counter U1 changes from high level to low level, the transistor Q2 is turned on, the P-MOS transistor Q3 is controlled to be turned off, the first power source VIN is disconnected from the core programming device, the core programming device is turned off and stops working, since the counter U1 is always connected to the first power source VIN, and is always in a normal operating state, when the counter U1 enters the next period, the voltage output by the output end VOUT is changed from low level to high level, the P-MOS tube Q3 is conducted again, the core programming device is powered back, the core programming device works normally and continuously outputs WDI signals, when the core programming device is abnormal, the core programming device can be automatically restored to a normal working state through automatic power-off and restarting of the core programming device.

The self-power-off restarting circuit automatically powers off and restarts the core programming device when the core programming device is abnormal, so that the core programming device automatically restores to a normal working state to reduce the influence caused by the abnormality of the core programming device.

While the preferred embodiments of the present invention have been illustrated and described, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the utility model as defined by the appended claims.

Claims (5)

1. A self-powered-off restart circuit, characterized in that: the device comprises a signal amplification circuit, a counter U1 and a core programming device power supply circuit; the counter U1 includes a signal input port VI1, a signal input port VI2, and an output port VOUT;

the signal amplification circuit is connected with the core programming device and used for receiving and amplifying the square wave signal output by the core programming device; the signal amplifying circuit is also connected with the signal input port VI1 and the signal input port VI2 and is used for transmitting the amplified square wave signal to the counter U1;

the output port VOUT is connected with the power supply circuit of the core programming device and is used for outputting a level signal to the power supply circuit of the core programming device;

the core programming device power supply circuit is connected with the core programming device and used for providing working power supply for the core programming device.

2. A self-power-down restart circuit as claimed in claim 1, wherein: the counter U1 still include power supply port VCC, power supply port VCC is connected with first power for provide operating voltage for counter U1, make counter U1 be in operating condition all the time.

3. A self-power-down restart circuit as claimed in claim 1, wherein: the signal amplifying circuit comprises a transistor Q1 and a capacitor C3,

the base electrode of the triode Q1 is connected with the core programming device, the collector electrode of the triode Q1 is connected with the signal input port VI1, a first connecting point is arranged between the collector electrode of the triode Q1 and the signal input port VI1, the first connecting point is connected with the signal input port VI2, and the emitter electrode of the triode Q1 is grounded;

one end of the capacitor C3 is connected to the first connection point, and the other end is grounded.

4. A self-power-down restart circuit as claimed in claim 2, wherein: the core programming device power supply circuit comprises a triode Q2 and a P-MOS transistor Q3;

the base electrode of the triode Q2 is connected with the output port VOUT, the emitter electrode of the triode Q2 is connected with the first power supply, the collector electrode of the triode Q2 is connected with the grid electrode of the P-MOS tube Q3, the source electrode of the P-MOS tube Q3 is connected with the first power supply, and the drain electrode of the P-MOS tube Q3 is connected with the core programming device.

5. A self-power-down restart circuit as claimed in claim 3, wherein: the signal amplifying circuit also comprises a resistor R3, a capacitor C2, a resistor R4 and a diode D11,

the resistor R3 and the capacitor C2 are arranged between the core programming device and the base electrode of the triode Q1, one end of the resistor R3 is connected with the core programming device, the other end of the resistor R3 is connected with the capacitor C2, the other end of the capacitor C2 is connected with the base electrode of the triode Q1, a second connection point is arranged between the capacitor C2 and the base electrode of the triode Q1, the second connection point is connected with the resistor R4, and the other end of the resistor R4 is grounded; the second connection point is also connected to the cathode of diode D11, and the anode of diode D11 is connected to ground.

Images