CN106708234A - Method and device for monitoring states of power supplies of system on basis of CPLD - Google Patents
Method and device for monitoring states of power supplies of system on basis of CPLD Download PDFInfo
- Publication number
- CN106708234A CN106708234A CN201611230664.2A CN201611230664A CN106708234A CN 106708234 A CN106708234 A CN 106708234A CN 201611230664 A CN201611230664 A CN 201611230664A CN 106708234 A CN106708234 A CN 106708234A
- Authority
- CN
- China
- Prior art keywords
- cpld
- power
- register
- power state
- power supply
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F1/00—Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
- G06F1/26—Power supply means, e.g. regulation thereof
- G06F1/28—Supervision thereof, e.g. detecting power-supply failure by out of limits supervision
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Power Sources (AREA)
- Debugging And Monitoring (AREA)
Abstract
The invention relates to the technical field of monitoring of power supplies, in particular to a method and device for monitoring the states of power supplies of a system on the basis of CPLD. The method for monitoring the states of the power supplies of the system on the basis of CPLD comprises the following steps: writing a plurality of power supply state signals into corresponding registers of the CPLD; reading values of the registers of the CPLD by using an upper computer; judging the states of the power supplies according to the values of the registers of the CPLD; and positioning the failed power supply. The invention further discloses the device for monitoring the states of the power supplies of the system on the basis of the CPLD. The device comprises a monitoring module, a data reading module, a judging module and a fault processing module. By the CPLD, the states of the power supplies in the system are monitored, failure problems of the corresponding power supplies can be found out in time, data backup processing can be carried out in time, data are prevented from being lost, supervision of the states of the power supplies of the system is enhanced, and running stability of the system is guaranteed effectively.
Description
Technical field
The present invention relates to Power Supply Monitoring technical field, more particularly to a kind of system power state monitoring method based on CPLD
And device.
Background technology
Cloud service, the use of big data are more and more extensive, and obtain the development of high speed, it is necessary to the data scale of storage is got over
Come bigger, more and more important.Correspondingly, the stability of storage device, the scale of data volume are also increasing.Power supply is whole system
The source of system power, the stability of power supply determines the stability of whole system, wants system stabilization and must assure that the steady of power supply
It is qualitative.Therefore, need badly a kind of can go out in system the technology of multiple power module running statuses by effective Feedback in real time.
The content of the invention
For above technical problem, it is an object of the invention to provide a kind of system power state monitoring method based on CPLD
And device, the supervision of power supply status is strengthened, the stability of system operation has been effectively ensured.
The noun occurred in the present invention is explained below：
CPLD：English full name Complex Programmable Logic Device, abbreviation CPLD, be
From one-time programming device（PAL）With repeatable programming device（GAL）The device that developed, comparatively scale is big, and structure is multiple
It is miscellaneous, belong to large scale integrated circuit scope, it is a kind of user according to each needing and the voluntarily digital integration of constitutive logic function
Circuit.
IC bus：English full name Inter-Integrated Circuit, abbreviation iic bus are a kind of multidirectional
Controlling bus, that is to say, that multiple chips may be coupled under same bus structure, while each chip can serve as in real time
The voltage input of data transfer, simplifies signal transmission bus interface.
Register：Circuit for depositing binary code, is mainly divided to two kinds of parallel register and shift register.
Global clock：English full name Global Clock, in a synchronizing sequential circuit, all of trigger is all by one
Individual common external clock line traffic control, this clock lines are commonly referred to global clock.Clock when each global clock has one
Molding block（Clock Control Block）.
Power Good signals：Abbreviation P.G. or P.OK signal, the signal is VD detection signal and exchange
The logic of input voltage measurement signal is compatible with TTL signal.After power on, if AC-input voltage is in specified work
Within the scope of work, and each road VD has also reached their lowest detection level（+ 5V is output as more than 4.75V）,
So by the time delay of 100ms~500ms, P.G. circuits send the signal of " power supply is normal "（P.OK is high level）.Work as power supply
When input ac voltage is down to below range of safety operation or+5 voltages are less than 4.75V, power supply sends out " power failure signal "
（Power Fall, low level）.
Host computer：Refer to the computer that can directly send manipulation order, usually PC/host computer/master
Computer/upper computer, show various signal intensities on screen.
Bit：That is Bit, be the minimum storage cell of computer, the value of bit is represented with 0 or 1, ratio the more
Special digit can show more complicated image information.
To reach above-mentioned purpose, the present invention is achieved through the following technical solutions：
The present invention provides a kind of system power state monitoring method based on CPLD, including：
Multiple power state signals are written in the register of corresponding CPLD；
Host computer reads the value of the register of CPLD；
The value of the register according to CPLD, judges power supply status；
Orient trouble power.
Preferably, before multiple power state signals are written in the register of corresponding CPLD, also include：To multiple
Power state signal synchronizes, disappears and tremble treatment, and for upper electric, the lower electric global clock control of system.
Preferably, before trouble power is oriented, also include：Close the circuit of peripheral components.
Preferably, it is described that multiple power state signals are written in the register of corresponding CPLD, including：
IIC Slave programs are write in the corresponding registers of CPLD；
The global clock control of Bit of multiple power state signals and CPLD is written in the register of IIC together.
Preferably, the value of the above-mentioned register according to CPLD, judges power supply status, including：If the value of the register of CPLD
It is low level, then judges that corresponding power is trouble power；If high level, then power supply is normal power source.
Preferably, above-mentioned power state signal is the Power Good signals of power supply.
Present invention also offers a kind of system power state supervising device based on CPLD, including：
Monitoring module, for multiple power state signals to be written in the corresponding registers of CPLD；
Data read module, the value of the register of CPLD is read for host computer；
Judge module, for the value of the register according to CPLD, judges power supply status, if the low electricity of the value of the register of CPLD
It is flat, then judge that corresponding power is trouble power；If high level, then power supply is normal power source；
Fault processing module, the circuit for closing peripheral components, orients trouble power.
Preferably, also include：Filtration module, trembles treatment, and be used for for being synchronized to multiple power state signals, being disappeared
Upper electric, the lower electric global clock control of system.
Compared with prior art, beneficial effects of the present invention are as follows：
1. the present invention is the system power state monitoring method based on CPLD, because the power supply of CPLD is to deposit always in whole system
, it is ensured that the value of the register of CPLD will not lose；
2. the present invention is synchronized by the Power Good signals to multiple power supplys, disappears and tremble treatment, prevents asynchronous signal
With the dither signal of impurity, prevent metastable state and cause the unstable of CPLD states, and by Power Good signals for being
Upper electric, the lower electric global clock control of system, it is ensured that the normal upper electricity of whole system；Write in the corresponding registers of CPLD again
IIC Slave programs, posting for IIC is written to by the global clock control of Bit of multiple power state signals and CPLD together
In storage, the value that host computer reads the register of CPLD is facilitated；
3. the present invention is judging trouble power by multiple power state signals storage relation corresponding with the register of CPLD
Afterwards, trouble power is conveniently oriented, so that related personnel is safeguarded in time；
4. monitoring of the present invention by CPLD to multiple power supply status in system, can in time find the failure problems of corresponding power,
Data backup treatment can be in time made, the loss of data is prevented, the supervision of system multiple power supply status is strengthened, is effectively ensured
The stability of system operation.
Brief description of the drawings
Fig. 1 is a kind of one of schematic flow sheet of system power state monitoring method based on CPLD of the present invention.
Fig. 2 is the two of a kind of schematic flow sheet of the system power state monitoring method based on CPLD of the present invention.
Fig. 3 is a kind of one of structural representation of system power state supervising device based on CPLD of the present invention.
Fig. 4 is the two of a kind of structural representation of the system power state supervising device based on CPLD of the present invention.
Specific embodiment
To make the purpose, technical scheme and advantage of the embodiment of the present invention clearer, below in conjunction with the embodiment of the present invention
In accompanying drawing, the technical scheme in the embodiment of the present invention is clearly and completely described, it is clear that described embodiment is
A part of embodiment of the present invention, rather than whole embodiments.Based on the embodiment in the present invention, those of ordinary skill in the art
The every other embodiment obtained under the premise of creative work is not made, belongs to the scope of protection of the invention.
With reference to the accompanying drawings and detailed description to a kind of system power state monitoring method based on CPLD of the present invention
And device is further described：
Embodiment 1
As shown in figure 1, a kind of system power state monitoring method based on CPLD, comprises the following steps：
Step S101, the Power Good signals of multiple power supplys are written in the corresponding registers of CPLD；
Step S102, host computer reads the value of the register of CPLD by iic bus；
Step S103, the value of the register according to CPLD, judges power supply status, if the value low level of the register of CPLD, then
Judge that corresponding power is trouble power, carry out step S104；If high level, then power supply is normal power source, return to step S101
Continue to monitor；
Step S104, according to the register for showing low level CPLD, finds the Power Good signals of corresponding power, you can fixed
Be out of order power supply for position, sends maintenance notice；
Step S105, staff repairs to trouble power.
The Power Good signals of multiple power supplys are written in the corresponding registers of CPLD in above-mentioned steps S101, are wrapped
Include：IIC Slave programs are write in the corresponding registers of CPLD；It is complete with CPLD by Bit of multiple power state signals
Office clock control is written in the register of IIC together.
As a kind of embodiment, by the multiple power modules in system, such as 3.3V, the power supply chip of 5V, 12V
Power Good signals are written in CPLD, and IIC Slave programs are write according to IIC agreements in the corresponding registers of CPLD,
Host computer is facilitated to read the value of the register, by the global clock control of Bit of multiple power state signals and CPLD together
It is written in the register of IIC；Host computer reads the value of the register of CPLD by iic bus；Register according to CPLD
Value, judges power supply status, if the value low level of the register of CPLD, then judges that corresponding power is trouble power, according to display
The register of low level CPLD, finds the Power Good signals of corresponding power, you can orient trouble power, send maintenance
Notify, staff repairs to trouble power；If high level, then power supply is normal power source.
Embodiment 2
As shown in Fig. 2 a kind of system power state monitoring method based on CPLD, comprises the following steps：
Multiple power state signals are synchronized, disappear and tremble treatment by step S201 using the Global Clock orders of CPLD, and
For upper electric, the lower electric global clock control of system；
Step S202, the Power Good signals of multiple power supplys are written in the corresponding registers of CPLD；
Step S203, host computer reads the value of the register of CPLD by iic bus；
Step S204, the value of the register according to CPLD, judges power supply status, if the value low level of the register of CPLD, then
Judge that corresponding power is trouble power, carry out step S205；If high level, then power supply is normal power source, return to step S201
Continue to monitor；
Step S205, closes the circuit of peripheral components；
Step S206, according to the register for showing low level CPLD, finds the Power Good signals of corresponding power, you can fixed
Be out of order power supply for position, sends maintenance notice；
Step S207, staff repairs to trouble power.
The Power Good signals of multiple power supplys are written in the corresponding registers of CPLD in above-mentioned steps S202, are wrapped
Include：IIC Slave programs are write in the corresponding registers of CPLD；It is complete with CPLD by Bit of multiple power state signals
Office clock control is written in the register of IIC together.
As a kind of embodiment, by the multiple power modules in system, such as 3.3V, the power supply chip of 5V, 12V
Power Good signals by being connected in CPLD, using the Global Clock orders of CPLD to the Power of multiple power supplys
Good signals synchronize, disappear and tremble treatment, and for upper electric, the lower electric global clock control of system, have both prevented asynchronous letter
Number and impurity dither signal, prevent metastable state and cause the unstable of CPLD states, in turn ensure that the normal of whole system
Upper electricity；IIC Slave programs are write according to IIC agreements in the corresponding registers of CPLD, facilitates host computer to read the register
Value, the global clock control of Bit of multiple power state signals and CPLD is written in the register of IIC together；On
Position machine reads the value of the register of CPLD by iic bus；The value of the register according to CPLD, judges power supply status, CPLD's
If the value low level of register, then judge that corresponding power is trouble power, close the circuit of peripheral components, according to the low electricity of display
The register of flat CPLD, finds the Power Good signals of corresponding power, you can orient trouble power, sends maintenance logical
Know, staff repairs to trouble power；If high level, then power supply is normal power source.
Embodiment 3
As shown in figure 3, a kind of system power state supervising device based on CPLD, including：
Monitoring module 301, for multiple power state signals to be written in the corresponding registers of CPLD；
Data read module 302, the value of the register of CPLD is read for host computer；
Judge module 303, for the value of the register according to CPLD, judges power supply status, if the value of the register of CPLD is low
Level, then judge that corresponding power is trouble power；If high level, then power supply is normal power source；
Fault processing module 304, the circuit for closing peripheral components, orients trouble power.
Wherein monitoring module 301 successively order and data read module 302, judge module 303 and fault processing module 304
It is connected.
Embodiment 4
As shown in figure 4, a kind of system power state supervising device based on CPLD, including：
Filtration module 305, treatment is trembled for being synchronized to multiple power state signals, being disappeared, and for upper electric, the lower electricity of system
Global clock is controlled；
Monitoring module 301, for multiple power state signals to be written in the corresponding registers of CPLD；
Data read module 302, the value of the register of CPLD is read for host computer；
Judge module 303, for the value of the register according to CPLD, judges power supply status, if the value of the register of CPLD is low
Level, then judge that corresponding power is trouble power；If high level, then power supply is normal power source；
Fault processing module 304, the circuit for closing peripheral components, orients trouble power.
Wherein order and filtration module 305, data read module 302, judge module 303 and the event successively of monitoring module 301
Barrier processing module 304 is connected.
Schematical specific embodiment of the invention is the foregoing is only, the scope of the present invention is not limited to, it is any
The equivalent variations that those skilled in the art is made on the premise of present inventive concept and principle is not departed from and modification, all should belong to
In the scope of protection of the invention.
Claims (8)
1. a kind of system power state monitoring method based on CPLD, it is characterised in that including：
Multiple power state signals are written in the corresponding registers of CPLD；
Host computer reads the value of the register of CPLD；
The value of the register according to CPLD, judges power supply status；
Orient trouble power.
2. the system power state monitoring method based on CPLD according to claim 1, it is characterised in that will multiple electricity
Before source status signal is written in the corresponding registers of CPLD, also include：Multiple power state signals are synchronized, is disappeared and is trembled
Treatment, and for upper electric, the lower electric global clock control of system.
3. the system power state monitoring method based on CPLD according to claim 1, it is characterised in that orienting therefore
Before barrier power supply, also include：Close the circuit of peripheral components.
4. the system power state monitoring method based on CPLD according to claim 1, it is characterised in that described by multiple
Power state signal is written in the corresponding registers of CPLD, including：
IIC Slave programs are write in the corresponding registers of CPLD；
The global clock control of Bit of multiple power state signals and CPLD is written in the register of IIC together.
5. the system power state monitoring method based on CPLD according to claim 1, it is characterised in that the basis
The value of the register of CPLD, judges power supply status, including：If the value low level of the register of CPLD, then judge corresponding power
It is trouble power；If high level, then power supply is normal power source.
6. the system power state monitoring method based on CPLD according to claim 1, it is characterised in that the power supply shape
State signal is the Power Good signals of power supply.
7. a kind of system power state supervising device based on CPLD, it is characterised in that including：
Monitoring module, for multiple power state signals to be written in the corresponding registers of CPLD；
Data read module, the value of the register of CPLD is read for host computer；
Judge module, for the value of the register according to CPLD, judges power supply status, if the low electricity of the value of the register of CPLD
It is flat, then judge that corresponding power is trouble power；If high level, then power supply is normal power source；
Fault processing module, the circuit for closing peripheral components, orients trouble power.
8. the system power state supervising device based on CPLD according to claim 7, it is characterised in that also include：Filter
Ripple module, treatment is trembled for being synchronized to multiple power state signals, being disappeared, and for upper electric, the lower electric global clock of system
Control.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611230664.2A CN106708234A (en) | 2016-12-28 | 2016-12-28 | Method and device for monitoring states of power supplies of system on basis of CPLD |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201611230664.2A CN106708234A (en) | 2016-12-28 | 2016-12-28 | Method and device for monitoring states of power supplies of system on basis of CPLD |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN106708234A true CN106708234A (en) | 2017-05-24 |
Family
ID=58895528
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201611230664.2A Pending CN106708234A (en) | 2016-12-28 | 2016-12-28 | Method and device for monitoring states of power supplies of system on basis of CPLD |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN106708234A (en) |
Cited By (12)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107526664A (en) * | 2017-09-06 | 2017-12-29 | 郑州云海信息技术有限公司 | A kind of server exception power down method for rapidly positioning and device |
| CN108107371A (en) * | 2017-12-08 | 2018-06-01 | 郑州云海信息技术有限公司 | A kind of storage system BBU condition monitoring systems and method |
| CN109032318A (en) * | 2018-07-18 | 2018-12-18 | 郑州云海信息技术有限公司 | A kind of power monitoring system and storage server system |
| CN109101402A (en) * | 2018-08-23 | 2018-12-28 | 郑州云海信息技术有限公司 | The monitoring device and server of VR chip on a kind of server master board |
| CN109144827A (en) * | 2018-08-22 | 2019-01-04 | 郑州云海信息技术有限公司 | A kind of method and system monitoring motherboard power supply and signal condition |
| CN109581224A (en) * | 2018-12-14 | 2019-04-05 | 郑州云海信息技术有限公司 | A kind of monitoring system and smart machine of device power state |
| CN110377135A (en) * | 2019-07-26 | 2019-10-25 | 苏州浪潮智能科技有限公司 | A kind of management method of PSU, system and device |
| CN110445638A (en) * | 2019-07-05 | 2019-11-12 | 苏州浪潮智能科技有限公司 | A kind of switch system fault protecting method and device |
| CN110597376A (en) * | 2019-09-12 | 2019-12-20 | 苏州浪潮智能科技有限公司 | Sequencing circuit and sequencing system |
| CN110687957A (en) * | 2019-09-12 | 2020-01-14 | 苏州浪潮智能科技有限公司 | Control circuit |
| CN110719236A (en) * | 2018-07-12 | 2020-01-21 | 中兴通讯股份有限公司 | Single board, back board type exchanger and method for connecting power supply |
| CN113127247A (en) * | 2021-04-01 | 2021-07-16 | 山东英信计算机技术有限公司 | Data acquisition method, system, device and medium |
Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101056180A (en) * | 2007-05-25 | 2007-10-17 | 杭州华三通信技术有限公司 | Power management method, system, main control board and intelligent interface board |
| CN101562827A (en) * | 2009-05-22 | 2009-10-21 | 中兴通讯股份有限公司 | Fault information acquisition method and system |
| CN102291263A (en) * | 2011-09-02 | 2011-12-21 | 中兴通讯股份有限公司 | State indicating device and equipment, equipment state indicating system and information transmission method |
| US20120290854A1 (en) * | 2011-05-09 | 2012-11-15 | Hon Hai Precision Industry Co., Ltd. | Circuit protection system and method |
| CN104360289A (en) * | 2014-11-03 | 2015-02-18 | 中国船舶重工集团公司第七0九研究所 | Modular power fault recording circuit and device |
-
2016
- 2016-12-28 CN CN201611230664.2A patent/CN106708234A/en active Pending
Patent Citations (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN101056180A (en) * | 2007-05-25 | 2007-10-17 | 杭州华三通信技术有限公司 | Power management method, system, main control board and intelligent interface board |
| CN101562827A (en) * | 2009-05-22 | 2009-10-21 | 中兴通讯股份有限公司 | Fault information acquisition method and system |
| US20120290854A1 (en) * | 2011-05-09 | 2012-11-15 | Hon Hai Precision Industry Co., Ltd. | Circuit protection system and method |
| CN102291263A (en) * | 2011-09-02 | 2011-12-21 | 中兴通讯股份有限公司 | State indicating device and equipment, equipment state indicating system and information transmission method |
| CN104360289A (en) * | 2014-11-03 | 2015-02-18 | 中国船舶重工集团公司第七0九研究所 | Modular power fault recording circuit and device |
Cited By (16)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN107526664A (en) * | 2017-09-06 | 2017-12-29 | 郑州云海信息技术有限公司 | A kind of server exception power down method for rapidly positioning and device |
| CN107526664B (en) * | 2017-09-06 | 2020-07-24 | 苏州浪潮智能科技有限公司 | Method and device for quickly positioning abnormal power failure of server |
| CN108107371A (en) * | 2017-12-08 | 2018-06-01 | 郑州云海信息技术有限公司 | A kind of storage system BBU condition monitoring systems and method |
| CN110719236A (en) * | 2018-07-12 | 2020-01-21 | 中兴通讯股份有限公司 | Single board, back board type exchanger and method for connecting power supply |
| CN109032318B (en) * | 2018-07-18 | 2021-08-10 | 郑州云海信息技术有限公司 | Power supply monitoring system and storage server system |
| CN109032318A (en) * | 2018-07-18 | 2018-12-18 | 郑州云海信息技术有限公司 | A kind of power monitoring system and storage server system |
| CN109144827A (en) * | 2018-08-22 | 2019-01-04 | 郑州云海信息技术有限公司 | A kind of method and system monitoring motherboard power supply and signal condition |
| CN109101402A (en) * | 2018-08-23 | 2018-12-28 | 郑州云海信息技术有限公司 | The monitoring device and server of VR chip on a kind of server master board |
| CN109581224A (en) * | 2018-12-14 | 2019-04-05 | 郑州云海信息技术有限公司 | A kind of monitoring system and smart machine of device power state |
| CN110445638A (en) * | 2019-07-05 | 2019-11-12 | 苏州浪潮智能科技有限公司 | A kind of switch system fault protecting method and device |
| CN110445638B (en) * | 2019-07-05 | 2022-12-27 | 苏州浪潮智能科技有限公司 | Switch system fault protection method and device |
| CN110377135A (en) * | 2019-07-26 | 2019-10-25 | 苏州浪潮智能科技有限公司 | A kind of management method of PSU, system and device |
| CN110597376A (en) * | 2019-09-12 | 2019-12-20 | 苏州浪潮智能科技有限公司 | Sequencing circuit and sequencing system |
| CN110597376B (en) * | 2019-09-12 | 2021-05-25 | 苏州浪潮智能科技有限公司 | Sequencing circuit and sequencing system |
| CN110687957A (en) * | 2019-09-12 | 2020-01-14 | 苏州浪潮智能科技有限公司 | Control circuit |
| CN113127247A (en) * | 2021-04-01 | 2021-07-16 | 山东英信计算机技术有限公司 | Data acquisition method, system, device and medium |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| CN106708234A (en) | Method and device for monitoring states of power supplies of system on basis of CPLD | |
| CN108491058A (en) | A kind of the powered-off fault data guard method and device of Nonvolatile memory | |
| CN101813934A (en) | Triple redundant bus synchronizing and voting circuit based on programmable device | |
| CN103605596A (en) | System and method for collaborative power management of FPGA (field programmable gata array) chip and BMC (baseboard management controller) chip used on ATCA (advanced telecom computing architecture) blade | |
| CN101866304A (en) | Server capable of detecting state of voltage regulator | |
| CN102768561A (en) | Design method for twinbridge piece mainboard redundancy | |
| CN117278890B (en) | Optical module access method, device and system, electronic equipment and readable storage medium | |
| CN110096291A (en) | Power management chip upgrades circuit, method and the network equipment | |
| CN101788940A (en) | Power-on-reset circuit for 2*2 redundancy fault-tolerant computers based on programmable logic device | |
| CN100555260C (en) | The integrating device of master-controlled bottom layer managing plane and method | |
| CN111475113A (en) | Large-capacity storage blade based on FPGA and RAID technology and access method | |
| CN208538124U (en) | A kind of server master board based on 1621 processor of Shen prestige | |
| CN208569614U (en) | A kind of double controller storage system | |
| CN114924998B (en) | Memory information reading device and method, computing device motherboard, device and medium | |
| CN102074082B (en) | Network tax controller and method for detecting plug and pull of same | |
| CN103309781B (en) | The detection method of the single multiplying power Synchronous dynamic RAM based on DSP and FPGA | |
| CN203204494U (en) | Multifunctional high-stability slot structure and multifunctional card insertion module combined system | |
| CN105573870A (en) | Control method and device for starting load device based on multi-way redundant power supply modules | |
| CN206479922U (en) | Highly dense server hard disk back plane | |
| CN115392186A (en) | Fault collection management system and method in system on chip | |
| CN104900264A (en) | System and method for preventing data damage during startup and shutdown of SPI FLASH | |
| CN202838091U (en) | Double bridge piece mainboard supporting SR 5690 redundancy design | |
| CN105630120B (en) | A kind of method and device of loading processing device hardware configuration word | |
| CN207799566U (en) | A kind of four road mainboards based on high-end server | |
| CN220357535U (en) | Computing storage blade and equipment |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20170524 |