CN111697070A - Reverse conducting IGBT device - Google Patents
Reverse conducting IGBT device Download PDFInfo
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- CN111697070A CN111697070A CN202010604835.3A CN202010604835A CN111697070A CN 111697070 A CN111697070 A CN 111697070A CN 202010604835 A CN202010604835 A CN 202010604835A CN 111697070 A CN111697070 A CN 111697070A
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- 239000004065 semiconductor Substances 0.000 claims abstract description 197
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims description 33
- 229910052751 metal Inorganic materials 0.000 claims description 22
- 239000002184 metal Substances 0.000 claims description 22
- 210000000746 body region Anatomy 0.000 claims description 16
- 239000012535 impurity Substances 0.000 claims description 9
- 229920005591 polysilicon Polymers 0.000 claims description 8
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- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 claims description 4
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 4
- GPXJNWSHGFTCBW-UHFFFAOYSA-N Indium phosphide Chemical compound [In]#P GPXJNWSHGFTCBW-UHFFFAOYSA-N 0.000 claims description 4
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims description 4
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims description 4
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- 239000010703 silicon Substances 0.000 claims description 4
- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 4
- 229910010271 silicon carbide Inorganic materials 0.000 claims description 4
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims description 3
- 230000003071 parasitic effect Effects 0.000 abstract description 6
- 230000005641 tunneling Effects 0.000 abstract description 3
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/70—Bipolar devices
- H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
- H01L29/739—Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
- H01L29/7393—Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
- H01L29/7395—Vertical transistors, e.g. vertical IGBT
- H01L29/7396—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions
- H01L29/7397—Vertical transistors, e.g. vertical IGBT with a non planar surface, e.g. with a non planar gate or with a trench or recess or pillar in the surface of the emitter, base or collector region for improving current density or short circuiting the emitter and base regions and a gate structure lying on a slanted or vertical surface or formed in a groove, e.g. trench gate IGBT
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/07—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common
- H01L27/0705—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type
- H01L27/0727—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration the components having an active region in common comprising components of the field effect type in combination with diodes, or capacitors or resistors
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0603—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by particular constructional design considerations, e.g. for preventing surface leakage, for controlling electric field concentration or for internal isolations regions
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
- H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
- H01L29/0684—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions characterised by the shape, relative sizes or dispositions of the semiconductor regions or junctions between the regions
Abstract
The invention relates to the technical field of power semiconductor devices, in particular to a reverse conducting IGBT device, wherein an N region doped region of a collector structure is replaced by a diode formed by a heavily doped N region and a longitudinally placed P region on the basis of the traditional reverse conducting IGBT device, and the built-in potential of the diode reaches the forbidden bandwidth by controlling the doping concentration of the heavily doped N region and the heavily doped P region, so that the diode can play a role of continuous flow by utilizing tunneling current when the IGBT is reversely blocked, and the device does not have a parasitic VDMOS structure when the reverse conducting IGBT is in a forward conducting state, thereby eliminating the snap-back phenomenon of the reverse conducting IGBT device.
Description
Technical Field
The invention relates to the technical field of power semiconductor devices, in particular to a reverse conducting Insulated Gate Bipolar Transistor (IGBT).
Background
An igbt (insulated Gate bipolar transistor) and an igbt (insulated Gate bipolar transistor) are composite devices composed of an MOSFET (field effect transistor) and a BJT (bipolar transistor), and have the advantages of simple Gate driving and high turn-on speed of the MOSFET and the advantages of high current-carrying density and low on-resistance when the BJT is turned on, so that they are widely used in various high-power systems.
When an IGBT is used as a switching device to process a high-power signal, since only a parasitic transistor exists inside the IGBT, and an internal parasitic diode such as a MOSFET does not exist, it is necessary to provide an antiparallel diode having the same withstand voltage as a freewheeling diode for each IGBT device. In order to reduce the process difficulty and the manufacturing cost, and simultaneously reduce the die area and the package volume, Hideki Takahashi proposed the earliest Reverse Conducting IGBT (also called RC-IGBT) in the document "1200V Reverse connecting IGBT".
In the manufacturing method of the RC-IGBT, a partial N + collector region short-circuit structure is introduced into a P + collector region on the back surface of the IGBT, as shown in figure 1, the RC-IGBT structure is equivalent to a common IGBT structure and is connected with an MOSFET in parallel due to the introduction of the N + collector region short-circuit structure 13, and therefore when the IGBT is in a reverse off state, a parasitic PN junction structure in the MOSFET structure can play a role of a freewheeling diode. However, the introduction of the N + collector region short-circuit structure also affects the operation of the IGBT in the forward conduction state, and the main effect is that a negative resistance phenomenon, namely a snap-back phenomenon, occurs in the conduction process of the IGBT, and the cause of the phenomenon is as follows: the introduction of the N + collector region short circuit structure enables the RC-IGBT to be a parallel structure of a common IGBT structure and an MOSFET, when grid voltage is larger than threshold voltage and collector voltage is small, the MOSFET structure in the RC-IGBT can provide a low-resistance unipolar current path, unipolar current generated by the unipolar current path can flow out through the low-doped N-drift region, the on-resistance of the N-drift region is large, the on-current at the moment is small, and the working state of the RC-IGBT at the moment can be called as an MOSFET working mode. And when the voltage drop makes the PN junction formed by the P region and the N-drift region of the collector forward conducted, the P + collector region injects holes into the N-drift region, conductance modulation occurs, and the RC-IGBT enters an IGBT conducting mode. Because the conduction mode is changed from a unipolar MOSFET conduction mode to a bipolar IGBT conduction mode, the conduction resistance is rapidly reduced due to the conductivity modulation effect, and the snap-back phenomenon is caused. The snap-back phenomenon easily causes local concentration of current in the IGBT module, so that local power consumption is further excessive, and devices are burnt.
Disclosure of Invention
In view of the above problems, the present invention provides a reverse conducting IGBT device capable of alleviating a snap-back phenomenon of the reverse conducting IGBT and improving reliability of the device.
In order to achieve the purpose, the technical scheme of the invention is as follows:
a reverse conducting type IGBT device comprises an emitter metal 1, a heavily doped second conducting type semiconductor emitting region 2, a heavily doped first conducting type semiconductor ohmic contact region 3, a medium doped first conducting type semiconductor body region 5, a polycrystalline silicon gate electrode 6, a gate insulating oxide layer 4, a lightly doped second conducting type semiconductor drift region 7, a heavily doped first conducting type semiconductor collector region 8, a heavily doped first conducting type semiconductor diode region 9, a heavily doped second conducting type semiconductor diode region 10 and a collector metal 11;
two sides of the polycrystalline silicon gate electrode 6 are provided with heavily doped second conduction type semiconductor emitting regions 2, one side of each heavily doped second conduction type semiconductor emitting region 2, which is far away from the polycrystalline silicon gate electrode 6, is provided with a heavily doped first conduction type semiconductor ohmic contact region 3, the heavily doped second conduction type semiconductor emitting regions 2 are contacted with the heavily doped first conduction type semiconductor ohmic contact regions 3, a medium doped first conduction type semiconductor body region 5 is arranged below the heavily doped second conduction type semiconductor emitting regions 2 and the heavily doped first conduction type semiconductor ohmic contact regions 3, and a polycrystalline silicon gate electrode 6 is arranged between the polycrystalline silicon gate electrode 6 and the heavily doped second conduction type semiconductor emitting regions 2 and between the polycrystalline silicon gate electrode 6 and the polycrystalline silicon gate electrode 6The heavily doped first conductive type semiconductor body region 5 is isolated from the heavily doped first conductive type semiconductor body region by a gate insulating oxide layer 4; emitter metal 1 is arranged above the polycrystalline silicon gate electrode 6, the heavily doped second conduction type semiconductor emitting region 2 and the heavily doped first conduction type semiconductor ohmic contact region 3, the upper surfaces of the heavily doped second conduction type semiconductor emitting region 2 and the heavily doped first conduction type semiconductor ohmic contact region 3 are both contacted with the emitter metal 1, a lightly doped second conduction type semiconductor drift region 7 is arranged below the polycrystalline silicon gate electrode 6, and the polycrystalline silicon gate electrode 6 is isolated from the emitter metal 1 and the polycrystalline silicon gate electrode 6 is isolated from the lightly doped second conduction type semiconductor drift region 7 by a gate insulating oxide layer 4; the depth of the lower surface of the middle-doped first conduction type semiconductor body region 5 does not exceed the depth of the lower surface of the polycrystalline silicon gate electrode 6, the upper surface of the light-doped second conduction type semiconductor drift region 7 is in contact with the middle-doped first conduction type semiconductor body region 5, and the lower surface of the light-doped second conduction type semiconductor drift region 7 is in direct contact with the heavy-doped first conduction type semiconductor collector region 8 and the heavy-doped second conduction type semiconductor diode region 10; two sides of the first conductive type semiconductor collector region 8 are heavily doped second conductive type semiconductor diode regions 10, the lower surfaces of the heavily doped second conductive type semiconductor diode regions 10 are in contact with the heavily doped first conductive type diode regions 9, the side surfaces of the heavily doped second conductive type semiconductor diode regions 10 and the side surfaces of the heavily doped first conductive type diode regions 9 are both in direct contact with the heavily doped first conductive type semiconductor collector region 8, and the lower surfaces of the heavily doped first conductive type semiconductor collector region 8 and the heavily doped first conductive type diode regions 9 are both in contact with the collector metal 11, which is characterized in that: the doping concentration of the heavily doped first conductivity type diode region 9 and the doping concentration of the heavily doped second conductivity type semiconductor diode region 10 satisfy:
wherein n isiIs the semiconductor intrinsic carrier concentration, k is the Boltzmann constant, T is the absolute temperature, EgIs the semiconductor forbidden band width, N1Is heavyDoping concentration of the first conductive type diode region 9, N2Is a doping concentration of the heavily doped second conductive type semiconductor diode region 10.
Preferably, a middle-doped second-conductivity-type semiconductor field stop region 12 is disposed between the lower surface of the lightly-doped second-conductivity-type semiconductor drift region 7 and the heavily-doped second-conductivity-type semiconductor diode region 10, and the lower surface of the second-conductivity-type semiconductor field stop region 12 is in direct contact with the first-conductivity-type semiconductor collector region 8 and the heavily-doped second-conductivity-type semiconductor diode region 10.
Preferably, the material of the IGBT device is silicon, silicon carbide, gallium arsenide, indium phosphide or silicon germanium semiconductor material.
Preferably, the first conductivity type semiconductor is a P-type semiconductor, and the second conductivity type semiconductor is an N-type semiconductor; or the first conductive type semiconductor is an N-type semiconductor, and the second conductive type semiconductor is a P-type semiconductor.
Preferably, the light doping is performed in the order of the impurity concentration of 1e16cm-3And a medium doping of an impurity concentration order of 1e16cm-3To 1e18cm-3Doped to an impurity concentration order of greater than 1e18cm-3Doping of (3).
The invention has the beneficial effects that: on the basis of the traditional reverse conducting type IGBT device, the N region doping region of the collector structure is replaced by a diode formed by a heavy doping N region and a heavy doping P region which are longitudinally arranged, the doping concentration of the heavy doping N region and the heavy doping P region is controlled to be close to degeneracy or not fully degeneracy, so that the diode can play a continuous flow role by utilizing tunneling current when the IGBT is reversely blocked, and when the reverse conducting type IGBT is in a forward conducting state, the device does not have a parasitic VDMOS structure, so that the snap-back phenomenon of the reverse conducting type IGBT device is eliminated.
Drawings
Fig. 1 is a schematic diagram of a cell structure of a conventional RC-IGBT device.
Fig. 2 is a graph of current-voltage (I-V) characteristics of a conventional RC-IGBT device.
Fig. 3 is a schematic diagram of a reverse conducting IGBT device proposed in embodiment 1 of the present invention.
Fig. 4.1 is an energy band diagram of a diode composed of a P + diode region and an N + diode region under zero bias in the reverse conducting IGBT device according to the present invention.
Fig. 4.2 is an energy band diagram of a diode formed by a P + diode region and an N + diode region in a reverse conducting IGBT device according to the present invention in a reverse bias state.
Fig. 5 is a schematic diagram of a reverse conducting IGBT device proposed in embodiment 2 of the present invention.
The semiconductor device comprises a substrate, a substrate.
Detailed Description
Example 1
As shown in fig. 3, a reverse conducting IGBT device includes an emitter metal 1, a heavily doped second conductivity type semiconductor emitter region 2, a heavily doped first conductivity type semiconductor ohmic contact region 3, a moderately doped first conductivity type semiconductor body region 5, a polysilicon gate electrode 6, a gate insulating oxide layer 4, a lightly doped second conductivity type semiconductor drift region 7, a heavily doped first conductivity type semiconductor collector region 8, a heavily doped first conductivity type semiconductor diode region 9, a heavily doped second conductivity type semiconductor diode region 10, and a collector metal 11;
two sides of the polysilicon gate electrode 6 are heavily doped second conductivity type semiconductor emitting regions 2, and one side of the heavily doped second conductivity type semiconductor emitting region 2 far away from the polysilicon gate electrode 6 is heavily doped first conductivity typeThe semiconductor ohmic contact region 3 is formed by contacting a heavily doped second conduction type semiconductor emitting region 2 with a heavily doped first conduction type semiconductor ohmic contact region 3, a medium doped first conduction type semiconductor body region 5 is arranged below the heavily doped second conduction type semiconductor emitting region 2 and the heavily doped first conduction type semiconductor ohmic contact region 3, and the gate insulation oxide layer 4 is used for isolating the space between the polysilicon gate electrode 6 and the heavily doped second conduction type semiconductor emitting region 2 and the space between the polysilicon gate electrode 6 and the heavily doped first conduction type semiconductor body region 5; emitter metal 1 is arranged above the polycrystalline silicon gate electrode 6, the heavily doped second conduction type semiconductor emitting region 2 and the heavily doped first conduction type semiconductor ohmic contact region 3, the upper surfaces of the heavily doped second conduction type semiconductor emitting region 2 and the heavily doped first conduction type semiconductor ohmic contact region 3 are both contacted with the emitter metal 1, a lightly doped second conduction type semiconductor drift region 7 is arranged below the polycrystalline silicon gate electrode 6, and the polycrystalline silicon gate electrode 6 is isolated from the emitter metal 1 and the polycrystalline silicon gate electrode 6 is isolated from the lightly doped second conduction type semiconductor drift region 7 by a gate insulating oxide layer 4; the depth of the lower surface of the middle-doped first conduction type semiconductor body region 5 does not exceed the depth of the lower surface of the polycrystalline silicon gate electrode 6, the upper surface of the light-doped second conduction type semiconductor drift region 7 is in contact with the middle-doped first conduction type semiconductor body region 5, and the lower surface of the light-doped second conduction type semiconductor drift region 7 is in direct contact with the heavy-doped first conduction type semiconductor collector region 8 and the heavy-doped second conduction type semiconductor diode region 10; two sides of the first conductive type semiconductor collector region 8 are heavily doped second conductive type semiconductor diode regions 10, the lower surfaces of the heavily doped second conductive type semiconductor diode regions 10 are in contact with the heavily doped first conductive type diode regions 9, the side surfaces of the heavily doped second conductive type semiconductor diode regions 10 and the side surfaces of the heavily doped first conductive type diode regions 9 are in direct contact with the heavily doped first conductive type semiconductor collector region 8, the lower surfaces of the heavily doped first conductive type semiconductor collector regions 8 and the lower surfaces of the heavily doped first conductive type diode regions 9 are in contact with the collector metal 11, and the lower surfaces of the heavily doped first conductive type diode regions 9The doping concentration and the doping concentration of the heavily doped second conductivity type semiconductor diode region 10 satisfy:
wherein n isiIs the semiconductor intrinsic carrier concentration, k is the Boltzmann constant, T is the absolute temperature, EgIs the semiconductor forbidden band width, N1Is heavily doped with the doping concentration of the first conductivity type diode region 9, N2Is a doping concentration of the heavily doped second conductive type semiconductor diode region 10.
Preferably, the material of the IGBT device is silicon, silicon carbide, gallium arsenide, indium phosphide or silicon germanium semiconductor material.
Preferably, the first conductivity type semiconductor is a P-type semiconductor, and the second conductivity type semiconductor is an N-type semiconductor; or the first conductive type semiconductor is an N-type semiconductor, and the second conductive type semiconductor is a P-type semiconductor.
Preferably, the light doping is carried out at an impurity concentration of 1e16cm-3And a medium doping of an impurity concentration order of 1e16cm-3To 1e18cm-3Doped to an impurity concentration order of greater than 1e18cm-3Doping of (3).
The working principle of the present invention will be described in detail with reference to this embodiment 1 by taking the first conductivity type semiconductor as a P-type semiconductor and the second conductivity type semiconductor as an N-type semiconductor as an example:
when the IGBT is in the forward conduction mode, the electrode connection mode of the device of embodiment 1 is: the emitter metal 1 is connected with low potential, the polysilicon gate electrode 6 is connected with high potential, and the collector metal 11 is connected with high potential. In this case, the diode constituted by the heavily doped first conductivity type semiconductor diode region 9 and the heavily doped second conductivity type semiconductor diode region 10 is in a forward bias state. Because the heavily doped first conductivity type semiconductor diode region 9 and the heavily doped second conductivity type semiconductor diode region 10 have high doping concentrations, the forward conduction voltage drop of the formed diode is greater than that of the diode formed by the heavily doped first conductivity type semiconductor collector region 8 and the lightly doped second conductivity type semiconductor drift region 7, and the device has obvious current circulation only after the diode formed by the heavily doped first conductivity type semiconductor collector region 8 and the lightly doped second conductivity type semiconductor drift region 7 is started. Because parasitic VDMOS does not exist in the device, the snap-back phenomenon of the conventional reverse conducting type IGBT device can not occur in the forward conducting process of the IGBT.
The IGBT is in reverse blocking mode, and the electrode connection of the device of example 1 is: the emitter metal 1 is connected with high potential, the polysilicon gate electrode 6 is connected with low potential, and the collector metal 11 is connected with low potential. In this case, the diode constituted by the heavily doped first conductivity type semiconductor diode region 9 and the heavily doped second conductivity type semiconductor diode region 10 is in a reverse bias state. Since the doping concentration of the heavily doped first conductivity type semiconductor diode region 9 and the doping concentration of the heavily doped second conductivity type semiconductor diode region 10 satisfy:
therefore, the barrier heights of the heavily doped first conductivity type semiconductor diode region 9 and the N type diode region 10 are equal to the forbidden band width, the energy band diagram of the diode constituted by the heavily doped first conductivity type semiconductor diode region 9 and the heavily doped second conductivity type semiconductor diode region 10 at zero bias is shown in fig. 4.1, and the valence band top Ev of the heavily doped first conductivity type semiconductor diode region 9 is flush with the conduction band top Ec of the heavily doped second conductivity type semiconductor diode region 10. When the diode is in a reverse bias state, as shown in fig. 4.2, the barrier height between the heavily doped first conductivity type semiconductor diode region 9 and the heavily doped second conductivity type semiconductor diode region 10 is further increased, and the equal energy interval between the conduction band of the heavily doped second conductivity type semiconductor diode region 10 and the valence band of the heavily doped first conductivity type semiconductor diode region 9 is expanded; meanwhile, since the heavily doped first conductivity type semiconductor diode region 9 and the heavily doped second conductivity type semiconductor diode region 10 are heavily doped and the width of the depletion region is narrow, electrons easily pass through the valence of the heavily doped first conductivity type semiconductor diode region 9 by tunnelingThe band transits to a conduction band of the heavily doped second conductive type semiconductor diode region 10 to form a large tunneling current, which functions as a freewheeling diode.
Example 2
As shown in fig. 5, the present embodiment is different from embodiment 1 in that: a middle-doped second-conductivity-type semiconductor field stop region 12 is arranged between the lower surface of the lightly-doped second-conductivity-type semiconductor drift region 7 and the heavily-doped second-conductivity-type semiconductor diode region 10, and the lower surface of the second-conductivity-type semiconductor field stop region 12 is in direct contact with the first-conductivity-type semiconductor collector region 8 and the heavily-doped second-conductivity-type semiconductor diode region 10.
The introduction of the second conductivity type semiconductor field stop region 12 can further optimize the trade-off relationship between the forward conduction voltage drop and the reverse withstand voltage of the reverse-conducting IGBT.
The reverse conducting IGBT device provided by the invention is also suitable for devices made of semiconductor materials such as silicon carbide, gallium arsenide, indium phosphide or germanium silicon.
While the present invention has been particularly shown and described with reference to the preferred embodiments, it will be understood by those skilled in the art that various changes in form and details may be made therein without departing from the spirit and scope of the invention as defined by the appended claims.
Claims (5)
1. A reverse conducting type IGBT device comprises an emitter metal (1), a heavily doped second conducting type semiconductor emitting region (2), a heavily doped first conducting type semiconductor ohmic contact region (3), a medium doped first conducting type semiconductor body region (5), a polycrystalline silicon gate electrode (6), a gate insulating oxide layer (4), a lightly doped second conducting type semiconductor drift region (7), a heavily doped first conducting type semiconductor collector region (8), a heavily doped first conducting type semiconductor diode region (9), a heavily doped second conducting type semiconductor diode region (10) and a collector metal (11);
the polycrystalTwo sides of the silicon gate electrode (6) are provided with heavily doped second conductive type semiconductor emitting regions (2), one side of each heavily doped second conductive type semiconductor emitting region (2) far away from the polysilicon gate electrode (6) is provided with a heavily doped first conductive type semiconductor ohmic contact region (3), each heavily doped second conductive type semiconductor emitting region (2) is contacted with each heavily doped first conductive type semiconductor ohmic contact region (3), a medium doped first conductive type semiconductor body region (5) is arranged below each heavily doped second conductive type semiconductor emitting region (2) and each heavily doped first conductive type semiconductor ohmic contact region (3), the polycrystalline silicon gate electrode (6) and the heavily doped second conductive type semiconductor emitter region (2) and the polycrystalline silicon gate electrode (6) and the heavily doped first conductive type semiconductor body region (5) are isolated by a gate insulating oxide layer (4); emitter metal (1) is arranged above the polycrystalline silicon gate electrode (6), the heavily doped second conduction type semiconductor emitting region (2) and the heavily doped first conduction type semiconductor ohmic contact region (3), the upper surfaces of the heavily doped second conduction type semiconductor emitting region (2) and the heavily doped first conduction type semiconductor ohmic contact region (3) are both contacted with the emitter metal (1), a lightly doped second conduction type semiconductor drift region (7) is arranged below the polycrystalline silicon gate electrode (6), and the polycrystalline silicon gate electrode (6) and the emitter metal (1) and the polycrystalline silicon gate electrode (6) and the lightly doped second conduction type semiconductor drift region (7) are isolated by a gate insulating oxide layer (4); the depth of the lower surface of the middle-doped first-conductivity-type semiconductor body region (5) does not exceed the depth of the lower surface of the polycrystalline silicon gate electrode (6), the upper surface of the light-doped second-conductivity-type semiconductor drift region (7) is in contact with the middle-doped first-conductivity-type semiconductor body region (5), and the lower surface of the light-doped second-conductivity-type semiconductor drift region (7) is in direct contact with the heavy-doped first-conductivity-type semiconductor collector region (8) and the heavy-doped second-conductivity-type semiconductor diode region (10); two sides of the first conductive type semiconductor collector region (8) are provided with heavily doped second conductive type semiconductor diode regions (10), the lower surfaces of the heavily doped second conductive type semiconductor diode regions (10) are contacted with the heavily doped first conductive type diode regions (9), the side surfaces of the heavily doped second conductive type semiconductor diode regions (10) and the side surfaces of the heavily doped first conductive type diode regions (9)The surface of the collector region is in direct contact with a heavily doped first conduction type semiconductor collector region (8), the lower surface of the heavily doped first conduction type semiconductor collector region (8) and the lower surface of the heavily doped first conduction type diode region (9) are in contact with collector metal (11), and the collector region is characterized in that: the doping concentration of the heavily doped first conductivity type diode region (9) and the doping concentration of the heavily doped second conductivity type semiconductor diode region (10) satisfy:
wherein n isiIs the semiconductor intrinsic carrier concentration, k is the Boltzmann constant, T is the absolute temperature, EgIs the semiconductor forbidden band width, N1Is heavily doped with a doping concentration of a diode region (9) of a first conductivity type, N2Is the doping concentration of the heavily doped second conductive type semiconductor diode region (10).
2. The reverse conducting IGBT device according to claim 1, characterized in that: a middle-doped second-conductivity-type semiconductor field stop region (12) is arranged between the lower surface of the lightly-doped second-conductivity-type semiconductor drift region (7) and the heavily-doped second-conductivity-type semiconductor diode region (10), and the lower surface of the second-conductivity-type semiconductor field stop region (12) is in direct contact with the first-conductivity-type semiconductor collector region (8) and the heavily-doped second-conductivity-type semiconductor diode region (10).
3. The reverse conducting IGBT device according to any one of claims 1 to 2, characterized in that: the IGBT device is made of silicon, silicon carbide, gallium arsenide, indium phosphide or silicon germanium semiconductor materials.
4. A reverse conducting IGBT device according to any one of claims 1 to 3, characterized in that: the first conductive type semiconductor is a P-type semiconductor, and the second conductive type semiconductor is an N-type semiconductor; or the first conductive type semiconductor is an N-type semiconductor, and the second conductive type semiconductor is a P-type semiconductor.
5. The reverse conducting type IGBT device according to any one of claims 1 to 4, characterized in that: the light doping is carried out in the way that the impurity concentration is 1e16cm-3And a medium doping of an impurity concentration order of 1e16cm-3To 1e18cm-3Doped to an impurity concentration order of greater than 1e18cm-3Doping of (3).
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| Publication number | Priority date | Publication date | Assignee | Title |
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| CN113224164A (en) * | 2021-04-21 | 2021-08-06 | 电子科技大学 | Super junction MOS device |
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| JP2014022708A (en) * | 2012-07-17 | 2014-02-03 | Yoshitaka Sugawara | Semiconductor device and operation method of the same |
| CN105870179A (en) * | 2016-04-26 | 2016-08-17 | 电子科技大学 | Trench gate charge storage reverse-conducting insulated-gate bipolar transistor (RC-IGBT) and fabrication method thereof |
| JP2016149429A (en) * | 2015-02-12 | 2016-08-18 | 株式会社豊田中央研究所 | Reverse conducting IGBT |
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| JP2014022708A (en) * | 2012-07-17 | 2014-02-03 | Yoshitaka Sugawara | Semiconductor device and operation method of the same |
| JP2016149429A (en) * | 2015-02-12 | 2016-08-18 | 株式会社豊田中央研究所 | Reverse conducting IGBT |
| CN105870179A (en) * | 2016-04-26 | 2016-08-17 | 电子科技大学 | Trench gate charge storage reverse-conducting insulated-gate bipolar transistor (RC-IGBT) and fabrication method thereof |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN113224164A (en) * | 2021-04-21 | 2021-08-06 | 电子科技大学 | Super junction MOS device |
| CN113224164B (en) * | 2021-04-21 | 2022-03-29 | 电子科技大学 | Super junction MOS device |
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Application publication date: 20200922 |