CN111682023A - A Terahertz Heterogeneous Integrated Chip - Google Patents

Abstract

The present application discloses a terahertz heterogeneous integrated chip, comprising: a first silicon germanium substrate, a T-type power combining circuit, and two symmetrically arranged circuits to be combined; the circuits to be combined include capacitors connected in sequence through microstrip lines , an inductor, a first filter, a frequency doubling diode, and the inductor is embedded in the first silicon germanium substrate. One pad of the frequency doubling diode is connected to the input end of the T-type power synthesis circuit through a microstrip line. The frequency doubling diode the other pad is grounded. The substrate in the chip of the present application is the first silicon germanium substrate, which is a semiconductor process substrate with a multi-layered structure, and the inductor is embedded inside the first silicon germanium substrate, thereby effectively reducing the size of the first germanium The area occupied by the silicon germanium substrate reduces the volume of the terahertz heterogeneous integrated chip; in addition, since the first silicon germanium substrate is a semiconductor process substrate, the microstrip line used in conjunction can be as low as a few microns, which can also reduce the occupied area. , to improve the integration of terahertz heterogeneous integrated chips.

Description

A Terahertz Heterogeneous Integrated Chip

technical field

The present application relates to the technical field of terahertz heterogeneous integrated circuits, in particular to a terahertz heterogeneous integrated chip.

Background technique

Terahertz technology is a very important cross-frontier field with important applications in communications, radar, astronomy, medical imaging, biochemical identification, materials science, security inspection and other fields.

Terahertz waves refer to electromagnetic waves in the frequency range of 0.1 to 10 THz, and a frequency multiplier circuit is a circuit that can realize frequency conversion in the terahertz frequency band. At present, terahertz frequency doubling circuit chips are all based on quartz substrates, and various circuit components such as diodes and filters are laid on the upper surface of the quartz substrate, which are completely connected by microstrip lines. Since the quartz substrate is a completely solid single-layer plate-like substrate, various circuit components are completely arranged on the surface of the quartz substrate, and a larger area of the quartz substrate is required for carrying. On the other hand, it is used in conjunction with the quartz substrate. The microstrip line is relatively thick, generally in the tens of microns, so the area occupied by the microstrip line is also large, resulting in a large volume of the entire substrate and a low degree of integration. When the chip size is required in some special occasions, the application will be limited.

Therefore, how to solve the above technical problems should be the focus of those skilled in the art.

SUMMARY OF THE INVENTION

The purpose of this application is to provide a terahertz heterogeneous integrated chip to improve the integration degree of the chip.

In order to solve the above technical problems, the present application provides a terahertz heterogeneous integrated chip, including:

a first silicon germanium substrate, a T-type power combining circuit, and two symmetrically arranged circuits to be combined;

The to-be-synthesized circuit includes a capacitor, an inductor, a first filter, and a frequency doubling diode sequentially connected by a microstrip line, and the inductor is embedded in the first silicon germanium substrate, and one of the frequency doubling diodes is The pad is connected to the input end of the T-type power combining circuit through the microstrip line, and the other pad of the frequency doubling diode is grounded.

Optionally, the frequency doubling diode is a GaAs Schottky varactor diode.

Optionally, also include:

a second silicon germanium substrate, a first input structure, a second input structure, and an output structure;

The first input structure includes a radio frequency GSG input terminal, a radio frequency matching circuit connected to the radio frequency GSG input terminal, and a DC blocking passive network arranged in the radio frequency matching circuit;

The second input structure includes a local oscillator input terminal, a ground terminal, a second filter, and a mixing diode connected in sequence;

The output structure includes an intermediate frequency filter matching circuit and an intermediate frequency GSG output terminal;

The output end of the radio frequency matching circuit and a pad of the mixing diode are connected to the intermediate frequency filter matching circuit.

Optionally, the mixing diode is an APL-0P95 mixing diode.

Optionally, the second filter is a CMRCs low-pass filter.

Optionally, the first filter is a CMRCs filter.

Optionally, the terahertz heterogeneous integrated chip adopts a wave port.

Optionally, the DC blocking passive network is an I-shaped DC blocking passive network.

The terahertz heterogeneous integrated chip provided by the present application includes: a first silicon germanium substrate, a T-type power combining circuit, and two symmetrically arranged circuits to be combined; capacitor, inductor, first filter, frequency doubling diode, and the inductor is embedded in the first silicon germanium substrate, a pad of the frequency doubling diode is connected to the T-type through the microstrip line The input terminals of the power combining circuit are connected, and the other pad of the frequency doubling diode is grounded.

It can be seen that the substrate in the terahertz heterogeneous integrated chip of the present application is the first silicon germanium substrate, and the first silicon germanium substrate is a semiconductor process substrate with a multi-layered structure, and the inductor is embedded in the first Inside the silicon germanium substrate, it does not need to be tiled on the surface of the first silicon germanium substrate, thereby effectively reducing the occupied area of the first silicon germanium substrate and reducing the volume of the terahertz heterogeneous integrated chip; A silicon germanium substrate is a semiconductor process substrate. The microstrip line used in the terahertz heterogeneous integrated chip can be as low as a few microns, which can also reduce the occupied area, reduce the volume of the terahertz heterogeneous integrated chip, and improve the terahertz integrated chip. The degree of integration of heterogeneous integrated chips. In addition, since the first silicon germanium substrate has high frequency characteristics, the terahertz heterogeneous integrated chip has a higher frequency.

Description of drawings

In order to illustrate the technical solutions of the embodiments of the present application or the prior art more clearly, the following briefly introduces the accompanying drawings that need to be used in the description of the embodiments or the prior art. Obviously, the drawings in the following description are only For some embodiments of the present application, for those of ordinary skill in the art, other drawings can also be obtained according to these drawings without any creative effort.

1 is a schematic diagram of a terahertz heterogeneous integrated chip provided by an embodiment of the present application;

FIG. 2 is a schematic structural diagram of a GaAs Schottky varactor diode;

Figure 3 is a block diagram of the circuit principle;

Figure 4 is a single-channel simulation circuit diagram;

Figure 5 is a model diagram of the placement section and junction area of the frequency doubling diode;

Fig. 6 is the double-channel simulation frequency multiplication output power diagram;

Figure 7 is a double-channel simulation frequency doubling efficiency diagram;

FIG. 8 is a schematic diagram of another terahertz heterogeneous integrated chip provided by an embodiment of the present application;

Fig. 9 is the structural schematic diagram of APL-0P95 frequency mixing diode;

Fig. 10 is the frequency conversion loss diagram of the simulation of the mixing circuit.

Detailed ways

In order to make those skilled in the art better understand the solution of the present application, the present application will be further described in detail below with reference to the accompanying drawings and specific embodiments. Obviously, the described embodiments are only a part of the embodiments of the present application, but not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by those of ordinary skill in the art without creative efforts shall fall within the protection scope of the present application.

Many specific details are set forth in the following description to facilitate a full understanding of the present invention, but the present invention can also be implemented in other ways different from those described herein, and those skilled in the art can do so without departing from the connotation of the present invention. Similar promotion, therefore, the present invention is not limited by the specific embodiments disclosed below.

As mentioned in the background section, a quartz substrate is used in the existing chip. The quartz substrate is a single-layer plate-shaped substrate. All circuit elements are spread on the surface of the quartz substrate, occupying a large area, and it is closely related to the quartz substrate. The microstrip line used in conjunction with the substrate is also relatively thick and occupies a large area, resulting in a large volume and low integration of the existing chip.

In view of this, the present application provides a terahertz heterogeneous integrated chip. Please refer to FIG. 1. FIG. 1 is a schematic diagram of a terahertz heterogeneous integrated chip provided by an embodiment of the application, including:

a first silicon germanium substrate 1, a T-type power combining circuit 2, and two symmetrically arranged circuits to be combined 3;

The to-be-synthesized circuit 3 includes a capacitor 31 , an inductor 32 , a first filter 33 , and a frequency-doubling diode 34 connected in sequence through a microstrip line 4 , and the inductor 32 is embedded in the first silicon germanium substrate 1 , one pad of the frequency doubling diode 34 is connected to the input end of the T-type power combining circuit 2 through the microstrip line 4 , and the other pad of the frequency doubling diode 34 is grounded 35 .

The first silicon germanium substrate 1, the T-type power combining circuit 2, and the two symmetrically arranged circuits to be combined 3 together form a frequency multiplier circuit.

In this embodiment, the capacitor 31 and the inductor 32 are the DC capacitor 31 and the DC inductor 32 respectively. The inductor 32 is spiral and embedded in the first silicon germanium substrate 1 . The connection port of the inductor 32 is arranged on the surface of the first silicon germanium substrate 1 to realize the connection with the capacitor 31 and the first filter 33 .

The capacitors 31 in the two symmetrically arranged circuits 3 to be synthesized are connected to the DC power supply of the same volt value (eg, 5 volts, 2.5 volts, etc.), which is a DC power supply work-division structure. The DC current enters the first filter 33 through the capacitor 31 and the inductor 32, is input to the frequency doubling diode 34 after being matched by the microstrip line 4, and is output by the frequency doubling diode 34 and then enters the T-type power synthesis circuit 2 through the microstrip line 4 matching, The T-type power combining circuit 2 performs power combining on the currents of the two circuits to be combined 3; the capacitor 31 and the inductor 32 prevent the input signal from leaking from the power supply terminal.

The T-type power combining circuit 2 is composed of a microstrip line 4, the width and length of the microstrip line 4 can be adjusted according to the power requirements, and a GSG (ground-signal-ground) circuit 5 is connected to the output end.

Optionally, the first filter 33 is a CMRCs filter, and the first filter 33 is also composed of a microstrip line 4, because the microstrip line 4 used in conjunction with the first silicon germanium substrate 1 is relatively thin. , only a few microns, so the volume of the first filter 33 is also reduced.

The frequency doubling diode 34 is a GaAs (gallium arsenide) Schottky varactor diode. Please refer to FIG. 2 for a schematic diagram of the structure of the GaAs Schottky varactor diode. Since GaAs Schottky diodes still have a large gap in the terahertz frequency band, it is difficult to realize the generation and detection of mW-level 340GHz terahertz signals. The separation of the varactor core and the first SiGe substrate circuit is possible.

The simulation of the terahertz heterogeneous integrated chip in this embodiment is described below.

First, the single-channel simulation is introduced. In this embodiment, the substrate is the first silicon germanium substrate 1, and the simulation method of pure electric large size on the quartz substrate can be abandoned, and the combination of the inductor 32, the capacitor 31 and the microstrip line 4 can be used to prevent the input signal from being transmitted from the power supply end. Leakage, the circuit block diagram is shown in Figure 3, and the single-channel simulation circuit after adding the input work division structure is shown in Figure 4. During the co-simulation process, the simulation file of the 170GHz frequency-doubling amplifier chip based on silicon germanium is substituted. The established frequency doubling diode 34 placement segment and junction model are shown in Figure 5. Secondly, the two-way simulation is introduced. The dual-channel simulation is based on the single-channel simulation results. On this basis, the dual-channel T-type power synthesis circuit 2 is added in combination with the GSG circuit, and finally the frequency multiplication circuit shown in Figure 1 is obtained. The dual-channel simulation frequency doubling output power is shown in Figure 6, and the dual-channel simulation frequency doubling efficiency is shown in Figure 7. The efficiency is lower than that of the single channel. This is mainly because the combined efficiency of the dual channel is not 100%. cause some power loss.

Preferably, the terahertz heterogeneous integrated chip adopts a wave port, which provides a more accurate simulation method for integrated circuit simulation.

The substrate in the terahertz heterogeneous integrated chip of the present application is a first silicon germanium substrate 1, and the first silicon germanium substrate 1 is a semiconductor process substrate with a multi-layered structure, and the inductor 32 is embedded in the first silicon germanium substrate 1. The inside of the silicon germanium substrate 1 does not need to be tiled on the surface of the first silicon germanium substrate 1, thereby effectively reducing the area occupied by the first silicon germanium substrate 1 and reducing the volume of the terahertz heterogeneous integrated chip; In addition, since the first silicon germanium substrate 1 is a semiconductor process substrate, the microstrip line 4 used in the terahertz heterogeneous integrated chip can be as low as several microns, which can also reduce the occupied area and reduce the terahertz heterogeneous integrated chip. volume and improve the integration degree of terahertz heterogeneous integrated chips. In addition, since the first silicon germanium substrate 1 has high frequency characteristics, the terahertz heterogeneous integrated chip has a higher frequency.

On the basis of the above embodiment, in an embodiment of the present application, please refer to FIG. 8 , the terahertz heterogeneous integrated chip further includes:

a second silicon germanium substrate 6, a first input structure 7, a second input structure 8, and an output structure 9;

The first input structure 7 includes a radio frequency GSG input terminal 71, a radio frequency matching circuit 72 connected to the radio frequency GSG input terminal 71, and a DC blocking passive network 73 arranged in the radio frequency matching circuit 72;

The second input structure 8 includes a local oscillator input terminal 81, a ground terminal 82, a second filter 83, and a mixing diode 84 connected in sequence;

The output structure 9 includes an intermediate frequency filter matching circuit 91 and an intermediate frequency GSG output terminal 92;

The output end of the radio frequency matching circuit 72 and a pad of the mixing diode 84 are connected to the intermediate frequency filter matching circuit 91 .

The second silicon germanium substrate 6, the first input structure 7, the second input structure 8, and the output structure 9 together form a frequency mixing circuit. The first silicon germanium substrate 1 and the second silicon germanium substrate 6 enable the terahertz heterogeneous integrated chip to have frequency doubling and frequency mixing performance, and realize the transmitting and receiving functions of the terahertz heterogeneous integrated chip. The frequency doubling circuit is used for The transmission is realized, and the mixer circuit is used to realize the reception. The first silicon germanium substrate 1 and the second silicon germanium substrate 6 are both silicon germanium substrates. The first and second in this application are to distinguish the germanium in the frequency doubling circuit and the frequency mixing circuit respectively. silicon substrate.

The RF matching circuit 72 , the ground terminal 82 , the second filter 83 , and the IF filter matching circuit 91 on the second silicon germanium substrate 6 are all composed of microstrip lines of several microns, so the RF matching circuit 72 , the ground terminal 82 The occupied area of the second filter 83 and the intermediate frequency filter matching circuit 91 on the second silicon germanium will be reduced, thereby reducing the volume of the mixing circuit, so that the terahertz heterogeneous integrated chip has the mixing performance at the same time. Reduce the volume of the terahertz heterogeneous integrated chip and improve the integration degree.

Specifically, the second filter 83 is a CMRCs low-pass filter, which performs filtering processing on the current passing through the local oscillator input terminal 81 and the ground terminal 82 in sequence, and the filtered current enters the frequency mixing diode 84, which is then mixed by the frequency mixer. The diode 84 is output to the IF filter matching circuit 91 .

Optionally, the DC blocking passive network 73 is an I-shaped DC blocking passive network 73 , and the I-shaped DC blocking passive network 73 is substantially a slot in the radio frequency matching circuit 72 .

Optionally, the mixing diode 84 is an APL-OP95 mixing diode 84, please refer to FIG. 9 .

The simulation method of the frequency mixing circuit is similar to the simulation method of the frequency multiplication circuit in the above-mentioned embodiment, and will not be described in detail here. The simulated frequency conversion loss of the mixing circuit is shown in Figure 10. The simulated single-sideband loss is 8.8dB@160GHz-180GHz, and the corresponding noise figure is 5dB.

The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments, and the same or similar parts between the various embodiments may be referred to each other. As for the device disclosed in the embodiment, since it corresponds to the method disclosed in the embodiment, the description is relatively simple, and the relevant part can be referred to the description of the method.

The terahertz heterogeneous integrated chip provided by the present application has been introduced in detail above. Specific examples are used herein to illustrate the principles and implementations of the present application, and the descriptions of the above embodiments are only used to help understand the methods and core ideas of the present application. It should be pointed out that for those of ordinary skill in the art, without departing from the principles of the present application, several improvements and modifications can also be made to the present application, and these improvements and modifications also fall within the protection scope of the claims of the present application.

Claims (8)

1. a terahertz heterogeneous integrated chip, is characterized in that, comprises: a first silicon germanium substrate, a T-type power combining circuit, and two symmetrically arranged circuits to be combined; The to-be-synthesized circuit includes a capacitor, an inductor, a first filter, and a frequency doubling diode sequentially connected by a microstrip line, and the inductor is embedded in the first silicon germanium substrate, and one of the frequency doubling diodes is The pad is connected to the input end of the T-type power combining circuit through the microstrip line, and the other pad of the frequency doubling diode is grounded. 2 . The terahertz heterogeneous integrated chip according to claim 1 , wherein the frequency doubling diode is a GaAs Schottky varactor diode. 3 . 3. The terahertz heterogeneous integrated chip according to claim 1 or 2, further comprising: a second silicon germanium substrate, a first input structure, a second input structure, and an output structure; The first input structure includes a radio frequency GSG input terminal, a radio frequency matching circuit connected to the radio frequency GSG input terminal, and a DC blocking passive network arranged in the radio frequency matching circuit; The second input structure includes a local oscillator input terminal, a ground terminal, a second filter, and a mixing diode connected in sequence; The output structure includes an intermediate frequency filter matching circuit and an intermediate frequency GSG output terminal; The output end of the radio frequency matching circuit and a pad of the mixing diode are connected to the intermediate frequency filter matching circuit. 4. The terahertz heterogeneous integrated chip according to claim 3, wherein the frequency mixing diode is an APL-OP95 frequency mixing diode. 5. The terahertz heterogeneous integrated chip according to claim 4, wherein the second filter is a CMRCs low-pass filter. 6. The terahertz heterogeneous integrated chip according to claim 5, wherein the first filter is a CMRCs filter. 7. The terahertz heterogeneous integrated chip according to claim 6, wherein the terahertz heterogeneous integrated chip adopts a wave port. 8 . The terahertz heterogeneous integrated chip according to claim 7 , wherein the DC blocking passive network is an I-shaped DC blocking passive network. 9 .

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