CN111682023A - Terahertz heterogeneous integrated chip - Google Patents
Terahertz heterogeneous integrated chip Download PDFInfo
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- CN111682023A CN111682023A CN202010523802.6A CN202010523802A CN111682023A CN 111682023 A CN111682023 A CN 111682023A CN 202010523802 A CN202010523802 A CN 202010523802A CN 111682023 A CN111682023 A CN 111682023A
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- 239000000758 substrate Substances 0.000 claims abstract description 68
- 229910000577 Silicon-germanium Inorganic materials 0.000 claims abstract description 47
- LEVVHYCKPQWKOP-UHFFFAOYSA-N [Si].[Ge] Chemical compound [Si].[Ge] LEVVHYCKPQWKOP-UHFFFAOYSA-N 0.000 claims abstract description 45
- 230000015572 biosynthetic process Effects 0.000 claims abstract description 17
- 238000003786 synthesis reaction Methods 0.000 claims abstract description 17
- 239000003990 capacitor Substances 0.000 claims abstract description 12
- 238000002156 mixing Methods 0.000 claims description 17
- 230000000903 blocking effect Effects 0.000 claims description 10
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims description 8
- 238000000034 method Methods 0.000 abstract description 12
- 230000010354 integration Effects 0.000 abstract description 7
- 239000004065 semiconductor Substances 0.000 abstract description 6
- 238000004088 simulation Methods 0.000 description 13
- 238000010586 diagram Methods 0.000 description 12
- 239000010453 quartz Substances 0.000 description 10
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 10
- JBRZTFJDHDCESZ-UHFFFAOYSA-N AsGa Chemical compound [As]#[Ga] JBRZTFJDHDCESZ-UHFFFAOYSA-N 0.000 description 7
- 238000006243 chemical reaction Methods 0.000 description 3
- 238000012986 modification Methods 0.000 description 2
- 230000004048 modification Effects 0.000 description 2
- 239000002356 single layer Substances 0.000 description 2
- 230000003321 amplification Effects 0.000 description 1
- 238000004891 communication Methods 0.000 description 1
- 238000001514 detection method Methods 0.000 description 1
- 238000002059 diagnostic imaging Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 238000001914 filtration Methods 0.000 description 1
- 238000007689 inspection Methods 0.000 description 1
- 239000000463 material Substances 0.000 description 1
- 238000003199 nucleic acid amplification method Methods 0.000 description 1
- 230000010355 oscillation Effects 0.000 description 1
- 230000000750 progressive effect Effects 0.000 description 1
- 238000000926 separation method Methods 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0207—Geometrical layout of the components, e.g. computer aided design; custom LSI, semi-custom LSI, standard cell technique
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
- H01L27/0611—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region
- H01L27/0641—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type
- H01L27/0676—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration integrated circuits having a two-dimensional layout of components without a common active region without components of the field effect type comprising combinations of diodes, or capacitors or resistors
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03D—DEMODULATION OR TRANSFERENCE OF MODULATION FROM ONE CARRIER TO ANOTHER
- H03D7/00—Transference of modulation from one carrier to another, e.g. frequency-changing
- H03D7/16—Multiple-frequency-changing
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- Condensed Matter Physics & Semiconductors (AREA)
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- General Engineering & Computer Science (AREA)
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Abstract
The application discloses terahertz is heterogeneous integrated chip now, includes: the device comprises a first silicon germanium substrate, a T-shaped power synthesis circuit and two to-be-synthesized circuits which are symmetrically arranged; the circuit to be synthesized comprises a capacitor, an inductor, a first filter and a frequency doubling diode which are sequentially connected through a microstrip line, the inductor is embedded in the first silicon germanium substrate, one pad of the frequency doubling diode is connected with the input end of the T-shaped power synthesis circuit through the microstrip line, and the other pad of the frequency doubling diode is grounded. The substrate in the chip is a first silicon germanium substrate, is a semiconductor process substrate and has a multilayer laminated structure, and the inductor is embedded in the first silicon germanium substrate, so that the occupied area of the first silicon germanium substrate is effectively reduced, and the volume of the terahertz heterogeneous integrated chip is reduced; in addition, because the first silicon germanium substrate is a semiconductor process substrate, the microstrip line used in cooperation can be as low as several microns, the occupied area can be reduced, and the integration level of the terahertz heterogeneous integrated chip is improved.
Description
Technical Field
The application relates to the technical field of terahertz heterogeneous integrated circuits, in particular to a terahertz heterogeneous integrated chip.
Background
The terahertz technology is a very important cross-front field and has important application in the fields of communication, radar, astronomy, medical imaging, biochemical identification, materials science, safety inspection and the like.
The terahertz wave is an electromagnetic wave in a frequency range of 0.1-10 THz, and the frequency doubling circuit is a circuit capable of realizing frequency conversion in a terahertz frequency range. At present, terahertz frequency doubling circuit chips are all based on quartz substrates, and various circuit elements such as diodes and filters are laid on the upper surfaces of the quartz substrates and are completely connected by microstrip lines. The quartz substrate is a completely solid single-layer plate-shaped substrate, various circuit elements are completely arranged on the surface of the quartz substrate, a large-area quartz substrate is needed for carrying, and on the other hand, a microstrip line used in cooperation with the quartz substrate is relatively thick and generally is tens of microns, so that the occupied area of the microstrip line is large, the size of the whole substrate is large, and the integration level is low. In some special cases, the application is limited when the chip volume is required.
Therefore, how to solve the above technical problems should be a great concern to those skilled in the art.
Disclosure of Invention
The application aims at providing a terahertz heterogeneous integrated chip so as to improve the integration level of the chip.
In order to solve the technical problem, the present application provides a terahertz heterogeneous integrated chip, including:
the device comprises a first silicon germanium substrate, a T-shaped power synthesis circuit and two to-be-synthesized circuits which are symmetrically arranged;
the circuit to be synthesized comprises a capacitor, an inductor, a first filter and a frequency doubling diode which are sequentially connected through a microstrip line, the inductor is embedded in the first silicon germanium substrate, one pad of the frequency doubling diode is connected with the input end of the T-shaped power synthesis circuit through the microstrip line, and the other pad of the frequency doubling diode is grounded.
Optionally, the frequency doubling diode is a GaAs schottky varactor.
Optionally, the method further includes:
the second silicon germanium substrate, the first input structure, the second input structure and the output structure;
the first input structure comprises a radio frequency GSG input end, a radio frequency matching circuit connected with the radio frequency GSG input end, and a blocking passive network arranged in the radio frequency matching circuit;
the second input structure comprises a local oscillator input end, a grounding end, a second filter and a mixing diode which are connected in sequence;
the output structure comprises an intermediate frequency filter matching circuit and an intermediate frequency GSG output end;
the output end of the radio frequency matching circuit and one bonding pad of the mixing diode are connected with the intermediate frequency filter matching circuit.
Optionally, the mixing diode is an APL-0P95 mixing diode.
Optionally, the second filter is a CMRCs low-pass filter.
Optionally, the first filter is a CMRCs filter.
Optionally, the terahertz heterogeneous integrated chip adopts a wave port.
Optionally, the blocking passive network is an i-shaped blocking passive network.
The utility model provides a terahertz is isomerism integrated chip now includes: the device comprises a first silicon germanium substrate, a T-shaped power synthesis circuit and two to-be-synthesized circuits which are symmetrically arranged; the circuit to be synthesized comprises a capacitor, an inductor, a first filter and a frequency doubling diode which are sequentially connected through a microstrip line, the inductor is embedded in the first silicon germanium substrate, one pad of the frequency doubling diode is connected with the input end of the T-shaped power synthesis circuit through the microstrip line, and the other pad of the frequency doubling diode is grounded.
Therefore, the substrate in the terahertz heterogeneous integrated chip is the first silicon germanium substrate which is a semiconductor process substrate and has a multilayer laminated structure, the inductor is embedded in the first silicon germanium substrate and does not need to be flatly laid on the surface of the first silicon germanium substrate, and therefore the occupied area of the first silicon germanium substrate is effectively reduced, and the volume of the terahertz heterogeneous integrated chip is reduced; in addition, because the first silicon germanium substrate is a semiconductor process substrate, the microstrip line used in the terahertz heterogeneous integrated chip can be as low as several microns, the occupied area can be reduced, the volume of the terahertz heterogeneous integrated chip is reduced, and the integration level of the terahertz heterogeneous integrated chip is improved. In addition, the first silicon germanium substrate has high-frequency characteristics, so that the terahertz heterogeneous integrated chip has higher frequency.
Drawings
For a clearer explanation of the embodiments or technical solutions of the prior art of the present application, the drawings needed for the description of the embodiments or prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present application, and for those skilled in the art, other drawings can be obtained according to these drawings without creative efforts.
Fig. 1 is a schematic diagram of a terahertz heterogeneous integrated chip provided in an embodiment of the present application;
FIG. 2 is a schematic structural diagram of a GaAs Schottky varactor;
FIG. 3 is a schematic block diagram of a circuit;
FIG. 4 is a circuit diagram of a single-pass simulation;
FIG. 5 is a diagram of a frequency doubling diode placement section and junction model;
FIG. 6 is a diagram of two-way simulated frequency-doubled output power;
FIG. 7 is a diagram of two-way simulated frequency doubling efficiency;
fig. 8 is a schematic diagram of another terahertz heterogeneous integrated chip provided in the embodiment of the present application;
FIG. 9 is a schematic diagram of the structure of an APL-0P95 mixer diode;
fig. 10 is a graph of simulated conversion loss of a mixer circuit.
Detailed Description
In order that those skilled in the art will better understand the disclosure, the following detailed description will be given with reference to the accompanying drawings. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.
In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways than those specifically described and will be readily apparent to those of ordinary skill in the art without departing from the spirit of the present invention, and therefore the present invention is not limited to the specific embodiments disclosed below.
As described in the background section, the conventional chip employs a quartz substrate, which is a single-layer plate-shaped substrate, all circuit elements are tiled on the surface of the quartz substrate, and the occupied area is large, and the microstrip line used in cooperation with the quartz substrate is also relatively thick and large, resulting in a large volume and low integration level of the conventional chip.
In view of this, the present application provides a terahertz heterogeneous integrated chip, please refer to fig. 1, where fig. 1 is a schematic diagram of a terahertz heterogeneous integrated chip provided in an embodiment of the present application, and the terahertz heterogeneous integrated chip includes:
the device comprises a first silicon germanium substrate 1, a T-shaped power synthesis circuit 2 and two circuits to be synthesized 3 which are symmetrically arranged;
the circuit to be synthesized 3 comprises a capacitor 31, an inductor 32, a first filter 33 and a frequency doubling diode 34 which are sequentially connected through a microstrip line 4, the inductor 32 is embedded in the first silicon germanium substrate 1, one pad of the frequency doubling diode 34 is connected with the input end of the T-shaped power synthesis circuit 2 through the microstrip line 4, and the other pad of the frequency doubling diode 34 is grounded 35.
The first silicon germanium substrate 1, the T-shaped power synthesis circuit 2 and the two to-be-synthesized circuits 3 which are symmetrically arranged form a frequency doubling circuit together.
In this embodiment, the capacitor 31 and the inductor 32 are a dc capacitor 31 and a dc inductor 32, respectively. The inductor 32 is spirally embedded in the first silicon germanium substrate 1, and a connection port of the inductor 32 is disposed on the surface of the first silicon germanium substrate 1 to achieve connection with the capacitor 31 and the first filter 33.
The capacitors 31 in the two symmetrically arranged circuits to be synthesized 3 are connected to a dc power supply with the same voltage value (e.g., 5 volts, 2.5 volts, etc.), that is, a dc power supply division structure. The direct current enters a first filter 33 through a capacitor 31 and an inductor 32, is input to a frequency doubling diode 34 after being matched by a microstrip line 4, is output by the frequency doubling diode 34, enters a T-shaped power synthesis circuit 2 after being matched by the microstrip line 4, and is subjected to power synthesis by the T-shaped power synthesis circuit 2; the capacitor 31 and the inductor 32 prevent the input signal from leaking from the power supply terminal.
The T-shaped power synthesis circuit 2 is composed of a microstrip line 4, the width and the length of the microstrip line 4 can be adjusted according to power requirements, and the output end is connected with a GSG (ground-signal-ground) circuit 5.
Optionally, the first filter 33 is a CMRCs filter, the first filter 33 is also composed of microstrip lines 4, and since the microstrip lines 4 used in cooperation with the first silicon germanium substrate 1 are thinner and have only a few micrometers, the volume of the first filter 33 is also reduced.
The frequency doubling diode 34 is a GaAs (gallium arsenide) schottky varactor, and a schematic structural diagram of the GaAs schottky varactor is shown in fig. 2. Because the GaAs Schottky diode still has a great difference in the terahertz frequency band, the generation and detection of mW-level 340GHz terahertz signals are difficult to realize, so that the separation mode of combining the GaAs Schottky varactor core and the first SiGe substrate circuit becomes possible by utilizing the SiGe front chip (170GHz) for driving.
Next, simulation of the terahertz heterogeneous integrated chip in this embodiment is described.
First, the single-pass simulation will be described. In this embodiment, the substrate is the first silicon germanium substrate 1, a pure large-size simulation mode on the quartz substrate can be abandoned, a mode of combining the inductor 32, the capacitor 31 and the microstrip line 4 is adopted to prevent the leakage of the input signal from the power supply end, the circuit schematic block diagram is shown in fig. 3, the single-circuit simulation circuit is shown in fig. 4 after the input multiplexer structure is added, and a 170GHz frequency multiplication amplification chip simulation file based on silicon germanium is substituted in the joint simulation process. The established section and junction model of the frequency doubling diode 34 is shown in fig. 5. Second, two-way simulation is introduced. The double-circuit simulation is based on the single-circuit simulation result, and on the basis, a double-circuit T-shaped power synthesis circuit 2 is added to be combined with a GSG circuit, so that the frequency doubling circuit shown in the figure 1 is finally obtained. The double-circuit simulated frequency multiplication output power is shown in fig. 6, the double-circuit simulated frequency multiplication efficiency is shown in fig. 7, and the efficiency is reduced compared with that of the single circuit, mainly because the synthesis efficiency of the double circuit is not 100%, and certain power loss is caused to the output power.
Preferably, the terahertz heterogeneous integrated chip adopts a wave port, and provides a more accurate simulation means for integrated circuit simulation.
The substrate in the terahertz heterogeneous integrated chip is a first silicon germanium substrate 1, the first silicon germanium substrate 1 is a semiconductor process substrate and has a multilayer laminated structure, and the inductor 32 is embedded in the first silicon germanium substrate 1 and does not need to be flatly laid on the surface of the first silicon germanium substrate 1, so that the occupied area of the first silicon germanium substrate 1 is effectively reduced, and the volume of the terahertz heterogeneous integrated chip is reduced; in addition, because the first silicon germanium substrate 1 is a semiconductor process substrate, the microstrip line 4 used in the terahertz heterogeneous integrated chip can be as low as several microns, the occupied area can be reduced, the volume of the terahertz heterogeneous integrated chip is reduced, and the integration level of the terahertz heterogeneous integrated chip is improved. In addition, the first silicon germanium substrate 1 has high-frequency characteristics, so that the terahertz heterogeneous integrated chip has higher frequency.
On the basis of the above embodiments, in an embodiment of the present application, please refer to fig. 8, the terahertz heterogeneous integrated chip further includes:
a second silicon germanium substrate 6, a first input structure 7, a second input structure 8, an output structure 9;
the first input structure 7 comprises a radio frequency GSG input end 71, a radio frequency matching circuit 72 connected with the radio frequency GSG input end 71, and a DC blocking passive network 73 arranged in the radio frequency matching circuit 72;
the second input structure 8 includes a local oscillator input end 81, a ground end 82, a second filter 83, and a mixing diode 84, which are connected in sequence;
the output structure 9 comprises an intermediate frequency filter matching circuit 91 and an intermediate frequency GSG output 92;
the output of the rf matching circuit 72 and a pad of the mixing diode 84 are connected to the if filter matching circuit 91.
The second silicon germanium substrate 6, the first input structure 7, the second input structure 8 and the output structure 9 form a mixer circuit. The first silicon germanium substrate 1 and the second silicon germanium substrate 6 enable the terahertz heterogeneous integrated chip to have frequency doubling and frequency mixing performance, the transmitting and receiving functions of the terahertz heterogeneous integrated chip are achieved, the frequency doubling circuit is used for achieving transmitting, and the frequency mixing circuit is used for achieving receiving. The first silicon germanium substrate 1 and the second silicon germanium substrate 6 are both silicon germanium substrates, and the first and the second in the application are silicon germanium substrates in order to distinguish a frequency doubling circuit and a frequency mixing circuit respectively.
The radio frequency matching circuit 72, the ground terminal 82, the second filter 83 and the intermediate frequency filter matching circuit 91 on the second silicon germanium substrate 6 are all composed of microstrip lines of several microns, so that the occupied area of the radio frequency matching circuit 72, the ground terminal 82, the second filter 83 and the intermediate frequency filter matching circuit 91 on the second silicon germanium substrate is reduced, the size of the frequency mixing circuit is reduced, the terahertz heterogeneous integrated chip has frequency mixing performance, the size of the terahertz heterogeneous integrated chip is reduced, and the integration level is improved.
Specifically, the second filter 83 is a CMRCs low-pass filter, and performs filtering processing on the current sequentially passing through the local oscillation input terminal 81 and the ground terminal 82, and the filtered current enters the mixing diode 84 and is output to the intermediate frequency filter matching circuit 91 by the mixing diode 84.
Optionally, the dc blocking passive network 73 is an i-shaped dc blocking passive network 73, and the i-shaped dc blocking passive network 73 is substantially a slot in the rf matching circuit 72.
Optionally, the mixing diode 84 is an APL-0P95 mixing diode 84, see fig. 9.
The simulation method of the mixer circuit is similar to that of the frequency multiplier circuit in the above embodiments, and details are not repeated here. The simulated frequency conversion loss of the mixer circuit is shown in fig. 10, the simulated single-sideband loss is 8.8dB @160GHz-180GHz, and the corresponding noise figure is 5 dB.
The embodiments are described in a progressive manner, each embodiment focuses on differences from other embodiments, and the same or similar parts among the embodiments are referred to each other. The device disclosed by the embodiment corresponds to the method disclosed by the embodiment, so that the description is simple, and the relevant points can be referred to the method part for description.
The terahertz heterogeneous integrated chip provided by the application is described in detail above. The principles and embodiments of the present application are explained herein using specific examples, which are provided only to help understand the method and the core idea of the present application. It should be noted that, for those skilled in the art, it is possible to make several improvements and modifications to the present application without departing from the principle of the present application, and such improvements and modifications also fall within the scope of the claims of the present application.
Claims (8)
1. A terahertz heterogeneous integrated chip is characterized by comprising:
the device comprises a first silicon germanium substrate, a T-shaped power synthesis circuit and two to-be-synthesized circuits which are symmetrically arranged;
the circuit to be synthesized comprises a capacitor, an inductor, a first filter and a frequency doubling diode which are sequentially connected through a microstrip line, the inductor is embedded in the first silicon germanium substrate, one pad of the frequency doubling diode is connected with the input end of the T-shaped power synthesis circuit through the microstrip line, and the other pad of the frequency doubling diode is grounded.
2. The terahertz heterogeneous integrated chip of claim 1, wherein the frequency doubling diode is a GaAs schottky varactor.
3. The terahertz heterogeneous integrated chip of claim 1 or 2, further comprising:
the second silicon germanium substrate, the first input structure, the second input structure and the output structure;
the first input structure comprises a radio frequency GSG input end, a radio frequency matching circuit connected with the radio frequency GSG input end, and a blocking passive network arranged in the radio frequency matching circuit;
the second input structure comprises a local oscillator input end, a grounding end, a second filter and a mixing diode which are connected in sequence;
the output structure comprises an intermediate frequency filter matching circuit and an intermediate frequency GSG output end;
the output end of the radio frequency matching circuit and one bonding pad of the mixing diode are connected with the intermediate frequency filter matching circuit.
4. The terahertz heterogeneous integrated chip of claim 3, wherein the mixer diode is an APL-0P95 mixer diode.
5. The terahertz heterogeneous integrated chip of claim 4, wherein the second filter is a CMRCs low pass filter.
6. The terahertz heterogeneous integrated chip of claim 5, wherein the first filter is a CMRCs filter.
7. The terahertz heterogeneous integrated chip of claim 6, wherein the terahertz heterogeneous integrated chip employs a wave port.
8. The terahertz heterogeneous integrated chip of claim 7, wherein the blocking passive network is an i-shaped blocking passive network.
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104467681A (en) * | 2014-11-06 | 2015-03-25 | 电子科技大学 | Terahertz subharmonic frequency multiplication and mixing device based on monolithic integrated circuit |
| CN105141260A (en) * | 2015-08-20 | 2015-12-09 | 电子科技大学 | 420GHz 10th harmonic frequency mixer |
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| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN104467681A (en) * | 2014-11-06 | 2015-03-25 | 电子科技大学 | Terahertz subharmonic frequency multiplication and mixing device based on monolithic integrated circuit |
| CN105141260A (en) * | 2015-08-20 | 2015-12-09 | 电子科技大学 | 420GHz 10th harmonic frequency mixer |
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