CN111681957B - Etching method and manufacturing method of semiconductor device - Google Patents
Etching method and manufacturing method of semiconductor device Download PDFInfo
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- CN111681957B CN111681957B CN202010723935.8A CN202010723935A CN111681957B CN 111681957 B CN111681957 B CN 111681957B CN 202010723935 A CN202010723935 A CN 202010723935A CN 111681957 B CN111681957 B CN 111681957B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67011—Apparatus for manufacture or treatment
- H01L21/67017—Apparatus for fluid treatment
- H01L21/67063—Apparatus for fluid treatment for etching
- H01L21/67069—Apparatus for fluid treatment for etching for drying etching
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
- H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
- H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
- H01L21/321—After treatment
- H01L21/3213—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer
- H01L21/32133—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only
- H01L21/32135—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only
- H01L21/32138—Physical or chemical etching of the layers, e.g. to produce a patterned layer from a pre-deposited extensive layer by chemical means only by vapour etching only pre- or post-treatments, e.g. anti-corrosion processes
Abstract
The invention provides an etching method and a manufacturing method of a semiconductor device. Because the polymer absorbs part of the first etching gas, when the anti-reflection layer is etched by the first etching gas, the etching of the first etching gas on the patterned photoresist layer can be reduced, namely, the etching amount of the first etching gas on the patterned photoresist layer is reduced, so that the loss of the patterned photoresist layer can be reduced, and the problem that the side wall of the metal structure layer is seriously damaged by the loss of the photoresist can be avoided in the manufacturing process of the semiconductor device.
Description
Technical Field
The invention relates to the technical field of semiconductors, in particular to an etching method and a manufacturing method of a semiconductor device.
Background
In the back end of line (BEOL) process of semiconductor device fabrication, a first metal layer (M1) is typically formed on a semiconductor device such as a MOS transistor, the first metal layer is electrically connected to the semiconductor device through a metal plug (usually a W plug), a second metal layer (M2) is then formed on the first metal layer, and a third metal layer (M3) and a … x metal layer (Mx) may also be sequentially formed on the second metal layer, each of the metal layers including an interlayer dielectric layer and a metal wire embedded in the interlayer dielectric layer.
Methods of forming a metal layer generally include forming a metal layer on a substrate, then forming an anti-reflective layer (BARC) over the metal layer, and then forming a patterned photoresist layer over the anti-reflective layer. Since the anti-reflective layer (BARC) is located between the metal layer and the photoresist layer, the anti-reflective layer needs to be etched before etching the metal layer. The method for etching the anti-reflection layer generally comprises the steps of placing a substrate in a process chamber, introducing etching gas into the process chamber, and etching the anti-reflection layer by the etching gas, wherein the etching gas can etch the photoresist layer and remove the photoresist layer with most thickness in the etching process, namely, the loss of the photoresist layer is serious, and after the photoresist layer with most thickness is removed, the protective effect of the photoresist layer on the metal layer can be influenced when the metal layer is subsequently etched, so that the side wall of the metal layer can be damaged. Therefore, how to provide an etching method capable of solving the problem of serious photoresist layer loss is a problem to be solved by the person skilled in the art.
Disclosure of Invention
The invention aims to provide an etching method and a manufacturing method of a semiconductor device, which are used for solving the problem of serious loss of a photoresist layer in the etching process and avoiding the problem of metal layer side wall damage caused by serious loss of the photoresist layer.
In order to solve the above technical problem, the present invention provides an etching method, including:
providing etching equipment, wherein the etching equipment comprises a process cavity;
forming a polymer on a sidewall within the process chamber;
placing a semiconductor substrate in the process chamber, wherein a metal structure layer, an anti-reflection layer and a graphical photoresist layer are sequentially formed on the semiconductor substrate;
introducing a first etching gas into the process chamber, and enabling the first etching gas to flow on the side wall in the process chamber, so that the polymer absorbs part of the first etching gas;
and etching the anti-reflection layer by using the rest of the first etching gas by using the patterned photoresist layer as a mask, and stopping on the surface of the metal structure layer.
Optionally, in the etching method, when the anti-reflection layer is etched, the etching time is 30-40 s.
Optionally, in the etching method, a method for forming the polymer on the sidewall in the process chamber is;
arranging a substrate with a film layer in the process chamber;
introducing a second etching gas into the process chamber;
and performing an etching process on the substrate through the second etching gas so that the second etching gas reacts with the film layer to form the polymer.
Optionally, in the etching method, the first etching gas is oxygen, and the second etching gas is at least one of carbon tetrafluoride, nitrogen, and hydrogen.
Optionally, in the etching method, the film layer is at least one of an oxide layer, a nitride layer, and a oxynitride layer.
Based on the same inventive concept, the present invention also provides a method for manufacturing a semiconductor device, the method comprising:
providing a semiconductor substrate, wherein a metal structure layer is formed on the semiconductor substrate;
sequentially forming an anti-reflection layer and a graphical photoresist layer on the metal structure layer, wherein part of the anti-reflection layer is exposed out of the graphical photoresist layer;
etching the exposed anti-reflection layer by the etching method to expose part of the metal structure layer; and the number of the first and second groups,
and etching the exposed metal structure layer to form an opening in the metal structure layer.
Optionally, in the manufacturing method of the semiconductor device, the metal structure layer includes a bottom adhesive layer, a metal layer located on a surface of the bottom adhesive layer, and a top adhesive layer located on a surface of the metal layer.
Optionally, in the manufacturing method of the semiconductor device, the bottom adhesion layer includes a first titanium layer and a first titanium nitride layer covering the first titanium layer, the top adhesion layer includes a second titanium layer and a second titanium nitride layer covering the second titanium layer, and the metal layer is made of aluminum.
Optionally, in the method for manufacturing a semiconductor device, the thickness of the patterned photoresist layer is 300 to 600 angstroms.
Optionally, in the method for manufacturing a semiconductor device, after the etching of the exposed anti-reflection layer and before the etching of the exposed metal structure layer, the method for manufacturing a semiconductor device further includes performing a cleaning process on the semiconductor substrate.
In the etching method and the manufacturing method of the semiconductor device, the polymer is formed on the side wall in the process cavity, the first etching gas is introduced into the process cavity, and the first etching gas flows on the side wall in the process cavity, so that the polymer absorbs part of the first etching gas. Because the polymer absorbs part of the first etching gas, when the anti-reflection layer is etched by the first etching gas, the etching of the first etching gas on the patterned photoresist layer can be reduced, namely, the etching amount of the first etching gas on the patterned photoresist layer can be reduced, so that the loss of the patterned photoresist layer can be reduced, and the problem that the side wall of the metal structure layer is seriously damaged by the loss of the photoresist can be avoided in the manufacturing process of the semiconductor device.
Drawings
FIG. 1 is a schematic flow chart of an etching method according to an embodiment of the present invention;
fig. 2 is a schematic flow chart of a method for manufacturing a semiconductor device according to an embodiment of the present invention;
fig. 3-5 are schematic structural diagrams formed in a method of manufacturing a semiconductor device according to an embodiment of the present invention;
wherein the reference numerals are as follows:
100-a semiconductor substrate; 110-a metal structure layer; 111-a first titanium layer; 112-a first titanium nitride layer; 113-a metal layer; 114-a second titanium layer; 115-second titanium nitride layer; 120-an anti-reflection layer; 130-a patterned photoresist layer; 140-opening.
Detailed Description
The etching method and the manufacturing method of the semiconductor device according to the present invention will be described in detail with reference to the accompanying drawings and specific embodiments. The advantages and features of the present invention will become more apparent from the following description. It is to be noted that the drawings are in a very simplified form and are not to precise scale, which is merely for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Fig. 1 is a schematic flow chart of an etching method according to an embodiment of the invention. As shown in fig. 1, the present invention provides an etching method, including:
step S1: providing etching equipment, wherein the etching equipment comprises a process cavity;
step S2: forming a polymer on a sidewall within the process chamber;
step S3: placing a semiconductor substrate in the process chamber, wherein a metal structure layer, an anti-reflection layer and a graphical photoresist layer are sequentially formed on the semiconductor substrate;
step S4: introducing a first etching gas into the process chamber, and enabling the first etching gas to flow on the side wall in the process chamber, so that the polymer absorbs part of the first etching gas;
step S5: and etching the anti-reflection layer by using the photoresist layer as a mask through the residual first etching gas, and stopping on the surface of the metal structure layer.
Next, the above steps will be described in more detail.
In step S1, an etching apparatus is provided, the etching apparatus including a process chamber. The etching device may be a dry etching device.
In step S2, a polymer is formed on the sidewalls within the process chamber. Specifically, the method for forming the polymer on the side wall in the process chamber comprises the steps of arranging a substrate with a film layer in the process chamber; introducing a second etching gas into the process chamber; and performing an etching process on the semiconductor substrate through the second etching gas so that the second etching gas reacts with the film layer to form the polymer, wherein the substrate can be a silicon substrate, a germanium substrate or a germanium-silicon substrate and the like. The second etching gas is at least one of carbon gas, nitrogen gas and hydrogen gas, for example, C4F8, CH2F2, CF4, CO, etc., but is not limited thereto, and may be a mixed gas of carbon gas and oxygen gas. The film layer may be at least one of an oxide layer, a nitride layer, and a oxynitride layer, for example, a silicon dioxide layer, a nitrogen dioxide layer, and the like.
In step S3, a semiconductor substrate is placed in the process chamber, and a metal structure layer, an anti-reflection layer and a patterned photoresist layer are sequentially formed on the semiconductor substrate. Specifically, the semiconductor substrate may be, for example, a silicon-on-insulator (SOI) substrate, a bulk silicon (bulk silicon) substrate, a germanium substrate, a silicon germanium substrate, an indium phosphide (InP) substrate, a gallium arsenide (GaAs) substrate, a germanium-on-insulator substrate, or the like. A groove is arranged in the patterned photoresist, and a part of the anti-reflection layer is exposed out of the groove. Specifically, after the polymer is formed on the side wall in the process chamber, the substrate in the process chamber is taken out; the semiconductor substrate is then placed in the process chamber.
In step S4, a first etching gas is introduced into the process chamber, and the first etching gas flows on the sidewall of the process chamber, so that the polymer absorbs part of the first etching gas. The first etching gas can be oxygen, so that the first etching gas has a good etching effect when the anti-reflection layer is etched. Further, since the first etching gas is oxygen, it can reduce the generation of polymers on the semiconductor substrate. Further, during the etching process, the first etching gas can react with the polymer and can remove the polymer on the inner side wall of the process chamber, so that the subsequent process step of removing the polymer can be reduced.
Preferably, the gas flow rate of the first etching gas is 150sccm to 300 sccm. If the gas flow of the first etching gas is too small, the etching is easily too slow in the subsequent etching process, the etching time is increased, and even the first etching gas cannot flow on the sidewall in the process chamber, and if the gas flow is too large, the stability and uniformity of the etching rate are easily deteriorated, so that the gas flow of the first etching gas is set to be 150sccm to 300sccm in this embodiment.
In step S5, the anti-reflection layer is etched by the remaining first etching gas with the photoresist layer as a mask, and the surface of the metal structure layer is stopped, that is, the exposed anti-reflection layer is removed. Because the polymer absorbs part of the first etching gas, when the anti-reflection layer is etched, the etching of the first etching gas on the patterned photoresist layer can be reduced, namely, the etching amount of the first etching gas on the patterned photoresist layer is reduced, so that the loss of the patterned photoresist layer can be reduced, and further, in the subsequent process of etching the metal structure layer, the problem that the side wall of the metal structure layer is seriously damaged by the loss of the photoresist can be avoided.
When the anti-reflection layer is etched, the etching time can be 30-40 s. The method can avoid the problems that the loss of the patterned photoresist layer is increased due to too long etching time and the anti-reflection layer can not be removed due to too short etching time.
Based on the same inventive concept, the invention also provides a manufacturing method of the semiconductor device.
Fig. 2 is a schematic flow chart illustrating a method for manufacturing a semiconductor device according to an embodiment of the invention. As shown in fig. 2, the method of manufacturing the semiconductor device includes:
step S10: providing a semiconductor substrate, wherein a metal structure layer is formed on the semiconductor substrate;
step S20: sequentially forming an anti-reflection layer and a graphical photoresist layer on the metal structure layer, wherein part of the anti-reflection layer is exposed out of the graphical photoresist layer;
step S30: etching the exposed anti-reflection layer by the etching method to expose part of the metal structure layer; and the number of the first and second groups,
step S40: and etching the exposed metal structure layer to form an opening in the metal structure layer.
Next, the present application will describe the above steps in more detail in conjunction with the accompanying drawings.
Referring to fig. 3 to 5, fig. 3 to 5 are schematic structural diagrams formed in a method for manufacturing a semiconductor device according to an embodiment of the present invention.
In step S10, as shown in fig. 3, a semiconductor substrate 100 is provided, and a metal structure layer 110 is formed on the semiconductor substrate 100.
Specifically, the metal structure layer 110 includes a bottom adhesive layer, a metal layer 113 located on the surface of the bottom adhesive layer, and a top adhesive layer located on the surface of the metal layer 113. The metal layer 130 can be protected by a structure in which the metal layer is sandwiched by the bottom adhesive layer and the top adhesive layer, so that the reliability of the metal structure layer can be increased, and the reliability of the semiconductor device can be further increased. More specifically, the bottom adhesion layer includes a first titanium layer 111 and a first titanium nitride layer 112 covering the first titanium layer 111, the top adhesion layer includes a second titanium layer 114 and a second titanium nitride layer 115 covering the second titanium layer 114, the metal layer 113 is made of aluminum, but is not limited thereto, and the metal layer may also be made of other conductive materials known to those skilled in the art, such as copper.
In step S20, sequentially forming an anti-reflection layer 120(BARC) and a patterned photoresist layer 130 on the metal structure layer 110, wherein a trench is formed in the patterned photoresist layer, and the trench exposes a portion of the anti-reflection layer, i.e., the patterned photoresist layer 130 exposes a portion of the anti-reflection layer 120; the anti-reflective layer 120 may be organic or inorganic. Preferably, the thickness of the patterned photoresist layer 130 may be 300 to 600 angstroms. So as to avoid the damage of the metal layer 113 caused by the too thin photoresist layer during the subsequent etching, and avoid the too thick photoresist layer not being easily removed after the etching.
Further, before the anti-reflection layer 120 is formed, a blocking layer may be formed on the metal structure layer 110, and the blocking layer may be, for example, a silicon nitride layer or a silicon oxide layer, so as to prevent the metal structure layer 110 from being damaged due to over-etching of the anti-reflection layer 120, and in a subsequent photolithography process, the anti-reflection layer may play a role in reducing a standing wave effect, thereby improving photolithography quality.
In step S30, as shown in fig. 4, the exposed anti-reflection layer 120 is etched by the etching method of the present invention to expose a portion of the metal structure layer 110. Specifically, since the polymer absorbs a portion of the first etching gas, when the anti-reflection layer 120 is etched, the etching of the patterned photoresist layer 130 by the etching gas can be reduced, that is, the etching amount of the patterned photoresist layer 130 by the first etching gas can be reduced, so that the loss of the patterned photoresist layer 130 can be reduced.
Further, after the etching of the exposed anti-reflection layer 120, the method for manufacturing the semiconductor device further includes performing a cleaning process on the semiconductor substrate 100. The polymer on the global surface of the semiconductor substrate 100 can be cleaned through the cleaning process, and the polymer is prevented from being peeled off into the semiconductor substrate 100 in a subsequent etching process, so that the semiconductor substrate 100 is prevented from being polluted by the polymer. The cleaning process may be a wet cleaning process, and the cleaning solution used in the cleaning process may be one or more combinations of a hydrochloric acid solution, a perchloric acid solution, a hydrofluoric acid solution and a nitric acid solution, but is not limited thereto, and other cleaning solutions known to those skilled in the art, such as ozone water, may also be used.
In step S40, as shown in fig. 5, the exposed metal structure layer 110 is etched to form an opening 140 in the metal structure layer 110. The opening 140 exposes a portion of the semiconductor substrate 100, i.e., the opening 140 penetrates the metal structure layer 110 in the thickness direction. An isolation dielectric layer may be subsequently filled in the opening 140 to form a metal interconnection structure. Specifically, when the anti-reflection layer 120 is etched, the patterned photoresist layer 130 may react with an etching gas, so that a compound may be formed on the sidewall of the metal structure layer 110, and the compound may protect the sidewall of the metal structure layer 110, thereby preventing the sidewall of the metal structure layer 110 from being damaged during the etching process.
In summary, in the etching method and the manufacturing method provided by the invention, the polymer is formed on the side wall in the process chamber, the first etching gas is introduced into the process chamber, and the first etching gas flows on the side wall in the process chamber, so that the polymer absorbs part of the first etching gas. Because the polymer absorbs part of the first etching gas, when the anti-reflection layer is etched by the first etching gas, the etching of the first etching gas on the patterned photoresist layer can be reduced, namely, the etching amount of the first etching gas on the patterned photoresist layer is reduced, so that the loss of the patterned photoresist layer can be reduced, and the problem that the side wall of the metal structure layer is seriously damaged by the loss of the photoresist can be avoided in the manufacturing process of the semiconductor device.
The above description is only for the purpose of describing the preferred embodiments of the present invention, and is not intended to limit the scope of the present invention, and any variations and modifications made by those skilled in the art based on the above disclosure are within the scope of the appended claims.
Claims (10)
1. An etching method, characterized in that the etching method comprises:
providing etching equipment, wherein the etching equipment comprises a process cavity;
forming a polymer on a sidewall within the process chamber;
placing a semiconductor substrate in the process chamber, wherein a metal structure layer, an anti-reflection layer and a graphical photoresist layer are sequentially formed on the semiconductor substrate;
introducing a first etching gas into the process chamber, and enabling the first etching gas to flow on the side wall in the process chamber, so that the polymer absorbs part of the first etching gas;
and etching the anti-reflection layer by using the rest of the first etching gas by using the patterned photoresist layer as a mask, and stopping on the surface of the metal structure layer.
2. The etching method according to claim 1, wherein the etching time is 30s to 40s when the anti-reflection layer is etched.
3. The etching method according to claim 2, wherein the polymer is formed on the sidewall in the process chamber by;
arranging a substrate with a film layer in the process chamber;
introducing a second etching gas into the process chamber;
and performing an etching process on the substrate through the second etching gas so that the second etching gas reacts with the film layer to form the polymer.
4. The etching method according to claim 3, wherein the first etching gas is oxygen gas, and the second etching gas is at least one of carbon tetrafluoride, nitrogen gas, and hydrogen gas.
5. The etching method according to claim 3, wherein the film is at least one of an oxide layer, a nitride layer, and a oxynitride layer.
6. A method for manufacturing a semiconductor device, comprising:
providing a semiconductor substrate, wherein a metal structure layer is formed on the semiconductor substrate;
sequentially forming an anti-reflection layer and a graphical photoresist layer on the metal structure layer, wherein part of the anti-reflection layer is exposed out of the graphical photoresist layer;
etching the exposed anti-reflection layer by the etching method according to any one of claims 1 to 5 to expose a part of the metal structure layer; and the number of the first and second groups,
and etching the exposed metal structure layer to form an opening in the metal structure layer.
7. The method according to claim 6, wherein the metal structure layer comprises a bottom adhesive layer, a metal layer on the surface of the bottom adhesive layer, and a top adhesive layer on the surface of the metal layer.
8. The method for manufacturing a semiconductor device according to claim 7, wherein the bottom adhesion layer comprises a first titanium layer and a first titanium nitride layer covering the first titanium layer, wherein the top adhesion layer comprises a second titanium layer and a second titanium nitride layer covering the second titanium layer, and wherein the metal layer is made of aluminum.
9. The method for manufacturing a semiconductor device according to claim 6, wherein the thickness of the patterned photoresist layer is 300 to 600 angstroms.
10. The manufacturing method of a semiconductor device according to claim 6, wherein after etching the exposed anti-reflection layer and before etching the exposed metal structure layer, the manufacturing method of a semiconductor device further comprises performing a cleaning process on the semiconductor substrate.
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| CN112374456B (en) * | 2020-11-12 | 2024-01-23 | 上海华虹宏力半导体制造有限公司 | Method for manufacturing MEMS device |
| CN112435923B (en) * | 2020-11-27 | 2022-08-16 | 华虹半导体(无锡)有限公司 | Etching process method for multi-product mixed production |
| CN113140505B (en) * | 2021-03-18 | 2023-08-11 | 上海华力集成电路制造有限公司 | Method for manufacturing through hole |
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| US6805952B2 (en) * | 2000-12-29 | 2004-10-19 | Lam Research Corporation | Low contamination plasma chamber components and methods for making the same |
| JP2002359229A (en) * | 2001-06-01 | 2002-12-13 | Mitsubishi Electric Corp | Method and apparatus for manufacturing semiconductor device |
| JP3445584B2 (en) * | 2001-08-10 | 2003-09-08 | 沖電気工業株式会社 | Anti-reflection coating etching method |
| JP4911936B2 (en) * | 2005-09-09 | 2012-04-04 | 東京エレクトロン株式会社 | Plasma ashing method |
| CN103515176A (en) * | 2012-06-19 | 2014-01-15 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Seasoning method and etching method |
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| CN105957792A (en) * | 2016-06-30 | 2016-09-21 | 上海华力微电子有限公司 | Etching method of semiconductor structure |
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