CN113140505B - Method for manufacturing through hole - Google Patents
Method for manufacturing through hole Download PDFInfo
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- CN113140505B CN113140505B CN202110292266.8A CN202110292266A CN113140505B CN 113140505 B CN113140505 B CN 113140505B CN 202110292266 A CN202110292266 A CN 202110292266A CN 113140505 B CN113140505 B CN 113140505B
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2221/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof covered by H01L21/00
- H01L2221/10—Applying interconnections to be used for carrying current between separate components within a device
- H01L2221/1005—Formation and after-treatment of dielectrics
- H01L2221/101—Forming openings in dielectrics
Abstract
The invention discloses a method for manufacturing a through hole, which comprises the following steps: and step one, sequentially forming a hard mask layer, a dielectric anti-reflection layer, a bottom anti-reflection layer and photoresist. And secondly, patterning the photoresist and forming a first opening. Step three, performing first etching to transfer the pattern into the bottom anti-reflection layer and the dielectric anti-reflection layer and form a second opening; the etching gas for the first etching comprises non-sharp gas and sharp gas, and the critical dimension of the second opening is adjusted by adjusting the gas content of the non-sharp gas. And step four, etching the hard mask layer and the interlayer film in sequence to transfer the pattern downwards and form a through hole opening in the interlayer film. The invention can improve the stability of the critical dimension of the through hole, thereby preventing the problem of product yield caused by the deviation of the critical dimension of the through hole.
Description
Technical Field
The present invention relates to a method for manufacturing a semiconductor integrated circuit, and more particularly, to a method for manufacturing a through-hole (CT).
Background
In semiconductor processing, via etching (CT-ET) is a critical technique for connecting front-end devices to back-end metal interconnects. Plays a role in carrying forward and after starting. Because of the high aspect ratio of the via, the material defining the via, the size of the etched via, and the like are all strictly defined. The deviation of the etched through holes can directly influence the filling of the subsequent tungsten, so that the resistance value of the metal becomes high, and even the metal is disconnected. Affecting the yield of the product. The size of the tungsten via hole always changes with the change of the duration and period of the process. There are generally three main ways to control the dimensional stability of tungsten vias:
1) The size of the tungsten through hole in etching is controlled by increasing or decreasing the exposure size of the photoresist through hole, but the shape of the photoresist is changed when the size of the photoresist through hole is changed by energy. The exposure dimension of the photoresist through hole can be adjusted by the critical dimension after photoresist development obtained by post lithography inspection (ADI). The method is determined by: which affects the stability of the lithographic exposure conditions.
2) The size of the through hole is adjusted by adjusting the content of oxygen in the etching step, and the etching step comprises etching a bottom anti-reflection layer (BARC) and a dielectric anti-reflection layer (DARC) at the bottom of the photoresist and etching an interlayer film (ILD). However, oxygen is relatively sharp, and the flow rate is regulated to be 0.1-0.2 sccm, which can lead to insufficient regulation stability. It is also difficult to control the size of the tungsten via. In addition, the method is also easily influenced by the number of times of etching the cavity. The etching chamber time is the total time of the etching process that has been performed in the reaction chamber of the etching apparatus.
3) The power (power) in the reaction cavity of the etching equipment is regulated and controlled, but the trend of equipment regulation and control can change along with the change of cavity material pieces, so that the fixed regularity is extremely difficult to find out; it is important to maintain the size of the tungsten via hole stable.
Disclosure of Invention
The invention aims to provide a manufacturing method of a through hole, which can improve the stability of the critical dimension of the through hole, thereby preventing the problem of product yield caused by the critical dimension deviation of the through hole.
In order to solve the technical problems, the manufacturing method of the through hole provided by the invention comprises the following steps:
and firstly, sequentially forming a hard mask layer, a dielectric anti-reflection layer (DARC), a bottom anti-reflection layer (BARC) and Photoresist (PR) on the surface of the interlayer film on which the through holes are required to be formed.
And secondly, patterning the photoresist and forming a first opening, wherein the first opening is positioned in the forming area of the through hole.
And thirdly, sequentially carrying out first etching on the bottom anti-reflection layer and the medium anti-reflection layer by taking the photoresist as a mask to transfer patterns into the bottom anti-reflection layer and the medium anti-reflection layer, wherein a second opening is formed in the patterned bottom anti-reflection layer and medium anti-reflection layer, and the second opening is positioned at the bottom of the first opening and is formed by downwards transferring the first opening.
The etching gas for the first etching comprises non-sharp gas and sharp gas, and the critical dimension change of the sharp gas to the second opening is larger than that of the non-sharp gas.
A polymer is formed on the side surface of the second opening in the first etching, and the critical dimension of the second opening is adjusted by adjusting the gas content of the non-sharp gas and adjusting the thickness of the polymer on the side surface of the second opening.
And step four, etching the hard mask layer and the interlayer film in sequence to transfer the graph downwards and form a through hole opening in the interlayer film, wherein the critical dimension of the through hole opening is defined by the second opening.
A further improvement is that in step one, the hard mask layer is an amorphous carbon layer (APF).
In a further improvement, in the first step, a capping layer composed of silicon oxide is further formed on top of the dielectric anti-reflection layer.
In the first step, the material of the dielectric anti-reflection layer is SiON; or the medium anti-reflection layer is a nitrogen-free medium anti-reflection layer, and the material of the nitrogen-free medium anti-reflection layer comprises SiOC.
In the third step, the regulated flow rate of the non-sharp gas is more than 0.5sccm; the regulating flow rate of the sensitive gas is smaller than that of the non-sensitive gas, and the larger the regulating flow rate of the etching gas for the first etching is, the easier the size of the second opening is controlled.
A further improvement is that the flow rate of the non-sharp gas is linearly related to the critical dimension of the second opening and is smaller as the flow rate of the non-sharp gas is greater.
Further improvement is that the insensitive gas comprises CH 2 F 2 。
A further improvement is that the acute gas comprises oxygen.
A further improvement is that the interlayer film is formed on the semiconductor substrate.
In a further improvement, a device layer is formed in the semiconductor substrate, each device structure in the device layer comprises a grid structure, a source region and a drain region which are positioned on two sides of the grid structure, and a through hole opening is positioned on the tops of the grid structure, the source region and the drain region.
The method is further improved in that the step four further comprises the step of filling a metal layer in the through hole opening to form the through hole.
A further improvement is that the metal layer filled in the via opening comprises tungsten.
A further improvement is that the photoresist, the bottom antireflective layer, the dielectric antireflective layer and the hard mask layer are removed prior to performing the metal layer filling of the via opening.
The second step is to complete the patterning of the photoresist by adopting exposure and development, and the step of ADI detection is further included after the patterning of the photoresist; and step four, the step of AEI detection is further included after the completion of the step.
The method is further improved by further comprising the step of fitting a linear relation curve between the flow rate of the insensitive gas and the critical dimension of the second opening in advance before the step of adjusting the flow rate of the insensitive gas according to the linear relation curve and the required critical dimension of the second opening.
In a further improvement, the step of forming a back-end metal interconnection layer is further included after the through hole is formed.
According to the invention, in the first etching process of transferring the photoresist pattern to the bottom anti-reflection layer and the dielectric anti-reflection layer, the gas content of the insensitive gas is adjusted to adjust the thickness of the side polymer of the second opening so as to adjust the critical dimension of the second opening, then the critical dimension of the through hole opening formed in the subsequent step three is defined by the critical dimension of the second opening, and the change of the gas content of the insensitive gas is small in the critical dimension of the second opening, so that the critical dimension of the second opening can be accurately controlled through the change of the gas content of the insensitive gas, and finally the stability of the critical dimension of the through hole can be improved, thereby preventing the problem of product yield caused by the critical dimension deviation of the through hole.
Drawings
The invention is described in further detail below with reference to the attached drawings and detailed description:
FIG. 1 is a flow chart of a method of fabricating a via in accordance with an embodiment of the present invention;
FIGS. 2A-2B are block diagrams of devices at various steps in a method for fabricating vias according to embodiments of the present invention;
FIG. 3 is a graph showing a linear relationship between the flow rate of the non-sharp gas and the critical dimension of the opening of the via hole formed by fitting in the method for manufacturing the via hole according to the embodiment of the present invention.
Detailed Description
FIG. 1 is a flow chart of a method of fabricating a via according to an embodiment of the present invention; as shown in fig. 2A to 2B, a device structure diagram in each step of the method for manufacturing a through hole according to the embodiment of the present invention is shown; FIG. 3 shows a linear relationship curve between the flow rate of the non-sharp gas and the critical dimension of the opening of the through hole, which is formed by fitting in the method for manufacturing the through hole according to the embodiment of the invention; the manufacturing method of the through hole comprises the following steps:
step one, as shown in fig. 2A, a hard mask layer 101, a dielectric anti-reflection layer 102, a bottom anti-reflection layer 104 and a photoresist 105 are sequentially formed on the surface of the interlayer film on which the via hole is to be formed.
In the embodiment of the present invention, the hard mask layer 101 is an amorphous carbon layer.
A capping layer 103 composed of silicon oxide is further formed on top of the dielectric anti-reflection layer 102.
The dielectric antireflective layer 102 is a nitrogen-free dielectric antireflective layer, and the material of the nitrogen-free dielectric antireflective layer includes SiOC. In other embodiments can also be: the material of the dielectric anti-reflection layer 102 is SiON.
The interlayer film is formed on a semiconductor substrate.
And a device layer is formed in the semiconductor substrate, and each device structure in the device layer comprises a grid structure, and a source region and a drain region which are positioned on two sides of the grid structure.
Step two, as shown in fig. 2A, the photoresist 105 is patterned and a first opening 106a is formed, where the first opening 106a is located in the formation region of the through hole.
In the embodiment of the invention, the forming area of the through hole is positioned at the top of the grid structure, the source area and the drain area.
The photoresist 105 is patterned by exposure and development, and the step of performing ADI detection is further included after the photoresist 105 is patterned.
Step three, as shown in fig. 2B, the photoresist 105 is used as a mask to sequentially perform a first etching on the bottom anti-reflection layer 104 and the dielectric anti-reflection layer 102 to transfer the patterns into the bottom anti-reflection layer 104 and the dielectric anti-reflection layer 102, a second opening 106B is formed in the patterned bottom anti-reflection layer 104 and the patterned dielectric anti-reflection layer 102, and the second opening 106B is located at the bottom of the first opening 106a and is formed by transferring the first opening 106a downwards.
The etching gas for the first etching includes a non-sharp gas and a sharp gas, and a critical dimension change of the sharp gas to the second opening 106b is larger than a critical dimension change of the non-sharp gas to the second opening 106 b.
Polymer is formed on the side of the second opening 106b during the first etching, and the critical dimension of the second opening 106b is adjusted by adjusting the gas content of the non-sharp gas to adjust the thickness of the polymer on the side of the second opening 106 b. In fig. 2B, the polymer is formed as indicated by the dashed circle 107, and the polymer molecule is also shown in fig. 2B to include F ions and H ions.
The regulated flow rate of the insensitive gas is more than 0.5sccm; the regulated flow of the sensitive gas is smaller than the regulated flow of the non-sensitive gas, and the larger the regulated flow of the etching gas for the first etching is, the easier the size of the second opening 106b is controlled. That is, when the regulated flow rate of the insensitive gas is greater than 0.5sccm, no great change is still caused to the critical dimension of the second opening 106b, and the change of the flow rate greater than 0.5sccm facilitates the flow rate control of the insensitive gas and thus can accurately and stably control the critical dimension of the second opening 106 b.
Preferably, the insensitive gas bagScraper CH 2 F 2 。
The acute gas includes oxygen. The regulated flow rate of oxygen is between 0.1sccm and 0.2sccm, and this flow rate variation range is too small, and when the flow rate variation range exceeds the regulated flow rate range, the critical dimension of the second opening 106b becomes uncontrollable, so if the flow rate of the agile gas is controlled to adjust the critical dimension of the second opening 106b, the variation of the critical dimension of the second opening 106b will be unstable.
The flow rate of the non-sharp gas and the critical dimension of the second opening 106b are linearly related and the critical dimension of the second opening 106b is smaller as the flow rate of the non-sharp gas is larger.
And step four, etching the hard mask layer 101 and the interlayer film in sequence to transfer the pattern downwards and form a through hole opening in the interlayer film, wherein the critical dimension of the through hole opening is defined by the second opening 106 b.
And step four, the step of AEI detection is further included after the completion of the step.
And then, filling a metal layer in the through hole opening to form the through hole.
The metal layer filled in the through hole opening comprises tungsten.
The photoresist 105, the bottom anti-reflective layer 104, the dielectric anti-reflective layer 102 and the hard mask layer 101 are removed before the metal layer filling of the via opening is performed.
The step of forming the back section metal interconnection layer is further included after the through hole is formed. The through holes enable connection among the gate structures, the source regions, the drain regions and the back-end metal interconnection layers in the device layer.
In the embodiment of the present invention, before the third step, a linear relationship curve between the flow rate of the insensitive gas and the critical dimension of the second opening 106b is fitted in advance, and in the third step, the flow rate of the insensitive gas is adjusted according to the linear relationship curve and the required critical dimension of the second opening 106 b. Fitting the insensitive gasThe linear relationship between the flow rate and the critical dimension of the second opening 106b can be obtained through experiments, and since the critical dimension of the via opening is defined by the critical dimension of the second opening 106b and the AEI detection is performed after the via opening etching is completed, the critical dimension of the via opening for AEI detection can be used instead of the critical dimension of the second opening 106b in the actual fitting. As shown in FIG. 3, the method for manufacturing a via according to the embodiment of the present invention is a linear relationship curve between the flow rate of the non-sensitive gas and the critical dimension of the via opening, which is formed by fitting, in the method for manufacturing a via according to the embodiment of the present invention, wherein CH is used as the non-sensitive gas in FIG. 3 2 F 2 Curve 201 is a fitted curve, and the resulting fitting formula is:
y＝-1.25*x+61.767；
R 2 ＝0.9995。
in the embodiment of the invention, in the first etching process of transferring the photoresist 105 pattern to the bottom anti-reflection layer 104 and the dielectric anti-reflection layer 102, the gas content of the insensitive gas is adjusted to adjust the thickness of the side polymer of the second opening 106b so as to adjust the critical dimension of the second opening 106b, then the critical dimension of the through hole opening formed in the subsequent step three is defined by the critical dimension of the second opening 106b, and the change of the gas content of the insensitive gas changes little to the change of the critical dimension of the second opening 106b, so that the critical dimension of the second opening 106b can be accurately controlled through the change of the gas content of the insensitive gas, and finally the stability of the critical dimension of the through hole can be improved, thereby preventing the problem of product yield caused by the deviation of the critical dimension of the through hole.
The present invention has been described in detail by way of specific examples, but these should not be construed as limiting the invention. Many variations and modifications may be made by one skilled in the art without departing from the principles of the invention, which is also considered to be within the scope of the invention.
Claims (15)
1. A method of manufacturing a through hole, comprising the steps of:
sequentially forming a hard mask layer, a dielectric anti-reflection layer, a bottom anti-reflection layer and photoresist on the surface of an interlayer film on which a through hole needs to be formed;
patterning the photoresist and forming a first opening, wherein the first opening is positioned in a forming area of the through hole;
sequentially performing first etching on the bottom anti-reflection layer and the medium anti-reflection layer by taking the photoresist as a mask to transfer patterns into the bottom anti-reflection layer and the medium anti-reflection layer, wherein a second opening is formed in the patterned bottom anti-reflection layer and medium anti-reflection layer, and the second opening is positioned at the bottom of the first opening and is formed by downward transfer of the first opening;
the etching gas for the first etching comprises non-sharp gas and sharp gas, wherein the critical dimension change of the gas content change of the sharp gas on the second opening is larger than the critical dimension change of the gas content change of the non-sharp gas on the second opening;
forming a polymer on the side surface of the second opening in the first etching, and adjusting the critical dimension of the second opening by adjusting the gas content of the non-sharp gas and the thickness of the polymer on the side surface of the second opening;
and step four, etching the hard mask layer and the interlayer film in sequence to transfer the graph downwards and form a through hole opening in the interlayer film, wherein the critical dimension of the through hole opening is defined by the second opening.
2. The method of manufacturing a through-hole according to claim 1, wherein:
in the first step, the hard mask layer is an amorphous carbon layer.
3. The method of manufacturing a through-hole according to claim 1, wherein: in the first step, a capping layer composed of silicon oxide is further formed on top of the dielectric anti-reflection layer.
4. A method of manufacturing a through hole as claimed in claim 1 or 3, characterized in that: in the first step, the material of the dielectric anti-reflection layer is SiON;
or the medium anti-reflection layer is a nitrogen-free medium anti-reflection layer, and the material of the nitrogen-free medium anti-reflection layer comprises SiOC.
5. The method of manufacturing a through-hole according to claim 4, wherein: in the third step, the regulated flow rate of the insensitive gas is more than 0.5sccm; the regulating flow rate of the sensitive gas is smaller than that of the non-sensitive gas, and the larger the regulating flow rate of the etching gas for the first etching is, the easier the size of the second opening is controlled.
6. The method of manufacturing a through-hole according to claim 5, wherein: the flow rate of the non-sharp gas and the critical dimension of the second opening are in a linear relationship and the critical dimension of the second opening is smaller as the flow rate of the non-sharp gas is greater.
7. The method of manufacturing a through-hole according to claim 6, wherein: the insensitive gas includes CH 2 F 2 。
8. The method of manufacturing a through-hole according to claim 6, wherein: the acute gas includes oxygen.
9. The method of manufacturing a through-hole according to claim 1, wherein: the interlayer film is formed on a semiconductor substrate.
10. The method of manufacturing a through-hole according to claim 9, wherein: the semiconductor substrate is provided with a device layer, each device structure in the device layer comprises a grid structure, a source region and a drain region, the source region and the drain region are arranged on two sides of the grid structure, and the through hole opening is arranged on the tops of the grid structure, the source region and the drain region.
11. The method of manufacturing a through-hole according to claim 1, wherein: and step four, filling a metal layer in the through hole opening to form the through hole.
12. The method of manufacturing a through-hole according to claim 11, wherein: the metal layer filled in the through hole opening comprises tungsten.
13. The method of manufacturing a through-hole according to claim 11, wherein: the photoresist, the bottom anti-reflective layer, the dielectric anti-reflective layer and the hard mask layer are removed prior to filling the metal layer of the via opening.
14. The method of manufacturing a through-hole according to claim 1, wherein: patterning the photoresist by adopting exposure and development, and performing ADI detection after the photoresist is patterned;
and step four, the step of AEI detection is further included after the completion of the step.
15. The method of manufacturing a through-hole according to claim 6, wherein: and step three, the method further comprises the step of fitting a linear relation curve between the flow rate of the insensitive gas and the critical dimension of the second opening in advance, wherein in the step three, the flow rate of the insensitive gas is regulated according to the linear relation curve and the required critical dimension of the second opening.
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