CN111654267B - Adjustable pulse generator - Google Patents
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- CN111654267B CN111654267B CN202010470824.0A CN202010470824A CN111654267B CN 111654267 B CN111654267 B CN 111654267B CN 202010470824 A CN202010470824 A CN 202010470824A CN 111654267 B CN111654267 B CN 111654267B
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K7/00—Modulating pulses with a continuously-variable modulating signal
- H03K7/08—Duration or width modulation ; Duty cycle modulation
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Abstract
The invention discloses an adjustable pulse generator, which comprises a waveform generation circuit, a waveform delay circuit and a waveform processing circuit. After the waveform generation circuit is electrified, the rectangular wave with adjustable duty ratio and period is periodically generated; the waveform delay circuit delays the rectangular wave for a first time and then outputs the rectangular wave as a first output signal, and delays the rectangular wave for a second time and then outputs the rectangular wave as a second output signal; the second time is more than the first time, and the two time differences are adjustable; the waveform processing circuit performs waveform processing based on the first output signal and the second output signal to obtain pulse signals with adjustable pulse width, pulse value and pulse period. Therefore, the pulse width, the pulse value and the pulse period of the pulse signal provided by the adjustable pulse generator are adjustable, so that the pulse signal can well simulate the noise signal to be input into the circuit so as to test the filtering capability of the circuit, and the reference value of the circuit filtering capability test is improved.
Description
Technical Field
The invention relates to the field of pulse generation, in particular to an adjustable pulse generator.
Background
With the development of information technology, the amount of information that a server needs to process increases dramatically, which puts an increasing demand on the information processing speed of the server. Along with the improvement of the signal rate of the server, the signal quality is more and more important to the stability of the server, but along with the continuous upgrading of the server, the power consumption of the whole machine and various configurations of the server are also continuously increased, so that a plurality of interference sources are brought, and once signals are interfered by noise, phenomena such as back channel, abnormal pulse, waveform jitter and the like can occur, so that the signal quality is seriously influenced, and the normal operation of the server is influenced.
In the prior art, before the server leaves the factory, the filtering capability of the server circuit is tested so that the server circuit meets the filtering requirement. At present, the testing mode of the line filtering capability of the server is generally as follows: the pulse signal generated by the pulse generator is input as a noise signal into the server line to test the filtering capability of the server line. However, the existing pulse generator generally outputs pulse signals with fixed pulse width, pulse value and pulse period, and cannot simulate the noise environment of the server circuit well, so that the reference value of the filter capability test of the server circuit is reduced.
Therefore, how to provide a solution to the above technical problem is a problem that a person skilled in the art needs to solve at present.
Disclosure of Invention
The invention aims to provide an adjustable pulse generator, the pulse width, the pulse value and the pulse period of a pulse signal provided by the adjustable pulse generator are adjustable, so that the pulse signal can well simulate the input of a noise signal into a circuit to test the filtering capability of the circuit, thereby improving the reference value of the circuit filtering capability test.
In order to solve the above technical problems, the present invention provides an adjustable pulse generator, comprising:
the waveform generation circuit is used for periodically generating rectangular waves with adjustable duty ratio and period after the waveform generation circuit is electrified;
the waveform delay circuit is connected with the output end of the waveform generation circuit and is used for delaying the rectangular wave for a first time and then outputting the rectangular wave as a first output signal, and delaying the rectangular wave for a second time and then outputting the rectangular wave as a second output signal; wherein the second time is more than the first time, and the two time differences are adjustable;
and the waveform processing circuit is respectively connected with the output end of the waveform generation circuit and the output end of the waveform delay circuit and is used for performing waveform processing based on the first output signal and the second output signal to obtain pulse signals with adjustable pulse width, pulse value and pulse period.
Preferably, the waveform generation circuit comprises a reverse schmitt trigger, a first adjustable resistor, a second adjustable resistor, a diode and a capacitor; wherein:
the input end of the reverse schmitt trigger is respectively connected with the first end of the capacitor, the anode of the diode and the first end of the first adjustable resistor, the second end of the capacitor is grounded, the cathode of the diode is connected with the first end of the second adjustable resistor, the output end of the reverse schmitt trigger is respectively connected with the second end of the first adjustable resistor and the second end of the second adjustable resistor, and the common end is used as the output end of the waveform generating circuit;
and the reverse Schmitt trigger is used for periodically generating rectangular waves with adjustable duty ratio and period by adjusting the resistance values of the first adjustable resistor and the second adjustable resistor after the reverse Schmitt trigger is electrified.
Preferably, the waveform delay circuit includes:
a dial switch;
the delay chip is respectively connected with the dial switch and the output end of the waveform generation circuit and is used for determining delay time according to the dial value of the dial switch; and the rectangular wave is transmitted and delayed by the chip and then is output as a first output signal, and the rectangular wave is output as a second output signal after being delayed by the delay time on the basis of the transmission and delay of the chip.
Preferably, the delay chip is specifically configured to convert a binary dial value of the dial switch into a decimal dial value, and multiply the decimal dial value by a chip step time to obtain the delay time.
Preferably, the waveform processing circuit comprises an exclusive or gate, an and gate and a voltage conversion circuit; wherein:
the first input end of the exclusive-or gate is connected with the first output signal of the waveform delay circuit, the second input end of the exclusive-or gate is connected with the second output signal of the waveform delay circuit, the output end of the exclusive-or gate is connected with the first input end of the and gate, the second input end of the and gate is connected with the output end of the waveform generation circuit, the output end of the and gate is connected with the input end of the voltage conversion circuit, and the output end of the voltage conversion circuit is used as the output end of the waveform processing circuit;
the voltage conversion circuit is used for carrying out voltage conversion on the voltage value of the pulse signal after receiving the pulse signal with adjustable pulse width and pulse period output by the AND gate, so as to obtain the pulse signal with adjustable pulse value.
Preferably, the voltage conversion circuit comprises a switching tube and a pull-up resistor; wherein:
the control end of the switching tube is connected with the output end of the AND gate, the first end of the switching tube is connected with the first end of the pull-up resistor, the common end is used as the output end of the voltage conversion circuit, the second end of the pull-up resistor is connected with an adjustable direct current power supply, and the second end of the switching tube is grounded; the switching tube is a switching tube with high-level cut-off and low-level cut-on.
Preferably, the adjustable pulse generator further comprises:
a periodic arithmetic unit for charging the relational expression according to a preset capacitanceObtaining the charging time Tr of the capacitor in the current charging and discharging period, and according to the preset capacitor discharging relation +.>Obtaining the discharging time Tf of the capacitor in the current charging and discharging period, and obtaining the current charging and discharging period of the capacitor according to a preset period relation formula T=Tr+Tf;
wherein V is o1 For the initial charge voltage of the capacitor in the current charge-discharge period, V h For the high switching voltage of the reverse schmitt trigger, V t1 For the charge voltage of the capacitor when the charge time of the current charge-discharge cycle reaches t1, V o2 For the initial discharge voltage of the capacitor in the current charge-discharge period, V 1 For a low switching voltage of the reverse schmitt trigger, V t2 For the discharge voltage of the capacitor when the discharge time of the current charge-discharge period reaches t2, R 1 R is the resistance value of the first adjustable resistor in the current charge-discharge period 2 And c is the capacitance of the capacitor, which is the resistance of the second adjustable resistor in the current charge-discharge period.
Preferably, the first adjustable resistor and the second adjustable resistor are gear type adjustable resistors.
The invention provides an adjustable pulse generator, which comprises a waveform generation circuit, a waveform delay circuit and a waveform processing circuit. After the waveform generation circuit is electrified, the rectangular wave with adjustable duty ratio and period is periodically generated; the waveform delay circuit delays the rectangular wave for a first time and then outputs the rectangular wave as a first output signal, and delays the rectangular wave for a second time and then outputs the rectangular wave as a second output signal; the second time is more than the first time, and the two time differences are adjustable; the waveform processing circuit performs waveform processing based on the first output signal and the second output signal to obtain pulse signals with adjustable pulse width, pulse value and pulse period. Therefore, the pulse width, the pulse value and the pulse period of the pulse signal provided by the adjustable pulse generator are adjustable, so that the pulse signal can well simulate the noise signal to be input into the circuit so as to test the filtering capability of the circuit, and the reference value of the circuit filtering capability test is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required in the prior art and the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present invention, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic diagram of an adjustable pulse generator according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a waveform generation circuit according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a specific structure of an adjustable pulse generator according to an embodiment of the present invention;
fig. 4 is a schematic diagram of pulse adjustment of an adjustable pulse generator according to an embodiment of the present invention.
Detailed Description
The core of the invention is to provide an adjustable pulse generator, the pulse width, the pulse value and the pulse period of the pulse signal provided by the adjustable pulse generator are adjustable, so that the pulse signal can well simulate the noise signal to be input into a circuit so as to test the filtering capability of the circuit, thereby improving the reference value of the circuit filtering capability test.
For the purpose of making the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention, and it is apparent that the described embodiments are some embodiments of the present invention, but not all embodiments of the present invention. All other embodiments, which can be made by those skilled in the art based on the embodiments of the invention without making any inventive effort, are intended to be within the scope of the invention.
Referring to fig. 1, fig. 1 is a schematic structural diagram of an adjustable pulse generator according to an embodiment of the invention.
The adjustable pulse generator comprises:
the waveform generation circuit 1 is used for periodically generating rectangular waves with adjustable duty ratio and period after the waveform generation circuit is electrified;
the waveform delay circuit 2 is connected with the output end of the waveform generation circuit 1 and is used for delaying the rectangular wave for a first time and then outputting the rectangular wave as a first output signal, and delaying the rectangular wave for a second time and then outputting the rectangular wave as a second output signal; the second time is more than the first time, and the two time differences are adjustable;
the waveform processing circuit 3 is respectively connected with the output end of the waveform generating circuit 1 and the output end of the waveform delay circuit 2, and is used for performing waveform processing based on the first output signal and the second output signal to obtain pulse signals with adjustable pulse width, pulse value and pulse period.
Specifically, the adjustable pulse generator of the present application includes a waveform generation circuit 1, a waveform delay circuit 2 and a waveform processing circuit 3, and the working principle thereof is as follows:
after the waveform generation circuit 1 is powered on, a rectangular wave can be periodically generated, the duty ratio and the period of the rectangular wave are adjustable, and the generated rectangular wave is output to the waveform delay circuit 2 and the waveform processing circuit 3. The waveform delay circuit 2 delays the rectangular wave by a first time on one hand after receiving the rectangular wave, and outputs the rectangular wave delayed by the first time as a first output signal to the waveform processing circuit 3; on the other hand, the rectangular wave is delayed by a second time, and the rectangular wave delayed by the second time is output as a second output signal to the waveform processing circuit 3. It should be noted that the second time > the first time, and the time difference obtained by subtracting the first time from the second time is adjustable.
The waveform processing circuit 3 can combine and process each waveform signal based on the rectangular wave with adjustable duty ratio and period and the waveform signal with the rectangular wave with unfixed delay, so as to obtain a pulse signal with adjustable pulse width, pulse value and pulse period, and input the obtained pulse signal as a noise signal into the server circuit to realize the filtering capability of the test server circuit. In addition, the adjustable pulse generator can be applied to verifying the abnormal triggering condition of the server, and particularly, pulse signals are input into the server circuit as triggering signals so as to realize the abnormal triggering condition of the verification server.
The invention provides an adjustable pulse generator, which comprises a waveform generation circuit, a waveform delay circuit and a waveform processing circuit. After the waveform generation circuit is electrified, the rectangular wave with adjustable duty ratio and period is periodically generated; the waveform delay circuit delays the rectangular wave for a first time and then outputs the rectangular wave as a first output signal, and delays the rectangular wave for a second time and then outputs the rectangular wave as a second output signal; the second time is more than the first time, and the two time differences are adjustable; the waveform processing circuit performs waveform processing based on the first output signal and the second output signal to obtain pulse signals with adjustable pulse width, pulse value and pulse period. Therefore, the pulse width, the pulse value and the pulse period of the pulse signal provided by the adjustable pulse generator are adjustable, so that the pulse signal can well simulate the noise signal to be input into the circuit so as to test the filtering capability of the circuit, and the reference value of the circuit filtering capability test is improved.
Based on the above embodiments:
referring to fig. 2, fig. 2 is a schematic diagram of a waveform generation circuit according to an embodiment of the invention.
As an alternative embodiment, the waveform generating circuit 1 includes a reverse schmitt trigger OE, a first adjustable resistor R1, a second adjustable resistor R2, a diode D, and a capacitor C; wherein:
the input end of the reverse schmitt trigger OE is respectively connected with the first end of the capacitor C, the anode of the diode D and the first end of the first adjustable resistor R1, the second end of the capacitor C is grounded, the cathode of the diode D is connected with the first end of the second adjustable resistor R2, the output end of the reverse schmitt trigger OE is respectively connected with the second end of the first adjustable resistor R1 and the second end of the second adjustable resistor R2, and the common end is used as the output end of the waveform generating circuit 1;
the reverse schmitt trigger OE is configured to periodically generate a rectangular wave with an adjustable duty cycle and period by adjusting the resistances of the first adjustable resistor R1 and the second adjustable resistor R2 after the reverse schmitt trigger OE is powered on.
Specifically, the waveform generating circuit 1 of the present application includes a reverse schmitt trigger OE, a first adjustable resistor R1, a second adjustable resistor R2, a diode D, and a capacitor C, and the working principle thereof is as follows:
when the reverse schmitt trigger OE is just powered on, the voltage at the input terminal a of the reverse schmitt trigger OE is low, and the voltage at the output terminal Y of the reverse schmitt trigger OE should be high, at this time, due to the capacitor C, the reverse schmitt trigger OE charges the capacitor C through the first adjustable resistor R1 until the charging voltage rises to the high inversion voltage of the reverse schmitt trigger OE. When the charging voltage of the capacitor C reaches the high inversion voltage of the reverse schmitt trigger OE, the voltage at the output terminal Y of the reverse schmitt trigger OE should be low, and at this time, due to the capacitor C, the reverse schmitt trigger OE discharges the capacitor C through the first adjustable resistor R1 and the second adjustable resistor R2 until the discharging voltage drops to the low inversion voltage of the reverse schmitt trigger OE. When the discharge voltage of the capacitor C reaches the low inversion voltage of the reverse schmitt trigger OE, the voltage at the output terminal Y of the reverse schmitt trigger OE should be high again, and thus the cyclic reciprocation is performed to obtain a periodic rectangular wave.
Therefore, the resistance of the first adjustable resistor R1 affects the charging time of the capacitor C, the resistances of the first adjustable resistor R1 and the second adjustable resistor R2 affects the discharging time of the capacitor C, and the charging time+discharging time=the current charging and discharging period of the capacitor C in the current charging and discharging period, so the reverse schmitt trigger OE can periodically generate a rectangular wave with an adjustable duty ratio and period by adjusting the resistances of the first adjustable resistor R1 and the second adjustable resistor R2. In addition, the purpose of the diode D is to distinguish the charging circuit and the discharging circuit of the capacitor C, so as to realize that the charging time and the discharging time of the capacitor C are set independently of each other.
In addition, the reverse Schmitt trigger OE can select TC7SZ14FU, has 3.7ns transmission delay, high response speed, 1.65V-5.5V power supply acceptable range and wide application range.
Referring to fig. 3, fig. 3 is a schematic diagram of a specific structure of an adjustable pulse generator according to an embodiment of the invention.
As an alternative embodiment, the waveform delay circuit 2 includes:
a dial switch 21;
the delay chip 22 is respectively connected with the dial switch 21 and the output end of the waveform generation circuit 1 and is used for determining delay time according to the dial value of the dial switch 21; the rectangular wave is delayed by the transmission of the chip itself and then is output as a first output signal, and the rectangular wave is delayed by a delay time and then is output as a second output signal on the basis of the transmission delay of the chip itself.
Specifically, the waveform delay circuit 2 of the present application includes a dial switch 21 and a delay chip 22, and its working principle is:
the delay chip 22 firstly determines delay time T1 according to the dial value of the dial switch 21, and then, on one hand, outputs the rectangular wave output by the waveform generation circuit 1 as a first output signal after the rectangular wave is delayed by the transmission time T0 of the chip itself, and on the other hand, outputs the rectangular wave output by the waveform generation circuit 1 as a second output signal after the rectangular wave is delayed by the delay time T1 on the basis of the transmission time T0 of the chip itself. Since the dial value of the dial switch 21 is adjustable, the delay time T1 determined by the delay chip 22 is also adjustable.
It should be noted that, the transmission delay T0 of the chip itself is the first time of the above embodiment, and the transmission delay T0+ delay time T1 of the chip itself is the second time of the above embodiment.
As an alternative embodiment, the delay chip 22 is specifically configured to convert the binary dial value of the dial switch 21 into a decimal dial value, and multiply the decimal dial value by the chip step time to obtain the delay time.
Specifically, the delay chip 22 of the present application may specifically convert the binary dial value of the dial switch 21 into a decimal dial value, multiply the decimal dial value by the chip step time T0, and take the product of the decimal dial value and the chip step time T0 as the delay time T1.
For example, the delay time T1 of the delay chip 22 is controlled by an 8-bit dip switch, where the 8-bit dip switch controls the delay time T1 by the high-low level of the 8 pins D0 to D7 of the delay chip 22, and then t1= (d0×1+d1×2+d2×4+d3×8+d4×16+d5×32+d6×64+d7×128) ×t0.
In addition, the delay chip 22 of the present application may employ 8-bit programmable sequential element DS1023 series chips, and the step time t0 may have various specifications such as 0.25ns, 0.5ns, 1ns, 2ns, 5ns, etc.
As an alternative embodiment, the waveform processing circuit 3 includes an exclusive or gate 31, an and gate 32, and a voltage conversion circuit 33; wherein:
a first input end of the exclusive-or gate 31 is connected with a first output signal of the waveform delay circuit 2, a second input end of the exclusive-or gate 31 is connected with a second output signal of the waveform delay circuit 2, an output end of the exclusive-or gate 31 is connected with a first input end of the and gate 32, a second input end of the and gate 32 is connected with an output end of the waveform generation circuit 1, an output end of the and gate 32 is connected with an input end of the voltage conversion circuit 33, and an output end of the voltage conversion circuit 33 serves as an output end of the waveform processing circuit 3;
the voltage conversion circuit 33 is configured to, after receiving the pulse signal with adjustable pulse width and pulse period output by the and gate 32, perform voltage conversion on a voltage value of the pulse signal to obtain a pulse signal with adjustable pulse value.
Specifically, the waveform processing circuit 3 of the present application includes an exclusive or gate 31, an and gate 32, and a voltage conversion circuit 33, and the working principle thereof is:
the function of the exclusive or gate 31 is: when the waveform signals input by the two input ends are the same (namely, are both high level or are both low level), the output end outputs low level; when the waveform signals inputted by the two input ends are different (i.e. one input end inputs a high level and the other input end inputs a low level), the output end outputs a high level. The function of and gate 32 is: when the waveform signals input by the two input ends are high level, the output end outputs high level; when the waveform signal inputted from any one of the input terminals is at a low level, the output terminal outputs the low level.
For example, referring to fig. 4, fig. 4 is a schematic diagram of pulse adjustment of an adjustable pulse generator according to an embodiment of the invention. The period of the rectangular wave IN input by the waveform delay circuit 2 is T, and the T value is adjustable; the first output signal REF output by the waveform delay circuit 2 is a waveform of rectangular wave IN delayed by T0 time; the second output signal OUT output by the waveform delay circuit 2 is a waveform of a rectangular wave IN delayed by time T0+T1, and the value of T1 is adjustable. Then the REF signal and the OUT signal are subjected to exclusive or processing by the exclusive or gate 31 to obtain an exclusive or output signal P1, each period T has two single pulses, the pulse widths are respectively T2 and T3, t2=t3=t1, that is, the values of T2 and T3 are adjustable; the P1 signal and the IN signal are and-processed by the and gate 32 to obtain an output signal P2 of the and gate 32, each period T has a single pulse, the pulse width is T2, and since the T value and the T2 value are both adjustable, the P2 signal output by the and gate 32 is a pulse signal with both adjustable pulse width and pulse period.
Based on this, the voltage conversion circuit 33 performs voltage conversion on the voltage value of the pulse signal output from the and gate 32 to adjust the pulse value of the pulse signal, thereby obtaining a pulse signal with adjustable pulse width, pulse period, and pulse value.
In addition, the exclusive-or gate 31 in the present application may select a single-way 2 input exclusive-or gate SN74LVC1G86, and the and gate 32 may select a single-way 2 input and gate SN74LVC1G08, where the maximum propagation delay of SN74LVC1G86 is less than 3.3ns, and the maximum propagation delay of SN74LVC1G08 is less than 3.4ns, so as to meet the requirements.
As an alternative embodiment, the voltage conversion circuit 33 includes a switching tube and a pull-up resistor; wherein:
the control end of the switching tube is connected with the output end of the AND gate 32, the first end of the switching tube is connected with the first end of the pull-up resistor, the common end is used as the output end of the voltage conversion circuit 33, the second end of the pull-up resistor is connected with an adjustable direct current power supply, and the second end of the switching tube is grounded; the switching tube is a switching tube with high level cut-off and low level cut-on.
Specifically, the voltage conversion circuit 33 of the present application includes a switching tube (such as a MOS tube) and a pull-up resistor, and the working principle thereof is:
when the control end of the switching tube inputs a high level, the switching tube is cut off, and the output end of the voltage conversion circuit 33 outputs a voltage signal which is the same as the output voltage of the adjustable direct current power supply; when the control terminal of the switching tube inputs a low level, the switching tube is turned on, and the output terminal of the voltage conversion circuit 33 is grounded to output a low level signal.
For example, as shown in fig. 4, the P2 signal output from the and gate 32 is input to the control terminal of the switching tube, and when the P2 signal is at a high level, the output terminal of the voltage conversion circuit 33 outputs a voltage signal identical to the output voltage of the adjustable dc power supply; when the P2 signal is low, the output terminal of the voltage conversion circuit 33 outputs a low signal. It can be seen that the output signal of the voltage conversion circuit 33 does not change the pulse width and pulse period of the P2 signal, but changes the pulse value of the P2 signal to the same voltage value as the output voltage of the adjustable dc power supply, and the pulse value of the pulse signal is adjustable because the output voltage of the adjustable dc power supply is adjustable.
The output voltage of the adjustable dc power supply needs to be satisfied with the input voltage allowed on the line to which the output signal of the voltage conversion circuit 33 is input, so as to implement line detection.
In conclusion, the pulse generator can be adjusted by designing pure hardware, so that the pulse signals of various required parameters can be generated without depending on software, and the pulse generator is convenient and reliable.
As an alternative embodiment, the adjustable pulse generator further comprises:
a periodic arithmetic unit for charging the relational expression according to a preset capacitanceObtaining the charging time Tr of the capacitor C in the current charging and discharging period, and according to the preset capacitor discharging relation +.>Obtaining the discharging time Tf of the capacitor C in the current charging and discharging period, and obtaining the current charging and discharging period of the capacitor C according to a preset period relation formula T=Tr+Tf;
wherein V is o1 For the initial charge voltage of the capacitor C in the current charge-discharge period, V h High switching voltage, V, for reverse Schmitt trigger OE t1 For the charge voltage of the capacitor C when the charge time of the current charge-discharge cycle reaches t1, V o2 For the initial discharge voltage of the capacitor C in the current charge-discharge period, V 1 Low flip-flop voltage for reverse schmitt trigger OE, V t2 For discharging voltage of capacitor C when discharging time of current charging and discharging period reaches t2, R 1 Is the resistance value of the first adjustable resistor R1 in the current charge-discharge period, R 2 And C is the capacitance of the capacitor C, which is the resistance of the second adjustable resistor R2 in the current charge-discharge period.
Further, the adjustable pulse generator of the present application further includes a period arithmetic unit, and the working principle thereof is as follows:
when the reverse schmitt trigger OE is just powered on, the voltage at the input terminal A of the reverse schmitt trigger OE is low, and the voltage at the output terminal Y of the reverse schmitt trigger OE is high, at this time, the reverse schmitt trigger OE charges the capacitor C through the first adjustable resistor R1 until the charging voltage rises to the high inverting voltage V of the reverse schmitt trigger OE h At this time, according to the preset capacitance charging relationThe charging time Tr of the capacitor C in the current charging and discharging cycle can be obtained. When the charging voltage of the capacitor C reaches the high flip-flop voltage V of the reverse Schmitt trigger OE h At this time, the voltage at the output terminal Y of the reverse Schmitt trigger OE is low, and the reverse Schmitt trigger OE passes through the first adjustable resistor R1 and the second adjustable resistor R1 due to the capacitor CThe adjustable resistor R2 discharges the capacitor C until the discharge voltage drops to the low flip-flop voltage V of the reverse Schmitt trigger OE 1 At this time, according to the preset capacitance discharge relation +.>And obtaining the discharging time Tf of the capacitor C in the current charging and discharging period, wherein the current charging and discharging period of the capacitor C=the charging time of the capacitor C in the current charging and discharging period+the discharging time of the capacitor C in the current charging and discharging period. When the discharge voltage of the capacitor C reaches the low flip-flop voltage V of the reverse Schmitt trigger OE 1 In this case, the voltage at the output terminal Y of the reverse schmitt trigger OE should be high again, and thus the cyclic reciprocation is performed to obtain a periodic rectangular wave.
As an alternative embodiment, the first adjustable resistor R1 and the second adjustable resistor R2 are gear adjustable resistors.
Specifically, the first adjustable resistor R1 and the second adjustable resistor R2 can be gear type adjustable resistors, and the current resistance of the gear type adjustable resistors is obtained by checking the current resistance gear of the gear type adjustable resistors.
It should also be noted that in this specification, relational terms such as first and second, and the like are used solely to distinguish one entity or action from another entity or action without necessarily requiring or implying any actual such relationship or order between such entities or actions. Moreover, the terms "comprises," "comprising," or any other variation thereof, are intended to cover a non-exclusive inclusion, such that a process, method, article, or apparatus that comprises a list of elements does not include only those elements but may include other elements not expressly listed or inherent to such process, method, article, or apparatus. Without further limitation, an element defined by the phrase "comprising one … …" does not exclude the presence of other like elements in a process, method, article, or apparatus that comprises the element.
The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.
Claims (7)
1. An adjustable pulse generator, comprising:
the waveform generation circuit is used for periodically generating rectangular waves with adjustable duty ratio and period after the waveform generation circuit is electrified;
the waveform delay circuit is connected with the output end of the waveform generation circuit and is used for delaying the rectangular wave for a first time and then outputting the rectangular wave as a first output signal, and delaying the rectangular wave for a second time and then outputting the rectangular wave as a second output signal; wherein the second time is more than the first time, and the two time differences are adjustable;
the waveform processing circuit is respectively connected with the output end of the waveform generation circuit and the output end of the waveform delay circuit and is used for performing waveform processing based on the first output signal and the second output signal to obtain pulse signals with adjustable pulse width, pulse value and pulse period so as to conveniently input the pulse signals with adjustable pulse width, pulse value and pulse period into a server circuit;
the waveform generation circuit comprises a first adjustable resistor, a second adjustable resistor and 1 diode;
the waveform processing circuit comprises an exclusive or gate, an AND gate and a voltage conversion circuit; wherein:
the first input end of the exclusive-or gate is connected with the first output signal of the waveform delay circuit, the second input end of the exclusive-or gate is connected with the second output signal of the waveform delay circuit, the output end of the exclusive-or gate is connected with the first input end of the and gate, the second input end of the and gate is connected with the output end of the waveform generation circuit, the output end of the and gate is connected with the input end of the voltage conversion circuit, and the output end of the voltage conversion circuit is used as the output end of the waveform processing circuit;
the voltage conversion circuit comprises a switching tube and a pull-up resistor; wherein:
the control end of the switching tube is connected with the output end of the AND gate, the first end of the switching tube is connected with the first end of the pull-up resistor, the common end is used as the output end of the voltage conversion circuit, the second end of the pull-up resistor is connected with an adjustable direct current power supply, and the second end of the switching tube is grounded; the switching tube is a switching tube with high-level cut-off and low-level conduction;
the adjustable direct current power supply meets the allowed input voltage on the line of the output signal pre-input of the voltage conversion circuit so as to realize line detection.
2. The adjustable pulse generator of claim 1, wherein the waveform generation circuit comprises a reverse schmitt trigger, the first adjustable resistor, the second adjustable resistor, the diode, and a capacitor; wherein:
the input end of the reverse schmitt trigger is respectively connected with the first end of the capacitor, the anode of the diode and the first end of the first adjustable resistor, the second end of the capacitor is grounded, the cathode of the diode is connected with the first end of the second adjustable resistor, the output end of the reverse schmitt trigger is respectively connected with the second end of the first adjustable resistor and the second end of the second adjustable resistor, and the common end is used as the output end of the waveform generating circuit;
and the reverse Schmitt trigger is used for periodically generating rectangular waves with adjustable duty ratio and period by adjusting the resistance values of the first adjustable resistor and the second adjustable resistor after the reverse Schmitt trigger is electrified.
3. The adjustable pulse generator of claim 1, wherein the waveform delay circuit comprises:
a dial switch;
the delay chip is respectively connected with the dial switch and the output end of the waveform generation circuit and is used for determining delay time according to the dial value of the dial switch; and the rectangular wave is transmitted and delayed by the chip and then is output as a first output signal, and the rectangular wave is output as a second output signal after being delayed by the delay time on the basis of the transmission and delay of the chip.
4. The adjustable pulser of claim 3 wherein said delay chip is specifically configured to convert a binary dialing value of said dialing switch to a decimal dialing value and multiply said decimal dialing value by a chip step time to obtain said delay time.
5. The adjustable pulse generator of claim 1, wherein,
the voltage conversion circuit is used for carrying out voltage conversion on the voltage value of the pulse signal after receiving the pulse signal with adjustable pulse width and pulse period output by the AND gate, so as to obtain the pulse signal with adjustable pulse value.
6. The tunable pulse generator of claim 2, wherein the tunable pulse generator further comprises:
a periodic arithmetic unit for charging the relational expression according to a preset capacitanceObtaining the charging time Tr of the capacitor in the current charging and discharging period, and according to the preset capacitor discharging relation +.>Obtaining the discharging time Tf of the capacitor in the current charging and discharging period, and obtaining the current charging and discharging period of the capacitor according to a preset period relation formula T=Tr+Tf;
wherein V is o1 For the initial charge voltage of the capacitor in the current charge-discharge period, V h For the high switching voltage of the reverse schmitt trigger, V t1 For the charge voltage of the capacitor when the charge time of the current charge-discharge cycle reaches t1, V o2 For the initial discharge voltage of the capacitor in the current charge-discharge period, V 1 For a low switching voltage of the reverse schmitt trigger, V t2 For the discharge voltage of the capacitor when the discharge time of the current charge-discharge period reaches t2, R 1 R is the resistance value of the first adjustable resistor in the current charge-discharge period 2 And c is the capacitance of the capacitor, which is the resistance of the second adjustable resistor in the current charge-discharge period.
7. The adjustable pulser according to claim 6, wherein said first adjustable resistor and said second adjustable resistor are both gear type adjustable resistors.
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| CN113640656B (en) * | 2021-07-30 | 2024-04-09 | 深圳速跃芯仪科技有限公司 | Digital test pattern generation method based on time delay |
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