CN111628774A - High-precision differential phase quantization analog-to-digital converter - Google Patents
High-precision differential phase quantization analog-to-digital converter Download PDFInfo
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- CN111628774A CN111628774A CN202010523142.1A CN202010523142A CN111628774A CN 111628774 A CN111628774 A CN 111628774A CN 202010523142 A CN202010523142 A CN 202010523142A CN 111628774 A CN111628774 A CN 111628774A
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- 238000006243 chemical reaction Methods 0.000 claims description 27
- 238000001514 detection method Methods 0.000 claims description 18
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- 230000005540 biological transmission Effects 0.000 abstract description 5
- 238000010586 diagram Methods 0.000 description 4
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- 230000009286 beneficial effect Effects 0.000 description 1
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- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03M—CODING; DECODING; CODE CONVERSION IN GENERAL
- H03M1/00—Analogue/digital conversion; Digital/analogue conversion
- H03M1/12—Analogue/digital converters
- H03M1/1205—Multiplexed conversion systems
- H03M1/123—Simultaneous, i.e. using one converter per channel but with common control or reference circuits for multiple converters
Abstract
The invention discloses a high-precision differential phase quantization analog-to-digital converter. The circuit structure comprises a phase equalizer module, a differential comparator module, an encoder module, a buffer module, a digital signal sending module and a clock duty ratio calibration module; compared with the prior analog-digital converter, the invention eliminates the data transmission problems caused by inconsistent phases of a plurality of paths of phase clocks and unbalanced duty ratio of clock signals, improves the output characteristic of the phase quantization analog-digital converter circuit and greatly improves the working performance of the circuit under the conditions of high precision and high working frequency.
Description
Technical Field
The invention belongs to the technical field of circuits, and relates to a high-precision differential phase quantization analog-to-digital converter.
Background
The analog-to-digital converter is used as a bridge for connecting the analog signal and the digital signalIt is ubiquitous and irreplaceable in modern electrochemical detection and analysis instruments. The digitization object of a conventional analog-to-digital converter (ADC) is amplitude information of an analog signal, and if the digitization object is changed into phase information of the analog signal, the ADC is called a phase quantization ADC. The phase quantization ADC has the advantages that the number of comparators can be greatly reduced on the basis of an orthogonal sampling technology, the complexity of a system is reduced, meanwhile, the performance is not influenced by the amplitude change of an analog signal, and digital phase modulation can be directly realized in system application. The orthogonal sampling technology is to convert an analog input signal into two paths of orthogonal signals I/Q and then perform subsequent processing. The function to be realized by the phase quantization ADC with Nbit precision is to compare every two different combinations of various weighted signals of I/Q to obtain 2NA plurality of equal phase intervals, each interval having a width of (2 pi/2)N) And then output them quantized. Simply to obtain 2N-1Square waves with the same frequency as the I/Q and the duty ratio of 50 percent, and the phase difference between every two of the square waves is (2 pi/2)N) And (4) degree. The higher the accuracy, the better the performance of the phase quantization ADC. The 1-phase ADC should therefore perform the following functions: deriving 2 from quadrature signal I/Q15Two ways differ by 2 pi/215≈9.6×10-5Has a duty ratio of 50% and is a square wave with the same frequency as the I/Q. However, the conventional phase quantization ADC has the disadvantage of large weighted signal processing capacity, and as the quantization precision and speed are improved, the bit width and code rate of the output digital signal are also improved, so that the requirements on the time sequences of the encoding circuit and the output interface circuit are more and more strict. Particularly, in the case of high-precision ADC conversion application, the problems of inconsistent phases of multiple phase clocks in the phase quantization ADC circuit and unbalanced duty ratio of clock signals are easily caused, which may cause error codes to occur in output signals of the encoder, and reduce the transmission efficiency of the output interface circuit.
Disclosure of Invention
The invention aims to overcome the defects of the prior art, provides a differential phase quantization analog-to-digital converter circuit, and solves the problems of inconsistent phases of multiple paths of phase clocks and unbalanced duty ratios of clock signals in the prior phase quantization analog-to-digital converter circuit. The invention can eliminate the data transmission problem caused by inconsistent phases of the multi-path phase clock and unbalanced duty ratio of the clock signal, and ensure the performance requirement of the data time sequence.
The technical solution of the invention is as follows:
a differential phase quantization analog-to-digital converter comprises a phase equalizer module, a differential comparator module, an encoder module, a buffer module and a digital signal sending module; the method is characterized in that: the clock duty ratio calibration module is also included; the phase equalizer module 1 receives an I path input signal and a Q path input signal, and performs phase equalization on the I path input signal and the Q path input signal to obtain a plurality of paths of differential signals and sends the differential signals to the differential comparator module; the differential comparator module compares the multi-path differential signals to obtain multi-path digital signals and sends the multi-path digital signals to the encoder module; the input clock signal is sent to the buffer module, and the buffer module changes one path of clock signal into a plurality of paths of clock signals and sends the clock signals to the encoder module and the clock duty ratio calibration module; the clock duty ratio calibration module carries out duty ratio detection on the input multi-channel clock signals, converts the detection result into a plurality of voltage adjustment signals and sends the voltage adjustment signals to the buffer module; the voltage adjusting signal controls the duty ratio of the clock signal output by the buffer module; the encoder module realizes data format conversion from temperature codes to Gray codes and serial-parallel conversion of Gray code signals for the multi-channel digital signals under the control of a clock signal; and the Gray code signal after the serial-parallel conversion is sent out by a digital signal sending module.
The clock duty ratio calibration module comprises a clock detection module, an error signal conversion module and a bias voltage adjustment module; the clock detection module detects the phase relation and the duty ratio of the multi-channel clock signals output by the buffer module, and forms error adjustment signals according to detection results and sends the error adjustment signals to the error signal conversion module; the error signal conversion module converts the error adjusting signal into a current adjusting signal and sends the current adjusting signal to the bias voltage adjusting module; the current adjusting signal controls the working current of the bias voltage adjusting module, the output voltage signal of the bias voltage adjusting module is changed, and the bias voltage adjusting module sends the output voltage adjusting signal to the buffer module; the voltage adjusting signal controls the duty ratio of the output clock of the buffer module.
The invention has the following beneficial effects:
after the improved clock duty ratio calibration is applied, compared with the prior analog-to-digital converter, the phase quantization analog-to-digital converter ADC provided by the invention eliminates the data transmission problem caused by inconsistent phases of multiple paths of phase clocks and unbalanced clock signal duty ratios, improves the output characteristic of a phase quantization analog-to-digital converter circuit, and greatly improves the working performance of the circuit under the conditions of high precision and high working frequency.
Drawings
Fig. 1 is a schematic circuit diagram of a conventional phase quantization adc;
FIG. 2 is a schematic diagram of a phase quantization ADC circuit according to the present invention;
FIG. 3 is a schematic diagram of a clock duty calibration module according to the present invention.
Description of the preferred embodiments
The invention is further analyzed with reference to the following detailed drawings.
The conventional phase quantization adc circuit shown in fig. 1 includes a phase equalizer module 1, a differential comparator module 2, an encoder module 3, a buffer module 4, and a digital signal transmission module 6; after the I path input signal and the Q path input signal pass through the phase equalizer module 1, a plurality of paths of amplitude signals carrying different phase information are generated, which determine the output result of the differential comparator module 2. When the phase quantization precision is increased, more phase averager modules 1 are needed to extract the phase information of the input signal, and also more differential comparator modules 2 are needed to convert the analog signal and the digital signal. Therefore, the bit width of data entering the encoder module is continuously increased, and meanwhile, with the continuous increase of the data rate, the requirement of the data timing sequence is more and more strict, and when the encoder module 3 performs data format conversion and data transmission mode conversion, the problems of conversion error and data loss in data conversion can be caused by inconsistent phases of the multi-path phase clock and unbalanced duty ratio of the clock signal, so that the output result of the phase quantization analog-to-digital converter is deteriorated, and the working state and the working performance of the data processing module are affected.
Fig. 2 and fig. 3 are schematic diagrams of the circuit structure of the phase quantization adc according to the present invention and a preferred implementation of the clock duty calibration module thereof. The phase quantization analog-to-digital converter circuit of the present invention includes: the phase equalizer comprises a phase equalizer module 1, a differential comparator module 2, an encoder module 3, a buffer module 4, a clock duty ratio calibration module 5 and a digital signal sending module 6; the phase equalizer module 1 receives an I path input signal and a Q path input signal, and the phase equalizer module 1 performs phase equalization on the I path input signal and the Q path input signal to obtain a plurality of paths of differential signals and sends the differential signals to the differential comparator module 2; the difference comparator module 2 compares the plurality of paths of difference signals to obtain a plurality of paths of digital signals and sends the digital signals to the encoder module 3; an input clock signal is sent to a buffer module 4, the buffer module 4 changes one path of clock signal into a plurality of paths of clock signals and sends the clock signals to an encoder module 3 and a clock duty ratio calibration module 5; the clock duty ratio calibration module 5 performs duty ratio detection on the input multi-channel clock signals, converts the detection results into a plurality of voltage adjustment signals and sends the voltage adjustment signals to the buffer module 4; the voltage adjusting signal controls the duty ratio of the clock signal output by the buffer module 4; the encoder module 3 realizes data format conversion from temperature codes to Gray codes and serial-parallel conversion of Gray code signals for a plurality of paths of digital signals under the control of clock signals; the gray code signal after the serial-parallel conversion is sent out by the digital signal sending module 6. The clock duty ratio calibration module 5 consists of a clock detection module 7, an error signal conversion module 8 and a bias voltage adjustment module 9; the clock detection module 7 detects the phase relation and the duty ratio of the multi-channel clock signals output by the buffer module 4, and forms error adjustment signals according to detection results and sends the error adjustment signals to the error signal conversion module 8; the error signal conversion module 8 converts the error adjustment signal into a current adjustment signal and sends the current adjustment signal to the bias voltage adjustment module 9; the current adjusting signal controls the working current of the bias voltage adjusting module 9, changes the output voltage signal of the bias voltage adjusting module 9, and the bias voltage adjusting module 9 sends the output voltage adjusting signal to the buffer module 4; the voltage adjustment signal controls the duty cycle of the output clock of the buffer module 4. As an innovative feature herein, a clock duty cycle calibration module 5 consisting of a clock detection module 7, an error signal conversion module 8 and a bias voltage adjustment module 9 is added between the encoder module 3 and the buffer module 4. The problem of phase inconsistency and duty ratio maladjustment caused by the buffer module 1 or the input clock is solved by detecting the phase relation and the duty ratio in the multi-path clock signal output by the buffer module 1, the efficiency and the accuracy of the encoder module 3 for converting the data format are improved, and the working performance of the circuit under high precision and high working frequency is improved.
The design of the invention introduces the multi-path output clock signals of the buffer module into a clock detection module 7, the circuit simultaneously monitors the phase relation and the duty ratio of the multi-path clock signals, if the phase information of the multi-path clock signals is distorted or the duty ratio is disordered, the clock detection circuit 7 can generate a plurality of adjustment digital signals to be sent into an error signal conversion module 8, the circuit can identify the plurality of adjustment digital signals and convert the adjustment digital signals into a plurality of current signals for controlling the working state of a bias voltage adjustment module 9, so as to change the output voltage of the bias voltage adjustment module 9, the bias voltage adjustment module 9 outputs a plurality of control voltages to adjust the working state of the buffer module 4, and the influence caused by the problem of phase inconsistency and the disorder of the duty ratio introduced by the buffer module 1 or the input clock itself is eliminated.
The calibration circuit greatly improves the quantization precision and the working speed of the phase quantization analog-digital conversion circuit, has a simple structure, can eliminate the problems of inconsistency and maladjustment introduced by an internal circuit, can also eliminate the problems of inconsistency and maladjustment introduced by an input clock, does not need other circuits to carry out external bias, and practically ensures the working characteristics of the phase quantization analog-digital conversion circuit.
Claims (2)
1. A differential phase quantization analog-to-digital converter has a circuit structure comprising a phase equalizer module, a differential comparator module, an encoder module, a buffer module and a digital signal sending module; the method is characterized in that: the clock duty ratio calibration module is also included; the phase equalizer module 1 receives an I path input signal and a Q path input signal, and performs phase equalization on the I path input signal and the Q path input signal to obtain a plurality of paths of differential signals and sends the differential signals to the differential comparator module; the differential comparator module compares the multi-path differential signals to obtain multi-path digital signals and sends the multi-path digital signals to the encoder module; the input clock signal is sent to the buffer module, and the buffer module changes one path of clock signal into a plurality of paths of clock signals and sends the clock signals to the encoder module and the clock duty ratio calibration module; the clock duty ratio calibration module carries out duty ratio detection on the input multi-channel clock signals, converts the detection result into a plurality of voltage adjustment signals and sends the voltage adjustment signals to the buffer module; the voltage adjusting signal controls the duty ratio of the clock signal output by the buffer module; the encoder module realizes data format conversion from temperature codes to Gray codes and serial-parallel conversion of Gray code signals for the multi-channel digital signals under the control of a clock signal; and the Gray code signal after the serial-parallel conversion is sent out by a digital signal sending module.
2. The differential phase quantization analog-to-digital converter of claim 1, wherein the clock duty cycle calibration module comprises a clock detection module, an error signal conversion module, and a bias voltage adjustment module; the clock detection module detects the phase relation and the duty ratio of the multi-channel clock signals output by the buffer module, and forms error adjustment signals according to detection results and sends the error adjustment signals to the error signal conversion module; the error signal conversion module converts the error adjusting signal into a current adjusting signal and sends the current adjusting signal to the bias voltage adjusting module; the current adjusting signal controls the working current of the bias voltage adjusting module, the output voltage signal of the bias voltage adjusting module is changed, and the bias voltage adjusting module sends the output voltage adjusting signal to the buffer module; the voltage adjusting signal controls the duty ratio of the output clock of the buffer module.
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| CN202010523142.1A CN111628774A (en) | 2020-06-10 | 2020-06-10 | High-precision differential phase quantization analog-to-digital converter |
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| CN202010523142.1A CN111628774A (en) | 2020-06-10 | 2020-06-10 | High-precision differential phase quantization analog-to-digital converter |
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