CN111564490B - 一种P-GaN增强型HEMT器件及其制备方法 - Google Patents
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Abstract
一种P‑GaN增强型HEMT器件及其制备方法,属于半导体技术领域,包括从下至上依次层叠设置的衬底、ALN成核层、ALGaN缓冲层、GaN沟道层、ALN插入层、ALGaN势垒层、低温饱和P型GaN、P‑GaN、钝化层、源极(110)、漏极、栅极。在P‑GaN层和势垒层之间生长一层低温饱和P型GaN(LTPGaN层),该层的生长阻止了P‑GaN层的mg扩散至沟道层,从而降低器件的导通电阻,提升HEMT器件的工作效率。
Description
技术领域
本发明属于微电子技术领域,涉及半导体器件的外延制备,一种P-GaN增强型HEMT器件及其制备方法,具体涉及通过低温饱和P型层阻挡P-GaN的mg扩散到沟道层,从而降低器件的导通电阻,改善HEMT的器件工作效率。
背景技术
ALGaN/GaN HEMT 在高温、高压、高频大功率方面的潜在优势,使其受到广泛关注,并取得巨大进展。但是常规的ALGaN/GaN HEMT器件均为耗尽型,需要施加一个负的栅极电压才能使器件关断,芯片设计时增加了设计成本,因此如何实现增强型GaN HEMT一直是该领域研究的难点,目前几种主要用来制备增强型器件的方案包括:p型栅、凹槽栅、F处理和Cascode结构。其中,p型栅的方案已经被很多著名的研究机构和公司采用,如IMEC、FBH、Panasonic、EPC和Samsung等。
在P-GaN增强型HEMT中,P-GaN的mg容易扩散至沟道层中,从而使器件的比导通电阻增大。为了改善此问题,一般将势垒层的厚度增加,但是势垒层的增加会增加异质结极化作用,从而导致阈值电压变小。
发明内容
本发明的目的在于克服目前氮化镓HEMT器件晶格质量较差的问题,提供了一种HEMT外延结构及其制备方法,能够提高HEMT器件的质量。
一种P-GaN增强型HEMT器件,包括从下至上依次排布的衬底、ALN成核层、ALGaN缓冲层、GaN沟道层、ALN插入层、ALGaN势垒层、低温饱和P型GaN、P-GaN以及栅极,P-GaN的两侧还设有钝化层,钝化层分别设有源极和漏极,GaN沟道层与ALN插入层之间还形成有二维电子气沟道。
一种P-GaN增强型HEMT器件的制备方法,包括如下步骤:
(1)在衬底生长成核层ALN,厚度为80-150nm;
(2)在前述步骤上生长ALGaN缓冲层,厚度为500-1200nm;
(3)在前述步骤上生长GaN沟道层,厚度为1-3um;
(4)在前述步骤上生长ALN插入层,厚度为1-3nm;
(5)在前述步骤上生长ALGaN势垒层,厚度为15-20nm;
(6)在前述步骤上生长低温饱和P型GaN,厚度为20-40nm;
(7)在前述步骤上生长P-GAN,厚度为30-150nm;
(8)在前述步骤基础上采用电子束蒸镀技术进行金属沉积,依次沉积Ti/Al/Ti/Au金属,形成源极和漏极,并进行退火处理形成欧姆接触;
(9)在前述步骤上采用电子束蒸镀技术进行金属沉积,依次沉积Ni/Au,形成栅极;
(10)在前述步骤上使用蚀刻技术将除栅极下方的P-GaN和低温饱和P型GaN的部分去除,只保留栅极下方才有的P-GaN层和低温饱和P型GaN层;
(11)在前述步骤上利用PECVD的方法沉积钝化层。
优选的,所述衬底为蓝宝石、SiC、Si其中任何一种材料,尺寸为2-8inch。
优选的,所述ALN成核层、ALGaN缓冲层、GaN沟道层厚度依次为100nm、600nm、2um。
优选的,所述步骤(7)中Ti、Al、Ti、Au金属的厚度分别为20nm、100nm、30nm、120nm。
优选的,所述ALN插入层、ALGaN势垒层、低温饱和P型GaN、P-GaN厚度依次为2nm、20nm、20-40nm、100nm。
优选的,所述步骤(8)中栅极中Ni、Au的厚度分别为45nm和100nm。
优选的,所述钝化层为Si3N4钝化层。
优选的,所述步骤(11)中沉积钝化层的工艺参数为:气体流量比为SiH4:NH3=2:1,压强为600mTorr,温度为280℃,功率22W,厚度为250nm。
与现有技术相比,本发明具有如下优点:
在P-GaN层和势垒层之间生长一层低温饱和P型GaN(LTPGaN层),低温P型GaN中mg处于过饱和状态,当P-GaN的mg向下扩散时被该层阻止了,降低了P-GaN层的mg扩散至沟道层(mg扩散至沟道层会形成缺陷,增加散射,会增加器件的导通电阻),从而降低器件的导通电阻,提升HEMT器件的工作效率。
附图说明
图1为本发明的结构示意图。
图2为按照实施例1/2/3所得实验结果。
其中:101-衬底,102-ALN成核层,103-ALGaN缓冲层,104-GaN沟道层,105-ALN插入层,106-ALGaN势垒层,107-低温饱和P型GaN,108-P-GaN,109-钝化层,110-源极,111-漏极,112-栅极。
具体实施方式
为使本发明实现的技术手段、创作特征、达成目的与功效易于明白了解,下面结合具体实施方式,进一步阐述本发明。
本发明的一种P-GaN增强型HEMT器件,包括从下至上依次排布的衬底101、ALN成核层102、ALGaN缓冲层103、GaN沟道层104、ALN插入层105、ALGaN势垒层106、低温饱和P型GaN107、P-GaN108以及栅极112,P-GaN108的两侧还设有钝化层109,钝化层109分别设有源极110和漏极111,GaN沟道层104与ALN插入层105之间还形成有二维电子气沟道,具体采用以下方法制得:
实施例1
(1)在一块SiC衬底101生长成核层ALN102,厚度为100nm;
(2)在前述步骤上生长ALGaN缓冲层103,厚度为600nm;
(3)在前述步骤上生长GaN沟道层104,厚度为2um;
(4)在前述步骤上生长ALN插入层105,厚度为2nm;
(5)在前述步骤上生长ALGaN势垒层106,厚度为20nm;
(6)在前述步骤上生长低温饱和P型GaN107,厚度为20nm;
(7)在前述步骤上生长P-GAN108,厚度为100nm;
(8)在前述步骤基础上采用电子束蒸镀技术进行金属沉积。依次沉积Ti/Al/Ti/Au金属,厚度分别为20nm/100nm/30nm/120nm,形成源极110和漏极111,并进行退火处理形成欧姆接触;
(9)在前述步骤上采用电子束蒸镀技术进行金属沉积。依次沉积Ni/Au,形成栅极112,厚度分别为45nm和100nm;
(10)在前述步骤上使用蚀刻技术将除栅极下方的P-GaN和低温饱和P型GaN107去除,只保留栅极下方才有的P-GaN层108和低温饱和P型GaN107;
(11)在前述步骤上利用PECVD的方法沉积Si3N4钝化层109,气体流量比为SiH4:NH3=2:1,压强为600mTorr,温度为280℃,功率22W,厚度为250nm;
实施例2:
(1)在一块SiC衬底101生长成核层ALN102,厚度为100nm;
(2)在前述步骤上生长ALGaN缓冲层103,厚度为600nm;
(3)在前述步骤上生长GaN沟道层104,厚度为2um;
(4)在前述步骤上生长ALN插入层105,厚度为2nm;
(5)在前述步骤上生长ALGaN势垒层106,厚度为20nm;
(6)在前述步骤上生长低温饱和P型GaN107,厚度为30nm;
(7)在前述步骤上生长P-GAN108,厚度为100nm;
(8)在前述步骤基础上采用电子束蒸镀技术进行金属沉积。依次沉积Ti/Al/Ti/Au金属,厚度分别为20nm/100nm/30nm/120nm,形成源极110和漏极111,并进行退火处理形成欧姆接触;
(9)在前述步骤上采用电子束蒸镀技术进行金属沉积。依次沉积Ni/Au,形成栅极112,厚度分别为45nm和100nm;
(10)在前述步骤上使用蚀刻技术将除栅极下方的P-GaN和低温饱和P型GaN107去除,只保留栅极下方才有的P-GaN层108和低温饱和P型GaN107;
(11)在前述步骤上利用PECVD的方法沉积Si3N4钝化层109,气体流量比为SiH4:NH3=2:1,压强为600mTorr,温度为280℃,功率22W,厚度为250nm;
实施例3:
(1)在一块SiC衬底101生长成核层ALN102,厚度为100nm;
(2)在前述步骤上生长ALGaN缓冲层103,厚度为600nm;
(3)在前述步骤上生长GaN沟道层104,厚度为2um;
(4)在前述步骤上生长ALN插入层105,厚度为2nm;
(5)在前述步骤上生长ALGaN势垒层106,厚度为20nm;
(6)在前述步骤上生长低温饱和P型GaN107,厚度为40nm;
(7)在前述步骤上生长P-GAN108,厚度为100nm;
(8)在前述步骤基础上采用电子束蒸镀技术进行金属沉积。依次沉积Ti/Al/Ti/Au金属,厚度分别为20nm/100nm/30nm/120nm,形成源极110和漏极111,并进行退火处理形成欧姆接触;
(9)在前述步骤上采用电子束蒸镀技术进行金属沉积。依次沉积Ni/Au,形成栅极112,厚度分别为45nm和100nm;
(10)在前述步骤上使用蚀刻技术将除栅极下方的P-GaN和低温饱和P型GaN107去除,只保留栅极下方才有的P-GaN层108和低温饱和P型GaN107;
(11)在前述步骤上利用PECVD的方法沉积Si3N4钝化层109,气体流量比为SiH4:NH3=2:1,压强为600mTorr,温度为280℃,功率22W,厚度为250nm。
将上述实施例的方法获得的产品进行性能测试,数据结果如图2所示,表明低温饱和P型GaN(LTPGaN层)能有效降低比导通电阻,均值约33%。
由技术常识可知,本发明可以通过其它的不脱离其精神实质或必要特征的实施方案来实现。因此,上述公开的实施方案,就各方面而言,都只是举例说明,并不是仅有的。所有在本发明范围内或在等同于本发明的范围内的改变均被本发明包含。
Claims (8)
1.一种P-GaN增强型HEMT器件,其特征在于,包括从下至上依次排布的衬底(101)、ALN成核层(102)、ALGaN缓冲层(103)、GaN沟道层(104)、ALN插入层(105)、ALGaN势垒层(106)、低温饱和P型GaN(107)、P-GaN(108)以及栅极(112),P-GaN(108)的两侧还设有钝化层(109),钝化层(109)分别设有源极(110)和漏极(111),GaN沟道层(104)与ALN插入层(105)之间还形成有二维电子气沟道,低温P型GaN中mg处于过饱和状态。
2.一种根据权利要求1所述的P-GaN增强型HEMT器件的制备方法,其特征在于,包括如下步骤:
(1)在衬底(101)生长成核层ALN(102),厚度为80-150nm;
(2)在前述步骤上生长ALGaN缓冲层(103),厚度为500-1200nm;
(3)在前述步骤上生长GaN沟道层(104),厚度为1-3um;
(4)在前述步骤上生长ALN插入层(105),厚度为1-3nm;
(5)在前述步骤上生长ALGaN势垒层(106),厚度为15-20nm;
(6)在前述步骤上生长低温饱和P型GaN(107),厚度为20-40nm;
(7)在前述步骤上生长P-GAN(108),厚度为30-150nm;
(8)在前述步骤基础上采用电子束蒸镀技术进行金属沉积,依次沉积Ti/Al/Ti/Au金属,形成源极(110)和漏极(111),并进行退火处理形成欧姆接触;
(9)在前述步骤上采用电子束蒸镀技术进行金属沉积,依次沉积Ni/Au,形成栅极(112);
(10)在前述步骤上使用蚀刻技术将除栅极(112)下方的P-GaN(108)和低温饱和P型GaN(107)的部分去除,只保留栅极(112)下方才有的P-GaN层(108)和低温饱和P型GaN(107);
(11)在前述步骤上利用PECVD的方法沉积钝化层(109)。
3.根据权利要求2所述的一种P-GaN增强型HEMT器件的制备方法,其特征在于,所述衬底(101)为蓝宝石、SiC、Si其中任何一种材料,尺寸为2-8inch。
4.根据权利要求2所述的一种P-GaN增强型HEMT器件的制备方法,其特征在于,所述ALN成核层(102)、ALGaN缓冲层(103)、GaN沟道层(104)厚度依次为100nm、600nm、2um。
5.根据权利要求2所述的一种P-GaN增强型HEMT器件的制备方法,其特征在于,所述步骤(7)中Ti、Al、Ti、Au金属的厚度分别为20nm、100nm、30nm、120nm。
6.根据权利要求2所述的一种P-GaN增强型HEMT器件的制备方法,其特征在于,所述步骤(8)中栅极(112)中Ni、Au的厚度分别为45nm和100nm。
7.根据权利要求2所述的一种P-GaN增强型HEMT器件的制备方法,其特征在于,所述钝化层(109)为Si3N4钝化层。
8.根据权利要求7所述的一种P-GaN增强型HEMT器件的制备方法,其特征在于,所述步骤(11)中沉积钝化层的工艺参数为:气体流量比为SiH4:NH3=2:1,压强为600mTorr,温度为280℃,功率22W,厚度为250nm。
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