CN111554665A - Package antenna structure, manufacturing method thereof and electronic device - Google Patents
Package antenna structure, manufacturing method thereof and electronic device Download PDFInfo
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- CN111554665A CN111554665A CN202010429536.0A CN202010429536A CN111554665A CN 111554665 A CN111554665 A CN 111554665A CN 202010429536 A CN202010429536 A CN 202010429536A CN 111554665 A CN111554665 A CN 111554665A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/58—Structural electrical arrangements for semiconductor devices not otherwise provided for, e.g. in combination with batteries
- H01L23/64—Impedance arrangements
- H01L23/66—High-frequency adaptations
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/80—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
- H01L24/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01Q—ANTENNAS, i.e. RADIO AERIALS
- H01Q1/00—Details of, or arrangements associated with, antennas
- H01Q1/12—Supports; Mounting means
- H01Q1/22—Supports; Mounting means by structural association with other equipment or articles
- H01Q1/2283—Supports; Mounting means by structural association with other equipment or articles mounted in or on the surface of a semiconductor substrate as a chip-type antenna or integrated with other components into an IC package
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2223/00—Details relating to semiconductor or other solid state devices covered by the group H01L23/00
- H01L2223/58—Structural electrical arrangements for semiconductor devices not otherwise provided for
- H01L2223/64—Impedance arrangements
- H01L2223/66—High-frequency adaptations
- H01L2223/6661—High-frequency adaptations for passive devices
- H01L2223/6677—High-frequency adaptations for passive devices for antenna, e.g. antenna included within housing of semiconductor device
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Details Of Aerials (AREA)
Abstract
The application provides a packaged antenna structure, a manufacturing method thereof and electronic equipment, and relates to the technical field of antennas. In the package antenna structure of the application, the antenna is arranged on the package body of the package chip and is positioned on one side of the package body, which is far away from the substrate. This allows the antenna to be located above the chip, rather than being disposed on the substrate as with the chip, and the antenna does not need to occupy a portion of the substrate separately, thereby facilitating a reduction in package area. The signal circuit is connected with the conductive layer by arranging the conductive columns, and then all the antennas are connected. Compared with a single connecting wire for connecting the chip and the antenna, short-distance transmission is easy to realize, so that signal transmission is stable and signal loss is small. The manufacturing method provided by the embodiment of the application is used for manufacturing the packaged antenna structure provided by the embodiment of the application, and the electronic device provided by the embodiment of the application uses the packaged antenna structure, so that the miniaturization is easy to realize, and the electronic device has good communication performance.
Description
Technical Field
The application relates to the technical field of antennas, in particular to a packaged antenna structure, a manufacturing method thereof and electronic equipment.
Background
With the rapid development of the semiconductor industry, the IC rf Antenna structure is widely applied to the semiconductor industry, wherein a conventional AiP (packaged Antenna in Package) module is adopted, the Antenna is usually directly placed on the substrate, and the chip and the external Antenna are respectively packaged by two packages. The method for arranging the external antenna is not suitable for product modularization, and the antenna occupies extra packaging area, so that the whole packaging area is larger, the integration is poorer, and further, the electronic equipment also occupies larger volume.
Disclosure of Invention
The purpose of the present application includes providing a packaged antenna structure, a manufacturing method thereof, and an electronic device, which can have a smaller package volume and is beneficial to miniaturization of the electronic device.
The embodiment of the application can be realized as follows:
in a first aspect, an embodiment of the present application provides a packaged antenna structure, including:
a substrate provided with a signal line;
the chip is arranged on the substrate and is electrically connected with the signal circuit;
the packaging body wraps the chip, a conductive layer and a conductive column are embedded in the packaging body, one end of the conductive column is connected to the conductive layer, and the other end of the conductive column is connected to the signal circuit;
and the antenna is arranged on one side of the packaging body, which is far away from the substrate, and is electrically connected with the conducting layer.
In an alternative embodiment, the antenna is a horn antenna, an antenna slot is disposed on a side of the package body away from the substrate, a bottom width of the antenna slot is smaller than a width of the opening, the bottom of the antenna slot extends to the conductive layer, and an inner side of the antenna slot is coated with an antenna material to form a horn antenna electrically connected to the conductive layer.
In an alternative embodiment, the conductive layer is in the shape of a cap and houses the chip and the conductive posts inside.
In an optional embodiment, the material of the conductive post is at least one of graphite, metal, and conductive adhesive.
In an alternative embodiment, the signal line includes a pad, and one end of the conductive pillar is connected to the pad;
in an alternative embodiment, the packaged antenna structure includes a plurality of antennas that are arrayed across the package.
In a second aspect, an embodiment of the present application provides a method for manufacturing a packaged antenna structure, including:
a chip and a conductive column are arranged on the substrate, one end of the conductive column is connected with a signal circuit of the substrate, and the chip is electrically connected with the signal circuit of the substrate;
and manufacturing a packaging body embedded with the conductive layer to package the chip and the conductive column, and connecting the other end of the conductive column with the conductive layer.
At least one antenna is arranged on one side of the packaging body far away from the chip, and the antenna is electrically connected with the conductive layer.
In an optional embodiment, the manufacturing of the package body with the embedded conductive layer to package the chip and the conductive pillar, and connecting the other end of the conductive pillar to the conductive layer includes:
manufacturing a first packaging body to package the chip and the conductive columns;
polishing the first packaging body to expose the end face of one end of the conductive column far away from the substrate;
coating a conductive material on the surface of the first packaging body to form a conductive layer, wherein the coating area of the conductive material covers the end face of the conductive column;
and manufacturing a second packaging body to package the first packaging body so as to form a packaging body embedded with the conductive layer.
In an alternative embodiment, fabricating a second package to package the first package to form a package with a conductive layer embedded therein includes: forming a second plastic package body on the outer side of the first plastic package body by using a mold and a plastic package process, and simultaneously forming at least one antenna slot on the surface of the second plastic package body, wherein the width of the bottom of the antenna slot is smaller than the width of the opening, and the bottom of the antenna slot extends to the conductive layer;
set up at least one antenna at the packaging body and keep away from one side of chip to electrically connect antenna and conducting layer, include: an antenna material is coated on the inside of the antenna slot to form an antenna.
In a third aspect, an embodiment of the present application provides an electronic device, including the packaged antenna structure in any one of the foregoing embodiments, or the packaged antenna structure manufactured by the manufacturing method in any one of the foregoing embodiments.
The beneficial effects of the embodiment of the application include, for example:
in the package antenna structure provided by the embodiment of the application, the antenna is arranged on the package body of the package chip and is positioned on one side of the package body, which is far away from the substrate. This allows the antenna to be located above the chip, rather than being disposed on the substrate as with the chip, and the antenna does not need to occupy a portion of the substrate separately, thereby facilitating a reduction in package area. The signal circuit is connected with the conductive layer by arranging the conductive columns, and then all the antennas are connected. Compared with a single connecting wire for connecting the chip and the antenna, short-distance transmission is easy to realize, so that signal transmission is stable and signal loss is small. The manufacturing method provided by the embodiment of the application is used for manufacturing the packaged antenna structure provided by the embodiment of the application, and the electronic device provided by the embodiment of the application uses the packaged antenna structure, so that the miniaturization is easy to realize, and the electronic device has good communication performance.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present application and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained from the drawings without inventive effort.
FIG. 1 is a diagram of a packaged antenna structure in the prior art;
FIG. 2 is a schematic diagram of a packaged antenna structure according to an embodiment of the present application;
fig. 3 is a flow chart illustrating a method of fabricating a packaged antenna structure according to an embodiment of the present application;
fig. 4 is a schematic diagram of a substrate with a conductive pillar and a chip mounted thereon according to an embodiment of the present disclosure;
FIG. 5 is a flow chart of a method of fabricating a package according to an embodiment of the present application;
fig. 6 to 10 are schematic diagrams illustrating a process of manufacturing a package according to an embodiment of the present disclosure.
Icon: 1' -a substrate; a 2' -antenna; 3' -a chip; 4' -a package; 010-packaging the antenna structure; 100-a substrate; 110-signal lines; 120-solder ball; 200-chip; 300-a conductive post; 400-a package body; 410-a first package; 420-a conductive layer; 430-a second package; 440-antenna slots; 500-antenna.
Detailed Description
Fig. 1 is a schematic diagram of a package antenna structure in the prior art. As shown in fig. 1, a conventional antenna 2 ' (here, a horn antenna is taken as an example) is fixed on the front surface of a substrate 1 ' through a conductive adhesive, and is connected to a surface circuit of the substrate 1 ', and is separated from a chip 3 ', and the antenna 1 ' and the chip 3 ' are separately packaged by a package 4 ', so that the packaging area is large, the product integrity is poor, and the size of an electronic device to which the antenna is applied is also increased.
In order to improve the above-mentioned shortcomings in the related art, the present application provides a packaged antenna structure and a method for manufacturing the same. The antenna is prevented from being packaged independently by arranging the antenna on the surface of a packaging body of the packaging chip, so that the total packaging area is reduced, the cost is reduced, and the miniaturization of electronic equipment is facilitated. The manufacturing method provided by the embodiment of the application has high feasibility. In order to make the objects, technical solutions and advantages of the embodiments of the present application clearer, the technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application, and it is obvious that the described embodiments are some embodiments of the present application, but not all embodiments. The components of the embodiments of the present application, generally described and illustrated in the figures herein, can be arranged and designed in a wide variety of different configurations.
It should be noted that: like reference numbers and letters refer to like items in the following figures, and thus, once an item is defined in one figure, it need not be further defined and explained in subsequent figures.
In the description of the present application, it should be noted that if the terms "upper", "lower", "inside", "outside", etc. are used for indicating the orientation or positional relationship based on the orientation or positional relationship shown in the drawings or the orientation or positional relationship which the present invention product is usually put into use, it is only for convenience of describing the present application and simplifying the description, but it is not intended to indicate or imply that the referred device or element must have a specific orientation, be constructed in a specific orientation and be operated, and thus, should not be construed as limiting the present application.
Furthermore, the appearances of the terms "first," "second," and the like, if any, are used solely to distinguish one from another and are not to be construed as indicating or implying relative importance.
It should be noted that the features of the embodiments of the present application may be combined with each other without conflict.
Fig. 2 is a schematic diagram of a packaged antenna structure 010 according to an embodiment of the present application. Referring to fig. 2, the package antenna structure 010 of the present embodiment includes a substrate 100, a chip 200, a package 400, a conductive pillar 300, and an antenna 500.
The substrate 100 is provided with a signal line 110, and the chip 200 is fixed on the surface of the substrate 100 and electrically connected to the signal line 110 by wire bonding. One end of the conductive post 300 is connected to the signal line 110, and the other end extends in a direction away from the substrate 100, specifically in this embodiment, the conductive post 300 is vertically disposed on the substrate 100, the signal line 110 includes a pad located on the surface of the substrate 100, the bottom end of the conductive post 300 is connected to the pad, and the chip 200 is also electrically connected to the pad in a routing manner.
The package 400 encapsulates the chip 200 and the conductive pillars 300, and a conductive layer 420 is embedded in the package 400, and the conductive layer 420 contacts the free ends of the conductive pillars 300. The antennas 500 are disposed on a side of the package 400 away from the substrate 100 and are electrically connected to the conductive layer 420. The number of the antennas 500 may be selected according to needs, and when the number of the antennas 500 is multiple, the multiple antennas 500 may be distributed in an array on the package 400. As shown in fig. 2, the antenna 500 provided in the embodiment of the present application is a horn antenna, and the opening width of the horn antenna 500 is smaller than the bottom width, and is in an outward-opened "horn" shape.
By disposing the antenna 500 on the side of the package 400 away from the substrate 100, the occupied area of the antenna 500 on the substrate 100 can be effectively reduced, thereby reducing the package area and facilitating the miniaturization of the device. All the antennas 500 are connected to the signal line 110 through the conductive post 300 and the conductive layer 420, so that signal transmission can be stably achieved and signal quality can be ensured.
In the present embodiment, the side of the package 400 away from the substrate 100 is provided with an antenna groove 440, and the width of the bottom of the antenna groove 440 is smaller than the width of the opening, so as to be in an outward-opening form. The bottom of the antenna slot 440 extends to the conductive layer 420, the inside of the antenna slot 440 is coated with an antenna material, and the antenna material is in contact with the conductive layer 420, and these antenna materials attached inside the antenna slot 440 form a horn antenna 500 electrically connected to the conductive layer 420. Of course, the antenna 500 may also include a portion of the antenna material extending out of the opening of the antenna slot 440.
As shown in fig. 2, in the present embodiment, the conductive layer 420 is in the shape of a cover body, and covers the chip 200 and the conductive post 300 therein. This is advantageous for electromagnetic shielding to prevent electromagnetic interference between the chip 200 and the circuitry around the chip 200 and other components on the substrate 100. In the embodiment, the conductive layer 420 is a rectangular cover, and the edge thereof extends to the surface of the substrate 100; in alternative embodiments, the shape of the conductive layer 420 may be hemispherical, semi-ellipsoidal, or other shapes. In alternative embodiments, the conductive layer 420 may be provided in the shape of a cover, such as a flat layer, to connect the respective antenna 500 and the conductive post 300.
Optionally, the material of the conductive post 300 is at least one of graphite, metal, and conductive adhesive, and is preferably metal. The conductive layer 420, the antenna material, and the like may be selected from materials having conductivity, such as conductive glue, conductive ink, metal, alloy, and the like.
In addition, in the present embodiment, a solder ball 120 is disposed on a side of the substrate 100 opposite to the chip 200.
The embodiment of the application further provides a manufacturing method of the packaged antenna structure, which can be used for manufacturing the packaged antenna structure provided by the embodiment of the application. Fig. 3 is a flowchart illustrating a method for fabricating a packaged antenna structure according to an embodiment of the present application. As shown in fig. 3, the manufacturing method includes:
step S100, a chip and a conductive pillar are mounted on the substrate, one end of the conductive pillar is connected to the signal line of the substrate, and the chip is electrically connected to the signal line of the substrate.
Taking the package antenna structure 010 provided in the embodiment of the present application as an example, the substrate 100 used in the embodiment of the present application is the substrate 100 having the signal line 110, and preferably, the signal line 110 includes a pad located on the surface of the substrate 100. Fig. 4 is a schematic diagram of mounting the conductive pillar 300 and the chip 200 on the substrate 100 according to an embodiment of the present disclosure. As shown in fig. 4, the conductive pillars 300 may be vertically disposed on the pads (e.g., by bonding) to achieve interconnection with the signal lines 110. On the same side of the substrate 100, the chip 200 and the conductive pillar 300 are spaced apart by a distance, fixed on the surface of the substrate 100, and connected to the pad by wire bonding.
Step S200, a package body with the embedded conductive layer is manufactured to package the chip and the conductive pillar, and the other end of the conductive pillar is connected to the conductive layer.
Taking the package antenna structure 010 provided in the embodiment of the present application as an example, when the package 400 is manufactured to package the conductive pillar 300 and the chip 200, the conductive layer 420 is embedded in the package 400, and the conductive layer 420 can connect the antenna 500 manufactured subsequently and connect with the conductive pillar 300, so as to electrically connect with the signal line 110 and the chip 200. Fig. 5 is a flow chart of fabricating a package 400 according to an embodiment of the present application. As shown in fig. 5, specifically, step S200 may include:
step S210, a first package body is manufactured to package the chip and the conductive pillar.
Fig. 6 is a schematic diagram of the first package 410 encapsulating the chip 200 and the conductive pillars 300 according to an embodiment of the present disclosure. As shown in fig. 6, a first package 410 may be first fabricated by a molding machine to package the chip 200 and the conductive pillars 300 together. The first package body 410 may be made into a rectangular body as shown in fig. 7, or may be made into other shapes as needed. In this embodiment, the height of the first package 410 is slightly higher than the top end of the conductive pillar 300, which is beneficial to the subsequent polishing to expose the end surface of the conductive pillar 300. Of course, the end surface of the top end of the conductive pillar 300 may be just exposed after the first plastic package body is molded, or slightly lower than the top end of the conductive pillar 300.
Step S220, the first package body is polished to expose the end surface of the conductive pillar far from the substrate.
In this embodiment, after the first package 410 is manufactured, one surface of the first package 410 away from the substrate 100 is polished to expose the end surface of the conductive pillar 300, so as to prepare for connecting the conductive layer 420 and the conductive pillar 300. The ground structure is shown in fig. 7.
Step S230, a conductive material is coated on the surface of the first package body to form a conductive layer, and the coated area of the conductive material covers the end surface of the conductive pillar.
Fig. 8 is a schematic diagram illustrating a conductive layer 420 formed on a surface of a first package 410 according to an embodiment of the disclosure. As shown in fig. 8, in the embodiment of the present application, the conductive material completely covers the outer surface of the first plastic package body, a conductive layer 420 in a shape of a cover body is formed, and the chip 200 and the conductive pillar 300 are completely covered inside the conductive layer and are in contact with the conductive pillar 300. This way, the conductive layer 420 is connected to the conductive post 300, and the conductive layer 420 also has an electromagnetic shielding function, so as to prevent electromagnetic interference between the chip 200 and other elements (not shown in the figure) on the substrate 100, and ensure the quality of signal transmission. It should be understood that in other embodiments of the present application, the conductive material may be coated only on the side of the first package body 410 away from the substrate 100, and not coated on the peripheral side of the first package body 410. The conductive layer 420 thus formed also functions to electrically connect the antenna 500 and the conductive post 300.
In step S240, a second package is fabricated to package the first package, so as to form a package with a conductive layer embedded therein.
Fig. 9 is a schematic diagram illustrating a completed second package 430 according to an embodiment of the disclosure. As shown in fig. 9, a second package 430 is fabricated on the outer side of the first package 410 to wrap the first package 410, so that the first package 410 and the second package 430 together form a package 400 embedded with a metal layer. The second package 430 may be used to provide the antenna 500. Specifically, in the present embodiment, in order to provide the horn antenna 500, an antenna slot 440 is formed on the second package 430, and the antenna slot 440 is used to provide the antenna 500. Specifically, a mold and a plastic package process may be utilized, and while a second plastic package body is formed on the outer side of the first plastic package body, at least one antenna slot 440 is formed on the surface of the second plastic package body, the width of the bottom of the antenna slot 440 is smaller than the width of the opening, and the bottom of the antenna slot 440 extends to the conductive layer 420. Of course, the antenna slot 440 may also be formed by slotting the second package body 430 after the second package body 430 is molded. Alternatively, in other embodiments, the antenna slot 440 is not employed to accommodate the antenna 500, and thus no slot is required.
Step S300, at least one antenna is arranged on one side of the packaging body far away from the chip, and the antenna is electrically connected with the conducting layer.
Taking the package antenna structure 010 provided in the embodiment of the present application as an example, the antenna slot 440 is disposed on a side of the package 400 away from the chip 200, and when the antenna 500 is manufactured, an antenna material is coated on an inner side of the antenna slot 440 to form the antenna 500, as shown in fig. 10. Since the bottom of the antenna groove 440 extends to the conductive layer 420, the antenna material contacts the conductive layer 420, i.e., the electrical connection of the antenna 500 and the conductive layer 420 is achieved. Because the width of the bottom of the antenna groove 440 is smaller than the width of the opening, the antenna 500 is also an open-faced horn antenna 500. In this embodiment, the antenna 500 is disposed in the antenna slot 440, which is beneficial to reducing the volume of the whole structure, and the antenna 500 is not completely wrapped by the package 400, so that the transmitted signal attenuation is weak, and the signal quality is good.
Of course, the range of the antenna material coating is not limited to the inside of the antenna groove 440, and may extend from the opening of the antenna groove 440 to a certain extent. In other embodiments, instead of using the antenna slot 440 to accommodate the antenna 500, the antenna 500 may be electrically connected to the conductive layer 420 in other ways, such as using metal posts, wires, etc.
The manufacturing method of the embodiment of the present application may further include implanting balls on the substrate 100 to form solder balls 120 on the back surface of the substrate 100. If a plurality of packaged antenna structures 010 are disposed on one substrate 100, the substrate 100 may be cut after the antenna 500 is manufactured and the ball is mounted.
In addition, an embodiment of the present application further provides an electronic device, which includes the packaged antenna structure 010 provided in the embodiment of the present application or the packaged antenna structure manufactured by the manufacturing method.
In summary, in the package antenna structure provided in the embodiment of the present application, the antenna is disposed on the package body of the package chip and located on a side of the package body away from the substrate. This allows the antenna to be located above the chip, rather than being disposed on the substrate as with the chip, and the antenna does not need to occupy a portion of the substrate separately, thereby facilitating a reduction in package area. The signal circuit is connected with the conductive layer by arranging the conductive columns, and then all the antennas are connected. Compared with a single connecting wire for connecting the chip and the antenna, short-distance transmission is easy to realize, so that signal transmission is stable and signal loss is small. The manufacturing method provided by the embodiment of the application is used for manufacturing the packaged antenna structure provided by the embodiment of the application, and the electronic device provided by the embodiment of the application uses the packaged antenna structure, so that the miniaturization is easy to realize, and the electronic device has good communication performance.
The above description is only for the specific embodiments of the present application, but the scope of the present application is not limited thereto, and any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope of the present application should be covered within the scope of the present application. Therefore, the protection scope of the present application shall be subject to the protection scope of the claims.
Claims (10)
1. A packaged antenna structure, comprising:
a substrate provided with a signal line;
the chip is arranged on the substrate and is electrically connected with the signal circuit;
the packaging body wraps the chip, a conductive layer and a conductive column are embedded in the packaging body, one end of the conductive column is connected to the conductive layer, and the other end of the conductive column is connected to the signal circuit;
the antenna is arranged on one side, far away from the substrate, of the packaging body and is electrically connected with the conducting layer.
2. The packaged antenna structure of claim 1, wherein the antenna is a horn antenna, an antenna slot is disposed on a side of the package body away from the substrate, a bottom width of the antenna slot is smaller than an opening width, a bottom of the antenna slot extends to the conductive layer, and an inner side of the antenna slot is coated with an antenna material to form the horn antenna electrically connected to the conductive layer.
3. The packaged antenna structure of claim 1, wherein the conductive layer is in the shape of a cover and covers the chip and the conductive post therein.
4. The packaged antenna structure of claim 1, wherein the conductive pillar is made of at least one of graphite, metal, and conductive adhesive.
5. The package antenna structure of claim 1, wherein the signal trace includes a pad, and wherein one end of the conductive post is connected to the pad.
6. The packaged antenna structure of claim 1, wherein the packaged antenna structure comprises a plurality of the antennas, and the plurality of the antennas are arrayed on the package body.
7. A method for manufacturing a packaged antenna structure is characterized by comprising the following steps:
a chip and a conductive column are arranged on a substrate, one end of the conductive column is connected to a signal circuit of the substrate, and the chip is electrically connected with the signal circuit of the substrate;
manufacturing a packaging body embedded with a conductive layer to package the chip and the conductive column, and connecting the other end of the conductive column with the conductive layer;
and arranging at least one antenna on one side of the packaging body far away from the chip, and electrically connecting the antenna with the conductive layer.
8. The method for manufacturing a packaged antenna structure according to claim 7, wherein manufacturing a package body embedded with a conductive layer to package the chip and the conductive pillar, and connecting the other end of the conductive pillar to the conductive layer includes:
manufacturing a first packaging body to package the chip and the conductive columns;
polishing the first packaging body to expose the end face of one end, far away from the substrate, of the conductive column;
coating a conductive material on the surface of the first packaging body to form the conductive layer, wherein the coating area of the conductive material covers the end face of the conductive column;
and manufacturing a second packaging body to package the first packaging body so as to form the packaging body embedded with the conductive layer.
9. The method of claim 8, wherein fabricating a second package to encapsulate the first package to form the package with the conductive layer embedded therein comprises: forming at least one antenna slot on the surface of the second packaging body while forming the second packaging body on the outer side of the first packaging body by using a die and a plastic packaging process, wherein the width of the bottom of the antenna slot is smaller than the width of the opening, and the bottom of the antenna slot extends to the conductive layer;
at least one antenna is arranged on one side of the packaging body far away from the chip, and the antenna is electrically connected with the conductive layer, and the packaging structure comprises: applying an antenna material on an inner side of the antenna groove to form the antenna.
10. An electronic device comprising the packaged antenna structure of any one of claims 1 to 6 or the packaged antenna structure manufactured by the manufacturing method of any one of claims 7 to 9.
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| Application Number | Priority Date | Filing Date | Title |
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| CN202010429536.0A CN111554665A (en) | 2020-05-20 | 2020-05-20 | Package antenna structure, manufacturing method thereof and electronic device |
| CN202010860407.7A CN111739876B (en) | 2020-05-20 | 2020-08-25 | Package antenna structure, manufacturing method thereof and electronic device |
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| CN202010429536.0A CN111554665A (en) | 2020-05-20 | 2020-05-20 | Package antenna structure, manufacturing method thereof and electronic device |
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| CN202010860407.7A Active CN111739876B (en) | 2020-05-20 | 2020-08-25 | Package antenna structure, manufacturing method thereof and electronic device |
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| US7548430B1 (en) * | 2002-05-01 | 2009-06-16 | Amkor Technology, Inc. | Buildup dielectric and metallization process and semiconductor package |
| JP4732128B2 (en) * | 2005-11-01 | 2011-07-27 | 太陽誘電株式会社 | High frequency wireless module |
| US8786060B2 (en) * | 2012-05-04 | 2014-07-22 | Advanced Semiconductor Engineering, Inc. | Semiconductor package integrated with conformal shield and antenna |
| US9129954B2 (en) * | 2013-03-07 | 2015-09-08 | Advanced Semiconductor Engineering, Inc. | Semiconductor package including antenna layer and manufacturing method thereof |
| US9461001B1 (en) * | 2015-07-22 | 2016-10-04 | Advanced Semiconductor Engineering, Inc. | Semiconductor device package integrated with coil for wireless charging and electromagnetic interference shielding, and method of manufacturing the same |
| DE102017123360A1 (en) * | 2017-10-09 | 2019-04-11 | Infineon Technologies Ag | METHOD FOR FORMING A SEMICONDUCTOR ASSEMBLY AND SEMICONDUCTOR ASSEMBLY |
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| CN111739876B (en) | 2020-12-04 |
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