CN111554588B - Wafer defect monitoring system and monitoring method thereof - Google Patents

Wafer defect monitoring system and monitoring method thereof Download PDF

Info

Publication number
CN111554588B
CN111554588B CN202010414919.0A CN202010414919A CN111554588B CN 111554588 B CN111554588 B CN 111554588B CN 202010414919 A CN202010414919 A CN 202010414919A CN 111554588 B CN111554588 B CN 111554588B
Authority
CN
China
Prior art keywords
defects
detection areas
defect
wafers
scanning
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202010414919.0A
Other languages
Chinese (zh)
Other versions
CN111554588A (en
Inventor
盛利霞
黄莉晶
韩超
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shanghai Huali Microelectronics Corp
Original Assignee
Shanghai Huali Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shanghai Huali Microelectronics Corp filed Critical Shanghai Huali Microelectronics Corp
Priority to CN202010414919.0A priority Critical patent/CN111554588B/en
Publication of CN111554588A publication Critical patent/CN111554588A/en
Application granted granted Critical
Publication of CN111554588B publication Critical patent/CN111554588B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/10Measuring as part of the manufacturing process
    • H01L22/12Measuring as part of the manufacturing process for structural parameters, e.g. thickness, line width, refractive index, temperature, warp, bond strength, defects, optical inspection, electrical measurement of structural dimensions, metallurgic measurement of diffusions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/67Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
    • H01L21/67005Apparatus not specifically provided for elsewhere
    • H01L21/67242Apparatus for monitoring, sorting or marking
    • H01L21/67288Monitoring of warpage, curvature, damage, defects or the like
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L22/00Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
    • H01L22/20Sequence of activities consisting of a plurality of measurements, corrections, marking or sorting steps

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)
  • Investigating Materials By The Use Of Optical Means Adapted For Particular Applications (AREA)

Abstract

The invention provides a wafer defect monitoring system and a monitoring method thereof, wherein the wafer defect monitoring method comprises the following steps: providing a plurality of wafers; dividing the crystal face of each wafer into a plurality of detection areas, wherein the detection areas of all the wafers correspond to one another in position, the detection areas on the wafers are numbered as 1 … n in sequence, and n is larger than or equal to 2; scanning the defects of the detection areas of the wafers, and counting the detection areas with the defects; and when the number of the defects of the detection areas with the same number is larger than a first threshold value, alarming. The technical scheme of the invention can monitor the defects of the fixed positions of a plurality of wafers in real time, and alarm in time, thereby avoiding the loss of the wafer yield.

Description

Wafer defect monitoring system and monitoring method thereof
Technical Field
The invention relates to the technical field of semiconductor manufacturing, in particular to a wafer defect monitoring system and a monitoring method thereof.
Background
With the development of integrated circuit processes and the continuous reduction of feature sizes, the distribution of circuits on a chip is more and more complex, and a small error in any link will cause the failure of the whole product, so the requirements on process control are more and more strict. In order to find the defects of the product in time, corresponding defect detection equipment is generally configured to perform online detection and monitoring in the semiconductor process. Currently, defect scanning in the industry generally adopts a total count (total count) mode to monitor defects, that is, a defect threshold is set, and when the number of defects on a wafer is greater than the threshold, an alarm is given. However, this monitoring method can only monitor the number of defects on a single wafer, and is not suitable for defects on fixed positions of multiple wafers. For example, when a same batch of wafers are inspected, when a corresponding fixed position on a plurality of wafers has a defect, but the number of the defects on the wafers is smaller than a threshold value, the defect inspection equipment cannot find the defects in time, which easily causes that a lot of wafers have defects and affects the yield of the wafers.
Disclosure of Invention
The invention aims to provide a wafer defect monitoring system and a monitoring method thereof, which can monitor defects of fixed positions of a plurality of wafers in real time, alarm in time and avoid the loss of wafer yield.
In order to achieve the above object, the present invention provides a method for monitoring wafer defects, comprising:
providing a plurality of wafers;
dividing the crystal face of each wafer into a plurality of detection areas, wherein the positions of the detection areas of all the wafers correspond to one another, the detection areas on the wafers are numbered as 1.. n in sequence, and n is not less than 2;
scanning the defects of the detection areas of the wafers, and counting the detection areas with the defects;
and when the number of the defects of the detection areas with the same number is larger than a first threshold value, alarming.
Optionally, when counting the detection areas with defects, the number of defects in the detection areas is also counted;
when the number of times of the defects appearing in the detection areas with the same number is smaller than or equal to the first threshold value and larger than or equal to the second threshold value, acquiring the total number of the defects in the detection areas with the same number to generate a distribution map of the detection areas and the total number of the defects;
defining a first judgment range and a second judgment range by taking the center of the detection area with the maximum defect total amount in the distribution diagram of the detection areas and the defect total amount as a reference, wherein the second judgment range is positioned in the first judgment range;
and acquiring the ratio of the total quantity of the defects in the second judgment range to the total quantity of the defects in the first judgment range, and alarming when the ratio is greater than an alarm value.
Optionally, the defect scanning is performed on the detection areas of the plurality of wafers by using the first scanning parameter, and when the number of times of the defects appearing in the detection areas with the same number is less than or equal to the first threshold and greater than or equal to the second threshold, the wafer defect monitoring method further includes:
performing defect scanning on the detection areas of the wafers again by using the second scanning parameters, and counting the detection areas with defects;
acquiring the total quantity of defects in the detection areas with the same number to generate a distribution map of the detection areas and the total quantity of the defects;
defining a first judgment range and a second judgment range by taking the center of the detection area with the maximum defect total amount in the distribution diagram of the detection areas and the defect total amount as a reference, wherein the second judgment range is positioned in the first judgment range;
and acquiring the ratio of the total quantity of the defects in the second judgment range to the total quantity of the defects in the first judgment range, and alarming when the ratio is greater than an alarm value.
Optionally, the boundary of the first determination range and the boundary of the second determination range overlap with the boundary of the detection area.
Optionally, when counting the total number of defects in the detection area, the positions of the defects in the detection area are also obtained at the same time, and the boundary of the first determination range and the boundary of the second determination range are overlapped or not overlapped with the boundary of the detection area.
Optionally, the first scanning parameter and the second scanning parameter both include scanning resolutions, and a scanning resolution in the first scanning parameter is lower than a scanning resolution in the second scanning parameter.
Optionally, the defect is a defocus defect.
Based on this, this application still provides a wafer defect monitored control system, includes:
the dividing module is used for dividing crystal faces of the wafers into a plurality of detection areas, the positions of the detection areas of the wafers correspond to one another, the detection areas on the wafers are numbered as 1.. n in sequence, and n is larger than or equal to 2;
the defect scanning module is used for scanning the defects of the detection areas of the wafers and counting the detection areas with the defects;
and the first judging and alarming module is used for alarming when the number of times of the defects of the detection areas with the same number is larger than a first threshold value.
Optionally, the wafer defect monitoring system further includes:
the wafer defect monitoring system further comprises:
the comparison module is used for comparing the number of times of the defects of the detection areas with the same number with the first threshold value and the second threshold value;
the counting module is used for counting the number of the defects in the detection area when counting the detection areas with the defects, and acquiring the total number of the defects in the detection area with the same number to generate a distribution map of the detection area and the total number of the defects when the number of the defects in the detection area with the same number is less than or equal to the first threshold and is greater than or equal to the second threshold;
the range defining module is used for defining a first judging range and a second judging range by taking the center of the detecting area with the maximum defect total amount in the distribution diagram of the detecting area and the defect total amount as a reference, and the second judging range is positioned in the first judging range;
and the second judging and alarming module is used for acquiring the ratio of the total quantity of the defects in the second judging range to the total quantity of the defects in the first judging range, and alarming when the ratio is greater than an alarm value.
In the wafer defect monitoring system and the monitoring method thereof provided by the invention, the wafer defect monitoring method comprises the following steps: providing a plurality of wafers in the same batch; dividing the crystal face of each wafer into a plurality of detection areas, wherein the positions of the detection areas of all the wafers correspond to one another, and the detection areas on the wafers are numbered as 1.. n in sequence, wherein n is more than or equal to 2; scanning the defects of the detection areas of the wafers, and counting the detection areas with the defects; and when the number of the defects of the detection areas with the same number is larger than a first threshold value, alarming. The technical scheme of the invention can monitor the defects of the fixed positions of a plurality of wafers in real time, and alarm in time, thereby avoiding the loss of the wafer yield.
Drawings
FIGS. 1a-1c are schematic diagrams of defect distributions of different wafers after exposure according to an embodiment of the present invention;
FIG. 2 is a flowchart illustrating a wafer defect monitoring method according to an embodiment of the present invention;
FIGS. 3 a-3 d are schematic diagrams illustrating a defect detection region on different wafers according to an embodiment of the present invention;
FIGS. 4 a-4 b are schematic diagrams illustrating defect amount distributions in inspection regions of two wafers according to an embodiment of the present invention;
FIG. 5 is a schematic diagram illustrating distribution of detection areas and defect counts according to an embodiment of the present invention;
wherein the reference numerals are:
p 1-fixed position defect; s1, s2, s3, s4, s5, and s 6-detection zones having defects.
Detailed Description
As described in the background art, defect scanning in the industry currently employs a total count (total count) method to monitor defects, that is, a defect threshold is set, and an alarm is given when the number of defects on a wafer is greater than the threshold. However, this monitoring method can only monitor the number of defects on a single wafer, and is not suitable for defects on fixed positions of multiple wafers.
For example, in the semiconductor manufacturing process, an important process is the photolithography process, which mainly transfers the pattern on the mask onto the wafer, and the quality of the photolithography process directly affects the performance of the finally formed semiconductor device. In the photolithography process, a wafer is prone to form a defocus defect at a fixed position, where the defocus defect is a focus abnormality during exposure, for example, impurity particles exist on a wafer carrying table of a photolithography device, so that a certain fixed position corresponding to the impurity particles on crystal planes of a plurality of wafers in the same batch is raised, and thus a focal plane is abnormal, and a photolithography pattern is deformed to affect subsequent processes.
As shown in fig. 1a to 1c, fig. 1 is a schematic diagram of defect distribution of different wafers after exposure, total amount of defects of the wafers shown in fig. 1a to 1c is 3, and 4, and 3 different wafers all have fixed position defects p1, if the set alarm threshold is 5, the total amount of defects of the illustrated 3 wafers does not reach the alarm threshold, so that the defect detection device cannot timely detect and alarm, which easily causes defects in a large batch of wafers, and affects yield of the wafers.
The application provides a wafer defect monitoring method, through every the crystal face of wafer divides into a plurality of detection regions, and to a plurality of the detection region of wafer carries out defect scanning, and statistics detection region that the defect appears, when the number of times that the defect appears in the detection region of same serial number is greater than first threshold value, reports to the police. The defect of the fixed position of a plurality of wafers in the same batch can be monitored in real time, and an alarm is given in time, so that the loss of the wafer yield is avoided.
The following describes in more detail embodiments of the present invention with reference to the schematic drawings. Advantages and features of the present invention will become apparent from the following description and claims. It is to be noted that the drawings are in a very simplified form and use non-precise ratios for the purpose of facilitating and distinctly claiming the embodiments of the present invention.
Example one
As shown in fig. 2, the present embodiment provides a method for monitoring wafer defects, including:
step S1: providing a plurality of wafers;
step S2: dividing the crystal face of each wafer into a plurality of detection areas, wherein the positions of the detection areas of all the wafers correspond to one another, the detection areas on the wafers are numbered as 1.. n in sequence, and n is not less than 2;
step S3: scanning the defects of the detection areas of the wafers, and counting the detection areas with the defects;
step S4: and when the number of the defects of the detection areas with the same number is larger than a first threshold value, alarming.
It should be understood that the same numbered inspection area referred to herein corresponds to a fixed location on the wafer, and the number of times a defect occurs in the same numbered inspection area may be understood as the number of wafers having defects in the fixed location. Specifically, as shown in fig. 3a to 3d, fig. 3a to 3d are schematic diagrams illustrating the distribution of defect detection regions on different wafers provided in the embodiment of fig. 3a to 3 d. Assuming that the wafer shown in fig. 3a scans 4 detection areas with defects, which are respectively labeled as s1, s2, s3 and s4, the wafer shown in fig. 3a and the wafer shown in fig. 3b have detection areas s1 and s2 with the same numbers, and the defects are scanned in the detection areas s1 and s 2. The wafer shown in FIG. 3a has the same number of inspection zones s1, s3, and s4 as the wafer shown in FIG. 3c, and defects are scanned at inspection zones s1, s3, and s 4. The wafer shown in FIG. 3b has the same number of inspection zones s1 as the wafer shown in FIG. 3c, and a defect is scanned at inspection zone s 1. The wafer shown in FIG. 3a has the same number of inspection zones s1 and s4 as the wafer shown in FIG. 3d, and defects are scanned at inspection zones s1 and s 4. If the set first threshold is 3, since the wafers shown in fig. 3a to 3d all have the same number of inspection zones s1 (i.e. fixed position defect s1), and defects are scanned in the inspection zones s1, the number of times that defects appear in the inspection zones with the same number is 4, and the number is already greater than the first threshold, so that an alarm will be issued at this time.
First, step S1 is executed to provide a plurality of wafers. In this embodiment, the wafers are wafers of the same batch that have undergone a certain processing process, for example, wafers of the same batch that have undergone a photolithography process. In this embodiment, the number of wafers is not limited, and may be adjusted according to the test accuracy.
In this embodiment, the crystal plane of the wafer has a defect, and the defect is an out-of-focus defect, but may be other defects, which is not limited in this application.
Then, step S2 is executed: dividing the crystal face of each wafer into a plurality of detection areas, wherein the positions of the detection areas of all the wafers correspond to one another, and the detection areas on the wafers are numbered as 1. It can be understood that the crystal plane of each wafer is divided by the same dividing manner, for example, by grid lines, as shown in fig. 3a to 3d, so that the positions of the detection areas of all the wafers correspond to each other one to one. Meanwhile, the detection areas on the wafer are numbered sequentially as 1.. n, n is more than or equal to 2 so as to be convenient for counting, and the detection areas are not shown in the figure. In this embodiment, the range of the detection area may be adjusted according to the test requirement.
Step S3 is then executed: and scanning the defects of the detection areas of the wafers, and counting the detection areas with the defects. Specifically, a wafer defect scanning system can be adopted to scan the wafer, the wafer defect scanning system is utilized to divide the crystal face of each wafer into a plurality of detection areas, each defect on the wafer and the detection area where each defect is located are obtained in the scanning process, and the detection areas where the defects appear are counted.
Step S4 is then executed: and when the number of the defects of the detection areas with the same number is larger than a first threshold value, alarming. In this embodiment, the scanning modes for a plurality of wafers may be divided into two types, the first scanning mode is to scan crystal faces of a plurality of wafers at the same time, count detection areas where defects occur, and alarm when the number of times that defects occur in the detection areas with the same number is greater than a first threshold. And the scanning mode in the second mode is scanning one by one, when the detection areas with the same number are scanned to have defects, the detection areas with the number are added with 1 until the number of times of scanning the detection areas with the same number to have defects is larger than a first threshold value, and an alarm is given. For example, as shown in fig. 3 a-3 b, after the wafer shown in fig. 3a is scanned, defects are scanned in the detection regions s1, s2, s3 and s4, the number of the detection regions s1, s2, s3 and s4 is counted as 1, and then the wafer shown in fig. 3b is sequentially scanned, the wafer shown in fig. 3a and the wafer shown in fig. 3b have the same number of the detection regions s1 and s2, so 1 is added to each of the detection regions s1 and s2 with defects, and so on, when the number of times that the defects occur in the detection region with the same number is greater than the first threshold, an alarm is issued.
In this embodiment, the purpose of alarming is to remind the worker that the wafer has a defect of a fixed position and needs to be processed in time. In the present embodiment, the first threshold value is 3, but may be set to other values, and the present application is not limited thereto. Because the number of times that the detection area of same serial number appears the defect just is greater than just reporting to the police when first threshold value, has greatly guaranteed the promptness of defect monitoring to can in time remind the staff to handle, the continuation of avoiding produces fixed position defect, improves the yield of wafer.
Optionally, when counting the detection areas with defects, the number of defects in the detection areas is also counted;
when the number of times of the defects appearing in the detection areas with the same number is less than or equal to the first threshold value and greater than or equal to the second threshold value, the wafer defect monitoring method further comprises the following steps:
step S41: acquiring the total quantity of defects in the detection areas with the same number to generate a distribution map of the detection areas and the total quantity of the defects;
step S51: defining a first judgment range and a second judgment range by taking the center of the detection area with the maximum defect total amount in the distribution diagram of the detection areas and the defect total amount as a reference, wherein the second judgment range is positioned in the first judgment range;
step S61: and acquiring the ratio of the total quantity of the defects in the second judgment range to the total quantity of the defects in the first judgment range, and alarming when the ratio is greater than an alarm value.
It is understood that, the steps S41 to S61 are used to further determine the correlation between the detection area with a defect and the detection area with a defect nearby when the number of times that the defect occurs in the detection area with the same number is less than or equal to the first threshold and greater than or equal to the second threshold. If the ratio of the total amount of the defects in the second judgment range to the total amount of the defects in the first judgment range is larger than the alarm value, alarming is carried out, the fact that the correlation between the detection area with the defects and the detection area with the defects nearby is strong is shown, namely the correlation between the defects at the fixed positions and the defects in a certain distance range is strong, and workers are reminded of further processing through alarming. Otherwise, no alarm is given. In this embodiment, the second threshold is 2, and when the number of defective wafers is less than or equal to 3 and greater than or equal to 2, the steps S41 to S61 are performed.
Specifically, while step S3 is executed, the number of defects in the detection area is counted. In this embodiment, as shown in fig. 4a and 4b, if the defect detection regions s5 and s6 of the wafer shown in fig. 4a have 3 and 2 defect amounts, respectively, and the defect detection regions s5 and s6 of the wafer shown in fig. 4b have 4 defect amounts, respectively, the wafers shown in fig. 4a and 4b have the detection regions s5 and s6 with the same number, the sum of the defect amounts of the two wafers in the detection region s5 is 7, and the sum of the defect amounts in the detection region s6 is 6.
Then, step S41 is executed to obtain the total number of defects in the detection area with the same number to generate a distribution map of the total number of defects in the detection area. As shown in fig. 5, fig. 5 is a distribution diagram of the inspection areas and the total number of defects provided in the present embodiment, and it should be understood that the number of each inspection area in the distribution diagram indicates the sum of the number of defects of the wafer subjected to defect inspection in the inspection area with the same number. It should be understood that the unnumbered areas may also be defective for ease of understanding, and are not shown in the figures.
Then, step S51 is executed: and defining a first judgment range and a second judgment range by taking the center of the detection area with the maximum defect total amount in the distribution diagram of the detection areas and the defect total amount as a reference, wherein the second judgment range is positioned in the first judgment range. Referring to fig. 5, the detection zone with the largest total number of defects is the detection zone labeled with numeral 12. The first determination range and the second determination range may be circular, square, or other shapes, which is not limited in this application. In this embodiment, as shown in fig. 5, the first determination range is a square, and the first determination range is formed by the detection area having the largest total number of defects and the adjacent detection areas. Of course, for example, when the first determination range and the second determination range are circular, there may be a case where one detection area is divided into two parts, that is, a part of the detection area is located within the determination range and a part of the detection area is located outside the determination range. At this time, it is possible to accurately obtain whether the defect is located within the defined range by acquiring the position of the defect in the detection area when counting the total amount of the defect in the detection area.
Optionally, the boundary of the first determination range and the boundary of the second determination range overlap with the boundary of the detection area. When the first determination range and the second determination range are defined in a square shape, the boundary of the first determination range and the boundary of the second determination range overlap with the boundary of the detection area. Of course, the boundary of the first determination range and the boundary of the second determination range may not overlap with the boundary of the detection area, and may be divided into different shapes, for example.
Step S61: and acquiring the ratio of the total quantity of the defects in the second judgment range to the total quantity of the defects in the first judgment range, and alarming when the ratio is greater than an alarm value. And obtaining the defect correlation between the detection area with the maximum total number of defects and the adjacent detection area according to the ratio, wherein the larger the ratio is, the larger the defect correlation in the second range is. Conversely, the smaller.
Example two
Different from the first embodiment of the present application, in the second embodiment, the defect scanning is performed on the detection areas of the plurality of wafers by using the first scanning parameter, and when the number of times of the defects appearing in the detection area with the same number is less than or equal to the first threshold and is greater than or equal to the second threshold, the defect scanning is performed on the detection areas of the plurality of wafers by using the second scanning parameter again, which is equivalent to performing the secondary scanning. In the embodiment of the present application, the detection area where the defect occurs and the number of the defects in the detection area are counted through one scanning process.
Specifically, the defect scanning is performed on the detection areas of the plurality of wafers by using the first scanning parameter, and when the number of times of the defects appearing in the detection areas with the same number is less than or equal to the first threshold and greater than or equal to the second threshold, the wafer defect monitoring method further includes:
performing defect scanning on the detection areas of the wafers again by using the second scanning parameters, and counting the detection areas with defects;
acquiring the total quantity of defects in the detection areas with the same number to generate a distribution map of the detection areas and the total quantity of the defects;
defining a first judgment range and a second judgment range by taking the center of the detection area with the maximum defect total amount in the distribution diagram of the detection areas and the defect total amount as a reference, wherein the second judgment range is positioned in the first judgment range;
and acquiring the ratio of the total quantity of the defects in the second judgment range to the total quantity of the defects in the first judgment range, and alarming when the ratio is greater than an alarm value.
In the second embodiment, except that the step of performing defect scanning on the detection areas of the plurality of wafers again by using the second scanning parameter and counting the detection areas with defects is different from the first embodiment, the methods of the other steps are similar to those of the first embodiment, and thus are not described in detail herein.
In the second embodiment, the scanning parameters include scanning resolution, and it can be understood that the first scanning parameters and the second scanning parameters are scanned by using the same wafer defect scanning system, and the monitoring method is adjusted by changing the scanning resolution. In the embodiment, the fixed position defect of the wafer is detected by two steps, when the defect of the wafer is scanned by the first scanning parameter, the rapid scanning and the preliminary judgment are realized by the lower resolution, and when the number of times of the defect appearing in the detection area with the same number is greater than the first threshold value, the alarm is given. After the initial scanning, calculating the ratio of the total quantity of the defects in the second judgment range to the total quantity of the defects in the first judgment range according to the condition that the number of times of the defects in the detection areas with the same number is less than or equal to the first threshold and greater than or equal to the second threshold, further judging the correlation of the defects at fixed positions, and alarming if the ratio is greater than an alarm value.
The wafer defect monitoring method provided by the application can be suitable for detecting other defects, and generally, after an alarm is given, the defects can be compared with defect types in a database, so that the reasons for generating the defects at fixed positions can be checked.
Based on this, the present application further provides a wafer defect monitoring system, which can be used for implementing the wafer defect monitoring method, and includes:
the dividing module is used for dividing crystal faces of a plurality of wafers into a plurality of detection areas, the positions of the detection areas of all the wafers correspond to one another, the detection areas on the wafers are numbered as 1.
The defect scanning module is used for scanning the defects of the detection areas of the wafers and counting the detection areas with the defects;
the first judging and alarming module is used for alarming when the number of times of the defects of the detection areas with the same number is larger than a first threshold value;
specifically, the wafer defect monitoring system may be a structure in which the dividing module, the defect scanning module, and the first determining and alarming module are integrated, or may be each of the parts that are independent of each other, which is not limited in this application. In this embodiment, the wafer defect scanning system can implement both the function of dividing modules and the function of defect scanning modules.
Optionally, the wafer defect monitoring system further includes:
the comparison module is used for comparing the number of times of the defects of the detection areas with the same number with the first threshold value and the second threshold value;
the quantity counting module is used for counting the quantity of the defects in the detection area when the detection area with the defects is counted;
the range defining module is used for defining a first judging range and a second judging range by taking the center of the detecting area with the maximum defect total amount in the distribution diagram of the detecting area and the defect total amount as a reference, wherein the second judging range is positioned in the first judging range;
and the second judging and alarming module is used for acquiring the total quantity of the defects in the second judging range and the total quantity of the defects in the first judging range, and alarming when the ratio is greater than an alarm value.
Each of the modules is configured to determine the defect correlation of the detection area with the largest total defect amount when the number of times of occurrence of defects in the detection area with the same number is less than or equal to the first threshold and greater than or equal to the second threshold, where the specific determination mode is described in detail above and is not repeated in this application.
In summary, the present invention provides a wafer defect monitoring system and a monitoring method thereof, wherein the wafer defect monitoring method comprises: providing a plurality of wafers in the same batch; dividing the crystal face of each wafer into a plurality of detection areas, wherein the positions of the detection areas of all the wafers correspond to one another, the detection areas on the wafers are numbered as 1.. n in sequence, and n is not less than 2; scanning the defects of the detection areas of the wafers, and counting the detection areas with the defects; and when the number of the defects of the detection areas with the same number is larger than a first threshold value, alarming. The technical scheme of the invention can monitor the defects of the fixed positions of a plurality of wafers in real time, and alarm in time, thereby avoiding the loss of the wafer yield.
The above description is only a preferred embodiment of the present invention and is not intended to limit the present invention in any way. Any person skilled in the art can make any equivalent substitutions or modifications on the technical solutions and technical contents disclosed in the present invention without departing from the scope of the technical solutions of the present invention, and still fall within the protection scope of the present invention without departing from the technical solutions of the present invention.

Claims (8)

1. A method for monitoring wafer defects, comprising:
providing a plurality of wafers;
dividing the crystal face of each wafer into a plurality of detection areas, wherein the positions of the detection areas of all the wafers correspond to one another, the detection areas on the wafers are numbered as 1.. n in sequence, and n is not less than 2;
scanning the defects of the detection areas of the wafers, and counting the detection areas with the defects;
when the number of the defects of the detection areas with the same number is larger than a first threshold value, alarming;
when the number of times of the defects appearing in the detection areas with the same number is smaller than or equal to the first threshold value and larger than or equal to the second threshold value, acquiring the total number of the defects in the detection areas with the same number to generate a distribution map of the detection areas and the total number of the defects;
defining a first judgment range and a second judgment range by taking the center of the detection area with the maximum defect total amount in the distribution diagram of the detection areas and the defect total amount as a reference, wherein the second judgment range is positioned in the first judgment range;
and acquiring the ratio of the total quantity of the defects in the second judgment range to the total quantity of the defects in the first judgment range, and alarming when the ratio is greater than an alarm value.
2. The wafer defect monitoring method as claimed in claim 1, wherein the step of obtaining the defect counts of the inspection regions with the same number to generate a distribution map of the inspection regions and the defect counts comprises:
when counting the detection areas with defects, counting the number of the defects in the detection areas;
when the number of times of the defects appearing in the detection areas with the same number is smaller than or equal to the first threshold value and larger than or equal to the second threshold value, the total number of the defects in the detection areas with the same number is acquired to generate a distribution map of the detection areas and the total number of the defects.
3. The wafer defect monitoring method as claimed in claim 1, wherein the step of obtaining the total number of defects in the inspection area with the same number to generate a distribution map of the total number of defects and the inspection area comprises:
and scanning the defects of the detection areas of the wafers by using first scanning parameters, wherein when the number of the defects of the detection areas with the same number is less than or equal to the first threshold and greater than or equal to a second threshold, the wafer defect monitoring method further comprises the following steps:
performing defect scanning on the detection areas of the wafers again by using the second scanning parameters, and counting the detection areas with defects;
and acquiring the total quantity of the defects in the detection areas with the same number to generate a distribution map of the detection areas and the total quantity of the defects.
4. The wafer defect monitoring method as claimed in claim 2 or 3, wherein the boundary of the first determination range and the boundary of the second determination range coincide with the boundary of the inspection area.
5. The wafer defect monitoring method according to claim 2 or 3, wherein when counting the total number of defects in the inspection area, the positions of defects in the inspection area are also obtained simultaneously, and the boundaries of the first determination range and the second determination range are overlapped or not overlapped with the boundaries of the inspection area.
6. The wafer defect monitoring method as claimed in claim 3, wherein the first scanning parameter and the second scanning parameter each include a scanning resolution, and the scanning resolution in the first scanning parameter is lower than the scanning resolution in the second scanning parameter.
7. The wafer defect monitoring method of claim 1, wherein the defect is a defocus defect.
8. A wafer defect monitoring system, comprising:
the dividing module is used for dividing crystal faces of a plurality of wafers into a plurality of detection areas, the positions of the detection areas of all the wafers correspond to one another, the detection areas on the wafers are numbered as 1.
The defect scanning module is used for scanning the defects of the detection areas of the wafers and counting the detection areas with the defects;
the first judging and alarming module is used for alarming when the number of times of the defects of the detection areas with the same number is larger than a first threshold value;
the wafer defect monitoring system further comprises:
the comparison module is used for comparing the number of times of the defects of the detection areas with the same number with the first threshold value and the second threshold value;
the counting module is used for counting the number of the defects in the detection area when counting the detection areas with the defects, and acquiring the total number of the defects in the detection area with the same number to generate a distribution map of the detection area and the total number of the defects when the number of the defects in the detection area with the same number is less than or equal to the first threshold and is greater than or equal to the second threshold;
the range defining module is used for defining a first judging range and a second judging range by taking the center of the detecting area with the maximum defect total amount in the distribution diagram of the detecting area and the defect total amount as a reference, wherein the second judging range is positioned in the first judging range;
and the second judging and alarming module is used for acquiring the ratio of the total quantity of the defects in the second judging range to the total quantity of the defects in the first judging range, and alarming when the ratio is greater than an alarm value.
CN202010414919.0A 2020-05-15 2020-05-15 Wafer defect monitoring system and monitoring method thereof Active CN111554588B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202010414919.0A CN111554588B (en) 2020-05-15 2020-05-15 Wafer defect monitoring system and monitoring method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202010414919.0A CN111554588B (en) 2020-05-15 2020-05-15 Wafer defect monitoring system and monitoring method thereof

Publications (2)

Publication Number Publication Date
CN111554588A CN111554588A (en) 2020-08-18
CN111554588B true CN111554588B (en) 2022-07-01

Family

ID=72008300

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202010414919.0A Active CN111554588B (en) 2020-05-15 2020-05-15 Wafer defect monitoring system and monitoring method thereof

Country Status (1)

Country Link
CN (1) CN111554588B (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN112991268B (en) * 2021-02-09 2021-12-14 上海众壹云计算科技有限公司 Rapid screening method for target defects on wafer, device and system thereof, storage medium and electronic equipment
CN113901286A (en) * 2021-12-09 2022-01-07 广州粤芯半导体技术有限公司 Processing system and processing method for detection data and detection system for substrate
CN114334693A (en) * 2021-12-29 2022-04-12 上海赛美特软件科技有限公司 Wafer inspection method, device, equipment and storage medium

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006190844A (en) * 2005-01-06 2006-07-20 Denso Corp Method for discriminating common defect among substrates
JP2011187836A (en) * 2010-03-10 2011-09-22 Renesas Electronics Corp Control method of semiconductor manufacturing apparatus and control system
CN102210018A (en) * 2008-12-05 2011-10-05 恪纳腾公司 Methods and systems for detecting defects on a reticle
CN102738029A (en) * 2011-03-30 2012-10-17 胜高股份有限公司 Method for detecting specific defect and system and program used for detecting specific defect
CN103646893A (en) * 2013-11-29 2014-03-19 上海华力微电子有限公司 A wafer defect detecting method
CN104952766A (en) * 2014-03-28 2015-09-30 夏普株式会社 Defect judging device defect judging method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2006190844A (en) * 2005-01-06 2006-07-20 Denso Corp Method for discriminating common defect among substrates
CN102210018A (en) * 2008-12-05 2011-10-05 恪纳腾公司 Methods and systems for detecting defects on a reticle
JP2011187836A (en) * 2010-03-10 2011-09-22 Renesas Electronics Corp Control method of semiconductor manufacturing apparatus and control system
CN102738029A (en) * 2011-03-30 2012-10-17 胜高股份有限公司 Method for detecting specific defect and system and program used for detecting specific defect
CN103646893A (en) * 2013-11-29 2014-03-19 上海华力微电子有限公司 A wafer defect detecting method
CN104952766A (en) * 2014-03-28 2015-09-30 夏普株式会社 Defect judging device defect judging method

Also Published As

Publication number Publication date
CN111554588A (en) 2020-08-18

Similar Documents

Publication Publication Date Title
CN111554588B (en) Wafer defect monitoring system and monitoring method thereof
US6542830B1 (en) Process control system
US7260444B2 (en) Real-time management systems and methods for manufacturing management and yield rate analysis integration
US7975245B2 (en) Computer-implemented methods for determining if actual defects are potentially systematic defects or potentially random defects
US9390490B2 (en) Method and device for testing defect using SEM
US7593564B2 (en) Method and apparatus for reviewing defect of subject to be inspected
TW201504622A (en) Pattern-measuring apparatus and semiconductor-measuring system
TWI641961B (en) Method and system for design-based fast in-line defect diagnosis, classification and sample
WO2022028102A1 (en) Testing method and testing system
CN111653500A (en) Method for judging wafer yield loss
WO2021249361A1 (en) Wafer defect analyzing method, system, device and medium
CN114300377A (en) Yield loss acquisition system and method for non-pattern wafer
CN112635346A (en) Wafer detection method, semiconductor detection device and storage medium
CN112908884B (en) LED wafer yield detection method
CN111879785B (en) Method for detecting abnormal film thickness
CN109085466B (en) Photomask electrostatic discharge defect detection method
CN113725112A (en) Wafer detection method, system and detection machine
JP3767677B2 (en) Semiconductor test data processing method
CN107437514B (en) Method for monitoring defects of product measurement area
Harrigan et al. Automated wafer inspection in the manufacturing line
KR100472776B1 (en) Reviewing method of wafer defect
CN112117207B (en) Wafer defect monitoring method
CN117075439A (en) Overlay monitoring and intervention method and device, storage medium and lithography equipment
CN112885731B (en) Method for monitoring alignment system and screening data
CN118587150A (en) Wafer defect detection method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant