CN111553897A - Wafer defect detection equipment - Google Patents
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Abstract
A wafer defect detecting apparatus comprising: the wafer carrying platform is used for fixing the wafer to be detected; the wafer detection device comprises an image acquisition module and a detection module, wherein the image acquisition module comprises a camera array and is used for acquiring a detection image corresponding to the whole surface of a wafer to be detected through one-time shooting of the camera array; and the defect judging module judges whether the surface of the wafer to be detected has defects or not according to the detection image obtained by the image obtaining module. The wafer defect detection equipment improves the defect detection efficiency, reduces the occupied volume of the wafer defect detection equipment, reduces the power consumption and reduces the cost.
Description
Technical Field
The invention relates to the field of wafer defect detection, in particular to high-speed wafer detection equipment.
Background
With the rapid development of semiconductor manufacturing technology, in order to achieve faster operation speed, larger memory capacity and more functions of semiconductor devices, semiconductor chips are developed towards higher integration; the higher the integration of a semiconductor chip, the smaller the Critical Dimension (CD) of the semiconductor device.
Photolithography is the most important process in semiconductor integrated fabrication, and multiple layers of processes are required to be performed during integrated circuit fabrication, each layer being accurately aligned, so that in order to accurately overlay patterns between layers of photolithography, After the development process is completed, the chip must be inspected After Development (ADI), and the Inspection After development can find errors in the photolithography process and correct them in time, which is one of the few correctable steps in the chip fabrication process. Once the wafer with the defective photoresist is sent to the next patterning step (etching), the wafer is easily scrapped. Specifically, post-development inspection generally includes inspecting the photoresist for covering, alignment, exposure, development, and the like one by one, and determining whether the photoresist performance meets the process requirements.
The existing detection and scanning mode has low detection efficiency, low output in unit time and relatively delayed data processing, and the optical magnifier scanning method needs to be provided with a large magnifier and a large objective table and objective table driving device, so that the detection equipment has large floor area and high cost.
Disclosure of Invention
The invention aims to solve the technical problem of how to improve the defect detection efficiency and reduce the occupied area of detection equipment.
The invention provides a wafer defect detecting device, comprising:
the wafer carrying platform is used for fixing the wafer to be detected;
the wafer detection device comprises an image acquisition module and a detection module, wherein the image acquisition module comprises a camera array and is used for acquiring a detection image corresponding to the whole surface of a wafer to be detected through one-time shooting of the camera array;
and the defect judging module judges whether the surface of the wafer to be detected has defects or not according to the detection image obtained by the image obtaining module.
Optionally, the image acquisition module further includes a planar substrate, and a plurality of cameras are arranged in an array on the planar substrate to form the camera array, where the number of the cameras is greater than or equal to 5.
Optionally, the size of the camera array corresponds to the size of the wafer to be detected.
Optionally, all the cameras in the camera array have the same size and the same magnification, and the magnification is 10-250 times.
Optionally, the image obtaining module further includes an image stitching unit, and the image stitching unit is configured to stitch a plurality of images obtained by all cameras in the camera array at the same magnification to obtain a detection image corresponding to the entire surface of the wafer to be detected.
Optionally, the camera array comprises a plurality of first cameras with first magnification and a plurality of second cameras with second magnification, the first magnification is smaller than the second magnification, and the number of the first cameras is larger than the number of the second cameras.
Optionally, the first magnification is 10 times to 250 times, and the second magnification is 20 times to 300 times.
Optionally, the plurality of second cameras are located at a plurality of specific positions in the camera array, and the number of the second cameras is greater than or equal to 2.
Optionally, when the image acquisition module shoots the surface of the wafer to be detected, the first camera and the second camera start to shoot at the same magnification, so as to obtain a plurality of first detection images; and then, the second camera increases the magnification to shoot, and a plurality of second detection images are obtained.
Optionally, the image obtaining module further includes an image stitching unit, and the image stitching unit is configured to stitch the first detection image to obtain a detection image corresponding to the entire surface of the wafer to be detected.
Optionally, the stitching includes an image preprocessing step, an image registration step, a change model establishing step, a same coordinate changing step, and a fusion reconstruction step.
Optionally, a plurality of cameras in the camera array have an image sensor array, and the image sensor array is a CMOS image sensor array or a CCD image sensor array.
Optionally, the defect determining module includes a standard unit and a comparing unit, the standard unit stores a standard wafer image or a defect-free wafer image, and the comparing unit is configured to compare or match the detection image obtained by the image obtaining module with the standard wafer image or the defect-free wafer image, so as to determine whether a defect exists on the detection image and a position of the defect.
Optionally, the wafer stage may rotate, move in a vertical direction, move in a horizontal direction, and deflect.
Compared with the prior art, the technical scheme of the invention has the following advantages:
the wafer defect detection equipment of the invention comprises: the wafer carrying platform is used for fixing the wafer to be detected; the wafer detection device comprises an image acquisition module and a detection module, wherein the image acquisition module comprises a camera array and is used for acquiring a detection image corresponding to the whole surface of a wafer to be detected through one-time shooting of the camera array; and the defect judging module judges whether the surface of the wafer to be detected has defects or not according to the detection image obtained by the image obtaining module. The image acquisition module acquires a detection image corresponding to the whole surface of the wafer to be detected through one-time shooting of the camera array, so that the wafer carrying platform does not need to be moved in a scanning mode (moved along the horizontal direction) when the detection image is acquired, and the wafer carrying platform only needs to be moved along the vertical direction and/or along the horizontal direction within a small range or within a small distance when being aligned with the camera array 104 in the application, so that the wafer carrying platform and a corresponding driving unit or driving device can be small in size, and the volume occupied by the camera array is small, so that the volume occupied by the whole wafer defect detection equipment is reduced, and energy consumption can be reduced (the driving volume is small and the energy consumption is reduced). In addition, in the application, the detection image corresponding to the whole surface of the wafer to be detected is obtained by shooting through the camera array through the image obtaining module at one time, the defect judging module judges whether the surface of the wafer to be detected has defects or not according to the detection image obtained by the image obtaining module, and when the defect is detected, the time for obtaining the detection image is greatly reduced (primary transient imaging), the defect detection efficiency is improved, and the cost is reduced (the cost of the camera array is greatly reduced compared with that of an optical scanning magnifier).
Further, the size of all cameras in the camera array is the same, and the magnification is the same, and a plurality of cameras are the array mode and arrange on the plane base plate, just each camera in the camera array all is the horizontal angle setting to make when carrying out the defect detection, can treat among the camera array and detect the wafer and carry out quick focus and shoot fast, and be convenient for splice the image that obtains among a plurality of cameras.
Further, a plurality of cameras in the camera array include a plurality of first cameras that have first magnification and a plurality of second cameras that have second magnification, first magnification is less than second magnification, the quantity of first camera is greater than the quantity of second camera. When defect detection is performed, the first camera with the smaller magnification can perform general defect detection, and the second camera with the larger magnification can obtain a larger magnification and a clear image from a single position on a wafer to be detected so as to meet different detection requirements (such as Characteristic Dimension (CD) measurement and overlay error (overlay) measurement).
Further, when the surface of the wafer to be detected is shot by adopting the camera array, the first camera and the second camera start to shoot by adopting the same multiplying power to obtain a plurality of first detection images, and the image splicing unit splices the obtained first detection images to obtain detection images for detecting general defects; then, the second camera increases the magnification to shoot, so as to obtain a plurality of second detection images, and the obtained plurality of second detection images can be used for separate observation or measurement, such as Characteristic Dimension (CD) measurement and overlay error (overlay) measurement, so that common defect detection and Characteristic Dimension (CD) measurement and overlay error (overlay) measurement are performed on one device, and the efficiency is improved.
Drawings
FIG. 1 is a schematic structural diagram of a wafer defect inspection apparatus according to an embodiment of the present invention;
FIG. 2 is a schematic structural diagram of a wafer defect inspection apparatus according to another embodiment of the present invention;
FIG. 3 is a schematic structural diagram of a wafer defect inspection apparatus according to another embodiment of the present invention.
Detailed Description
The invention provides a wafer defect detecting device, comprising: the wafer carrying platform is used for fixing the wafer to be detected; the wafer detection device comprises an image acquisition module and a detection module, wherein the image acquisition module comprises a camera array and is used for acquiring a detection image corresponding to the whole surface of a wafer to be detected through one-time shooting of the camera array; and the defect judging module judges whether the surface of the wafer to be detected has defects or not according to the detection image obtained by the image obtaining module. The image acquisition module acquires a detection image corresponding to the whole surface of the wafer to be detected through one-time shooting of the camera array, so that the wafer carrying platform does not need to be moved in a scanning mode (moved along the horizontal direction) when the detection image is acquired, and the wafer carrying platform only needs to be moved along the vertical direction and/or along the horizontal direction within a small range or within a small distance when being aligned with the camera array 104 in the application, so that the wafer carrying platform and a corresponding driving unit or driving device can be small in size, and the volume occupied by the camera array is small, so that the volume occupied by the whole wafer defect detection equipment is reduced, and energy consumption can be reduced (the driving volume is small and the energy consumption is reduced). In addition, in the application, the detection image corresponding to the whole surface of the wafer to be detected is obtained by shooting through the camera array through the image obtaining module at one time, the defect judging module judges whether the surface of the wafer to be detected has defects or not according to the detection image obtained by the image obtaining module, and when the defect is detected, the time for obtaining the detection image is greatly reduced (primary transient imaging), the defect detection efficiency is improved, and the cost is reduced (the cost of the camera array is greatly reduced compared with that of an optical scanning magnifier).
In order to make the aforementioned objects, features and advantages of the present invention comprehensible, embodiments accompanied with figures are described in detail below. In describing the embodiments of the present invention in detail, the drawings are not to be considered as being enlarged partially in accordance with the general scale, and the drawings are only examples, which should not be construed as limiting the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
Referring to fig. 1, an embodiment of the present invention provides a wafer defect detecting apparatus, including:
a wafer stage 101 for fixing a wafer 102 to be detected;
the image acquisition module 103 comprises a camera array 104, and the image acquisition module 103 obtains a detection image corresponding to the whole surface of the wafer to be detected through one-time shooting of the camera array 104;
and a defect determining module 108, wherein the defect determining module 108 determines whether the surface of the wafer 102 to be detected has a defect according to the detection image obtained by the image obtaining module 103.
Specifically, the wafer carrier 101 is configured to fix the wafer 102 to be detected, and the wafer carrier 101 may fix the wafer 102 to be detected in a vacuum adsorption, electrostatic adsorption, or mechanical clamping manner. Specifically, the wafer defect detecting apparatus further includes a conveying unit, and the conveying unit is configured to convey the wafer 102 to be detected onto the wafer carrier 101, and then detect the defect.
In an embodiment, the wafer stage 101 may be movable, specifically, before the detection image is captured, the wafer stage 101 may be rotated and may be capable of moving in a vertical direction and/or moving in a small range or a small distance in a horizontal direction (specifically, the small range or the small distance moving range is plus or minus 10-25 mm), so that the wafer 102 to be detected on the wafer stage 101 is aligned with the camera array on the image acquisition module 103, and the wafer stage 101 may also be deflected when the detection image is captured, so that the wafer to be detected is in an inclined state, so as to obtain a dark field image. In a specific embodiment, the wafer stage 101 may be connected to a corresponding driving unit or driving device, the driving unit or driving device may drive the wafer stage to perform a corresponding action (including rotation, small-range movement in a vertical direction, small-range movement in a horizontal direction, and deflection), and the driving unit or driving device may be a combination of a micro-machine and a micro-machine.
The wafer 102 to be detected is a wafer that needs to be subjected to defect detection after a certain specific semiconductor process is performed. Specifically, the wafer 102 to be detected may be a wafer subjected to a photoresist coating process, a wafer subjected to a photolithography and development process, a wafer subjected to an etching process (including wet etching or dry etching), a wafer subjected to a chemical mechanical polishing process, a wafer subjected to a chemical vapor deposition process, or a wafer subjected to a physical vapor deposition process. The material of the wafer 102 to be detected may be silicon (Si), germanium (Ge), or silicon germanium (GeSi), silicon carbide (SiC); or silicon-on-insulator (SOI), germanium-on-insulator (GOI); or may be other materials such as group iii-v compounds such as gallium arsenide. The size (diameter) of the wafer 102 to be detected may be 6 inches, 8 inches, 12 inches or 18 inches.
In this application, the defect detection on the wafer 102 to be subsequently detected includes: detecting whether the pattern formed on the surface of the wafer 102 to be detected is good (for example, whether the pattern is complete or not and whether the pattern has defects or not), detecting whether the film formed on the surface of the wafer 102 to be detected is good (for example, whether the surface topography of the film is good or not), and detecting whether particle defects, scratch defects or other types of defects exist on the surface of the wafer 102 to be detected. Specifically, for example, the post-development defect inspection (ADI) performed on the wafer 102 to be inspected After the photolithography and development process is performed includes: and detecting whether the developed photoresist patterns are good or not, wherein the photoresist patterns comprise photoresist patterns used as a subsequent etching mask, photoresist patterns used for measuring a Characteristic Dimension (CD), photoresist patterns used for measuring an overlay error (overlay), and whether particle defects, scratch defects or other types of photoresist defects exist or not. For another example, After the etching process is performed, defect detection After Etching (AEI) performed on a wafer to be detected specifically includes: and detecting whether the etching pattern is good or not, and detecting whether particle defects, scratch defects or other types of etching defects exist or not.
In an embodiment, the image capturing module 103 further includes a planar substrate 105, and a plurality of cameras 107 are arranged on the planar substrate 105 in an array manner to form a camera array 104. Be used for installing a plurality of cameras 107 on the plane base plate 105, it is specific the plane base plate 105 can be the PCB base plate, have a plurality of connecting circuits on the PCB base plate, corresponding circuit is connected with the camera that corresponds. Each of the cameras 107 includes a substrate, an image sensor array in the substrate for sensing external incident light to generate an electrical signal, and a lens assembly on the image sensor array for converging the external incident light on the image sensor array and for adjusting the magnification and the focal length of the camera.
The image sensor arrays in the cameras 107 in the camera array 104 are CMOS image sensor arrays or CCD image sensor arrays.
In this embodiment, the size of the camera array 104 corresponds to the size of the wafer 102 to be detected, that is, the size of the camera array 104 is equal to, approximately equal to, slightly larger than or slightly smaller than the size of the wafer 102 to be detected, and it is only necessary that the added view angle of the cameras in the camera array 104 can cover the entire surface of the wafer 102 to be detected.
The camera array 104 includes a plurality of cameras 107, and in an embodiment, the number of the cameras 107 in the camera array 104 is greater than or equal to 5, specifically may be 5 (specifically, the arrangement may be such that 1 camera is disposed in the middle of the planar substrate 105, and one camera is disposed at each of the peripheral edges), 9 (specifically, the arrangement may be such that 9 cameras are arranged in a 3x3 array on the planar substrate 105), 13 (specifically, the arrangement may be such that 9 cameras are arranged in a 3x3 array in the middle of the planar substrate 105, and 1 camera is arranged at each of the peripheral edges), 24 (specifically, the arrangement may be such that 16 cameras are arranged in a 4x 4 array in the middle of the planar substrate 105, and 2 cameras are arranged at each of the peripheral edges), 37 (specifically, the arrangement may be such that 25 cameras are arranged in a 5x 5 array in the middle of the planar substrate 105, 3 cameras are arranged at the peripheral edge respectively), 69 (the specific arrangement mode may be that 49 cameras are arranged in a 7 × 7 array in the middle of the planar substrate 105, and 5 cameras are arranged at the peripheral edge respectively, as shown in fig. 1). It should be noted that the number of the cameras 107 in the camera array 104 may be other numbers, and the specific number may be set according to the requirements of the size of the wafer 102 to be detected, the definition of an image, the detection precision, and the like, and it is only necessary to satisfy that the total view angle of the cameras in the camera array 104 can cover the entire surface of the wafer 102 to be detected.
In this embodiment, referring to fig. 1, all the cameras 107 in the camera array 104 have the same size (the size is the packaging size of the cameras), the magnification is the same, the cameras 107 are arranged in an array manner on the planar substrate 105, and each camera 107 in the camera array 104 is set at a horizontal angle, so that when defect detection is performed, the camera array 104 in the image acquisition module 103 can quickly focus and quickly shoot the wafer 102 to be detected, and can conveniently splice images obtained by the cameras 107.
Specifically, the magnification of each camera 107 in the camera array 104 is 10 to 250 times.
When shooting is performed by using the camera array 104, all the cameras 107 in the camera array 104 shoot at the same magnification. Each camera 107 also has a respective control chip (not shown in the figures) that controls the corresponding camera 107 to perform focusing, magnification, and photographing operations. The image acquisition module 103 may further include a total shooting control unit, which is configured to send control instructions, such as an instruction to focus, an instruction to magnify, an instruction to shoot, and the like, to the control chips in the cameras 107, respectively. In a specific embodiment, the focusing of the camera may adopt Phase Detection auto focus (Phase Detection auto focus).
In another embodiment, the cameras 107 in the camera array 104 have the same size, but different magnifications, and specifically, referring to fig. 2, the cameras 107 in the camera array 104 include first cameras 107a with a first magnification and second cameras 107b with a second magnification, the first magnification is smaller than the second magnification, the number of the first cameras 107a is larger than the number of the second cameras 107b, and the size values of the first cameras 107a and the second cameras 107b are the same. In defect detection, the first camera 107 with a smaller magnification may perform general defect detection, and the second camera 107b with a larger magnification may obtain a larger magnification and a clear image from a specific position on a wafer to be detected, so as to satisfy different detection requirements (such as Characteristic Dimension (CD) measurement and overlay error (overlay) measurement), specifically, the image acquisition module 103 may detect a photoresist pattern for measuring a Characteristic Dimension (CD) and obtain a specific characteristic dimension value, may detect a photoresist pattern for measuring an overlay error (overlay) and obtain a specific overlay error value, or may also be used to obtain a larger magnification and a clear image at a specific position for process and equipment personnel to observe, that is, the defect detection apparatus of the present application may perform rapid detection of general defects, the method can also be used for quickly measuring the overlay error and the characteristic dimension value, improves the detection efficiency of defects in the integrated circuit manufacturing process and the measurement efficiency of related parameters, and saves the time required by the whole integrated circuit manufacturing process.
In one embodiment, the first magnification is 10 times to 250 times, and the second magnification is 20 times to 300 times.
In an embodiment, the second cameras 107b are located at specific positions in the camera array 104, and the number of the second cameras 107b is greater than or equal to 2.
In a specific embodiment, please continue to refer to fig. 2, the number of the second cameras 107b is 3, and the three second cameras 107b are respectively located at the center and the edge of the camera array 104 and at positions between the center and the edge. In other embodiments, the number of the second cameras 107b may also be 5 (4 are distributed at 1 edge in the middle of the 5 second cameras 107b camera arrays 104) or 9 (nine-square grid distribution in the 9 second cameras 107b camera arrays 104). When the defect detection is performed, the second camera 107b can be used for detecting a plurality of corresponding positions on the wafer 102 to be detected, so that the detection efficiency is improved.
In an embodiment, when the camera array 104 is used to photograph the surface of the wafer 102 to be detected, the first camera 107a and the second camera 107b start to photograph with the same magnification (first magnification), so as to obtain a plurality of first detection images for general defect detection; then, the second camera 107b increases the magnification (the second magnification, which is larger than the first magnification) to perform shooting, so as to obtain a plurality of second detection images, which can be used for separate observation or measurement, such as feature size (CD) measurement and overlay error (overlay) measurement, so that general defect detection as well as feature size (CD) measurement and overlay error (overlay) measurement are performed on one device, thereby improving the measurement efficiency. In a specific embodiment, a pattern (CDbar) for measuring a feature size and a pattern (overlay mark) for measuring an overlay error are formed at a specific position (the specific position is a position corresponding to one second camera 107b in the camera array 104) of the wafer 102 to be detected.
In other embodiments, when the aforementioned camera array 104 is used to photograph the surface of the wafer to be detected, only the second camera 107b may be used to photograph the surface.
In a specific embodiment, before the camera array 104 is used to capture and obtain the detection image corresponding to the entire surface of the wafer to be detected, the camera array 104 needs to be aligned with the wafer 102 to be detected, so that the position of the wafer 102 to be detected can correspond to the position of the camera 107 on the camera array 104. Since the initial position of the wafer carrier 101 is known, the positions of the cameras 107 on the camera array 104 are fixed, and the position of the notch (notch) on the wafer 102 to be detected is fixed, so that before a detection image corresponding to the entire surface of the wafer to be detected is obtained, the camera array 104 is used to obtain an image of the edge of the wafer to be detected, the position of the notch (notch) on the wafer 102 to be detected relative to the wafer carrier 101 can be obtained through a corresponding image processing process, and by adjusting the position of the wafer carrier 101, a positional relationship can be established between the wafer 102 to be detected on the wafer carrier 101 and the cameras 107 on the camera array 104, so that the position of the wafer 102 to be detected can correspond to the position of the cameras 107 on the camera array 104.
In an embodiment, referring to fig. 1, when the size of each camera 107 in the camera array 104 is the same and the magnification is the same, and when the surface of the wafer 102 to be detected is shot and all the cameras 107 in the camera array 104 are shot with the same magnification, the image stitching unit 106 is configured to stitch a plurality of images obtained by all the cameras 107 in the camera array 104 at the same magnification to obtain a detection image corresponding to the entire surface of the wafer to be detected. In another embodiment, referring to fig. 2, when the plurality of cameras 107 in the camera array 104 include a plurality of first cameras 107a with a first magnification and a plurality of second cameras 107b with a second magnification, when the surface of the wafer 102 to be detected is photographed, the first cameras 107a and the second cameras 107b start to photograph with the same magnification, and when a plurality of first detection images are obtained, the image stitching unit 106 is configured to stitch the plurality of first detection images to obtain detection images corresponding to the entire surface of the wafer to be detected.
In an embodiment, the image stitching unit 106 performs the stitching process including an image preprocessing step, an image registration step, a change model establishing step, a same coordinate changing step, and a fusion reconstruction step.
Specifically, the image preprocessing step includes basic operations of digital image processing (such as denoising, edge extraction, histogram processing, and the like), establishing a matching template of the image, and performing some transformation (such as fourier transformation, wavelet transformation, and the like) on the image.
In the image registration step, a certain matching strategy or algorithm is adopted to find out the corresponding position of the template or the characteristic point in the images to be spliced in the reference image, so as to determine the transformation relation between the two images.
In an embodiment, the algorithm used for image registration may use a frequency domain based method (phase correlation method) and a time domain based method. Time-domain based methods can be further classified into feature-based methods and region-based methods. The characteristic-based method firstly finds out characteristic points (such as boundary points, inflection points and angular points) in two images, determines the corresponding relation of the characteristic points between the images, and then finds out the transformation relation between the two images by utilizing the corresponding relation. The region-based method is characterized in that one image in the overlapping region of one image is used as a template, and the matching block most similar to the template is searched in the other image, so that the algorithm is high in precision.
And the step of establishing a transformation model, namely calculating all parameter values in the mathematical model according to the corresponding relation between the template or the image characteristics so as to establish the mathematical transformation model of the two images.
And the step of unified coordinate transformation, namely converting the images to be spliced into a coordinate system of the reference image according to the established mathematical transformation model to complete the unified coordinate transformation.
And in the fusion reconstruction step, the overlapped areas of the images to be spliced are fused to obtain a spliced and reconstructed smooth seamless panoramic image.
In an embodiment, the image stitching unit 106 includes an image processing chip, and the image stitching unit 106 may be mounted on the planar substrate 105, and connected to the corresponding camera 107 through a plurality of lines on the planar substrate 105, so as to further reduce the volume occupied by the image acquisition module 103.
In an embodiment, the defect determining module 108 includes a standard unit and a comparing unit, the standard unit stores a standard wafer image or a non-defective wafer image, and the comparing unit is configured to compare or match the detection image obtained by the image obtaining module with the standard wafer image or the non-defective wafer image, so as to determine whether a defect exists on the detection image and a position of the defect, thereby determining whether a defect exists on the surface of the wafer to be detected.
In another embodiment, the defect determining module 108 may include an area dividing unit that divides the detected image into a plurality of regions to be compared having the same size (when there is no defect, the patterns on the plurality of regions to be compared are the same or repeated), and a comparing unit that compares adjacent regions to be compared and finds out the positions of different points in the adjacent regions to be compared, that is, the positions where there is a defect.
It should be noted that the defect determining module 108 may determine whether there is a defect on the inspection image by using other methods or manners.
The standard wafer image or the non-defective wafer image is an image obtained when the surface of the wafer to be detected has no defect after a certain specific semiconductor process is carried out on the wafer.
In an embodiment, referring to fig. 3, the wafer defect inspection apparatus further includes an illumination light source 109, and the illumination light source 109 is used for illuminating the surface of the wafer 102 to be inspected when performing the inspection. In this embodiment, the illumination unit 109 is disposed at one side of the wafer stage 101 and the planar substrate 105, when defect detection is performed, the wafer stage 101 may deflect to enable the wafer 102 to be detected to be in an inclined state, meanwhile, the illumination unit 109 illuminates the surface of the wafer 102 to be detected, and the camera array 104 in the image acquisition module 103 obtains a detection image with a dark field (dark field) corresponding to the entire surface of the wafer to be detected through one-time shooting. In one embodiment, the illumination unit 109 may rotate around the wafer stage 101 and the planar substrate 105. In another embodiment, the number of the illumination units 109 may be multiple (equal to or greater than 2), and the multiple illumination units 109 are uniformly (equiangularly) distributed around the wafer stage 101 and the planar substrate 105.
In other embodiments, the illumination light source may be directly disposed on one side of the camera 107 in the camera array 104, and when performing shooting, the front surface of the wafer 102 to be detected is illuminated, and the camera array 104 obtains a detection image with a bright field (bright field) corresponding to the entire surface of the wafer to be detected through one-time shooting.
According to the wafer defect detection device, the image acquisition module 103 comprises the camera array 104, and the image acquisition module 103 acquires the detection image corresponding to the whole surface of the wafer 102 to be detected through one-time shooting by the camera array 104, so that the wafer carrier 101 does not need to perform scanning movement (move along the horizontal direction) when the detection image is acquired, and the wafer carrier 101 only needs to move along the vertical direction and/or along the horizontal direction within a small range or a small distance when being aligned with the camera array 104 in the application, so that the volume of the wafer carrier 101 and a corresponding driving unit or driving device can be smaller, and the volume occupied by the camera array 104 is smaller, so that the volume occupied by the whole wafer defect detection device is reduced, and the energy consumption can be reduced (the driving volume is small and the energy consumption is reduced). In addition, in the present application, the detection image corresponding to the entire surface of the wafer 102 to be detected is obtained by the image obtaining module 103 through one-time shooting by the camera array 104, the defect determining module 108 determines whether the surface of the wafer 102 to be detected has a defect according to the detection image obtained by the image obtaining module 103, and when detecting the defect, the time for obtaining the detection image is greatly reduced (one-time transient imaging), so that the efficiency of defect detection is improved, and the cost is reduced (the cost of the camera array is greatly reduced compared with that of an optical scanning magnifier).
The foregoing is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, various modifications and decorations can be made without departing from the principle of the present invention, and these modifications and decorations should also be regarded as the protection scope of the present invention.
Claims (14)
1. A wafer defect detecting apparatus, comprising:
the wafer carrying platform is used for fixing the wafer to be detected;
the image acquisition module comprises a camera array and is used for acquiring a detection image corresponding to the whole surface of the wafer to be detected through one-time shooting of the camera array;
and the defect judging module judges whether the surface of the wafer to be detected has defects or not according to the detection image obtained by the image obtaining module.
2. The wafer defect detecting apparatus as claimed in claim 1, wherein the image capturing module further includes a planar substrate, a plurality of cameras are arranged in an array on the planar substrate to form the camera array, and the number of the cameras is greater than or equal to 5.
3. The wafer defect inspection apparatus of claim 2, wherein the size of the camera array corresponds to the size of the wafer to be inspected.
4. The wafer defect detecting apparatus as claimed in claim 2, wherein all the cameras in the camera array have the same size and the same magnification, and the magnification is 10-250 times.
5. The wafer defect detecting apparatus of claim 4, wherein the image obtaining module further comprises an image stitching unit, and the image stitching unit is configured to stitch a plurality of images obtained by all the cameras in the camera array at the same magnification to obtain a detection image corresponding to the entire surface of the wafer to be detected.
6. The wafer defect detecting apparatus as claimed in claim 2, wherein the camera array includes a number of first cameras having a first magnification and a number of second cameras having a second magnification, the first magnification is smaller than the second magnification, and the number of the first cameras is larger than the number of the second cameras.
7. The wafer defect detecting apparatus as claimed in claim 6, wherein the first magnification is 10 times to 250 times, and the second magnification is 20 times to 300 times.
8. The wafer defect detecting apparatus as claimed in claim 6, wherein the second cameras are located at a plurality of specific positions in the camera array, and the number of the second cameras is greater than or equal to 2.
9. The wafer defect detecting apparatus according to claim 6, wherein when the image obtaining module shoots the surface of the wafer to be detected, the first camera and the second camera start to shoot with the same magnification, so as to obtain a plurality of first detection images; and then, the second camera increases the magnification to shoot, and a plurality of second detection images are obtained.
10. The wafer defect detecting apparatus of claim 9, wherein the image obtaining module further comprises an image stitching unit, and the image stitching unit is configured to stitch the first detection images to obtain detection images corresponding to the entire surface of the wafer to be detected.
11. The wafer defect detecting apparatus according to claim 5 or 10, wherein the stitching includes an image preprocessing step, an image registration step, a transformation model establishing step, a same coordinate transformation step, and a fusion reconstruction step.
12. The wafer defect detecting apparatus of claim 2, wherein some of the cameras in the camera array have an image sensor array, and the image sensor array is a CMOS image sensor array or a CCD image sensor array.
13. The wafer defect detecting apparatus as claimed in claim 1, wherein the defect determining module includes a standard unit and a comparing unit, the standard unit stores therein a standard wafer image or a non-defective wafer image, and the comparing unit is configured to compare or match the detected image obtained by the image obtaining module with the standard wafer image or the non-defective wafer image, so as to determine whether a defect exists on the detected image and a position of the defect.
14. The wafer defect detecting apparatus as claimed in claim 1, wherein the wafer stage is rotatable, vertically movable, horizontally movable, and deflectable.
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