CN111540691A - Semiconductor packaging structure and packaging method thereof - Google Patents

Semiconductor packaging structure and packaging method thereof Download PDF

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Publication number
CN111540691A
CN111540691A CN202010439310.9A CN202010439310A CN111540691A CN 111540691 A CN111540691 A CN 111540691A CN 202010439310 A CN202010439310 A CN 202010439310A CN 111540691 A CN111540691 A CN 111540691A
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China
Prior art keywords
lead
pad
chip
silver
liquid
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CN202010439310.9A
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Chinese (zh)
Inventor
杨志强
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Dongguan Chain Core Semiconductor Technology Co ltd
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Dongguan Chain Core Semiconductor Technology Co ltd
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Application filed by Dongguan Chain Core Semiconductor Technology Co ltd filed Critical Dongguan Chain Core Semiconductor Technology Co ltd
Priority to CN202010439310.9A priority Critical patent/CN111540691A/en
Publication of CN111540691A publication Critical patent/CN111540691A/en
Priority to PCT/CN2021/094600 priority patent/WO2021233333A1/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/568—Temporary substrate used as encapsulation process aid
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805—Shape
    • H01L2224/4809—Loop shape
    • H01L2224/48091—Arched
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481—Disposition
    • H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H01L2224/48465—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond the other connecting portion not on the bonding area being a wedge bond, i.e. ball-to-wedge, regular stitch
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/93—Batch processes
    • H01L2224/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
    • H01L2224/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)

Abstract

The invention provides a semiconductor packaging structure and a packaging method thereof, wherein the semiconductor packaging structure comprises: the chip, the silver welding pad, the lead and the packaging body; the silver pad comprises a lead pad; one end of the lead is connected with the lead welding pad, and the other end of the lead is connected with the chip; the packaging body wraps the chip and the lead, and the lead welding pad protrudes out of the lower surface of the packaging body. Because the lead welding pads protrude out of the lower surface of the packaging body, when the semiconductor packaging structure is connected with the circuit board, only a small amount of solder paste is smeared on the lower surfaces of the lead welding pads, and then reflow soldering is carried out, so that the connection between the semiconductor packaging structure and the circuit board can be completed; the lead welding pad is a silver welding pad and has a high melting point, so that the problem of diffusion to the periphery due to melting cannot occur during reflow soldering, and the problem of diffusion short circuit during soldering can be avoided.

Description

Semiconductor packaging structure and packaging method thereof
Technical Field
The invention relates to the field of semiconductors, in particular to a semiconductor packaging structure and a packaging method thereof.
Background
At present, there is a semiconductor package structure, which includes a chip, a bonding pad, a lead wire, etc. wrapped in a package, and a solder ball is further disposed at a position corresponding to the bonding pad at the bottom of the package, so that the semiconductor package structure can be electrically connected to a circuit board through the solder ball, and a certain distance is provided between a portion wrapped in the package in the semiconductor package structure and the circuit board by means of a structure formed after the solder ball is soldered; the heat dissipation problem between the semiconductor packaging structure and the circuit board can be improved through the interval, and the problem of desoldering caused by inconsistent thermal expansion rate when the semiconductor packaging structure and the circuit board work can be avoided; although the semiconductor packaging structure has the advantages, the problem that the solder balls are easy to melt and spread to the periphery when reflow soldering is carried out between the semiconductor packaging structure and the circuit board due to the low melting point of the solder balls, the problem of short circuit between the semiconductor packaging structure and the adjacent solder balls is easy to occur, and the sufficient preset distance gap between the semiconductor packaging structure and the circuit board is difficult to keep after the solder balls are melted.
Disclosure of Invention
The present invention is directed to solving at least one of the problems of the prior art. Therefore, the invention provides a semiconductor packaging structure which can keep a sufficient preset distance gap with a circuit board and can avoid the problem of diffusion short circuit during welding.
The invention also provides a semiconductor packaging method.
According to the semiconductor packaging structure of the embodiment of the first aspect of the invention, the semiconductor packaging structure comprises: the chip, the silver welding pad, the lead and the packaging body; the silver welding pad comprises a lead welding pad; one end of the lead is connected with the lead welding pad, and the other end of the lead is connected with the chip; the packaging body wraps the chip and the lead, and the lead welding pad protrudes out of the lower surface of the packaging body.
According to the semiconductor packaging structure of the embodiment of the first aspect of the invention, at least the following beneficial effects are achieved: because the lead welding pads protrude out of the lower surface of the packaging body, when the semiconductor packaging structure is connected with the circuit board, only a small amount of tin paste is needed to be smeared on the lower surfaces of the lead welding pads, and then reflow soldering is carried out, so that the connection between the semiconductor packaging structure and the circuit board can be completed; by means of the supporting effect of the lead welding pad, a sufficient preset distance gap can be kept between the semiconductor packaging structure and the circuit board, and due to the fact that the lead welding pad is a silver welding pad, silver has a high melting point, the inherent shape can be well kept during reflow soldering, the problem of diffusion towards the periphery due to melting can be avoided, and the problem of diffusion short circuit can be avoided during welding with the circuit board.
According to some embodiments of the present invention, the silver pad includes a chip pad, the chip is disposed on the chip pad, and the chip pad protrudes from the lower surface of the package body.
According to some embodiments of the present invention, the semiconductor package structure includes a DAF film protruding from a lower surface of the package body, and one side of the DAF film is bonded to the chip.
According to some embodiments of the invention, the height of the silver pad is between 10-100 microns.
According to some embodiments of the invention, the two ends of the lead are connected to the chip or the lead pad by means of soldering.
According to a second aspect of the present invention, a semiconductor packaging method includes the steps of: a liquid storage groove is arranged at the position of the metal plate corresponding to the lead bonding pad; injecting a liquid silver material into the liquid storage tank; solidifying the liquid silver material into a silver welding pad in the liquid storage tank; connecting two ends of the lead to the chip and the lead welding pad obtained by curing respectively; packaging, and enabling the packaging body to cover the chip and the lead from the upper part of the metal plate; removing the metal plate; and cutting to form the independent packaging chips.
The lead frame according to the embodiment of the second aspect of the invention has at least the following beneficial effects: in the semiconductor packaging structure manufactured by the method, the lead welding pads protrude out of the lower surface of the packaging body, and when the semiconductor packaging structure is connected with a circuit board, only a small amount of tin paste is smeared on the lower surfaces of the lead welding pads, and then reflow soldering is carried out, so that the connection between the semiconductor packaging structure and the circuit board can be completed; by means of the supporting effect of the lead welding pad, a sufficient preset distance gap can be kept between the semiconductor packaging piece and the circuit board, and due to the fact that the lead welding pad is a silver welding pad, silver has a high melting point, the inherent shape can be well kept during reflow soldering, the problem of diffusion short circuit caused by melting can be avoided, and the problem of diffusion short circuit during soldering can be avoided.
According to some embodiments of the invention, the liquid silver material is any one of a low temperature sintered silver paste or a photo-cured silver paste.
According to some embodiments of the invention, the liquid silver material is solidified into a silver pad in the liquid bath by baking or photo-curing or laser sintering.
According to some embodiments of the invention, before solidifying the liquid silver material by baking, an oxidation-resistant protective layer is preset on the upper surface of the metal plate.
According to some embodiments of the invention, the metal plate is protected from oxidation by a protective gas when the liquid silver material is cured by baking.
According to some embodiments of the invention, the liquid silver material is injected into the reservoir by means of 3D printing.
According to some embodiments of the invention, the liquid sump is cut into the sheet metal part by means of laser cutting or chemical etching.
According to some embodiments of the present invention, the liquid storage groove is also formed on the metal plate at a position corresponding to the chip bonding pad.
Additional aspects and advantages of the invention will be set forth in part in the description which follows and, in part, will be obvious from the description, or may be learned by practice of the invention.
Drawings
FIG. 1 is a semiconductor package structure according to an embodiment of the present invention;
fig. 2 is a schematic diagram of a packaging process of the semiconductor packaging method according to an embodiment of the invention.
Reference numerals:
the semiconductor package structure 100, the metal plate 10, the liquid storage tank 110, the lead pad 210, the chip pad 220, the chip 30, the lead 40, and the package 50.
Detailed Description
The conception, specific system, method and technical effects of the present invention will be described clearly and completely with reference to the accompanying drawings and embodiments, so that the purpose, features and effects of the present invention can be fully understood. It is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all embodiments, and those skilled in the art can obtain other embodiments without inventive effort based on the embodiments of the present invention, and all embodiments are within the protection scope of the present invention.
It is noted that, as used in the examples, the singular forms "a," "an," and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. Furthermore, unless defined otherwise, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art. The terminology used in the description herein is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. As used herein, the term "and/or" includes any combination of one or more of the associated listed items.
It is to be understood that although the terms first, second, third, etc. may be used in the embodiments to describe various structures, systems, data, these structures, systems, data should not be limited by these terms. These terms are only used to distinguish one type of structure, system, or data from another. For example, the first data may also be referred to as second data, and similarly, the second data may also be referred to as first data, without departing from the scope of the embodiments. The use of any and all examples, or exemplary language ("e.g.," such as "or the like") provided herein, is intended merely to better illuminate embodiments of the invention and does not pose a limitation on the scope of the invention unless otherwise claimed.
Referring to fig. 1, a semiconductor package structure 100 according to an embodiment of the present invention includes: chip 30, silver pads, leads 40, and package 50; the silver pad includes a lead pad 210; one end of the lead 40 is connected to the lead pad 210, and the other end is connected to the chip 30; the package body 50 encapsulates the chip 30 and the lead 40, and the lead pad 210 protrudes from the lower surface of the package body 50.
Since the lead pads 210 protrude from the lower surface of the package body 50, when the semiconductor package structure 100 is connected to a circuit board, only a small amount of solder paste is smeared on the lower surface of the lead pads 210, and then reflow soldering is performed, so that the connection between the semiconductor package structure 100 and the circuit board can be completed; with the support function of the lead bonding pad 210, a sufficient preset distance gap can be kept between the semiconductor packaging structure 100 and the circuit board, and because the lead bonding pad 210 is a silver bonding pad, silver has a high melting point, and can well keep an inherent shape during reflow soldering, the problem of diffusion short circuit during soldering can be avoided because the silver is melted and diffused all around.
Since the lead pads 210 are disposed around the chip 30, when the semiconductor package structure 100 is connected to the circuit board only through the lead pads 210, the position of the semiconductor package structure 100 corresponding to the chip 30 is in a suspended state, and since the chip 30 is fragile, in some embodiments of the present invention, the silver pads include chip pads 220, the chip 30 is disposed on the chip pads 220, and the chip pads 220 protrude from the lower surface of the package body 50. Therefore, when the semiconductor package structure 100 is connected to a circuit board, the chip pad 220 is used to support the chip 30 of the semiconductor package structure 100, which is more secure and reliable.
Of course, in some embodiments, besides the optional structure of the chip pad 220, the semiconductor package structure 100 may also include a DAF film, which is disposed on the lower surface of the package body 50 in a protruding manner, and one side of the DAF film is adhered to the chip 30, so as to support the position of the chip 30 of the semiconductor package structure 100 by the DAF film.
According to some embodiments of the invention, the height of the silver pad is between 10-100 microns, for example, may be 10 microns, 30 microns, 70 microns, 100 microns, etc. The height of the silver pad is mainly determined by the predetermined distance between the semiconductor package 100 and the circuit board, and the greater the predetermined distance between the semiconductor package 100 and the circuit board, the greater the height of the silver pad.
In some other embodiments of the present invention, both ends of the lead are connected to the chip 30 or the lead pad 210 by soldering; specifically, in order to ensure high conductivity, a silver bonding wire, a gold bonding wire, or a gold-silver alloy bonding wire is selected as the lead, and the lead is soldered to the chip 30 and the lead pad 210 by solder paste.
Referring to fig. 2, a semiconductor packaging method according to an embodiment of the second aspect of the present invention includes the steps of: a liquid storage groove 110 is arranged at the position of the metal plate 10 corresponding to the lead bonding pad 210; injecting a liquid silver material into the liquid storage tank 110; solidifying the liquid silver material into a silver pad in the liquid tank 110; connecting two ends of the lead 40 to the chip 30 and the lead pad 210 obtained by curing respectively; packaging, and enabling the packaging body 50 to cover the chip 30 and the lead 40 from the upper part of the metal plate 10; removing the metal plate member 10; the individual packaged chips 30 are diced to form.
The silver welding pad is formed by solidifying the liquid silver material in the liquid storage tank 110, so that the unevenness of the edge of the welding pad can be avoided, and the thickness of the silver welding pad is effectively ensured to be in a preset range; meanwhile, in the semiconductor package structure 100 manufactured by the above method, the lead pads 210 protrude from the lower surface of the package body 50, and when the semiconductor package structure 100 is connected with a circuit board, the connection between the semiconductor package structure 100 and the circuit board can be completed only by smearing a small amount of solder paste on the lower surfaces of the lead pads 210 and then performing reflow soldering; by means of the supporting function of the lead bonding pad 210, a sufficient preset distance gap can be kept between the semiconductor package and the circuit board, and due to the fact that the lead bonding pad 210 is a silver bonding pad, silver has a high melting point, the inherent shape can be well kept during reflow soldering, the problem of diffusion short circuit caused by melting can be avoided, and the problem of diffusion short circuit during soldering can be avoided.
In some embodiments of the present invention, the metal plate 10 is made of copper, which has good conductivity and is easy to process; of course, in other embodiments of the present invention, the sheet metal member 10 may be made of other metal materials such as aluminum or iron.
The metal plate 10 is removed, a mechanical stripping mode or a chemical etching mode can be selected, metal copper is taken as an example, the copper material removed by mechanical stripping or chemical etching can be reused by melting or chemical extraction, the utilization rate of the copper material is improved, and the method is more environment-friendly; moreover, in the conventional QFN packaged semiconductor structure, a metal plate, such as a copper plate, in the manufacturing process will participate in forming the lead frame structure, and during packaging, the copper plate forming the lead frame portion will be packaged inside the package body to participate in forming part of the structure in the QFN packaged semiconductor. Therefore, by using the conventional QFN semiconductor package structure and method, the consumption of copper material is much greater than that of the semiconductor package structure and method provided by the embodiments of the present invention.
In some embodiments of the present invention, the liquid silver material is a low temperature sintered silver paste, which can be cured by low temperature baking; when the metal plate 10 is cured by a baking mode, if the baking temperature is too high, the surface of the metal plate 10 is oxidized, if the metal plate 10 is made of copper, the surface of the metal plate 10 is blackened and greened, and the low-temperature sintered silver paste can be baked and cured at a lower temperature, so that the surface of the metal plate 10 is prevented from being oxidized; and the silver welding pad is formed by adopting low-temperature sintering silver paste for solidification, and the low-temperature baking is only needed, so that the energy is saved, and the environment is protected. In some embodiments of the present invention, to further avoid oxidation on the surface of the sheet metal part 10, the low-temperature sintering silver paste with a curing temperature below 300 ℃ is selected, and the baking temperature is between 250 ℃ and 300 ℃ when the liquid silver material is cured by baking.
Of course, according to practical situations, in other embodiments of the present invention, a liquid silver material with other properties such as a photo-curing silver paste may be selected; photocuring silver thick liquid can realize photocuring through the form that UV light shines, can avoid the problem of the metal sheet 10 surface oxidation that leads to because of the high temperature during solidification equally.
Of course, in other embodiments of the present invention, in addition to the low-temperature baking and light curing for curing the liquid silver material, laser sintering may be used; taking the liquid silver material as an example of low-temperature sintered silver paste, the low-temperature sintered silver paste in the liquid storage tank 110 can be irradiated at a fixed point by laser equipment, so that the low-temperature sintered silver paste is rapidly heated to a temperature higher than the curing temperature, and is rapidly cured into a silver bonding pad; and with the help of the high accuracy and the high controllability of laser, the low temperature sintering silver thick liquid is shone at the fixed point, though the temperature of low temperature sintering silver thick liquid will rise fast, but the temperature of sheet metal spare 10 can remain unchanged basically, consequently also can effectively avoid sheet metal spare 10 to appear the problem of high temperature oxidation.
In some embodiments of the present invention, oxidation of the sheet metal element 10 is further prevented by the protective gas when the liquid silver material is solidified by baking. The baking and curing can be carried out in an oven, before baking, protective gas such as nitrogen or helium is introduced into the oven, and then the metal plate 10 is baked in the atmosphere filled with the protective gas, so that the oxidation reaction between the metal plate 10 and oxygen is avoided when baking.
In some embodiments of the present invention, an oxidation-resistant protective layer is pre-formed on the sheet metal member 10 except for the liquid sump 110 before the liquid silver material is cured by baking. The anti-oxidation protective layer is coated on the metal plate 10 in a chemical coating mode, and avoids the position of the liquid storage tank 110 during coating, and the oxidation of the metal plate 10 can be avoided even at high temperature and in an atmosphere without protective gas through the anti-oxidation protective layer; specifically, the thickness of the oxidation resistant protective layer is between 1 and 5 microns; of course, in other embodiments of the present invention, the oxidation-resistant protective layer may be selectively disposed by electroplating.
In some embodiments of the present invention, the liquid silver material is injected into the sump 110 by means of 3D printing. And because the silver welding pad is formed by solidifying the liquid silver material after 3D printing, the whole forming process of the silver welding pad does not involve an electroplating process, so that the silver welding pad is more environment-friendly.
In some embodiments of the present invention, the liquid sump 110 is formed on the metal plate 10 by laser cutting, which has high processing precision, high speed, and is more environment-friendly. Of course, in other embodiments of the present invention, the liquid sump 110 may be formed on the metal plate by etching. And, specifically, the depth of the liquid storage tank 110 is set between 10-120 microns, the depth of the liquid storage tank 110 is mainly determined by the thickness of the bonding pad, the width of the liquid storage tank 110 is set at 200-300 microns, and the thickness of the liquid storage tank 110 is mainly determined by the accuracy of the wire bonding equipment during wire bonding.
Since the chip pad 220 exists in part of the semiconductor package 100, in some embodiments of the present invention, the liquid groove 110 is also formed in the metal plate 10 at a position corresponding to the chip pad 220 where the chip pad 220 exists in the semiconductor package 100.
The semiconductor package structure 100 of the first aspect and the semiconductor packaging method of the second aspect of the present invention are described in an embodiment with reference to fig. 1 and fig. 2.
The semiconductor package structure 100 includes: chip 30, silver pads, leads 40, and package 50; the silver pad comprises a lead pad 210 and a chip pad 220; the chip 30 is disposed on the chip pad 220; one end of the lead 40 is connected to the lead pad 210, and the other end is connected to the chip 30; the package body 50 wraps the chip 30 and the leads 40, the lead pads 210 and the chip pads 220 both protrude from the lower surface of the package body 50, and the heights of the lead pads 210 and the chip pads 220 are both 50 micrometers; specifically, the lead 40 is a silver solder wire, and both ends are soldered to the chip 30 and the lead pad 210 by solder paste.
The semiconductor package structure 100 is manufactured by the following semiconductor packaging method.
The semiconductor packaging method comprises the following steps: cutting the liquid storage groove 110 on the metal plate 10 at the position corresponding to the lead bonding pad 210 and the chip bonding pad 220 by laser processing equipment; the depth of the reservoir 110 is between 10 and 120 microns, and specifically 50 microns; the width of the reservoir 110 is between 200 and 300 microns, and specifically 250 microns; the part of the metal plate 10 except the liquid storage tank 110 forms an anti-oxidation protective layer in a chemical coating mode, and the thickness of the anti-oxidation protective layer is 1-5 micrometers, specifically 2 micrometers; 3D printing and injecting low-temperature sintering silver paste into the liquid storage tank 110 through 3D printing equipment; introducing nitrogen into the oven for a period of time, and discharging the original air in the oven; placing the metal plate 10 with the low-temperature sintered silver paste in an oven, then keeping the oven at 250-300 ℃ for baking in a nitrogen atmosphere, specifically at 270 ℃, and solidifying the liquid silver material into a silver welding pad in the liquid storage tank 110; welding two ends of the lead 40 to the chip 30 and the lead pad 210 obtained by curing respectively; packaging, and enabling the packaging body 50 to cover the chip 30 and the lead 40 from the upper part of the metal plate 10; removing the metal plate 10 by mechanical stripping, wherein the obtained lead bonding pads 210 and chip bonding pads 220 protrude from the lower surface of the package body 50; finally, the individual packaged chips 30 are obtained by dicing.
The above description is only a preferred embodiment of the present invention, and the present invention is not limited to the above embodiment, and any modifications, equivalent substitutions, improvements, etc. within the spirit and principle of the present invention should be included in the protection scope of the present invention as long as the technical effects of the present invention are achieved by the same means. The invention is capable of other modifications and variations in its technical solution and/or its implementation, within the scope of protection of the invention.

Claims (10)

1. A semiconductor package structure, comprising:
a chip;
a silver pad comprising a lead pad;
one end of the lead is connected with the lead welding pad, and the other end of the lead is connected with the chip;
and the packaging body is used for coating the chip and the lead, and the lead welding pad protrudes out of the lower surface of the packaging body.
2. The semiconductor package structure of claim 1, wherein the silver pad comprises a chip pad, the chip is disposed on the chip pad, and the chip pad protrudes from the lower surface of the package body.
3. The semiconductor package structure of claim 1, comprising a DAF film, wherein the DAF film protrudes from the lower surface of the package body, and one side of the DAF film is bonded to the chip.
4. The semiconductor packaging method is characterized by comprising the following steps:
a liquid storage groove is arranged at the position of the metal plate corresponding to the lead bonding pad;
injecting a liquid silver material into the liquid storage tank;
solidifying the liquid silver material into a silver welding pad in the liquid storage tank;
connecting two ends of the lead to the chip and the lead welding pad obtained by curing respectively;
packaging, and enabling the packaging body to cover the chip and the lead from the upper part of the metal plate;
removing the metal plate;
and cutting to form the independent packaging chips.
5. The semiconductor packaging method according to claim 4, wherein the liquid silver material is one of a low-temperature sintering silver paste or a photo-curing silver paste.
6. The semiconductor packaging method of claim 1, wherein the liquid silver material is solidified into a silver pad in the liquid tank by baking or photo-curing or laser sintering.
7. The semiconductor packaging method according to claim 6, wherein an oxidation-resistant protective layer is preset on the upper surface of the metal plate before the liquid silver material is cured by baking; or when the liquid silver material is solidified by baking, the metal plate is prevented from being oxidized by protective gas.
8. The semiconductor packaging method according to claim 4, wherein the liquid silver material is injected into the liquid sump by means of 3D printing.
9. The semiconductor packaging method according to claim 4, wherein the liquid reservoir is formed on the metal plate by laser cutting or chemical etching.
10. The semiconductor packaging method according to any one of claims 4 to 9, wherein the liquid reservoir is also formed in the metal plate member at a position corresponding to a chip pad.
CN202010439310.9A 2020-05-22 2020-05-22 Semiconductor packaging structure and packaging method thereof Pending CN111540691A (en)

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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021233333A1 (en) * 2020-05-22 2021-11-25 东莞链芯半导体科技有限公司 Semiconductor encapsulation structure and encapsulation method thereof
CN116895726A (en) * 2023-09-11 2023-10-17 深圳明阳电路科技股份有限公司 Micro-led chip and integration method thereof

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TWI235440B (en) * 2004-03-31 2005-07-01 Advanced Semiconductor Eng Method for making leadless semiconductor package
JP2009076658A (en) * 2007-09-20 2009-04-09 Renesas Technology Corp Semiconductor device and manufacturing method thereof
US7858443B2 (en) * 2009-03-09 2010-12-28 Utac Hong Kong Limited Leadless integrated circuit package having standoff contacts and die attach pad
CN106409785A (en) * 2016-11-30 2017-02-15 天水华天科技股份有限公司 Thin type array plastic packaging part and production method thereof
CN111540691A (en) * 2020-05-22 2020-08-14 东莞链芯半导体科技有限公司 Semiconductor packaging structure and packaging method thereof

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2021233333A1 (en) * 2020-05-22 2021-11-25 东莞链芯半导体科技有限公司 Semiconductor encapsulation structure and encapsulation method thereof
CN116895726A (en) * 2023-09-11 2023-10-17 深圳明阳电路科技股份有限公司 Micro-led chip and integration method thereof
CN116895726B (en) * 2023-09-11 2023-12-22 深圳明阳电路科技股份有限公司 Micro-led chip and integration method thereof

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