CN116895726A - Micro-led chip and integration method thereof - Google Patents

Micro-led chip and integration method thereof Download PDF

Info

Publication number
CN116895726A
CN116895726A CN202311159970.1A CN202311159970A CN116895726A CN 116895726 A CN116895726 A CN 116895726A CN 202311159970 A CN202311159970 A CN 202311159970A CN 116895726 A CN116895726 A CN 116895726A
Authority
CN
China
Prior art keywords
bonding pad
micro
hot melt
melt adhesive
led chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
CN202311159970.1A
Other languages
Chinese (zh)
Other versions
CN116895726B (en
Inventor
胡诗益
颜怡锋
吴世平
陈洋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shenzhen Sunshine Circuit Technology Co ltd
Original Assignee
Shenzhen Sunshine Circuit Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shenzhen Sunshine Circuit Technology Co ltd filed Critical Shenzhen Sunshine Circuit Technology Co ltd
Priority to CN202311159970.1A priority Critical patent/CN116895726B/en
Publication of CN116895726A publication Critical patent/CN116895726A/en
Application granted granted Critical
Publication of CN116895726B publication Critical patent/CN116895726B/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/48Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
    • H01L33/62Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B23MACHINE TOOLS; METAL-WORKING NOT OTHERWISE PROVIDED FOR
    • B23KSOLDERING OR UNSOLDERING; WELDING; CLADDING OR PLATING BY SOLDERING OR WELDING; CUTTING BY APPLYING HEAT LOCALLY, e.g. FLAME CUTTING; WORKING BY LASER BEAM
    • B23K26/00Working by laser beam, e.g. welding, cutting or boring
    • B23K26/34Laser welding for purposes other than joining
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/075Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00
    • H01L25/0753Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L33/00 the devices being arranged next to each other
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005Processes
    • H01L33/0095Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0008Processes
    • H01L2933/0033Processes relating to semiconductor body packages
    • H01L2933/0066Processes relating to semiconductor body packages relating to arrangements for conducting electric current to or from the semiconductor body

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Optics & Photonics (AREA)
  • Manufacturing & Machinery (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Plasma & Fusion (AREA)
  • Mechanical Engineering (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Led Device Packages (AREA)

Abstract

The application discloses an integration method of micro-led chips, which comprises the following steps: forming a bonding pad on the auxiliary film by a laser 3D forming method; forming a circuit pattern on the bonding pad, wherein the circuit pattern is communicated with the bonding pad; removing the auxiliary film and carrying out double-sided gold deposition on the welding disc; and the wiring pattern is connected to the micro-led chip through the pad. According to the micro-led chip and the integration method thereof provided by the application, the bonding pad is formed by the auxiliary film and the laser 3D forming method, the circuit pattern is formed on the bonding pad, and the bonding pad is used for forming the connection between the chip and the circuit pattern, so that the manufacturing precision and efficiency of the micro-led chip are improved, and the product stability of the micro-led chip is improved.

Description

Micro-led chip and integration method thereof
Technical Field
The application relates to the technical field of chip preparation processes, in particular to a micro-led chip and an integration method thereof.
Background
With the progress of LCD screen backlight technology, the display effect brought by the conventional LED backlight has not been able to meet the demand of consumers for higher display effects, and for this reason, micro-LED (Micro-light emitting diode) technology has been developed.
The Micro-LED display technology is a display technology in which self-luminous Micro-scale LEDs are used as light-emitting pixel units, and the light-emitting pixel units are assembled on a driving panel to form a high-density LED array. Due to the characteristics of small size, high integration level, self-luminescence and the like of the Micro-LED chip, the Micro-LED chip has larger advantages in the aspects of brightness, resolution, contrast, energy consumption, service life, response speed, thermal stability and the like compared with the LCD and the OLED in the aspect of display.
The Micro-LED product is formed by thinning, microminiaturizing and arraying an LED structure, reducing the size to about 1-10 mu m, transferring the LED structure onto a substrate in batches, and packaging the LED structure to finish the display of the Micro diode. With miniaturization and multifunctionality of Micro-LED electronic products, further improvement of integration level of PCBs in the electronic products is required, circuit patterns on PCBs are also becoming more and more complex, and more circuits to be processed on PCBs with a certain area are required.
At present, in the production process of Micro-LED PCBs, a copper layer is generally covered on the surface of a substrate layer, and then the copper layer on the substrate layer is etched to form a required circuit pattern. When the copper layer is etched, the etching liquid can also transversely corrode the copper layer except for longitudinally corroding the copper layer, and along with the increasing complexity of circuit patterns, the interval between two adjacent circuits is smaller, when the copper layer is etched, the width of the circuits is too small due to the transverse corrosion of the copper layer by the etching liquid, and the reject ratio of the PCB is increased. New line connectivity methods are therefore sought to integrate micro-led chips.
Disclosure of Invention
The present application is directed to solving, at least to some extent, one of the problems in the related art. Therefore, the application aims to provide a micro-led chip and an integration method thereof, wherein a bonding pad is formed by an auxiliary film and a laser 3D forming method, a circuit pattern is formed on the bonding pad, and the bonding pad is used for forming the connection between the chip and the circuit pattern, so that the manufacturing precision and efficiency of the micro-led chip are improved, and the product stability of the micro-led chip is improved.
In order to achieve the above purpose, the present application adopts the following technical scheme: an integration method of micro-led chips comprises the following steps:
forming a bonding pad on the auxiliary film by a laser 3D forming method;
forming a circuit pattern on the bonding pad, wherein the circuit pattern is communicated with the bonding pad;
removing the auxiliary film and carrying out double-sided gold deposition on the welding disc; and the wiring pattern is connected to the micro-led chip through the pad.
Further, the laser 3D molding method includes: and sequentially defining a bonding pad area on the auxiliary film, and melting copper slurry by adopting laser so that the melted copper slurry is dropwise dripped on the bonding pad area and solidified to form the bonding pad.
Further, laser polishing is carried out on the bonding pad formed by solidifying and stacking the copper paste, so that a cylindrical bonding pad is formed.
Further, before forming the pad on the auxiliary film, further comprising: and coarsening the auxiliary film, wherein the coarsening comprises plasma etching or liquid medicine etching.
Further, forming a wiring pattern communicating with the pad on the auxiliary film, specifically includes:
coating hot melt adhesive on one side of the auxiliary film, which is provided with the bonding pad, wherein the thickness of the hot melt adhesive is larger than the height of the bonding pad;
the grinding plate removes the hot melt adhesive on the bonding pad;
depositing an initial copper layer;
pasting a dry film on the initial copper layer, exposing and developing to form a dry film;
horizontally electroplating to form 7-8 microns of circuit patterns;
and removing the film, namely flashing the dry film, removing the dry film, and flashing to remove the initial copper layer covered by the dry film.
Further, the grind plate removing the hot melt adhesive on the bonding pad includes: firstly, grinding a plate from the top of the hot melt adhesive by adopting a ceramic brush, and then removing the hot melt adhesive on the bonding pad by adopting a laser cleaning mode.
Further, the hot melt adhesive coating specifically includes: and (3) melting the hot melt adhesive in a vacuum box body at high temperature, coating the hot melt adhesive in a silk screen printing mode, and leveling the hot melt adhesive coated on the surfaces of the bonding pad and the auxiliary film.
Further, removing the auxiliary film, depositing gold on the bonding pad and the circuit pattern, comprising:
the auxiliary film is removed and the auxiliary film is removed,
coating hot melt adhesive on the surfaces of the bonding pads and the circuit patterns;
cleaning by laser to expose a bonding pad on one side of the circuit pattern;
and carrying out gold deposition treatment on the two ends of the bonding pad.
Further, before the hot melt adhesive is coated on the surfaces of the bonding pad and the circuit pattern, the method further comprises the following steps: plasma cleaning the bonding pad; and (5) AOI detection.
A micro-led chip is prepared based on the integration method of the micro-led chip.
Compared with the prior art, the technical scheme provided by the embodiment of the application has the following advantages: the bonding pad is formed on the auxiliary film by a laser 3D forming method; forming a circuit pattern on the bonding pad, wherein the circuit pattern is communicated with the bonding pad; removing the auxiliary film and performing double-sided gold deposition treatment on the welding disk; connecting the circuit pattern into the micro-led chip through the bonding pad; the bonding pad is formed by adopting a laser 3D forming method, so that the accuracy of the position, the shape and the size of the bonding pad can be ensured, and the circuit pattern and the micro-led chip are connected through the bonding pad, so that complicated operation of wire connection or wiring connection is avoided, and the electric connection accuracy between the micro-led chip and the circuit pattern is improved; according to the application, the bonding pad is formed by virtue of the auxiliary film, the circuit pattern is formed on the bonding pad, and then the bonding pad is used for connecting the circuit pattern and the micro-led chip, so that the preparation efficiency and the connection accuracy of the circuit outside the micro-led chip are improved, the micro-led chip is suitable for preparing and connecting small-size bonding pads, the manufacturing precision and the efficiency of the micro-led chip are improved, and the product stability of the micro-led chip is improved.
The micro-led chip prepared by the method can ensure accurate positions of bonding pads, is high in circuit preparation efficiency and accuracy, and has good product yield and stability.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments consistent with the application and together with the description, serve to explain the principles of the application.
In order to more clearly illustrate the embodiments of the application or the technical solutions of the prior art, the drawings which are used in the description of the embodiments or the prior art will be briefly described, and it will be obvious to a person skilled in the art that other drawings can be obtained from these drawings without inventive effort.
In the accompanying drawings: FIG. 1 is a flow chart of the preparation method in example 3.
Detailed Description
For a clearer understanding of technical features, objects and effects of the present application, a detailed description of embodiments of the present application will be made with reference to the accompanying drawings. In the following description, it should be understood that the directions or positional relationships indicated by "front", "rear", "upper", "lower", "left", "right", "longitudinal", "transverse", "vertical", "horizontal", "top", "bottom", "inner", "outer", "head", "tail", etc. are configured and operated in specific directions based on the directions or positional relationships shown in the drawings, and are merely for convenience of describing the present application, not to indicate that the mechanism or element referred to must have specific directions, and thus should not be construed as limiting the present application.
It should also be noted that unless explicitly stated or limited otherwise, terms such as "mounted," "connected," "secured," "disposed," and the like are to be construed broadly and may be, for example, fixedly connected, detachably connected, or integrally formed; can be mechanically or electrically connected; can be directly connected or indirectly connected through an intermediate medium, and can be communicated with the inside of two elements or the interaction relationship of the two elements. When an element is referred to as being "on" or "under" another element, it can be "directly" or "indirectly" on the other element or one or more intervening elements may also be present. The terms "first," "second," "third," and the like are used merely for convenience in describing the present application and are not to be construed as indicating or implying a relative importance or implicitly indicating the number of technical features indicated, whereby features defining "first," "second," "third," etc. may explicitly or implicitly include one or more such features. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art according to the specific circumstances.
In the following description, for purposes of explanation and not limitation, specific details are set forth such as the particular system architecture, techniques, etc., in order to provide a thorough understanding of the embodiments of the present application. It will be apparent, however, to one skilled in the art that the present application may be practiced in other embodiments that depart from these specific details. In other instances, detailed descriptions of well-known systems, mechanisms, circuits, and methods are omitted so as not to obscure the description of the present application with unnecessary detail.
Example 1
The application provides an integration method of a micro-led chip, which is characterized by comprising the following steps:
forming a bonding pad on the auxiliary film by a laser 3D forming method;
forming a circuit pattern on the bonding pad, wherein the circuit pattern is communicated with the bonding pad;
removing the auxiliary film and performing double-sided gold deposition treatment on the welding disk; and the wiring pattern is connected to the micro-led chip through the pad.
The bonding pad is formed by adopting the laser 3D forming method, so that the accuracy of the position, the shape and the size of the bonding pad can be ensured, the circuit pattern and the micro-led chip are connected through the bonding pad, the complicated operation of wire connection or wiring connection is avoided, and the electrical connection precision between the micro-led chip and the circuit pattern is improved; according to the application, the bonding pad is formed by virtue of the auxiliary film, the circuit pattern is formed on the bonding pad, and then the bonding pad is used for connecting the circuit pattern and the micro-led chip, so that the preparation efficiency and the connection accuracy of the circuit outside the micro-led chip are improved, the micro-led chip is suitable for preparing and connecting small-size bonding pads, the manufacturing precision and the efficiency of the micro-led chip are improved, and the product stability of the micro-led chip is improved.
The micro-led chip prepared by the method can ensure accurate positions of bonding pads, is high in circuit preparation efficiency and accuracy, and has good product yield and stability.
Example 2
The method for integrating the micro-led chip provided by the embodiment comprises the following steps:
s1: the pads are formed on the auxiliary film by a laser 3D molding method. The method specifically comprises the following steps:
s11: and coarsening the auxiliary film, wherein the coarsening comprises plasma etching or liquid medicine etching. The roughened auxiliary film has certain roughness, and is convenient for forming subsequent bonding pads.
S12: and sequentially defining a bonding pad area on the auxiliary film, and melting copper slurry by adopting laser so that the melted copper slurry is dropwise dripped on the bonding pad area and solidified to form the bonding pad. Because the bonding pads in the micro-led chip are denser, bonding pad areas can be defined on the auxiliary film in a one-to-one correspondence mode, and each bonding pad area can be formed into one bonding pad later. In the laser 3D forming process, the bonding pads are formed by piling molten copper slurry drop by drop, and copper columns can be precisely formed on the positions of the pre-defined bonding pads.
S13: and carrying out laser polishing on the bonding pad formed by solidifying and stacking the copper slurry to form a cylindrical bonding pad. The bonding pads formed by the copper paste in a dropwise stacking manner are irregular in shape, and a laser polishing method can be adopted to form cylindrical bonding pads. Wherein laser polishing refers to controlling laser power to cut or melt irregular bonding pads so that the final shape is cylindrical.
According to the application, the bonding pad is formed by adopting the laser 3D forming method, the accuracy of the position, the shape and the size of the bonding pad can be ensured, the circuit pattern and the micro-led chip are connected through the bonding pad, the complicated operation of wire connection or wiring connection is avoided, and the electrical connection precision between the micro-led chip and the circuit pattern is improved.
S2: a wiring pattern communicating with the pad is formed on the pad. The method specifically comprises the following steps:
s21: and coating hot melt adhesive on one side of the auxiliary film, on which the bonding pad is arranged, wherein the thickness of the hot melt adhesive is larger than the height of the bonding pad. The specific method comprises the following steps: and (3) melting the hot melt adhesive in a vacuum box body at high temperature, coating the hot melt adhesive in a silk screen printing mode, and leveling the hot melt adhesive coated on the surfaces of the bonding pad and the auxiliary film.
The hot melt adhesive in the step is used as a solder resist medium layer and an insulating layer at the same time, and is coated in a silk screen printing mode, so that the coating method is simple and quick, meanwhile, the hot melt adhesive has good insulating layer and solder resist performance, is convenient to remove after a circuit pattern is formed subsequently, and the forming efficiency of the circuit pattern is improved.
S22: the grinding plate removes the hot melt adhesive on the bonding pad; the method specifically comprises the following two steps:
s221: firstly, grinding a plate from the top of the hot melt adhesive by adopting a ceramic brush; the plate grinding speed is high, and the plate grinding stage can be understood as a rapid rough plate grinding stage so as to rapidly remove the redundant hot melt adhesive.
S222: and then removing the hot melt adhesive on the bonding pad by adopting a laser cleaning mode. When the rapid rough grinding plate is carried out to a position close to the bonding pad, in order to avoid scratching the bonding pad, the hot melt adhesive above the bonding pad can be removed by adopting a laser cleaning mode. The method of laser melting or laser cutting can be adopted to remove the redundant hot melt adhesive on the bonding pad. The laser cleaning also needs to uniformly remove the hot melt adhesive, so that the surface of the hot melt adhesive is flush, and the bonding pad is leaked; facilitating the deposition of subsequent line patterns.
S23: an initial copper layer is deposited. The initial copper layer is relatively thin, typically only 1 micron or less thick. A thinner initial copper layer may be deposited on the bond pad and hot melt adhesive by chemical sputtering or other electroless copper deposition. The purpose of the initial copper layer is to provide a reference for subsequent horizontal plating, so that it requires only a small thickness.
S24: and pasting a dry film on the initial copper layer, exposing and developing the dry film. And globally attaching a dry film on the initial copper layer, removing the dry film outside the circuit pattern area through exposure and development, and obtaining the pattern outside the dry film coverage area as the subsequent circuit pattern. That is, the area not requiring horizontal plating is covered by the dry film, and the exposed part is the position of the circuit pattern. It should be noted that: the initial copper layer is globally deposited, namely, the initial copper layer is globally deposited on the bonding pad and the hot melt adhesive at the same time; the region outside the dry film after dry film pasting, exposure and development is a pattern region, and the pattern region is partially positioned above the bonding pad and partially positioned above the hot melt adhesive.
S25: horizontal plating forms 7-8 micron circuit patterns. The initial copper layer exists in the part which is not covered by the dry film in the horizontal electroplating process, so that the horizontal electroplating is facilitated. The copper layer is not deposited at the location covered by the dry film.
S26: and removing the developed dry film by film stripping and flash etching. At this time, a pad is formed on the auxiliary film, and a wiring pattern is formed on a side of the pad remote from the auxiliary film.
S3: and removing the auxiliary film and carrying out double-sided gold deposition on the welding disk. The method specifically comprises the following steps:
s31: removing the auxiliary film; the auxiliary film can be a PET film, and the auxiliary film is removed by adopting a liquid phase etching method.
S32: plasma cleaning the bonding pad; after the auxiliary film is removed, in order to avoid the auxiliary film remaining at the bottom of the bonding pad, plasma gas is used for etching the bottom of the bonding pad, namely, one end of the bonding pad, which is abutted against the auxiliary film, so that no residual auxiliary film material is ensured on the bonding pad.
S33: and (5) AOI detection. And carrying out AOI detection on the solder pad and the circuit pattern formed on the top of the solder pad, and detecting the appearance and the state of the circuit pattern.
S34: coating hot melt adhesive on the surfaces of the bonding pads and the circuit patterns; the hot melt adhesive in the step is also used as a solder resist dielectric layer and an insulating layer, and the hot melt adhesive covers the circuit pattern and a bonding pad at one side of the circuit pattern.
S35: and cleaning by laser to expose the bonding pad close to one side of the circuit pattern. The end of the bonding pad far away from one side of the circuit pattern is exposed, and laser cleaning at this time means cleaning one end of the bonding pad close to the circuit pattern, so that other areas where the two ends of the bonding pad are exposed are wrapped by hot melt adhesive.
S36: and carrying out double-sided gold deposition treatment on the bonding pad. And simultaneously depositing gold on two ends of the exposed bonding pad, so that the conductive connectivity of the bonding pad is improved, and the thickness of the bonding pad is increased.
In the gold deposition process, a layer of extremely thin oxide can be formed on the metal surface, and the layer of oxide can effectively prevent metal corrosion, so that the corrosion resistance of the bonding pad and the circuit pattern is improved.
S4: and connecting the circuit patterns to the micro-led chip through the bonding pads, welding the bonding pads subjected to gold deposition on the interconnection layers corresponding to the micro-led chip, and electrically connecting the interconnection layers or the bonding pads in the micro-led chip with the outer layer circuit patterns through the bonding pads formed by a laser 3D forming method.
According to the application, the bonding pad is formed by virtue of the auxiliary film, the circuit pattern is formed on the bonding pad, and then the bonding pad is used for connecting the circuit pattern and the micro-led chip, so that the preparation efficiency and the connection accuracy of the circuit outside the micro-led chip are improved, the micro-led chip is suitable for preparing and connecting small-size bonding pads, the manufacturing precision and the efficiency of the micro-led chip are improved, and the product stability of the micro-led chip is improved.
Example 3
As shown in fig. 1, the method for integrating micro-led chips provided in this embodiment includes the following steps:
coarsening a PET film: the roughening treatment includes plasma etching or liquid medicine etching. The coarsened PET film has certain roughness, and is convenient for forming subsequent bonding pads.
Laser 3D molding bonding pad: and sequentially defining a bonding pad area on the PET film, melting copper slurry by adopting laser, and enabling the melted copper slurry to drop into the bonding pad area dropwise and solidify to form the bonding pad. The bonding pads used in the micro-led chip are dense, bonding pad areas can be defined on the PET film in one-to-one correspondence, and each bonding pad area is formed into one bonding pad later. In the laser 3D forming process, the bonding pads are formed by piling molten copper slurry drop by drop, and copper columns can be precisely formed on the positions of the pre-defined bonding pads. And carrying out laser polishing on the bonding pad formed by solidifying and stacking the copper slurry to form a cylindrical bonding pad. The bonding pads formed by the copper paste in a dropwise stacking manner are irregular in shape, and a laser polishing method can be adopted to form cylindrical bonding pads. Wherein laser polishing refers to controlling laser power to cut or melt irregular bonding pads so that the final shape is cylindrical.
According to the application, the bonding pad is formed by adopting the laser 3D forming method, the accuracy of the position, the shape and the size of the bonding pad can be ensured, the circuit pattern and the micro-led chip are connected through the bonding pad, the complicated operation of wire connection or wiring connection is avoided, and the electrical connection precision between the micro-led chip and the circuit pattern is improved.
Coating hot melt adhesive: and coating a hot melt adhesive on one side of the PET film, on which the bonding pad is arranged, wherein the thickness of the hot melt adhesive is larger than the height of the bonding pad. The specific method comprises the following steps: and (3) melting the hot melt adhesive in a vacuum box body at high temperature, coating the hot melt adhesive in a silk screen printing mode, and leveling the hot melt adhesive coated on the surfaces of the bonding pad and the PET film.
The hot melt adhesive in the step is used as a solder resist medium layer and an insulating layer at the same time, and is coated in a silk screen printing mode, so that the coating method is simple and quick, meanwhile, the hot melt adhesive has good insulating layer and solder resist performance, is convenient to remove after a circuit pattern is formed subsequently, and the forming efficiency of the circuit pattern is improved.
Ceramic grinding plate: grinding the plate from the top of the hot melt adhesive by adopting a ceramic brush; the plate grinding speed is high, and the plate grinding stage can be understood as a rapid rough plate grinding stage so as to rapidly remove the redundant hot melt adhesive.
And (3) laser cleaning: and removing the hot melt adhesive on the bonding pad by adopting a laser cleaning mode. When the rapid rough grinding plate is carried out to a position close to the bonding pad, in order to avoid scratching the bonding pad, the hot melt adhesive above the bonding pad can be removed by adopting a laser cleaning mode. The method of laser melting or laser cutting can be adopted to remove the redundant hot melt adhesive on the bonding pad. The laser cleaning also needs to uniformly remove the hot melt adhesive, so that the surface of the hot melt adhesive is flush, and the bonding pad is leaked; facilitating the deposition of subsequent line patterns.
Sputtering an initial copper layer: the thickness of the initial copper layer is thinner, and a thinner initial copper layer can be deposited on the bonding pad and the hot melt adhesive by adopting a chemical sputtering or other chemical copper deposition methods. The purpose of the initial copper layer is to provide a reference for subsequent horizontal plating, so that it requires only a small thickness.
Dry film pasting, exposure and development: and globally attaching a dry film on the initial copper layer, removing the dry film outside the circuit pattern area through exposure and development, and obtaining the pattern outside the dry film coverage area as the subsequent circuit pattern. That is, the area not requiring horizontal plating is covered by the dry film, and the exposed part is the position of the circuit pattern. It should be noted that: the initial copper layer is globally deposited, namely, the initial copper layer is globally deposited on the bonding pad and the hot melt adhesive at the same time; the region outside the dry film after dry film pasting, exposure and development is a pattern region, and the pattern region is partially positioned above the bonding pad and partially positioned above the hot melt adhesive.
Horizontal electroplating: horizontal plating forms 7-8 micron circuit patterns. The initial copper layer exists in the part which is not covered by the dry film in the horizontal electroplating process, so that the horizontal electroplating is facilitated. The copper layer is not deposited at the location covered by the dry film.
Film stripping and flash etching: and removing the developed dry film by film stripping and flash etching. At this time, a pad is formed on the auxiliary film, and a wiring pattern is formed on a side of the pad remote from the auxiliary film.
Removing the PET film; the auxiliary film can be a PET film, and the PET film is removed by adopting a liquid phase etching method.
Plasma cleaning the bonding pad; after removing the PET film, in order to avoid residual PET film at the bottom of the bonding pad, plasma gas is used for etching the bottom of the bonding pad, namely one end of the bonding pad, which is abutted against the PET film, so that no residual PET film is ensured on the bonding pad.
AOI detection: and carrying out AOI detection on the solder pad and the circuit pattern formed on the top of the solder pad, and detecting the appearance and the state of the circuit pattern.
Coating hot melt adhesive; the hot melt adhesive in the step is also used as a solder resist dielectric layer and an insulating layer, and the hot melt adhesive covers the circuit pattern and a bonding pad at one side of the circuit pattern.
And (3) laser cleaning: exposing the pads on the side near the circuit pattern. The end of the bonding pad far away from one side of the circuit pattern is exposed, and laser cleaning at this time means cleaning one end of the bonding pad close to the circuit pattern, so that other areas where the two ends of the bonding pad are exposed are wrapped by hot melt adhesive.
Double-sided gold precipitation treatment: and simultaneously depositing gold on two ends of the exposed bonding pad, so that the conductive connectivity of the bonding pad is improved, and the thickness of the bonding pad is increased. In the gold deposition process, a layer of extremely thin oxide can be formed on the metal surface, and the layer of oxide can effectively prevent metal corrosion, so that the corrosion resistance of the bonding pad and the circuit pattern is improved.
And the formed bonding pad and the formed circuit pattern are milled by molding, so that the subsequent packaging is facilitated.
And (5) detecting and warehousing.
According to the application, the bonding pad is formed by means of the PET film, the circuit pattern is formed on the bonding pad, and then the bonding pad is used for connecting the circuit pattern and the micro-led chip, so that the preparation efficiency and the connection accuracy of the circuit outside the micro-led chip are improved, the micro-led chip is suitable for preparing and connecting small-size bonding pads, the manufacturing precision and the efficiency of the micro-led chip are improved, and the product stability of the micro-led chip is improved.
The application also provides a micro-led chip which is prepared by adopting the method. The application provides a novel bonding pad forming process and a communication thought between the micro-led chip and an outer layer circuit through the bonding pad, thereby improving the circuit forming and connecting efficiency, ensuring the circuit connecting precision and improving the product stability of the micro-led chip.
It is to be understood that the above examples only represent preferred embodiments of the present application, which are described in more detail and are not to be construed as limiting the scope of the application; it should be noted that, for a person skilled in the art, the above technical features can be freely combined, and several variations and modifications can be made without departing from the scope of the application; therefore, all changes and modifications that come within the meaning and range of equivalency of the claims are to be embraced within their scope.

Claims (10)

1. The integration method of the micro-led chip is characterized by comprising the following steps of:
forming a bonding pad on the auxiliary film by a laser 3D forming method;
forming a circuit pattern on the bonding pad, wherein the circuit pattern is communicated with the bonding pad;
removing the auxiliary film and carrying out double-sided gold deposition on the welding disc; and the wiring pattern is connected to the micro-led chip through the pad.
2. The method for integrating micro-led chips as recited in claim 1, wherein said laser 3D molding method comprises: and sequentially defining a bonding pad area on the auxiliary film, and melting copper slurry by adopting laser so that the melted copper slurry is dropwise dripped on the bonding pad area and solidified to form the bonding pad.
3. The method for integrating micro-led chips as recited in claim 2, wherein the bonding pads formed by solidifying and stacking copper paste are polished by laser to form columnar bonding pads.
4. The method of integrating micro-led chips as recited in claim 1, further comprising, before forming the pads on the auxiliary film: and coarsening the auxiliary film, wherein the coarsening comprises plasma etching or liquid medicine etching.
5. The method for integrating micro-led chips as defined in claim 1, wherein forming a wiring pattern communicating with the bonding pad on the auxiliary film comprises:
coating hot melt adhesive on one side of the auxiliary film, which is provided with the bonding pad, wherein the thickness of the hot melt adhesive is larger than the height of the bonding pad;
the grinding plate removes the hot melt adhesive on the bonding pad;
depositing an initial copper layer;
pasting a dry film on the initial copper layer, exposing and developing the dry film;
horizontally electroplating to form 7-8 microns of circuit patterns;
and (3) removing the film, namely performing flash etching, removing the dry film, and removing the initial copper layer covered by the dry film through flash etching.
6. The method of integrating micro-led chips as recited in claim 5, wherein the removing the hot melt adhesive on the bonding pads by the grind plate comprises: firstly, grinding a plate from the top of the hot melt adhesive by adopting a ceramic brush, and then removing the hot melt adhesive on the bonding pad by adopting a laser cleaning mode.
7. The method for integrating micro-led chips as recited in claim 5, wherein the step of applying the hot melt adhesive comprises: and (3) melting the hot melt adhesive in a vacuum box body at high temperature, coating the hot melt adhesive in a silk screen printing mode, and leveling the hot melt adhesive coated on the surfaces of the bonding pad and the auxiliary film.
8. The method of integrating micro-led chips as defined in claim 1, wherein removing the auxiliary film, depositing gold on the pads and the wiring patterns, comprises:
removing the auxiliary film;
coating hot melt adhesive on the surfaces of the bonding pads and the circuit patterns;
cleaning by laser to expose a bonding pad on one side of the circuit pattern;
and carrying out gold precipitation treatment on the two ends of the bonding pad.
9. The method for integrating micro-led chips as recited in claim 7, further comprising, before the applying of the hot melt adhesive to the surfaces of the pads and the circuit pattern: plasma cleaning the bonding pad; and (5) AOI detection.
10. A micro-led chip, characterized in that it is manufactured based on the integration method of a micro-led chip according to any one of claims 1-9.
CN202311159970.1A 2023-09-11 2023-09-11 Micro-led chip and integration method thereof Active CN116895726B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202311159970.1A CN116895726B (en) 2023-09-11 2023-09-11 Micro-led chip and integration method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202311159970.1A CN116895726B (en) 2023-09-11 2023-09-11 Micro-led chip and integration method thereof

Publications (2)

Publication Number Publication Date
CN116895726A true CN116895726A (en) 2023-10-17
CN116895726B CN116895726B (en) 2023-12-22

Family

ID=88312396

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202311159970.1A Active CN116895726B (en) 2023-09-11 2023-09-11 Micro-led chip and integration method thereof

Country Status (1)

Country Link
CN (1) CN116895726B (en)

Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070194456A1 (en) * 2006-02-23 2007-08-23 Charles Cohn Flexible circuit substrate for flip-chip-on-flex applications
CN102130086A (en) * 2009-11-28 2011-07-20 英属维尔京群岛商杰群科技有限公司 Improvement structure of high heat-dispensing plate low-cost lead frame
US20140224534A1 (en) * 2013-02-13 2014-08-14 Seiko Instruments Inc. Method of manufacturing resin-encapsulated semiconductor device, and lead frame
KR20170026965A (en) * 2015-08-31 2017-03-09 주식회사 심텍 Thin PCB substrate and method of fabricating the same
CN107645844A (en) * 2017-08-25 2018-01-30 深南电路股份有限公司 A kind of preparation method gold-plated for PCB BGA part pads
CN111540691A (en) * 2020-05-22 2020-08-14 东莞链芯半导体科技有限公司 Semiconductor packaging structure and packaging method thereof
US20210296259A1 (en) * 2020-03-19 2021-09-23 Advanced Semiconductor Engineering, Inc. Package substrate and method for manufacturing the same
CN115312393A (en) * 2022-07-12 2022-11-08 天芯互联科技有限公司 Packaging method and package
CN116153896A (en) * 2023-02-21 2023-05-23 中创洪盟科技(深圳)有限公司 Steel sheet peelable frame carrier plate and preparation method thereof
CN116259546A (en) * 2022-11-25 2023-06-13 华劲半导体(浙江)有限公司 Multi-pin lead frame and manufacturing method thereof
CN116364811A (en) * 2023-03-20 2023-06-30 惠州市志金电子科技有限公司 Production process of MiniLED packaging substrate

Patent Citations (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20070194456A1 (en) * 2006-02-23 2007-08-23 Charles Cohn Flexible circuit substrate for flip-chip-on-flex applications
CN102130086A (en) * 2009-11-28 2011-07-20 英属维尔京群岛商杰群科技有限公司 Improvement structure of high heat-dispensing plate low-cost lead frame
US20140224534A1 (en) * 2013-02-13 2014-08-14 Seiko Instruments Inc. Method of manufacturing resin-encapsulated semiconductor device, and lead frame
KR20170026965A (en) * 2015-08-31 2017-03-09 주식회사 심텍 Thin PCB substrate and method of fabricating the same
CN107645844A (en) * 2017-08-25 2018-01-30 深南电路股份有限公司 A kind of preparation method gold-plated for PCB BGA part pads
US20210296259A1 (en) * 2020-03-19 2021-09-23 Advanced Semiconductor Engineering, Inc. Package substrate and method for manufacturing the same
CN111540691A (en) * 2020-05-22 2020-08-14 东莞链芯半导体科技有限公司 Semiconductor packaging structure and packaging method thereof
CN115312393A (en) * 2022-07-12 2022-11-08 天芯互联科技有限公司 Packaging method and package
CN116259546A (en) * 2022-11-25 2023-06-13 华劲半导体(浙江)有限公司 Multi-pin lead frame and manufacturing method thereof
CN116153896A (en) * 2023-02-21 2023-05-23 中创洪盟科技(深圳)有限公司 Steel sheet peelable frame carrier plate and preparation method thereof
CN116364811A (en) * 2023-03-20 2023-06-30 惠州市志金电子科技有限公司 Production process of MiniLED packaging substrate

Also Published As

Publication number Publication date
CN116895726B (en) 2023-12-22

Similar Documents

Publication Publication Date Title
CN102867798B (en) Coreless packaging substrate and manufacturing method thereof
CN102867807B (en) Manufacturing method of package substrate without core layer
CN100353547C (en) Multi-chip circuit module and method for producing the same
US20090050994A1 (en) Method of manufacturing semiconductor device with electrode for external connection and semiconductor device obtained by means of said method
EP3836209B1 (en) Component carrier and method of manufacturing the same
CN102263194A (en) Semiconductor packaging and method for manufacturing same
JP2007214572A (en) Bare chip embedded type printed circuit board and method of manufacturing same
JPWO2009136496A1 (en) Three-dimensional mounting semiconductor device and manufacturing method thereof
KR100977260B1 (en) High Power LED Package and Manufacturing Method Thereof
CN104108679A (en) Method Of Manufacturing Through-glass Vias
CN110024107B (en) Integrated circuit packaging method and integrated packaging circuit
US20090242238A1 (en) Buried pattern substrate
CN101983429A (en) Electronic component used for wiring and method for manufacturing the same
CN109729639B (en) Component carrier comprising columns on coreless substrate
TW201123326A (en) Method of manufacturing substrate for flip chip and substrate for flip chip manufactured using the same
CN116895726B (en) Micro-led chip and integration method thereof
US20120267674A1 (en) Mounting substrate, light emitting body, and method for manufacturing mounting substrate
US20120228745A1 (en) Semiconductor package structure and manufacturing method thereof
TWI581697B (en) Method for manufacturing heat dissipation structure of ceramic substrate
CN116364811A (en) Production process of MiniLED packaging substrate
TW200830498A (en) Manufacturing method for integrating passive component within substrate
US20060284290A1 (en) Chip-package structure and fabrication process thereof
CN212967737U (en) LED product packaging structure
CN112086546A (en) LED product packaging structure and packaging method
CN113594052A (en) Semiconductor packaging method

Legal Events

Date Code Title Description
PB01 Publication
PB01 Publication
SE01 Entry into force of request for substantive examination
SE01 Entry into force of request for substantive examination
GR01 Patent grant
GR01 Patent grant