CN111508905A - 包括锚固结构的半导体封装 - Google Patents

包括锚固结构的半导体封装 Download PDF

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CN111508905A
CN111508905A CN201910981687.4A CN201910981687A CN111508905A CN 111508905 A CN111508905 A CN 111508905A CN 201910981687 A CN201910981687 A CN 201910981687A CN 111508905 A CN111508905 A CN 111508905A
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anchor
bump
semiconductor
semiconductor package
substrate
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CN111508905B (zh
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朴玟秀
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SK Hynix Inc
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SK Hynix Inc
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Abstract

包括锚固结构的半导体封装。一种半导体封装包括封装基板以及安装在封装基板上的半导体芯片。封装基板包括信号凸块焊盘和锚固凸块焊盘，并且半导体芯片包括信号凸块和锚固凸块。信号凸块接合到信号凸块焊盘，锚固凸块被设置为与锚固凸块焊盘相邻，并且锚固凸块的底表面相对于封装基板的表面位于比锚固凸块焊盘的顶表面低的水平处。

Description

包括锚固结构的半导体封装
技术领域
本公开总体上涉及半导体封装，更具体地，涉及包括锚固结构的半导体封装。
背景技术
通常，各个半导体封装可被配置为包括印刷电路板(PCB)以及安装在PCB上的芯片。芯片可通过诸如凸块或导线的连接构件电连接到PCB。
在半导体封装中采用凸块作为连接构件的情况下，可在芯片上形成凸块并且可在PCB上形成凸块焊盘。凸块和凸块焊盘然后可使用焊料彼此接合。近来，各个半导体封装中采用的连接构件的数量增加以提供高性能半导体封装。因此，大量努力集中在开发和保证用于将凸块接合到凸块焊盘的技术。
发明内容
根据实施方式，一种半导体封装可包括封装基板以及安装在封装基板上的半导体芯片。封装基板可包括信号凸块焊盘和锚固凸块焊盘，并且半导体芯片包括信号凸块和锚固凸块。信号凸块接合到信号凸块焊盘，锚固凸块与锚固凸块焊盘相邻设置，并且锚固凸块的底表面可相对于封装基板的表面位于比锚固凸块焊盘的顶表面低的水平处。
根据另一实施方式，一种半导体封装可包括封装基板以及安装在封装基板上的半导体芯片。封装基板可被配置为包括在长轴方向和短轴方向上延伸的表面，并且被配置为包括设置在该表面上的信号凸块焊盘和锚固凸块焊盘。半导体芯片可包括与信号凸块焊盘相邻的信号凸块以及与锚固凸块焊盘相邻的锚固凸块。锚固凸块焊盘可设置在所述表面的拐角区域上，并且锚固凸块被设置为在长轴方向上比锚固凸块焊盘更靠近所述表面的边缘区域。
附图说明
图1是示出根据本公开的实施方式的半导体封装的封装基板的平面图。
图2是沿着图1的线I-I’、II-II’和III-III’截取的横截面图。
图3是示出根据本公开的实施方式的半导体封装的半导体芯片的平面图。
图4是沿着图3的线IV-IV’、V-V’和VI-VI’截取的横截面图。
图5是示出根据本公开的实施方式的半导体封装的平面图。
图6是沿着图5的线VII-VII’、VIII-VIII’和IX-IX’截取的横截面图。
图7是示出根据本公开的实施方式的在半导体封装的制造工艺中将半导体芯片接合到封装基板的步骤的示意图。
图8至图10是示出根据本公开的实施方式的半导体封装中采用的封装基板和半导体芯片的接合工艺的横截面图。
图11是示出采用包括根据本公开的实施方式的半导体封装的存储卡的电子系统的框图；以及
图12是示出包括根据本公开的实施方式的半导体封装的另一电子系统的框图。
具体实施方式
本文所使用的术语可对应于考虑其在实施方式中的功能而选择的词语，术语的含义可被解释为根据实施方式所属领域的普通技术人员而不同。如果详细定义，则可根据定义来解释术语。除非另外定义，否则本文所使用的术语(包括技术术语和科学术语)具有实施方式所属领域的普通技术人员通常理解的相同含义。
将理解，尽管本文中可使用术语“第一”、“第二”、“第三”等来描述各种元件，但是这些元件不应受这些术语限制。这些术语仅用于将一个元件与另一元件相区分，而非用于仅限定元件本身或者意指特定顺序。
还将理解，当元件或层被称为在另一元件或层“上”、“上方”、“下面”、“下方”或“外侧”时，该元件或层可与另一元件或层直接接触，或者可存在中间元件或层。用于描述元件或层之间的关系的其它词语应该以类似的方式解释(例如，“在...之间”与“直接在...之间”或者“相邻”与“直接相邻”之间)。
诸如“在...之下”、“在...下面”、“下”、“上面”、“上”、“顶部”、“底部”等的空间相对术语可用于描述元件和/或特征与另一元件和/或特征的关系(例如，如图中所示)。将理解，除了附图中所描绘的取向之外，空间相对术语旨在涵盖装置在使用和/或操作中的不同取向。例如，当附图中的装置翻转时，被描述为在其它元件或特征下面和/或之下的元件将被取向为在其它元件或特征上面。装置可按照其它方式取向(旋转90度或处于其它取向)并且相应地解释本文中所使用的空间相对描述符。
半导体封装可包括诸如半导体芯片的电子器件。半导体封装可包括一个或更多个锚固结构。半导体芯片可通过使用划片工艺将诸如晶圆的半导体基板分离成多片来获得。半导体芯片可对应于存储器芯片、逻辑芯片(包括专用集成电路(ASIC)芯片)或系统芯片(SoC)。存储器芯片可包括集成在半导体基板上的动态随机存取存储器(DRAM)电路、静态随机存取存储器(SRAM)电路、NAND型闪存电路、NOR型闪存电路、磁随机存取存储器(MRAM)电路、电阻式随机存取存储器(ReRAM)电路、铁电随机存取存储器(FeRAM)电路或相变随机存取存储器(PcRAM)电路。逻辑芯片可包括集成在半导体基板上的逻辑电路。根据其在划片工艺之后的形状，半导体芯片可被称为半导体管芯。
半导体封装可包括安装有半导体芯片的印刷电路板(PCB)。PCB可包括至少一层的集成电路图案并且在本说明书中可被称为封装基板。封装基板可包括用于与半导体芯片通信的连接手段。连接手段可使用引线接合技术或倒装芯片接合技术来形成以将半导体芯片接合到封装基板。
半导体封装可用在诸如移动电话的各种通信系统、与生物技术或保健关联的电子系统或可穿戴电子系统中。
贯穿说明书，相同的标号表示相同的元件。即使标号未参照一幅图提及或描述，该标号也可参照另一幅图提及或描述。另外，即使标号未在一幅图中示出，其也可参照另一幅图提及或描述。
在本说明书中，术语“接合”可用于描述元件通过具有粘合强度的材料物理地或化学地附接和固定到另一元件的状态。作为示例，信号凸块接合到信号凸块焊盘可意指信号凸块和信号凸块焊盘使用焊料层彼此附接，使得信号凸块固定到信号凸块焊盘。
在本说明书中，术语“接触”或“与……接触”可用于描述元件仅触摸另一元件的状态。作为示例，锚固凸块接触锚固凸块焊盘可意指锚固凸块和锚固凸块焊盘仅彼此触摸而不使用诸如焊料层的粘合材料。因此，与彼此接合的两个元件相比，彼此接触的两个元件可更容易彼此分离或脱离。术语“容易”可意指两个元件之间的状态(例如，接触状态或接合状态)通过相对低的能量改变为另一状态。
图1是示出根据本公开的实施方式的半导体封装的封装基板10的平面图。图2是沿着图1的线I-I’、II-II’和III-III’截取的横截面图。
参照图1和图2，封装基板10可包括基板主体110、设置在封装基板10上的信号凸块焊盘122以及设置在封装基板10上的锚固凸块焊盘124。另外，封装基板10还可包括设置在封装基板10上以选择性地暴露信号凸块焊盘122和锚固凸块焊盘124的阻焊剂层130。例如，封装基板10可以是印刷电路板(PCB)、中介层或柔性PCB。
在实施方式中，基板主体110可具有在与长轴(即，y轴)平行的方向以及与短轴(即，x轴)平行的方向上延伸的表面110S。基板主体110可具有长轴方向上的第一长度L1和短轴方向上的第二长度L2。此外，基板主体110可具有与长轴方向平行的中心轴线C10-y，并且可具有相对于中心轴线C10-y对称的矩形平面形状。基板主体110可充当将半导体芯片(图3的20)电连接和信号连接到外部装置的互连结构。因此，尽管图1和图2中未示出，多个层的电路图案以及用于将多个层的电路图案彼此电绝缘的绝缘层可设置在基板主体110中。多个层的电路图案和绝缘层可被设置为具有各种形状。另外，尽管图1和图2中未示出，连接结构可设置在基板主体110的与阻焊剂层130相对的底表面上以将封装基板10电连接到外部装置。连接结构可包括焊球或焊料凸块。连接结构可通过设置在基板主体110中的多个层的电路图案电连接到信号凸块焊盘122。
信号凸块焊盘122和锚固凸块焊盘124可设置在基板主体110的表面110S上。信号凸块焊盘122之一可电连接到多个层的电路图案中的至少一个。信号凸块焊盘122可由导电材料形成。例如，信号凸块焊盘122可包括铜材料。锚固凸块焊盘124可以是与传输信号的电路图案电绝缘的虚拟焊盘。当封装基板10热膨胀时(参见图9)，锚固凸块焊盘124可足够刚性以对锚固凸块(图9的224)施加力。在实施方式中，锚固凸块焊盘124可形成为包括诸如铜材料的金属材料。
参照图1，信号凸块焊盘122可在表面110S的区域A1上在与长轴平行的方向上排列。信号凸块焊盘122可排列成至少两列。信号凸块焊盘122可排列以相对于中心轴线C10-y对称。各个信号凸块焊盘122可在与短轴平行的方向上具有宽度“a1”，并且可在与长轴平行的方向上具有长度“b1”。在实施方式中，短轴方向上的宽度“a1”可大于长轴方向上的长度“b1”。例如，各个信号凸块焊盘122可被设置为具有在短轴方向上延伸的带形状或条形状。
可从图3的描述看出，信号凸块焊盘122的宽度“a1”可大于信号凸块222的直径“r1”。参照图2，信号凸块焊盘122可在与对应于表面110S的法线的z轴平行的方向上具有高度“h1”。
锚固凸块焊盘124可分别设置在表面110S的拐角区域A2、A3、A4和A5中。因此，锚固凸块焊盘124可设置在基板主体110的表面110S的边缘区域上以比信号凸块焊盘122距中心轴线C10-y更远。锚固凸块焊盘124可被设置为相对于中心轴线C10-y对称。各个锚固凸块焊盘124可在短轴方向上具有宽度“a2”，并且可在长轴方向上具有长度“b2”。在实施方式中，短轴方向上的宽度“a2”可大于长轴方向上的长度“b2”。例如，各个锚固凸块焊盘124可被设置为具有在短轴方向上延伸的带形状或条形状。参照图2，锚固凸块焊盘124可在与对应于表面110S的法线的z轴平行的方向上具有高度“h2”。
可从图3的描述看出，锚固凸块焊盘124的宽度“a2”可大于锚固凸块224的直径“r2”。因此，即使在预定范围内发生锚固凸块焊盘124与锚固凸块224之间的未对准，锚固凸块焊盘124被设置为与锚固凸块224的侧表面接触的可能性可增加，这可从图5和图6的描述看出。结果，当制造图7至图10所示的半导体封装30时，锚固凸块焊盘124可充分地对锚固凸块224施加力。本文中相对于参数使用的词“预定”(例如，预定范围)意指在工艺或算法中使用参数之前确定参数的值。对于一些实施方式，在工艺或算法开始之前确定参数的值。在其它实施方式中，在工艺或算法期间但在工艺或算法中使用参数之前确定参数的值。
在实施方式中，锚固凸块焊盘124的宽度“a2”、长度“b2”和高度“h2”可分别基本上等于信号凸块焊盘122的宽度“a1”、长度“b1”和高度“h1”。在另一实施方式中，锚固凸块焊盘124的宽度“a2”、长度“b2”和高度“h2”中的至少一个可不同于信号凸块焊盘122的宽度“a1”、长度“b1”和高度“h1”中的对应一个。
再参照图1和图2，阻焊剂层130可设置在基板主体110的表面110S上以选择性地暴露信号凸块焊盘122和锚固凸块焊盘124。阻焊剂层130可被设置为保护基板主体110。如图1所示，阻焊剂层130可被设置为在表面110S的区域A1上通过与长轴方向平行的开口或狭缝暴露信号凸块焊盘122。另外，阻焊剂层130可被设置为在表面110S的拐角区域A2、A3、A4和A5上暴露锚固凸块焊盘124。
图3是示出根据本公开的实施方式的半导体封装中所包括的半导体芯片20的平面图。图4是沿着图3的线IV-IV’、V-V’和VI-VI’截取的横截面图。
参照图3和图4，半导体芯片20可包括芯片主体210、设置在芯片主体210上的信号凸块222以及设置在芯片主体210上的锚固凸块224。
在实施方式中，芯片主体210可具有在长轴方向和短轴方向上延伸的表面210S。芯片主体210可具有长轴方向上的第一长度L3和短轴方向上的第二长度L4。此外，芯片主体210可具有与长轴方向平行的中心轴线C20-y，并且可具有相对于中心轴线C20-y对称的矩形平面形状。
尽管图3和图4中未示出，多个层的电路图案以及用于将多个层的电路图案彼此电绝缘的绝缘层可设置在芯片主体210中。多个层的电路图案和绝缘层可以是构成电子装置的各种电路图案。
信号凸块222和锚固凸块224可设置在芯片主体210的表面210S上。信号凸块222之一可电连接到多个层的电路图案中的至少一个。信号凸块222可由导电材料形成。各个信号凸块222可包括凸块主体222a和焊料图案222b。在这种情况下，凸块主体222a可包括铜材料。锚固凸块224可以是与传输信号的电路图案电绝缘的虚拟凸块。当封装基板10热膨胀时，锚固凸块224可足够刚性以接受来自锚固凸块焊盘124的力并对芯片主体210充分地施加力，使得半导体芯片20翘曲，这可从图9的描述看出。在实施方式中，锚固凸块224可形成为包括诸如铜材料的金属材料。
参照图3，信号凸块222可在表面210S的区域B1上在与长轴平行的方向上排列。信号凸块222可排列成至少两列。信号凸块222可排列在与信号凸块焊盘122对应的位置处(参见图5和图6)。
参照图4，各个信号凸块222可包括：凸块主体222a，其被设置为从芯片主体210的表面210S突出；以及焊料图案222b，其被设置在凸块主体222a的与芯片主体210相对的端部。例如，凸块主体222a可具有柱形状或杆形状。在实施方式中，当从平面图看时，凸块主体222a可具有圆形形状、椭圆形状或多边形形状。焊料图案222b可包括锡材料、银材料、镍材料或包含其中的至少两种的组合。焊料图案222b可具有半球形形状。在实施方式中，可通过利用具有固定形式或非固定形式的焊料镀覆凸块主体222a并且通过加热焊料以使焊料变形来形成焊料图案222b。如图3所示，在平面图中，各个信号凸块222可被设置为具有第一直径“r1”的圆形形状。如图4所示，信号凸块222可距芯片主体210的表面210S具有第一高度“h3”。
锚固凸块224可分别设置在表面210S的拐角区域B2、B3、B4和B5中。因此，锚固凸块224可设置在芯片主体210的表面210S的边缘区域上以比信号凸块222距中心轴线C20-y更远。锚固凸块224可被设置为相对于中心轴线C20-y对称。在实施方式中，锚固凸块224可被设置为从芯片主体210的表面210S突出。各个锚固凸块224可具有柱形状或杆形状。在实施方式中，当从平面图看时，锚固凸块224可具有圆形形状、椭圆形形状或多边形形状。锚固凸块224可在没有任何焊料图案的情况下设置。
如图3所示，在平面图中，各个锚固凸块224可被设置为具有第二直径“r2”的圆形形状。如图4所示，锚固凸块224可距芯片主体210的表面210S具有第二高度“h4”。在实施方式中，锚固凸块224的第二直径“r2”可大于信号凸块222的第一直径“r1”。锚固凸块224的第二高度“h4”可大于信号凸块222的第一高度“h3”。在一些其它实施方式中，锚固凸块224的第二直径“r2”可等于或小于信号凸块222的第一直径“r1”。在一些其它实施方式中，在平面图中，锚固凸块224可以是具有椭圆形形状或多边形形状的柱。在这种情况下，锚固凸块224在长轴方向上的长度可大于信号凸块222在长轴方向上的长度，并且锚固凸块224在短轴方向上的长度可大于信号凸块222在短轴方向上的长度。
图5是示出根据本公开的实施方式的半导体封装30的平面图。图6是沿着图5的线VII-VII’、VIII-VIII’和IX-IX’截取的横截面图。图5的半导体封装30包括参照图1和图2描述的封装基板10以及参照图3和图4描述并安装在封装基板10上的半导体芯片20。图6是示出图5所示的半导体封装30的示意性横截面图。如图5和图6所示，在半导体封装30中，半导体芯片20可使用倒装芯片接合技术接合到封装基板10。图5和图6所示的半导体封装30可使用图7至图10所示的接合工艺来制造。
参照图5和图6，信号凸块222可通过焊料图案222b接合到信号凸块焊盘122。例如，信号凸块222可在z轴方向上与相应信号凸块焊盘122至少部分地交叠，使得信号凸块222通过焊料图案222b容易地接合到信号凸块焊盘122。
锚固凸块224可与锚固凸块焊盘124横向相邻设置。如图5所示，锚固凸块224可被设置为在长轴方向上比锚固凸块焊盘124更靠近芯片主体210的表面210S的边缘区域。在实施方式中，锚固凸块224可设置在半导体芯片20的芯片主体210上，并且锚固凸块224可被设置为更靠近封装基板10的基板主体110的表面110S的边缘区域。即，当从平面图看时，锚固凸块224可在长轴方向上设置在锚固凸块焊盘124与芯片主体210的侧表面之间。在实施方式中，当从平面图看时，锚固凸块224可在长轴方向上设置在锚固凸块焊盘124与基板主体110的侧表面之间。锚固凸块224可能不包括焊料。因此，锚固凸块224可能不接合到锚固凸块焊盘124。结果，锚固凸块224可能不接合到锚固凸块焊盘124，而是仅与锚固凸块焊盘124接触或不接触。
在实施方式中，锚固凸块224可能在垂直方向上(即，在z轴方向上)不与锚固凸块焊盘124交叠，如图6所示。即，锚固凸块224可被插入到阻焊剂层130与锚固凸块焊盘124之间的空白空间中。设置锚固凸块224的空白空间可位于表面110S的通过阻焊剂层130的开口暴露的部分上。结果，锚固凸块224可被设置为与锚固凸块焊盘124横向相邻，并且当基板主体110的表面110S被视为基准水平时，锚固凸块224的底表面224S可位于比锚固凸块焊盘124的顶表面124S低的水平处。即，锚固凸块224的底表面224S可被设置为比锚固凸块焊盘124的顶表面124S更靠近基板主体110的表面110S。在实施方式中，锚固凸块224的底表面224S可相对于封装基板10的表面110S位于比锚固凸块焊盘124的顶表面124S低的水平处。在平面图中，锚固凸块224可被设置为相对于锚固凸块焊盘124横向偏移。在实施方式中，锚固凸块224的底表面224S可位于基板主体110的表面110S上方而不接触基板主体110的表面110S。然而，在一些其它实施方式中，锚固凸块224的多个底表面224S中的至少一个可与基板主体110的表面110S接触。
在实施方式中，任一个锚固凸块224的侧表面的一部分与任一个锚固凸块焊盘124的侧表面的一部分可在横向方向(即，y轴方向)上彼此交叠以提供交叠部分Hc。如图6所示，尽管锚固凸块224的侧表面与锚固凸块焊盘124的相应侧表面接触，但本公开不限于此。例如，在一些其它实施方式中，锚固凸块224的至少一个侧表面可与锚固凸块焊盘124的对应一个侧表面间隔开。即使在锚固凸块224的侧表面与锚固凸块焊盘124的对应侧表面间隔开的情况下，由于当封装基板10热膨胀时锚固凸块焊盘124不得不移动并推压锚固凸块224以对锚固凸块224施加力，所以锚固凸块224可设置为与锚固凸块焊盘124间隔开小于特定距离的预定距离(参见图7至图10)。
为了使锚固凸块焊盘124通过锚固凸块焊盘124的交叠部分Hc对锚固凸块224充分地施加力，各个锚固凸块224的侧表面可被设计为覆盖或交叠对应锚固凸块焊盘124的侧表面的高度的40％至70％。例如，如果锚固凸块焊盘124的高度“h2”为10微米，则交叠部分Hc可具有4微米至7微米的高度。
如上所述，根据本公开的实施方式，信号凸块焊盘122可维持接触信号凸块222的状态。相比之下，封装基板10的锚固凸块焊盘124可能不接合到半导体芯片20的锚固凸块224。因此，尽管各个信号凸块222包括焊料图案，但锚固凸块224可能不包括任何焊料图案。锚固凸块焊盘124可被设置为相对于锚固凸块224横向偏移，使得锚固凸块焊盘124的顶表面124S不接触锚固凸块224的底表面224S。锚固凸块224可被设置为在长轴方向上比锚固凸块焊盘124更靠近基板主体110的侧表面，并且各个锚固凸块224可被设置为覆盖或交叠任一个锚固凸块焊盘124的侧表面的至少一部分。因此，当执行焊料接合工艺以将信号凸块222接合到信号凸块焊盘122时，信号凸块222与信号凸块焊盘122之间的接合可靠性可改进(参见图7至图10)。
图7是示出根据本公开的实施方式的在半导体封装30的制造工艺中将半导体芯片20接合到封装基板10的步骤的示意图。图8至图10是示出根据本公开的实施方式的半导体封装30中采用的封装基板10和半导体芯片20的接合工艺的横截面图。在图8至图10中，为了容易和方便说明，信号凸块焊盘122和锚固凸块焊盘124被示出为在基板主体110的表面110S上彼此相邻并且信号凸块222和锚固凸块224被示出为在芯片主体210的表面210S上彼此相邻。
参照图7，可在回流炉中使用回流室400和传送设备500执行封装基板10和半导体芯片20的接合工艺。传送设备500可驱动一对驱动轴510和520以在方向M1上移动传送板530。可通过驱动传送设备500，使得包括安装在封装基板10上的半导体芯片20的层叠结构30i依次通过回流室400中单独地划分的第一至第四区段T1、T2、T3和T4来执行接合工艺。
参照图8，可提供参照图1和图2描述的封装基板10和参照图3和图4描述的半导体芯片20。例如，可提供形成有包括焊料图案222b的信号凸块222的半导体芯片20。在实施方式中，可通过利用具有固定形式或非固定形式的焊料镀覆凸块主体222a并通过加热焊料并使焊料变形为球形形状来形成焊料图案222b。随后，半导体芯片20可层叠在封装基板10上，使得半导体芯片20的表面210S面向封装基板10的表面110S，从而提供层叠结构30i。在层叠结构30i中，信号凸块222可被设置为与相应信号凸块焊盘122垂直地交叠，并且锚固凸块224可被设置为相对于锚固凸块焊盘124横向偏移而不与锚固凸块焊盘124垂直地交叠。如图8所示，信号凸块222的焊料图案222b可被设置为分别与信号凸块焊盘122接触。锚固凸块224的侧表面可被设置为在横向方向(即，y轴方向)上与锚固凸块焊盘124的表面至少部分地交叠。在这种情况下，半导体芯片20可层叠在封装基板10上，使得锚固凸块224的侧表面在横向方向(即，y轴方向)上与锚固凸块焊盘124的表面物理间隔开，如图8所示。即使在这种情况下，锚固凸块224可被设置为在横向方向上与锚固凸块焊盘124间隔开小于特定距离的预定距离，因为当封装基板10热膨胀时锚固凸块焊盘124不得不移动并推压锚固凸块224以对锚固凸块224施加力。在实施方式中，锚固凸块224的底表面224S可与基板主体110的表面110S间隔开。
再参照图7，在层叠结构30i被加载在传送设备500的传送板530上之后，层叠结构30i可在方向M1上移动以通过第一区段T1。在第一区段T1中，层叠结构30i可被加热以用于执行预热步骤和均热步骤。例如，层叠结构30i可在第一区段T1中从室温加热到150摄氏度至180摄氏度的高温。
随后，层叠结构30i可通过回流室400的第二区段T2。第二区段T2可以是第一高温区段，并且可在第二区段T2中执行预热步骤和均热步骤。例如，层叠结构30i可在第二区段T2中维持150摄氏度至180摄氏度的温度。在层叠结构30i通过第二区段T2的同时，可去除焊料图案222b中的挥发性组分。另外，在层叠结构30i通过第二区段T2的同时，可激活焊料图案222b的助熔剂以减小信号凸块焊盘122的表面以稍后接合到信号凸块222。此外，在第二区段T2中，层叠结构30i可在第三区段T3前面在比回流温度低的温度下热稳定。
参照图7和图9，层叠结构30i可通过回流室400的第三区段T3。第三区段T3可以是第二高温区段，并且可在第三区段T3中执行回流步骤。在第三区段T3中，层叠结构30i可被加热到200摄氏度至250摄氏度的温度以使焊料图案222b熔融。因此，在层叠结构30i通过第三区段T3的同时，焊料图案222b可流动以充分地接触信号凸块222。如图9所示，焊料图案222b可从信号凸块222流到信号凸块焊盘122以在信号凸块222以及信号凸块焊盘122上充分地形成润湿区域。
参照图9，在层叠结构30i通过第三区段T3的同时，封装基板10和半导体芯片20可由于回流室400中提供的热而热膨胀。通常，封装基板10可主要包括聚合物材料。因此，封装基板10的热膨胀系数可大于主要包括硅材料的半导体芯片20的热膨胀系数。因此，封装基板10可在横向方向E1和E2上比半导体芯片20膨胀更多。如图9所示，如果封装基板10膨胀，则与图8所示的锚固凸块焊盘124相比，锚固凸块焊盘124可在横向方向E1和E2上移动。作为封装基板10膨胀的结果，锚固凸块焊盘124可充分地接触锚固凸块224，并且可在横向方向E1和E2上对锚固凸块224施加力F1和F2。由于锚固凸块焊盘124与锚固凸块224接触，所以在横向方向E1和E2上推压锚固凸块224的力F1和F2可通过锚固凸块224被传递到半导体芯片20。由于力F1和F2在横向方向E1和E2上施加到固定到芯片主体210的表面的锚固凸块224，所以半导体芯片20可能由于力F1和F2而翘曲。即，接收力F1和F2的锚固凸块224可在z轴方向上生成施加到半导体芯片20的压缩力F210。再参照图3，在长轴方向上，封装基板10的翘曲变形可能更严重地发生。因此，可在长轴方向上强烈地生成锚固凸块焊盘124推压锚固凸块224的力。
再参照图7，层叠结构30i可通过第四区段T4。在第四区段T4中，层叠结构30i可从回流温度冷却到室温。再参照图9，在层叠结构30i通过第四区段T4的同时，在第三区段T3中熔融的焊料图案222b可固化以形成焊料接合部分。在层叠结构30i通过第四区段T4的同时可维持在第三区段T3中生成的压缩力F210。
在层叠结构30i通过第四区段T4之后，将信号凸块222接合到信号凸块焊盘122的工艺可终止。即，在将层叠结构30i从回流室400卸载之后，半导体封装30的制造可完成，如图10所示。在接合工艺终止之后，锚固凸块224的侧表面可与锚固凸块焊盘124的相应侧表面接触以维持接触状态。然而，在一些其它实施方式中，在接合工艺终止之后，锚固凸块224的侧表面可与锚固凸块焊盘124的侧表面间隔开。
根据上述实施方式，可提供半导体封装30，其包括锚固凸块224以及与锚固凸块224相邻的锚固凸块焊盘124。当包括锚固凸块224的半导体芯片20接合到包括锚固凸块焊盘124的封装基板10时，由于半导体芯片20和封装基板10的热膨胀系数之间的差异，锚固凸块焊盘124可对锚固凸块224施加推力。施加到锚固凸块224的推力可生成压缩力，从而改进半导体芯片20与封装基板10之间的接合性。因此，半导体芯片20与封装基板10之间的接合可靠性可改进。
在执行接合工艺以将半导体芯片20接合到封装基板10的同时，锚固凸块焊盘124和锚固凸块224可用于固定半导体芯片20的位置。参照图7至图10，在包括第一至第四区段T1～T4的回流室400中使用空气对流现象将热传导到层叠结构30i的情况下，回流室400中的空气流可对层叠结构30i施加各种方向的力或各种方向的压力。在这种情况下，如果不存在锚固凸块焊盘124和锚固凸块224，则横向施加到层叠结构30i的空气压力可导致半导体芯片20与封装基板10之间的未对准。然而，根据实施方式，锚固凸块焊盘124和锚固凸块224可充当防止或减轻半导体芯片20在封装基板10上滑动的钩。因此，锚固凸块焊盘124和锚固凸块224可改进半导体芯片20与封装基板10之间的接合可靠性。
图11是示出包括采用根据实施方式的半导体封装的存储卡7800的电子系统的框图。存储卡7800包括诸如非易失性存储器装置的存储器7810以及存储控制器7820。存储器7810和存储控制器7820可存储数据或者读出所存储的数据。存储器7810和存储控制器7820中的至少一个可包括根据实施方式的半导体封装。
存储器7810可包括应用了本公开的实施方式的技术的非易失性存储器装置。存储控制器7820可控制存储器7810，使得响应于来自主机7830的读/写请求，读出所存储的数据或者存储数据。
图12是示出包括根据实施方式的半导体封装中的至少一个的电子系统8710的框图。电子系统8710可包括控制器8711、输入/输出单元8712和存储器8713。控制器8711、输入/输出单元8712和存储器8713可通过提供数据移动的路径的总线8715彼此联接。
在实施方式中，控制器8711可包括一个或更多个微处理器、数字信号处理器、微控制器和/或能够执行与这些组件相同的功能的逻辑器件。控制器8711或存储器8713可包括根据本公开的实施方式的半导体封装。输入/输出单元8712可包括选自键区、键盘、显示装置、触摸屏等中的至少一个。存储器8713是用于存储数据的装置。存储器8713可存储要由控制器8711执行的数据和/或命令等。
存储器8713可包括诸如DRAM的易失性存储器装置和/或诸如闪存的非易失性存储器装置。例如，闪存可被安装到诸如移动终端或台式计算机的信息处理系统。闪存可构成固态盘(SSD)。在这种情况下，电子系统8710可在闪存系统中稳定地存储大量数据。
电子系统8710还可包括被配置为向通信网络发送数据以及从通信网络接收数据的接口8714。接口8714可为有线或无线型。例如，接口8714可包括天线或者有线或无线收发器。
电子系统8710可被实现为移动系统、个人计算机、工业计算机或者执行各种功能的逻辑系统。例如，移动系统可以是个人数字助理(PDA)、便携式计算机、平板计算机、移动电话、智能电话、无线电话、膝上型计算机、存储卡、数字音乐系统和信息发送/接收系统中的任一个。
如果电子系统8710是能够执行无线通信的设备，则电子系统8710可用在使用CDMA(码分多址)、GSM(全球移动通信系统)、NADC(北美数字蜂窝)、E-TDMA(增强时分多址)、WCDAM(宽带码分多址)、CDMA2000、LTE(长期演进)或Wibro(无线宽带互联网)的技术的通信系统中。
出于例示性目的公开了本公开的实施方式。本领域技术人员将理解，在不脱离本公开和所附权利要求的范围和精神的情况下，可进行各种修改、添加和替换。
相关申请的交叉引用
本申请要求2019年1月31日提交的韩国申请No.10-2019-0013107的优先权，其整体通过引用并入本文。

Claims (27)

1.一种半导体封装，该半导体封装包括：
封装基板，该封装基板包括信号凸块焊盘和锚固凸块焊盘；以及
半导体芯片，该半导体芯片安装在所述封装基板上并且包括信号凸块和锚固凸块，
其中，所述信号凸块接合到所述信号凸块焊盘，
其中，所述锚固凸块被设置为与所述锚固凸块焊盘相邻，并且
其中，所述锚固凸块的底表面相对于所述封装基板的表面位于比所述锚固凸块焊盘的顶表面低的水平处。
2.根据权利要求1所述的半导体封装，其中，所述锚固凸块被设置为相对于所述锚固凸块焊盘横向偏移。
3.根据权利要求2所述的半导体封装，其中，所述锚固凸块的侧表面与所述锚固凸块焊盘的侧表面接触。
4.根据权利要求2所述的半导体封装，其中，所述锚固凸块的侧表面与所述锚固凸块焊盘的侧表面间隔开。
5.根据权利要求1所述的半导体封装，其中，所述锚固凸块的侧表面与所述锚固凸块焊盘的侧表面的高度的40％至70％交叠。
6.根据权利要求1所述的半导体封装，其中，所述锚固凸块的高度大于所述信号凸块的高度。
7.根据权利要求1所述的半导体封装，
其中，所述信号凸块包括接合到所述信号凸块焊盘的焊料图案；并且
其中，所述锚固凸块不接合到所述锚固凸块焊盘。
8.根据权利要求7所述的半导体封装，
其中，所述锚固凸块不包括接合到所述锚固凸块焊盘的焊料图案。
9.根据权利要求1所述的半导体封装，
其中，所述封装基板包括基板主体，该基板主体具有在长轴方向和短轴方向上延伸的表面；并且
其中，所述锚固凸块焊盘被设置在所述封装基板的表面的拐角区域上。
10.根据权利要求9所述的半导体封装，
其中，所述半导体芯片包括芯片主体，该芯片主体具有在所述长轴方向和所述短轴方向上延伸的表面；
其中，所述锚固凸块被设置在所述半导体芯片的所述芯片主体上，并且所述锚固凸块被设置为在所述长轴方向上比所述锚固凸块焊盘更靠近所述芯片主体的所述表面的边缘区域，并且
其中，所述锚固凸块被设置为在所述长轴方向上比所述锚固凸块焊盘更靠近所述基板主体的所述表面的边缘区域。
11.根据权利要求9所述的半导体封装，
其中，所述锚固凸块焊盘具有所述短轴方向上的宽度和所述长轴方向上的长度；并且
其中，所述宽度大于所述长度。
12.根据权利要求9所述的半导体封装，
其中，所述封装基板还包括阻焊剂层，该阻焊剂层被设置在所述基板主体上以选择性地暴露所述信号凸块焊盘和所述锚固凸块焊盘；并且
其中，所述锚固凸块被设置为插入到所述锚固凸块焊盘与所述阻焊剂层之间的空白空间中。
13.根据权利要求12所述的半导体封装，其中，设置有所述锚固凸块的所述空白空间位于所述基板主体的所述表面的通过所述阻焊剂层的开口暴露的区域上方。
14.根据权利要求9所述的半导体封装，其中，所述封装基板的热膨胀系数大于所述半导体芯片的热膨胀系数。
15.根据权利要求14所述的半导体封装，其中，当在所述半导体芯片层叠在所述封装基板上的同时所述封装基板和所述半导体芯片热膨胀时，所述锚固凸块焊盘被设置为在所述长轴方向上对所述锚固凸块施加推力。
16.一种半导体封装，该半导体封装包括：
封装基板，该封装基板被配置为包括在长轴方向和短轴方向上延伸的表面，并且被配置为包括设置在所述表面上的信号凸块焊盘和锚固凸块焊盘；以及
半导体芯片，该半导体芯片安装在所述封装基板上，并且包括与所述信号凸块焊盘相邻的信号凸块以及与所述锚固凸块焊盘相邻的锚固凸块，
其中，所述锚固凸块焊盘被设置在所述表面的拐角区域上，并且
其中，所述锚固凸块被设置为在所述长轴方向上比所述锚固凸块焊盘更靠近所述表面的边缘区域。
17.根据权利要求16所述的半导体封装，
其中，所述信号凸块被设置为接合到所述信号凸块焊盘；并且
其中，所述锚固凸块的侧表面的一部分与所述锚固凸块焊盘的侧表面的至少一部分交叠。
18.根据权利要求17所述的半导体封装，其中，所述锚固凸块不接合到所述锚固凸块焊盘。
19.根据权利要求17所述的半导体封装，其中，所述锚固凸块的侧表面与所述锚固凸块焊盘的侧表面的高度的40％至70％交叠。
20.根据权利要求17所述的半导体封装，
其中，所述封装基板的热膨胀系数大于所述半导体芯片的热膨胀系数；并且
其中，当在所述半导体芯片层叠在所述封装基板上的同时所述封装基板和所述半导体芯片热膨胀时，所述锚固凸块焊盘被设置为在所述长轴方向上对所述锚固凸块施加推力。
21.根据权利要求16所述的半导体封装，其中，所述锚固凸块的底表面位于所述封装基板的所述表面上方而不接触所述封装基板。
22.根据权利要求16所述的半导体封装，其中，所述锚固凸块的底表面与所述封装基板的所述表面接触。
23.根据权利要求16所述的半导体封装，其中，所述锚固凸块的高度大于所述信号凸块的高度。
24.根据权利要求16所述的半导体封装，
其中，所述信号凸块包括接合到所述信号凸块焊盘的焊料图案；并且
其中，所述锚固凸块不包括接合到所述锚固凸块焊盘的焊料图案。
25.根据权利要求16所述的半导体封装，
其中，所述锚固凸块焊盘具有所述短轴方向上的宽度和所述长轴方向上的长度；并且
其中，所述宽度大于所述长度。
26.根据权利要求16所述的半导体封装，
其中，所述封装基板还包括阻焊剂层，该阻焊剂层被设置在所述封装基板的所述表面上以选择性地暴露所述信号凸块焊盘和所述锚固凸块焊盘；并且
其中，所述锚固凸块被设置为插入到所述锚固凸块焊盘与所述阻焊剂层之间的空白空间中。
27.根据权利要求26所述的半导体封装，其中，设置有所述锚固凸块的所述空白空间位于所述表面的通过所述阻焊剂层的开口暴露的区域上方。
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