CN111384017B - Flip chip assembly, flip chip packaging structure and preparation method - Google Patents
Flip chip assembly, flip chip packaging structure and preparation method Download PDFInfo
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- CN111384017B CN111384017B CN201811638810.4A CN201811638810A CN111384017B CN 111384017 B CN111384017 B CN 111384017B CN 201811638810 A CN201811638810 A CN 201811638810A CN 111384017 B CN111384017 B CN 111384017B
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- 238000004806 packaging method and process Methods 0.000 title abstract description 9
- 238000002360 preparation method Methods 0.000 title abstract description 7
- 229910000679 solder Inorganic materials 0.000 claims abstract description 133
- 238000004519 manufacturing process Methods 0.000 claims abstract description 11
- 238000010438 heat treatment Methods 0.000 claims abstract description 8
- 239000010949 copper Substances 0.000 claims description 21
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims description 20
- 229910052802 copper Inorganic materials 0.000 claims description 20
- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 claims description 8
- 238000003466 welding Methods 0.000 claims description 6
- 239000000758 substrate Substances 0.000 claims description 5
- 229910000570 Cupronickel Inorganic materials 0.000 claims description 4
- 229910045601 alloy Inorganic materials 0.000 claims description 4
- 239000000956 alloy Substances 0.000 claims description 4
- YOCUPQPZWBBYIX-UHFFFAOYSA-N copper nickel Chemical compound [Ni].[Cu] YOCUPQPZWBBYIX-UHFFFAOYSA-N 0.000 claims description 4
- 229910052759 nickel Inorganic materials 0.000 claims description 4
- 229910001128 Sn alloy Inorganic materials 0.000 claims description 3
- ATJFFYVFTNAWJD-UHFFFAOYSA-N Tin Chemical compound [Sn] ATJFFYVFTNAWJD-UHFFFAOYSA-N 0.000 claims description 3
- 230000004907 flux Effects 0.000 claims 4
- 238000000034 method Methods 0.000 description 14
- 230000008569 process Effects 0.000 description 9
- 230000006872 improvement Effects 0.000 description 8
- 230000008859 change Effects 0.000 description 5
- 238000005476 soldering Methods 0.000 description 5
- 238000010586 diagram Methods 0.000 description 3
- 238000009713 electroplating Methods 0.000 description 3
- 230000009286 beneficial effect Effects 0.000 description 2
- 239000004020 conductor Substances 0.000 description 2
- 238000013461 design Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000001465 metallisation Methods 0.000 description 2
- 230000009466 transformation Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 1
- 238000004100 electronic packaging Methods 0.000 description 1
- 230000002708 enhancing effect Effects 0.000 description 1
- 230000003628 erosive effect Effects 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000002844 melting Methods 0.000 description 1
- 230000008018 melting Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 238000000465 moulding Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000004544 sputter deposition Methods 0.000 description 1
- 230000001131 transforming effect Effects 0.000 description 1
- 238000012795 verification Methods 0.000 description 1
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/50—Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
- H01L21/56—Encapsulations, e.g. encapsulation layers, coatings
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
- H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
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- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Wire Bonding (AREA)
Abstract
The invention provides a flip chip assembly, a flip chip packaging structure and a preparation method, wherein the flip chip assembly comprises a chip, a first conductive column and a second conductive column, the first conductive column and the second conductive column are formed on the surface of one side of the chip along a first direction, the second conductive column is larger than the first conductive column, and one end, away from the chip, of the first conductive column is provided with a first solder block; one end of the second conductive column, which is far away from the chip, is provided with a plurality of second solder blocks which are spaced from each other, and a conductive base is arranged between the second solder blocks and the second conductive column. The manufacturing method of the flip chip assembly comprises the steps of manufacturing a plurality of mutually spaced conductive bases on the second conductive posts, manufacturing corresponding second solder blocks on the conductive bases, and converting the first solder blocks and the second solder blocks from an initial state to a finished state through heat treatment. The invention adjusts the solder structure on the second conductive column with larger size such as strip shape, ellipse shape and the like, and improves the product quality.
Description
Technical Field
The invention relates to the technical field of electronic packaging, in particular to a flip chip assembly, a flip chip packaging structure and a preparation method.
Background
In recent years, the flip chip has become more and more concerned and more important in the industry due to the advantages of compact structure, high performance, short lead and the like, can better meet the miniaturization requirement of a chip packaging structure, improves the integration level of the chip, and is beneficial to the improvement of the data processing capacity of the chip. The flip chip generally uses a copper pillar bump (Cu pillar) and a layer of solder arranged on the top of the copper pillar bump to realize the connection between the chip and the substrate, and the structural form of the copper pillar bump is basically kept unchanged in the soldering process, so that the flip chip has more excellent electrical conductivity, thermal conductivity and structural reliability compared with the conventional solder bump.
The conventional copper pillar bumps are mostly arranged in a circular shape, but as the requirements for electrical conductivity, thermal conductivity, and structural strength and stress are increased, it is now disclosed to prepare the strip-shaped copper pillar bumps 20 'with different length-width ratios on the surface of the chip 10' (as shown in fig. 1). The production and welding process of the bar-shaped copper column lug is consistent with that of the traditional round copper column lug, when solder blocks at the top end of the copper column lug are melted to generate solder caps by reflow soldering, the heights of the solder caps at the top of the bar-shaped copper column lug and the tops of the round copper column lug are different, and the heights of the solder caps correspondingly generated at the tops of the bar-shaped copper column lugs with different shapes are also greatly different. This can result in poor coplanarity (coplanarity) of the different copper pillar bumps on the surface of the flip chip, which can affect the packaging of the flip chip.
The applicant has disclosed a new flip chip assembly in CN108364920A, in which two or more solder bumps are disposed at the top end of the strip-shaped second conductive pillar at intervals, so that the height of the solder bumps on the second conductive pillar can be consistent with that of the solder caps on the first conductive pillar when the solder caps are formed on the second conductive pillar, and the high coplanarity of the conductive pillars with different specifications on the chip surface during soldering and packaging is improved. According to on-site verification, the solder blocks on the second conductive columns are easy to spread along the end faces of the second conductive columns to be mutually adhered together after being melted, so that local height change on the second conductive columns is caused; if the distance between the solder bumps is set too large, it is difficult to meet the performance requirements of the chip soldering strength and electrical conduction.
In view of the above, it is desirable to provide a new flip chip assembly, a flip chip package structure and a method for manufacturing the same.
Disclosure of Invention
The invention aims to provide a flip chip assembly, a flip chip packaging structure and a preparation method, which can effectively improve the high coplanarity of solder structures on different conductive columns on the surface of a chip and improve the product quality.
In order to achieve the above object, the present invention provides a flip chip assembly, including a chip, and a first conductive pillar and a second conductive pillar formed on a surface of one side of the chip along a first direction, where a projection of the second conductive pillar on a plane perpendicular to the first direction is greater than a projection of the first conductive pillar on a plane perpendicular to the first direction, and a first solder bump is disposed at an end of the first conductive pillar away from the chip, and the flip chip assembly is characterized in that: one end of the second conductive column, which is far away from the chip, is provided with a plurality of second solder blocks which are spaced from each other, and each conductive base is arranged between the second solder blocks and the second conductive columns.
As a further improvement of the present invention, the first solder mass and the second solder mass are in conformity with specifications.
As a further improvement of the invention, one end of the conductive base, which is adjacent to the second solder block, is flush with one end of the first conductive pillar, which is away from the chip, and the end surfaces of the conductive base and the first conductive pillar are consistent in structure.
As a further improvement of the present invention, the spacing between adjacent conductive pedestals on the same second conductive pillar is the same, and the second solder bumps on the same second conductive pillar are also arranged at equal spacing.
As a further improvement of the present invention, the flip chip assembly further includes a base disposed between the first conductive pillar and the first solder bump, and an end face structure of a side of the base facing away from the first conductive pillar is consistent with an end face structure of a side of the conductive base facing away from the second conductive pillar.
As a further improvement of the present invention, the first conductive pillar is disposed in a cylindrical shape; one end of the second conductive column, which is far away from the chip, is provided with a strip-shaped second end face.
As a further improvement of the present invention, the plurality of conductive pedestals on the same second conductive pillar are linearly arranged at intervals along the length direction of the second end surface.
As a further improvement of the present invention, the first conductive pillar and the second conductive pillar are both configured as copper pillars; the conductive base is made of copper, nickel or copper-nickel alloy; both the first solder bump and the second solder bump are made of metallic tin or tin alloy.
The invention also provides a flip chip packaging structure which comprises a substrate, the flip chip assembly and the insulating layer.
The invention also provides a preparation method of the flip chip assembly, which mainly comprises the following steps:
providing a chip, and manufacturing a first conductive column and a second conductive column on one side surface of the chip, wherein the projection of the second conductive column on a plane parallel to the chip is larger than the projection of the first conductive column on the plane parallel to the chip;
preparing a first solder block on the surface of one end of the first conductive column, which is far away from the chip, preparing a plurality of conductive bases which are distributed at intervals on one end of the second conductive column, which is far away from the chip, and preparing a second solder block on the conductive bases;
and carrying out heat treatment on the first solder block and the second solder block so that the first solder block and the second solder block are converted into a finished product state from an initial state.
The invention has the beneficial effects that: according to the flip chip assembly, the plurality of mutually spaced conductive bases are arranged at one end, away from the chip, of the second conductive column, and the corresponding second solder blocks are arranged on the conductive bases, so that the form change of the second solder blocks is consistent with that of the first solder blocks in the process of converting the initial state into the finished state through heat treatment, and the height difference of the second solder blocks in the finished state caused by mutual adhesion of the second solder blocks in the molten state is avoided. The flip chip assembly can really improve the high coplanarity of the welding materials on different conductive columns on the surface of the chip and improve the yield of products.
Drawings
FIG. 1 is a schematic diagram of a conventional flip-chip assembly;
fig. 2 is a schematic view of the first and second solder masses of the flip chip assembly of the present invention in an initial state;
fig. 3 is a schematic view of the first and second solder bumps of the flip-chip assembly of fig. 2 in a finished state;
FIG. 4 is a schematic diagram of another embodiment of a flip chip assembly in accordance with the present invention;
FIG. 5 is a schematic structural diagram of a flip chip package structure according to the present invention;
fig. 6 is a schematic main flow chart of a method for manufacturing a flip chip assembly according to the present invention.
Detailed Description
The present invention will be described in detail below with reference to embodiments shown in the drawings. The present invention is not limited to the embodiment, and structural, methodological, or functional changes made by one of ordinary skill in the art according to the embodiment are included in the scope of the present invention.
Referring to fig. 2 and 3, the flip chip assembly 100 of the present invention includes a chip 10, and first conductive pillars 21 and second conductive pillars 22 disposed on a surface of one side of the chip 10 along a first direction. The projection of the second conductive pillar 22 on the plane perpendicular to the first direction is larger than the projection of the first conductive pillar 21 on the plane perpendicular to the first direction. One end of the first conductive pillar 21, which is far away from the chip 10, is provided with a first solder block 31; a plurality of second solder blocks 32 arranged at intervals are disposed at one end of the second conductive pillar 22 away from the chip 10, and a corresponding conductive base 40 is disposed between each second solder block 32 and the second conductive pillar 22.
Preferably, the distances between adjacent conductive pedestals 40 on the second conductive pillars 22 are the same, and the second solder bumps 32 on the same second conductive pillar 22 are also arranged at equal intervals. In this embodiment, a strip-shaped second end surface 221 is formed at one end of the second conductive pillar 22 away from the chip 10, and the plurality of conductive pedestals 40 on the same second conductive pillar 22 are arranged at equal intervals along the length direction of the second end surface 221.
The first conductive pillar 21 is substantially cylindrical, and a circular first end surface 211 is formed at one end of the first conductive pillar 21 away from the chip 10. Here, the height of the first end surface 211 relative to the surface of the chip 10 exceeds the height of the second end surface 221 relative to the surface of the chip 10. The end of the conductive base 40 adjacent to the second solder mass 32 is flush with the first end surface 211 of the first conductive post 21, and the end of the conductive base 40 facing the second solder mass 32 is structurally identical to the first end surface 211. Further, the conductive base 40 is also disposed in a cylindrical shape and has a diameter equivalent to that of the first conductive pillar 21.
The first solder bump 31 and the second solder bump 32 have the same specification, i.e. the first solder bump 31 and the second solder bump 32 are made of the same material and have the same initial state. The initial state corresponds to a configuration in which either the first solder bump 31 is formed on the first end face 211 or the second solder bump 32 is formed on the corresponding conductive mount 40; the finished state is the state when the first solder bump 31 and the second solder bump 32 are transformed into the "solder caps" by heat treatment. Here, the heights of the first solder bump 31 and the second solder bump 32 in the initial state are uniform. The first solder bump 31 and the second solder bump 32 in the initial state are arranged in a columnar shape, and the first solder bump 31 does not exceed the first end face 211 of the first conductive column 21 along the radial direction; the second solder mass 32 does not extend beyond the end surface of its corresponding conductive pad 40 facing the second solder mass 32 in the radial direction.
The first solder bump 31 and the second solder bump 32 are also preferably disposed in a cylindrical shape and correspond to the first conductive pillar 21 and the conductive base 40, respectively. During the process of transforming the first solder bump 31 and the second solder bump 32 into the finished product state, the first solder bump and the second solder bump will have shape transformation under the actions of gravity, interfacial stress and surface tension after melting. Here, by the provision of the conductive mount 40 described above, the tendency of form transformation of both the second solder bump 32 and the first solder bump 31 can be better kept consistent. In addition, the distance W between adjacent second solder bumps 32 in the initial state needs to be determined during the molding process of the second solder bumps 32, and the distance W cannot be designed to be too small, which ensures that the adjacent second solder bumps 32 are not adhered to each other when being converted to the finished product state; the distance W cannot be designed too large, which affects the electrical connection performance and the structural strength of the second conductive pillar 22.
In the invention, not only two or more second solder blocks 32 spaced from each other are arranged on the larger second conductive pillar 22, but also the trend of the form change of the second solder blocks 32 in the heat treatment process is truly consistent with the trend of the change of the first solder blocks 31 through the design of the conductive base 40, thereby effectively eliminating the height difference after the first solder blocks 31 and the second solder blocks 32 are melted and deformed.
Generally, the first conductive pillar 21 and the second conductive pillar 22 are both configured as copper pillars; both the first solder bump 31 and the second solder bump 32 are made of metallic tin or tin alloy. The conductive base 40 is made of copper, nickel or copper-nickel alloy, which not only needs to ensure the bonding performance of the conductive base 40 with the second conductive pillar 22 and the second solder bump 32, but also needs to ensure that the conductive base 40 has good conductivity and structural strength, and under the above conditions, the conductive base 40 can also be made of other conductive materials.
In practical production, the conductive base 40 can be formed synchronously with the first conductive pillars 21 and the second conductive pillars 22, in other words, after the second conductive pillars 22 are formed, the conductive base 40 arranged at intervals is etched on the end surface of the second conductive pillar 22 departing from the chip 10. The method can also effectively ensure that the end surface of the conductive base 40 facing the second solder bump 32 is flush with the first end surface 211 of the first conductive pillar 21, and the surface structures of the two are consistent.
Fig. 4 shows another embodiment of the present invention, which is different from the previous embodiment in that: the flip chip assembly 100 further includes a base 50 disposed between the first conductive pillar 21 and the first solder bump 31, and an end surface structure of the base 50 facing away from one side of the first conductive pillar 21 is consistent with an end surface structure of the conductive base 40 facing away from one side of the second conductive pillar 22.
Preferably, the base 50 is also made of copper, nickel or copper-nickel alloy, so as to ensure the bonding performance of the base 50 with the first conductive pillar 21 and the first solder bump 31, and to ensure that the base 50 has good conductivity and structural strength. In the case that the above conditions are satisfied, the base 50 may be made of other conductive materials.
In the above embodiment, the specification sizes of the first solder bumps 31 and the second solder bumps 32 and the distance between the adjacent second solder bumps 32 are all set to be consistent, so that the best high coplanarity effect can be achieved after the first solder bumps 31 and the second solder bumps 32 are melted and deformed to the greatest extent. This should not be construed as a limitation to the application of the present invention, and in other embodiments of the invention, the design of the specification and spacing between the second solder bump 32 and the conductive base 40 on the second conductive pillar 22 may be reasonably arranged according to actual requirements, so that the height variation of the second solder bump 32 when being converted into a finished product state is kept uniform and is kept consistent with the height variation of the first solder bump 31 as much as possible.
As shown in fig. 5, the present invention further provides a flip chip package structure 200, which includes a substrate 201, an insulating layer 202 and the flip chip assembly 100 as described above. The first conductive posts 21, the second conductive posts 22, the first solder bumps 31, and the second solder bumps 32 are used for electrically connecting the substrate 201 and the chip 100, and the insulating layer 202 is used for solidifying and supporting and isolating the erosion of the external air and moisture.
As shown in fig. 6, the present invention further provides a method for manufacturing the flip chip assembly 100, which mainly includes:
the method includes the steps that S1, a chip 10 is provided, a first conductive column 21 and a second conductive column 22 are manufactured on the surface of one side of the chip 10 along a first direction, the first conductive column 21 and the second conductive column 22 are perpendicular to the chip 10, and the projection of the second conductive column 22 on a plane perpendicular to the first direction is larger than the projection of the first conductive column 21 on the plane perpendicular to the first direction;
s2, preparing a first solder block 31 on the surface of one end of the first conductive column 21, which is far away from the chip 10, preparing a plurality of mutually-spaced conductive bases 40 on one end of the second conductive column 22, which is far away from the chip 10, and preparing a corresponding second solder block 32 on the conductive bases 40;
and S3, carrying out heat treatment on the first solder block 31 and the second solder block 32 to enable the first solder block 31 and the second solder block 32 to be converted into a finished product state from the initial state.
In other embodiments of the present invention, the step S2 further includes preparing a base 50 on the first end surface 211 of the first conductive pillar 21, and then preparing the first solder bump 31 on a side of the base 50 away from the first conductive pillar 21.
Specifically, a metallization layer is formed in a sputtering manner in a predetermined area on the surface of one side of the chip 10, and then a first conductive pillar 21 and a second conductive pillar 22 are formed on the metallization layer through exposure and electroplating processes, wherein the first conductive pillar 21 and the second conductive pillar 22 are copper pillars; then, a plurality of spaced conductive pedestals 40 are obtained by performing positioning growth on the second end surface 221 of the second conductive pillar 22 through exposure and electroplating processes, and the base 50 and the conductive pedestals 40 can also be prepared simultaneously; then, the first solder bump 31 and the second solder bump 32 are prepared by electroplating or the like. Finally, the heat treatment process specifically adopts reflow soldering to melt and deform the first solder mass 31 and the second solder mass 32 into a cap shape, and simultaneously, the bonding strength between the first solder mass 31 and the second solder mass 32 and the first conductive column 21 and the second conductive column 22 is enhanced.
In summary, in the flip chip assembly 100 and the flip chip package structure 200 of the present invention, the conductive bases 40 and the corresponding second solder bumps 32 are disposed at the ends of the second conductive pillars 22 away from the chip 10, so that the height changes of the first solder bumps 31 and the second solder bumps 32 can be more consistent when being heated and melted, and the height change difference of different second solder bumps 32 on the second conductive pillars 22 is avoided, thereby improving the height coplanarity of different conductive pillars of the product, further improving the yield of the product, and enhancing the competitiveness of the product. Meanwhile, the flip chip assembly 100 obtained by the preparation method of the present invention can also effectively ensure the bonding strength of the first solder bump 31 and the second solder bump 32 with the first conductive pillar 21 and the second conductive pillar 22, and avoid accidental peeling.
It should be understood that although the specification describes embodiments, not every embodiment includes only a single embodiment, and such description is for clarity purposes only, and it will be appreciated by those skilled in the art that the specification as a whole may be appropriately combined to form other embodiments as will be apparent to those skilled in the art.
The above-listed detailed description is only a specific description of a possible embodiment of the present invention, and they are not intended to limit the scope of the present invention, and equivalent embodiments or modifications made without departing from the technical spirit of the present invention should be included in the scope of the present invention.
Claims (8)
1. A flip chip assembly comprises a chip, a first conductive column and a second conductive column, wherein the first conductive column and the second conductive column are formed on one side surface of the chip along a first direction, the projection of the second conductive column on a plane perpendicular to the first direction is larger than the projection of the first conductive column on the plane perpendicular to the first direction, and one end, deviating from the chip, of the first conductive column is provided with a first solder block, and the flip chip assembly is characterized in that: a plurality of second welding fluxes are arranged at intervals at one end, away from the chip, of the second conductive column, and a conductive base is arranged between each second welding flux and the second conductive column; the specifications of the first solder block and the second solder block are consistent; one end of the conductive base, which is close to the second solder block, is flush with one end, which is far away from the chip, of the first conductive column, and the end surface structures of the conductive base and the first conductive column are consistent.
2. The utility model provides a flip chip subassembly, includes the chip, along the first direction form the first of chip side surface is led electrical pillar and second to lead electrical pillar, the second is led the projection of electrical pillar on the plane of perpendicular to first direction and is greater than the projection of first electrical pillar on the plane of perpendicular to first direction, the first one end of leading electrical pillar to deviate from the chip is equipped with first solder bump, its characterized in that: a plurality of second welding fluxes are arranged at intervals at one end of the second conductive column, which is far away from the chip, and a conductive base is arranged between each second welding flux and the second conductive column; the flip chip subassembly still including set up in base between first conductive pillar and the first solder piece, the base deviate from the terminal surface structure of first conductive pillar one side with the terminal surface structure that electrically conductive base deviates from second conductive pillar one side is unanimous, first solder piece is unanimous with second solder piece both's specification.
3. The flip-chip assembly of claim 1 or 2, wherein: the distance between the adjacent conductive bases on the same second conductive column is consistent, and the second solder blocks on the same second conductive column are also arranged at equal intervals.
4. The flip-chip assembly of claim 1 or 2, wherein: the first conductive column is arranged in a cylindrical shape; one end of the second conductive column, which is far away from the chip, is provided with a strip-shaped second end face.
5. The flip-chip assembly of claim 4, wherein: and the plurality of conductive bases on the same second conductive column are linearly arranged at intervals along the length direction of the second end face.
6. The flip-chip assembly of claim 1 or 2, wherein: the first conductive column and the second conductive column are both copper columns; the conductive base is made of copper, nickel or copper-nickel alloy; both the first solder bump and the second solder bump are made of metallic tin or tin alloy.
7. A flip chip package structure is characterized in that: the package structure includes a substrate, a flip-chip assembly as claimed in any one of claims 1-6, and an insulating layer.
8. A method of manufacturing a flip-chip assembly according to claim 1 or 2, comprising the steps of:
providing a chip, and manufacturing a first conductive column and a second conductive column on one side surface of the chip, wherein the projection of the second conductive column on a plane parallel to the chip is larger than the projection of the first conductive column on the plane parallel to the chip;
preparing a first solder block on the surface of one end of the first conductive column, which is far away from the chip, preparing a plurality of conductive bases which are distributed at intervals on one end of the second conductive column, which is far away from the chip, and preparing a second solder block on the conductive bases;
and carrying out heat treatment on the first solder block and the second solder block so as to convert the first solder block and the second solder block from an initial state to a finished product state.
Priority Applications (2)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811638810.4A CN111384017B (en) | 2018-12-29 | 2018-12-29 | Flip chip assembly, flip chip packaging structure and preparation method |
| PCT/CN2019/119478 WO2020134722A1 (en) | 2018-12-29 | 2019-11-19 | Flip-chip assembly, flip-chip packaging structure, and manufacturing method |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201811638810.4A CN111384017B (en) | 2018-12-29 | 2018-12-29 | Flip chip assembly, flip chip packaging structure and preparation method |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| CN111384017A CN111384017A (en) | 2020-07-07 |
| CN111384017B true CN111384017B (en) | 2022-10-11 |
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| CN201811638810.4A Active CN111384017B (en) | 2018-12-29 | 2018-12-29 | Flip chip assembly, flip chip packaging structure and preparation method |
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| CN (1) | CN111384017B (en) |
| WO (1) | WO2020134722A1 (en) |
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| WO2012049954A1 (en) * | 2010-10-12 | 2012-04-19 | 株式会社安川電機 | Electronic device and electronic component |
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| CN1588635A (en) * | 2004-08-30 | 2005-03-02 | 友达光电股份有限公司 | Method and structure for detecting anisotropic conductive rubber conductive particle deformation content |
| CN1753176A (en) * | 2004-09-22 | 2006-03-29 | 日月光半导体制造股份有限公司 | Inversion packaging structure, semiconductor chip having convex block and its manufacturing method |
| KR20110119342A (en) * | 2010-04-27 | 2011-11-02 | 앰코 테크놀로지 코리아 주식회사 | Semiconductor device having bump |
| CN103855118A (en) * | 2012-12-05 | 2014-06-11 | 株式会社村田制作所 | Bump-equipped electronic component and method for manufacturing bump-equipped electronic component |
| CN108364920A (en) * | 2018-03-01 | 2018-08-03 | 颀中科技（苏州）有限公司 | Flip-chip assembly, flip chip packaging structure and preparation method |
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| CN111384017A (en) | 2020-07-07 |
| WO2020134722A1 (en) | 2020-07-02 |
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