CN111381104A - Method and device for measuring impedance of transmission channel - Google Patents
Method and device for measuring impedance of transmission channel Download PDFInfo
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- CN111381104A CN111381104A CN201811642333.9A CN201811642333A CN111381104A CN 111381104 A CN111381104 A CN 111381104A CN 201811642333 A CN201811642333 A CN 201811642333A CN 111381104 A CN111381104 A CN 111381104A
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- G01R27/14—Measuring resistance by measuring current or voltage obtained from a reference source
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- G—PHYSICS
- G01—MEASURING; TESTING
- G01R—MEASURING ELECTRIC VARIABLES; MEASURING MAGNETIC VARIABLES
- G01R27/00—Arrangements for measuring resistance, reactance, impedance, or electric characteristics derived therefrom
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Abstract
The embodiment of the invention provides a method and a device for measuring transmission channel impedance, wherein the method is applied to a device for measuring the transmission channel impedance, the device comprises a step signal generator, and the method comprises the following steps: the method comprises the steps that a rapid step signal generated by a step signal generator is sent to a testing end of a transmission channel, wherein the transmission channel is a physical entity part for transmitting communication signals between a signal sending unit and a signal receiving unit; acquiring a superposed signal at a test end, wherein the superposed signal represents superposition of the rapid step signal and a reflection signal of the rapid step signal at a point with discontinuous impedance in a transmission channel; and obtaining the impedance value of the point with discontinuous impedance in the transmission channel according to the level amplitude of the quick step signal and the level amplitude of the superposed signal. The technical scheme is simple and easy to implement, and can quickly complete the impedance test.
Description
Technical Field
The present invention relates to, but not limited to, circuit impedance detection technologies, and in particular, to a method and an apparatus for measuring transmission channel impedance.
Background
The transmission channel is a device-level component for transmitting communication signals between the two signal transceiver modules, and the device-level component may include any combination of various relatively independent passive components, for example, the transmission channel may include: a transmission channel formed by a Printed Circuit Board (PCB), a transmission channel formed by a PCBA (Printed Circuit Board + Assembly), and a transmission channel formed by a plurality of PCBA, specifically, the transmission channel formed by the PCB may include any combination of a PCB Trace (Circuit) and a PCB Via (through hole), and the transmission channel formed by the PCBA may include any combination of components such as a PCB Trace, a PCB Via, a PCB Connector, and a PCB Chip Package; the transmission channel is an important component in a high-speed digital channel system, and in order to ensure normal transmission of a communication signal of the high-speed digital communication system, impedance measurement needs to be performed on part or all of the transmission channels in the high-speed digital channel system, so that points of impedance discontinuity in the part or all of the transmission channels are found in time, and the part or all of the transmission channels to be measured are called as transmission channels to be measured (CUT).
At present, when detecting the impedance of the CUT, a detection method is implemented by using a Time domain reflection Technology (TDR), for example, a hardware connection diagram of an impedance measurement system using a TDR meter shown in fig. 1, where the system 100 includes: a TDR meter 101, a TDR accessory 102, a high bandwidth measurement cable 103, and a high bandwidth measurement clamp 104; the TDR accessory 102 is configured to generate a fast step signal, send the fast step signal to a transmission channel to be measured, and measure impedance of the transmission channel to be measured, where the fast step signal is a step signal with a short rising edge time, the transmission channel to be measured is a combination of components including a PCB line, a PCB through hole, and a PCB connector of the backplane 105, and components including a PCB line, a PCB through hole, a PCB connector, and a PCB chip package of the board 106, and the impedance measurement and impedance evaluation of the transmission channel to be measured are completed using the system.
Although the measuring method using the TDR meter can accurately measure the impedance value of the transmission channel to be measured, the TDR meter must be used, and the TDR meter has the following problems in use: firstly, the rising edge time of a communication signal transmitted by the conventional high-speed digital communication system can reach picoseconds, so that the design cost and purchase cost of a TDR instrument meeting the channel test requirement of a high-speed digital channel system are increased sharply; secondly, the existing TDR instrument can simultaneously perform impedance measurement on more than ten transmission channels to be measured, but compared with a more complex high-speed digital communication system, such as a carrier communication device, at least more than thousands of channels to be measured in the system cannot meet the measurement requirement; thirdly, when the TDR meter is used for impedance measurement, a dedicated high-bandwidth measurement cable, a high-bandwidth measurement probe or a high-bandwidth measurement clamp are required, and the assembly and use of these high-speed components are complicated; fourthly, there is a high demand on the user of the TDR meter, and the user needs to have certain operation capability related to technical knowledge and specifications to ensure the correctness of the measurement data and the safety of the meter in use.
The above problems limit the application range of the measurement method using the TDR meter, and the measurement method using the TDR meter is generally limited to the development and debugging stage, the fault location, or the relatively independent passive component production measurement, but in practice, it is more necessary to be able to quickly complete the impedance test evaluation on the independent transmission channel or the device-level component, and no matter in the product generation measurement stage or the actual application stage of the product, if all the measurements are performed by the TDR meter, the operability is not provided, and the impedance test evaluation speed is slow; because the measuring method adopting the TDR instrument has limitations, for the impedance measurement of the transmission channel in the production measuring stage and the application stage of the product, more, the impedance characteristic of the transmission channel to be measured is indirectly obtained through the error code measurement or the eye pattern measurement under the condition of interconnection or loopback of equipment chips, however, impedance discontinuities are not the only cause of high bit error rates or incomplete eye patterns, the error code test method or the eye pattern test method cannot directly reflect the discontinuous impedance factor of the transmission channel to be tested, such as broken PCB traces or large variations in line width, crimped pins or short-circuits of the connector, failure of the chip package, etc., these factors are the problems that need to be paid more attention to in the transmission channel of high-speed digital communication systems, and are the main cause of many failures.
As described above, currently, the impedance measurement method using error code measurement or eye pattern measurement cannot directly reflect the discontinuous impedance factor of the transmission channel to be measured, and the impedance measurement method using the TDR meter has great difficulty in executing in the mass production stage of the product or the actual application environment of the product, and cannot quickly complete the impedance test evaluation.
Disclosure of Invention
The embodiment of the invention provides a method and a device for measuring impedance of a transmission channel, aiming at solving the problem that the existing method for measuring the impedance of the transmission channel can not finish impedance test evaluation quickly.
The technical scheme of the invention is realized as follows:
the embodiment of the invention provides a method for measuring transmission channel impedance, which is applied to a device for measuring the transmission channel impedance, wherein the device comprises a step signal generator, and the method comprises the following steps:
sending the rapid step signal generated by the step signal generator to a test end of a transmission channel, wherein the transmission channel is a physical entity part for transmitting communication signals between a signal sending unit and a signal receiving unit;
acquiring a superimposed signal at the test end, wherein the superimposed signal represents the superimposition of the fast step signal and a reflection signal of the fast step signal at a point with discontinuous impedance in the transmission channel;
and obtaining the impedance value of the point with discontinuous impedance in the transmission channel according to the level amplitude of the quick step signal and the level amplitude of the superposed signal.
The embodiment of the invention also provides a device for measuring the impedance of the transmission channel, which comprises a signal receiving and transmitting unit and a signal processing unit, wherein the signal receiving and transmitting unit comprises a step signal generator; wherein the content of the first and second substances,
the signal receiving and sending unit is used for sending the rapid step signal generated by the step signal generator to a test end of a transmission channel, and the transmission channel is a physical entity part for transmitting communication signals between the signal sending unit and the signal receiving unit; acquiring a superimposed signal at the test end, wherein the superimposed signal represents the superimposition of the fast step signal and a reflection signal of the fast step signal at a point with discontinuous impedance in the transmission channel;
and the signal processing unit is used for obtaining the impedance value of the point with discontinuous impedance in the transmission channel according to the level amplitude of the quick step signal and the level amplitude of the superposed signal.
The embodiment of the invention provides a method and a device for detecting impedance of a transmission channel, firstly, a rapid step signal generated by a step signal generator is sent to a test end of the transmission channel, and the transmission channel is a physical entity part for transmitting communication signals between a signal sending unit and a signal receiving unit; then, acquiring a superimposed signal at the test end, wherein the superimposed signal represents the superimposition of the fast step signal and a reflection signal of the fast step signal at a point with discontinuous impedance in the transmission channel; and finally, obtaining the impedance value of the point with discontinuous impedance in the transmission channel according to the level amplitude of the quick step signal and the level amplitude of the superposed signal. Therefore, the impedance measurement is carried out on the transmission channel based on the connection relation between the signal sending unit, the signal receiving unit or the signal transceiving unit and the transmission channel, the implementation of the technical scheme is simple and easy, and the impedance test can be rapidly completed.
Drawings
FIG. 1 is a diagram of a hardware connection of an impedance measurement system using a TDR meter according to an embodiment of the present invention;
fig. 2 is a first flowchart of a method for measuring impedance of a transmission channel according to an embodiment of the present invention;
fig. 3 is a hardware connection diagram of a digital communication system according to an embodiment of the present invention;
FIG. 4 is a schematic circuit diagram of a TDR system for measuring impedance according to an embodiment of the present invention;
fig. 5 is a hardware connection diagram of a signal transceiver unit using Serdes (Serializer-Deserializer) technology according to an embodiment of the present invention;
fig. 6 is a second flowchart of a method for measuring impedance of a transmission channel according to an embodiment of the present invention;
fig. 7 is a schematic diagram illustrating a structure of a signal transceiver unit using the Seders technique according to an embodiment of the present invention;
fig. 8 is a schematic structural diagram of a signal transceiving unit using the Seders technology according to an embodiment of the present invention;
fig. 9 is a schematic diagram showing a structure of a signal transceiving unit using the Seders technology according to an embodiment of the present invention;
fig. 10 is a schematic structural diagram of a signal transceiving unit using the Seders technology according to an embodiment of the present invention;
fig. 11 is a schematic structural diagram of a device for measuring impedance of a transmission channel according to an embodiment of the present invention.
Detailed Description
The present invention will be described in further detail below with reference to the accompanying drawings and examples. It should be understood that the specific embodiments described herein are merely illustrative of the invention and are not intended to limit the invention.
Example one
An embodiment of the present invention provides a method for measuring impedance of a transmission channel, where the method is applied to a device for measuring impedance of a transmission channel, where the device includes a step signal generator, as shown in fig. 2, and the method may include:
s201: and sending the rapid step signal generated by the step signal generator to a test end of a transmission channel, wherein the transmission channel is a physical entity part for transmitting communication signals between the signal sending unit and the signal receiving unit.
In the embodiment of the invention, the measuring device of the transmission channel impedance comprises a signal transceiving unit, the signal transceiving unit comprises a signal sending unit and a signal receiving unit, a step signal generator in the signal sending unit or the signal receiving unit generates a rapid step signal, when in use, a PCB is used as a carrier for electrical connection, and when in use, the PCB is more required to be used as the carrier when a communication signal is transmitted between the signal sending unit and the signal receiving unit, namely, the transmission channel of the communication signal is formed by any components in components such as a PCB circuit, a PCB through hole, a PCB connector, a PCB chip package and the like, wherein the signal sending unit is used as a sending end of the communication signal, the signal receiving unit is used as a receiving end of the communication signal, the sending end and the receiving end can be positioned in the same integrated circuit chip, and the transmission channel capable of measuring the impedance value between the sending end and the receiving end, for example, the transmission channel to be tested between the signal sending unit and the signal receiving unit in one integrated circuit chip may be formed by PCB lines and PCB through holes in a PCB of one integrated circuit chip.
Illustratively, as shown in fig. 3, a hardware connection diagram of a digital communication system, a transmission channel of the digital communication system is composed of three parts, namely, a signal sending unit 301 in an integrated circuit chip, a signal receiving unit 302 in the integrated circuit chip, and a back plate 303, wherein the transmission channel of the signal sending unit 301 includes a PCB chip package, a PCB circuit, a PCB through hole, and a PCB connector, the transmission channel of the back plate 303 includes a PCB circuit, a PCB through hole, and a PCB connector, and the transmission channel of the signal receiving unit 302 includes a PCB chip package, a PCB circuit, a PCB through hole, and a PCB connector, and the transmission channel to be tested may include any several parts of the signal sending unit 301, the signal receiving unit 302, and the back plate 303.
Exemplarily, when the signal sending unit 301 is docked with the signal receiving unit 302, the transmission channel to be tested may include the transmission channels of the three parts, where, for example, the signal sending unit 301 in the integrated circuit chip with the impedance measurement function is provided with a step signal generator, an output end of the signal sending unit 301 is connected to a test end of the transmission channel to be tested, the step signal generator generates a fast step signal, and the fast step signal is sent to the test end of the transmission channel to be tested through an output end of the signal sending unit 301, so as to measure the impedance of the transmission channel to be tested; the fast step signal refers to a signal with a short rising edge time, for example, the rising edge time of the fast step signal may be 10 picoseconds; the transmission channel to be tested is a transmission channel for transmitting signals from the signal transmitting unit 301 to the signal receiving unit 302 in the transmission channel composed of the three parts.
Illustratively, when the signal sending unit 301 and the signal receiving unit 302 are docked, the transmission channel to be tested may include a transmission channel of an integrated circuit chip and a transmission channel of the backplane 303, and in an example, when the signal sending unit 301 and the signal receiving unit 302 having an impedance measurement function are docked through the backplane 303, the signal receiving unit 302 is provided with a step signal generator, the step signal generator generates a fast step signal, the fast step signal is sent to a test end of the transmission channel to be tested through an output end of the signal receiving unit 302, and impedance in the transmission channel to be tested is measured, where the transmission channel to be tested is a transmission channel in which the signal sending unit 301 sends a signal to the signal receiving unit 302 in the transmission channel composed of the integrated circuit chip and the backplane 303.
Further, the signal transceiving unit in the integrated circuit chip with the impedance detection function may include a step signal generator, a waveform detector, a signal selector, a mode selection switch, and a function register, where a rising edge time of a fast step signal generated by the step signal transmitter is equal to a preset time duration, the preset time duration of the integrated circuit chip may be set according to a resolution requirement, and the resolution refers to a minimum length of a point where impedance discontinuity can be measured by the integrated circuit chip; the input end of the signal selector is respectively connected with the step signal generator and the processing module related to the communication signal, the output end of the signal selector is indirectly or directly connected with the mode selection switch and used for carrying out either-of-two output on the communication signal and the quick step signal, when the step signal generator is detected to generate the quick step signal, the function register controls the signal selector to output the quick step signal, otherwise, the signal selector outputs the communication signal, and the integrated circuit chip executes the normal communication signal transmission function; the mode selection switch can be a multi-way switch of selecting 1 from 2, one end of the mode selection switch is respectively connected with the waveform detector and the output end of the signal selector, the other end of the mode selection switch is connected with a signal output pin of the integrated circuit chip, the signal output pin is connected with the test end of the transmission channel to be tested, the mode selection switch defaults to connect the signal transmission link between the output end of the signal selector and the test end of the transmission channel to be tested, at the moment, the communication signal or the fast step signal output by the signal selector is sent to the test end of the transmission channel to be tested, when the functional register leaves the test end of the transmission channel to be tested when detecting the rising edge of the fast step signal, the mode selection switch is controlled to communicate the signal transmission link between the waveform detector and the test end of the transmission channel to be tested, enabling the waveform detector to collect a signal of the transmission channel to be tested from a test end of the transmission channel to be tested; the function registers are used to store control commands, status or data for the step signal generator, the waveform detector, the signal selector and the mode selection switch.
Further, the integrated circuit chip may be a chip using the Seders technology, which refers to a point-to-point serial communication technology, that is, a plurality of paths of low-speed parallel signals are converted into high-speed serial signals at a transmitting end, and the high-speed serial signals are converted into low-speed parallel signals at a receiving end through a transmission medium (an optical cable or a copper wire).
S202: and acquiring a superposed signal at the test end, wherein the superposed signal represents superposition of the fast step signal and a reflection signal of the fast step signal at a point with discontinuous impedance in the transmission channel.
In the embodiment of the invention, when detecting that the step signal generator generates a fast step signal, the functional register controls the signal selector to output the fast step signal, controls the mode selection switch to communicate the output end of the signal selector with a signal transmission link between the test ends of the transmission channels to be tested, at the moment, the fast step signal is sent to the test end of the transmission channel to be tested, the fast step signal is used as an incident signal of the transmission channel to be tested, the incident signal is reflected when encountering a point with discontinuous impedance in the transmission channel to be tested to generate a reflection signal opposite to an incident signal method, a superposed signal obtained by superposing the incident signal and the reflection signal is transmitted to the test end of the transmission channel to be tested, in order to acquire a superposed signal at the test end of the transmission channel to be tested, the functional register detects that the rising edge of the fast step signal leaves the test end of the transmission channel to be tested, and controlling the mode selection switch to act, disconnecting the signal transmission link between the output end of the signal selector and the test end of the transmission channel to be tested, and communicating the signal transmission link between the waveform detector and the test end of the transmission channel to be tested, so that the waveform detector acquires a superposed signal from the test end of the transmission channel to be tested, the superposed signal is a voltage waveform which changes along with time, the superposed signal is sampled at equal intervals, and the sampling time and the level amplitude of each sampling point are recorded.
S203: and obtaining the impedance value of the point of impedance discontinuity in the transmission channel according to the level amplitude of the quick step signal and the level amplitude of the superposed signal.
In the embodiment of the invention, after the waveform detector obtains the sampling value of the superposed signal, the functional register controls the waveform detector to send the sampling value to the signal processing units such as a CPU (central processing unit), a Field Programmable Gate Array (FPGA) and the like, and the signal processing units calculate the impedance value of the point with discontinuous impedance in the transmission channel to be measured according to the level amplitude of each sampling value and the level amplitude of the incident signal; when the impedance value corresponding to any one sampling value is larger than or equal to the preset impedance threshold value, the impedance discontinuity point corresponding to the sampling value has a larger influence on the transmission of the signal, and the distance between the impedance discontinuity point corresponding to the sampling value and the test end is obtained according to the sampling time of the sampling value and the transmission speed of the superposed signal, so that the position of the impedance discontinuity point corresponding to the sampling value is accurately positioned.
Further, in order to obtain the position of the impedance discontinuity point, it is necessary to keep the operation clocks of the signal transmitting unit and the signal receiving unit in the integrated circuit chip having the impedance detection function, which transmit the communication signal, in synchronization with the operation clocks of the step signal generator, the waveform detector, the signal selector, the mode selection switch, and the function register.
Illustratively, a schematic circuit diagram of a TDR system for measuring impedance as shown in fig. 4, the TDR system includes: the measurement device comprises a transmission line 403 consisting of a step signal generator 401, a sampling oscilloscope 402 and a measurement probe or a measurement fixture, wherein the step signal generator 401 is used for generating a fast step signal, and the sampling oscilloscope 402 is used for processing a signal and displaying a waveform curve of the signal; the impedance measurement process of the TDR system is as follows: the step signal generator 401 generates a fast step signal, outputs an incident signal after internal impedance voltage division of the step signal generator, transmits the incident signal to the transmission channel 404 to be detected through the transmission line 403, the incident signal is reflected at any point with discontinuous impedance in the transmission channel 404 to be detected to generate a reflected signal, the reflected signal and the incident signal are superposed to generate a superposed signal, the sampling oscilloscope 402 acquires the voltage waveform of the superposed signal at the source end of the transmission line 403, and the voltage V of the superposed signalmeasuredEqual to the voltage V of the incident signalincidentAnd voltage V of reflected signalreflectedThen, the sampling oscilloscope 402 calculates the impedance Z of the transmission channel to be measuredCUTThe process of (2) may be: the step signal generator generates a fast step signal having a level amplitude equal to V when the internal impedance R of the step signal generator is appliedsourceEqual to 50 Ω, impedance Z of transmission line 4030Voltage V of incident signal is equal to 50 omegaincidentComprises the following steps: v incident1/2V, based on the measured voltage VmeasuredExpression (c): vmeasured＝Vincident+VreflectedThe reflection coefficient ρ can be obtained as expressed by the formula (1):
voltage V of reflected signalreflectedExpressed as formula (2):
obtaining the impedance Z of the transmission channel to be measuredCUTExpressed as formula (3):
the impedance characteristic curve of the transmission channel to be tested can be obtained by combining the sampling time of the sampling oscilloscope 402, and is displayed on the screen of the sampling oscilloscope 402.
It should be noted that the signal sending unit, the signal receiving unit, or the signal transceiving unit in the integrated circuit chip with the impedance detection function includes a waveform detector, and the waveform detector can calculate the impedance of the transmission channel to be detected based on the circuit principle of measuring impedance of the TDR system; wherein, the measurement accuracy of the impedance depends on the vertical sampling accuracy of the waveform detector, and taking a fast step signal with a level amplitude equal to 1V as an example, assuming that the vertical sampling accuracy is 10mV, the impedance of the signal output end of the integrated circuit chip is 50 Ω, and 0.5V (Z) can be obtainedCUT-50)/(ZCUT+50) 10mV, then ZCUT52 omega, if the reflection signal is larger, the impedance Z of the transmission channel to be measured is largerCUTThe larger.
Therefore, in the embodiment of the present invention, a signal sending unit, a signal receiving unit, or a signal transceiving unit including a step signal generator sends a fast step signal generated by the step signal generator to a test end of a transmission channel, where the transmission channel is a physical entity part of a transmission communication signal between the signal sending unit and the signal receiving unit, and then obtains a superimposed signal at the test end, where the superimposed signal represents a superposition of the fast step signal and a point of impedance discontinuity in the transmission channel on a reflection signal of the fast step signal, and obtains an impedance value of the point of impedance discontinuity in the transmission channel according to a level amplitude of the fast step signal and a level amplitude of the superimposed signal; the impedance detection is carried out on the transmission channel based on the connection relation between the signal sending unit, the signal receiving unit or the signal transceiving unit and the transmission channel, the implementation of the technical scheme is simple and easy, and the impedance test can be completed quickly.
Example two
In order to further embody the object of the present invention, the above embodiments are further illustrated.
The second embodiment of the present invention provides a method for measuring impedance of a transmission channel, where the method is applied to a signal transceiving unit adopting Seders technology, and the signal transceiving unit can be implemented on the basis of the signal transceiving unit 50 shown in fig. 5, where the signal transceiving unit 50 mainly includes a signal transmitting unit 51 and a signal receiving unit 52, and the signal transmitting unit 51 may include: a first measurement module 510, a parallel-to-serial module 511, a feed-forward equalizer 512, a driver 513, a first signal selector 514 and a second signal selector 515, wherein the first measurement unit 510 is composed of a first pattern generator 510-1 and a first pattern detector 510-2; the signal receiving unit 52 may include: a second measurement module 520, a serial-to-parallel module 521, a decision feedback equalizer 522, a receiver 523, an eye diagram oscilloscope 524, a third signal selector 525 and a fourth signal selector 526, wherein the second measurement module 520 consists of a second code pattern detector 520-1 and a second code pattern generator 520-2;
the module functions and connection relationships of the signal sending unit 51 are as follows: the first measuring module 510 is used for performing error code testing, the first pattern generator 510-1 is used for generating digital waveforms and digital signals, the first pattern detector 510-2 is used for detecting the error rate of signals of a transmission channel, the parallel-serial module 511 is used for converting multiple parallel signals into serial signals, the feedforward equalizer 512 is used for preprocessing filtering the signals, the driver 513 is used for adjusting the amplitude of the signals, the first signal selector 514 and the second signal selector 515 are used for selecting and outputting two input signals, a communication signal receiving end connected with an external device and an output end of the first pattern generator 510-1 are connected with two input ends of the first signal selector 514, an output end of the first signal selector 514 is connected with one input end of the second signal selector 515, the other input end of the second signal selector 515 is connected with an output end of the serial-parallel module 521, the output end of the second signal selector 515 is connected to the input end of the parallel-to-serial module 511, the output end of the parallel-to-serial module 511 is connected to the input end of the forward feedback equalizer 512, the output end of the forward feedback equalizer 512 is connected to the input end of the driver 513, one output end of the driver 513 is connected to the signal output pin of the signal transmitting unit 51, the other output end of the driver 513 is connected to the first pattern detector 510-2, the signal output pin of the signal transmitting unit 51 and the signal receiving pin of the signal receiving unit 52 can be butted through an outer loop link;
the module functions and connection relationships of the signal receiving unit 52 are as follows: the second measuring module 520 is used for performing error code testing, the second code generator 520-1 is used for generating digital waveforms and digital signals, the second code detector 520-2 is used for detecting the error rate of signals of a transmission channel, the serial-parallel module 521 is used for converting multi-channel parallel signals into serial signals, the decision feedback equalizer 522 is used for eliminating intersymbol interference in the signals, the receiver 523 is used for adjusting the amplitude of the signals, the eye chart oscilloscope 524 is used for displaying graphs after a series of digital signals are accumulated, the third signal selector 525 and the fourth signal selector 526 are used for selecting one of two input signals to output, a signal receiving pin of the signal receiving unit 52 is connected with the input end of the receiver 523, the output end of the receiver 523 is connected with one input end of the third signal selector 525, the other input end of the third signal selector 525 is connected with the output end of the fourth signal selector 526, an output end of the third signal selector 525 is connected to an input end of the decision feedback equalizer 522, an output end of the decision feedback equalizer 522 is connected to an input end of the serial-parallel module 521 and an input end of the eye chart oscilloscope 524, an output end of the serial-parallel module 521 is connected to a communication signal transmitting end connected to an external device, an input end of the second pattern detector 520-2 and one input end of the second signal selector 515, an output end of the second pattern generator 520-1 is connected to one input end of the fourth signal selector 526, and another input end of the fourth signal selector 526 is connected to an output end of the driver 513 connected to a signal output pin.
The signal transceiver unit further includes a step signal generator and a waveform detector, and as shown in fig. 6, a flowchart of a method for measuring impedance of a transmission channel is shown in a second embodiment, and the method may include:
s601: and sending the rapid step signal generated by the step signal generator to a test end of a transmission channel to be tested, wherein the transmission channel to be tested is a physical entity part for transmitting communication signals between a signal sending unit and a signal receiving unit in the signal receiving and sending unit.
In the embodiment of the present invention, the signal transceiver unit may include a step signal generator, a waveform detector, a function register, a signal selector, and a mode selection switch, and specifically, the signal transceiver unit may implement an impedance detection function based on the hardware connection manner shown in fig. 7, a first step signal generator 711, a first waveform detector 712, a first function register 713, a fifth signal selector 714, and a first mode selection switch 715 are disposed in a signal transmitting unit 71 included in the signal transceiver unit 70, wherein an output terminal of the first step signal generator 711 is connected to one input terminal of the fifth signal selector 714, another input terminal of the fifth signal selector 714 is connected to the forward feedback equalizer 512, an output terminal of the fifth signal selector 714 is connected to an input terminal of the driver 513, one terminal of the first mode selection switch 715 is respectively connected to an output terminal of the driver 513 and an input terminal of the first waveform detector 712, the other end of the first mode selection switch 715 is connected to the testing end of the transmission channel to be tested.
Illustratively, the signal transceiving unit 70 is in a normal operation mode by default, that is, the fifth signal selector 714 outputs the serial signal processed by the feedforward equalizer 512, the first mode selection switch 715 connects the switch between the output end of the driver 513 and the test end of the transmission channel to be tested, so as to send the serial signal to the transmission channel to be tested through the driver 513, when the impedance of the transmission channel to be tested needs to be measured, the signal transceiving unit 70 is switched to the impedance detection mode, that is, the first function register 713 controls the first step signal generator 711 to generate the fast step signal, and at the same time, the first function register 713 controls the fifth signal selector 714 to output the fast step signal, so as to send the fast step signal to the test end of the transmission channel to be tested through the driver 513.
In the embodiment of the present invention, the signal transceiver unit may further implement an impedance detection function based on the hardware connection manner shown in fig. 8, where the first pattern generator 510-1 in the signal transmitter unit 81 included in the signal transceiver unit 80 is used as a step signal generator, and the signal transmitter unit 81 is provided with a second waveform detector 812, a second function register 813, a sixth signal selector 814 and a second mode selection switch 815, where one output terminal of the first pattern generator 510-1 is connected to one input terminal of the sixth signal selector 814, the other input terminal of the sixth signal selector 814 is connected to the feedforward equalizer 512, the output terminal of the sixth signal selector 814 is connected to the input terminal of the driver 513, one terminal of the second mode selection switch 815 is respectively connected to the output terminal of the driver 513 and the input terminal of the second waveform detector 812, the other end of the second mode selection switch 815 is connected to the test end of the transmission channel to be tested.
Illustratively, the signal transceiver unit 80 is in a normal operation mode by default, that is, the first pattern generator 510-1 is used to output an error detection signal, the sixth signal selector 814 outputs a serial signal processed by the feedforward equalizer 512, the second mode selection switch 815 is connected to a switch between the output terminal of the driver 513 and the test terminal of the transmission channel to be tested, so as to transmit the serial signal to the transmission channel to be tested through the driver 513, when the impedance of the transmission channel to be tested needs to be measured, the signal transceiver unit 80 switches to the impedance detection mode, that is, the second function register 813 controls the first pattern generator 510-1 to generate a fast step signal and transmit the fast step signal to one input terminal of the sixth signal selector 814 through the step signal transmission path, and at the same time, the second function register 813 controls the sixth signal selector 814 to output the fast step signal, thereby sending the fast step signal to the test end of the transmission channel under test through the driver 513.
In the embodiment of the present invention, the signal transceiver unit may further implement an impedance detection function based on the hardware connection manner shown in fig. 9, where the first pattern generator 510-1 in the signal transmitter unit 91 included in the signal transceiver unit 90 is used as a step signal generator, a third functional register 913, a seventh signal selector 914 and a third mode selection switch 915 are disposed in the signal transmitter unit 91, and a third waveform detector 922 and a fourth functional register 923 are disposed in the signal receiver unit 92, where one output end of the first pattern generator 510-1 is connected to one input end of the seventh signal selector 914, the other input end of the seventh signal selector 914 is connected to the forward feedback equalizer 512, an output end of the seventh signal selector 914 is connected to the input end of the driver 513, one end of the third mode selection switch is respectively connected to the output end of the driver 513 and the input end of the third pattern detector 922, the other end of the third mode selection switch 915 is connected to the test end of the transmission channel to be tested.
Illustratively, the signal transceiver unit 90 is in a normal operation mode by default, that is, the first pattern generator 510-1 is used to output an error detection signal, the seventh signal selector 914 outputs a serial signal processed by the feedforward equalizer 512, the third mode selection switch 915 is connected to a switch between the output terminal of the driver 513 and the test terminal of the transmission channel to be tested, so as to transmit the serial signal to the transmission channel to be tested through the driver 513, when the impedance of the transmission channel to be tested needs to be measured, the signal transceiver unit 90 switches to the impedance detection mode, that is, the third function register 913 controls the first pattern generator 510-1 to generate a fast step signal and transmit the fast step signal to an input terminal of the seventh signal selector 914 through the step signal transmission path, and meanwhile, the third function register 913 controls the seventh signal selector 914 to output the fast step signal, thereby sending the fast step signal to the test end of the transmission channel under test through the driver 513.
In the embodiment of the present invention, the signal transceiver unit may further implement an impedance detection function based on the hardware connection manner shown in fig. 10, a second step signal generator 1011, a fifth function register 1013, an eighth signal selector 1014, and a fourth mode selection switch 1015 are disposed in a signal transmitting unit 1001 included in the signal transceiver unit 1000, a fourth waveform detector 1022 and a sixth function register 1023 are disposed in a signal receiving unit 1002, wherein an output terminal of the second step signal generator 1011 is connected to one input terminal of the eighth signal selector 1014, another input terminal of the eighth signal selector 1014 is connected to the feedforward equalizer 512, an output terminal of the eighth signal selector 1014 is connected to an input terminal of the driver 513, one terminal of the fourth mode selection switch 1015 is connected to an output terminal of the driver 513 and an input terminal of the fourth waveform detector 1022 respectively, the other end of the fourth mode selection switch 1015 is connected to the test end of the transmission channel to be tested.
Illustratively, the signal transceiver unit 1000 is in a normal operation mode by default, that is, the eighth signal selector 1014 outputs the serial signal processed by the feedforward equalizer 512, the fourth mode selection switch 1015 is connected to a switch between the output terminal of the driver 513 and the test terminal of the transmission channel to be tested, so as to transmit the serial signal to the transmission channel to be tested through the driver 513, when the impedance of the transmission channel to be tested needs to be measured, the signal transceiver unit 1000 switches to the impedance detection mode, that is, the fifth function register 1013 controls the second step signal generator 1011 to generate the fast step signal, and at the same time, the fifth function register 1013 controls the eighth signal selector 1014 to output the fast step signal, so as to transmit the fast step signal to the test terminal of the transmission channel to be tested through the driver 513.
S602: and acquiring a superposed signal at the test end by using a waveform detector, wherein the superposed signal represents the superposition of the fast step signal and a reflection signal of the fast step signal at a point with discontinuous impedance in the transmission channel.
Illustratively, based on the hardware connection manner shown in fig. 7, when the first functional register 713 detects that the rising edge of the fast step signal leaves the test end of the transmission channel to be tested, the first functional register 713 controls the first mode selection switch 715 to operate, so as to open the switch between the output end of the driver 513 and the test end of the transmission channel to be tested, and connect the switch between the first waveform detector 712 and the test end of the transmission channel to be tested, so that the first waveform detector 712 collects the superimposed signal from the test end of the transmission channel to be tested.
Illustratively, based on the hardware connection manner shown in fig. 8, when the second functional register 813 detects that the rising edge of the fast step signal leaves the testing end of the transmission channel to be tested, the second functional register 813 controls the second mode selection switch 815 to operate, so as to turn off the switch between the output end of the driver 513 and the testing end of the transmission channel to be tested, and turn on the switch between the second waveform detector 812 and the testing end of the transmission channel to be tested, so that the second waveform detector 812 collects the superimposed signal from the testing end of the transmission channel to be tested.
Illustratively, based on the hardware connection manner shown in fig. 9, when the third functional register 913 detects that the rising edge of the fast step signal leaves the test end of the transmission channel to be tested, the third functional register 913 controls the third mode selection switch 915 to operate, the switch between the output end of the driver 513 and the test end of the transmission channel to be tested is turned off, the switch between the third waveform detector 922 and the test end of the transmission channel to be tested is connected, and the fourth functional register 923 controls the third waveform detector 922 to collect the superimposed signal from the test end of the transmission channel to be tested.
Illustratively, based on the hardware connection manner shown in fig. 10, when the fifth function register 1013 detects that the rising edge of the fast step signal leaves the test end of the transmission channel to be tested, the fifth function register 1013 controls the fourth mode selection switch 1015 to operate, so as to turn off the switch between the output end of the driver 513 and the test end of the transmission channel to be tested and turn on the switch between the fourth waveform detector 1022 and the test end of the transmission channel to be tested, and the sixth function register 1023 controls the fourth waveform detector 1022 to collect the superimposed signal from the test end of the transmission channel to be tested.
S603: and obtaining the impedance value of the point of impedance discontinuity in the transmission channel according to the level amplitude of the quick step signal and the level amplitude of the superposed signal.
For example, based on the hardware connection manner shown in fig. 7, after the first waveform detector 712 obtains the sampling value of the superimposed signal, the first functional register 713 may control the first waveform detector 712 to send the sampling value to a signal processing unit such as a CPU, an FPGA, or the like, and the signal processing unit calculates the impedance value of the point where the impedance is discontinuous in the transmission channel to be measured according to the level amplitude of each sampling value and the level amplitude of the incident signal.
For example, based on the hardware connection manner shown in fig. 8, after the second waveform detector 812 obtains the sampling value of the superimposed signal, the second functional register 813 may control the second waveform detector 812 to send the sampling value to a signal processing unit such as a CPU, an FPGA, or the like, and the signal processing unit calculates the impedance value of the point where the impedance is discontinuous in the transmission channel to be measured according to the level amplitude of each sampling value and the level amplitude of the incident signal.
For example, based on the hardware connection manner shown in fig. 9, after the third waveform detector 922 obtains the sampling value of the superimposed signal, the fourth functional register 923 may control the third waveform detector 922 to send the sampling value to a signal processing unit such as a CPU, an FPGA, or the like, and the signal processing unit calculates the impedance value of the point where the impedance is discontinuous in the transmission channel to be measured according to the level amplitude of each sampling value and the level amplitude of the incident signal.
For example, based on the hardware connection manner shown in fig. 10, after the fourth waveform detector 1022 obtains the sampling value of the superimposed signal, the sixth functional register 1023 may control the fourth waveform detector 1022 to send the sampling value to a signal processing unit such as a CPU or an FPGA, and the signal processing unit calculates the impedance value of the point where the impedance is discontinuous in the transmission channel to be measured according to the level amplitude of each sampling value and the level amplitude of the incident signal.
Therefore, in the embodiment of the invention, the signal transceiver unit comprising the step signal generator sends the fast step signal generated by the step signal generator to the test end of the transmission channel to be tested, and the transmission channel to be tested is a physical entity part for sending the communication signal to the signal receiver unit by the signal sending unit in the signal transceiver unit; acquiring a superposed signal at a test end by using a waveform detector, wherein the superposed signal represents superposition of the fast step signal and a reflection signal of the fast step signal at a point with discontinuous impedance in a transmission channel; obtaining the impedance value of a point with discontinuous impedance in the transmission channel according to the level amplitude of the rapid step signal and the level amplitude of the superposed signal; therefore, the impedance detection is carried out on the transmission channel based on the connection relation between the signal sending unit, the signal receiving unit and the transmission channel, the implementation of the technical scheme is simple and easy, and the impedance test can be rapidly completed.
EXAMPLE III
In order to further embody the purpose of the present invention, a further example is provided on the basis of the foregoing method embodiment.
A third embodiment of the present invention provides a device for measuring impedance of a transmission channel, as shown in fig. 11, the device 1100 includes a signal transceiver unit 1101 and a signal processing unit 1102, where the signal transceiver unit 1101 includes a third step signal generator 1103; wherein the content of the first and second substances,
the signal transceiver 1101 is configured to send the fast step signal generated by the third step signal generator 1103 to a test end of a transmission channel, where the transmission channel is a physical entity part of a transmission communication signal between the signal sending unit and the signal receiving unit; acquiring a superposed signal at the test end, wherein the superposed signal represents superposition of the rapid step signal and a reflection signal of the rapid step signal at a point with discontinuous impedance in the transmission channel;
the signal processing unit 1102 is configured to obtain an impedance value of a point where impedance in the transmission channel is discontinuous according to the level amplitude of the fast step signal and the level amplitude of the superimposed signal.
Optionally, the rising edge time of the fast step signal is equal to the preset time length.
Optionally, the signal transceiving unit 1101 is specifically configured to disconnect the signal transmission link between the third step signal generator 1103 and the test end when detecting that the rising edge of the fast step signal leaves the test end of the transmission channel.
Optionally, the signal transceiver unit 1101 is further configured to, after obtaining an impedance value of a point where impedance in the transmission channel is discontinuous according to the level amplitude of the fast step signal and the level amplitude of the superimposed signal, obtain, when the impedance value is greater than or equal to a preset impedance threshold, a distance between the point where impedance is discontinuous and the test end according to a sampling time of the superimposed signal.
In practical applications, the Signal Processing Unit 1102 may be at least one of an Application Specific Integrated Circuit (ASIC), a Digital Signal Processor (DSP), a Digital Signal Processing Device (DSPD), a Programmable Logic Device (PLD), a Field Programmable Gate Array (FPGA), a Central Processing Unit (CPU), a controller, a microcontroller, and a microprocessor.
As will be appreciated by one skilled in the art, embodiments of the present invention may be provided as a method, system, or computer program product. Accordingly, the present invention may take the form of a hardware embodiment, a software embodiment, or an embodiment combining software and hardware aspects. Furthermore, the present invention may take the form of a computer program product embodied on one or more computer-usable storage media (including, but not limited to, disk storage, optical storage, and the like) having computer-usable program code embodied therein.
The present invention is described with reference to flowchart illustrations and/or block diagrams of methods, apparatus (systems), and computer program products according to embodiments of the invention. It will be understood that each flow and/or block of the flow diagrams and/or block diagrams, and combinations of flows and/or blocks in the flow diagrams and/or block diagrams, can be implemented by computer program instructions. These computer program instructions may be provided to a processor of a general purpose computer, special purpose computer, embedded processor, or other programmable data processing apparatus to produce a machine, such that the instructions, which execute via the processor of the computer or other programmable data processing apparatus, create means for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing apparatus to function in a particular manner, such that the instructions stored in the computer-readable memory produce an article of manufacture including instruction means which implement the function specified in the flowchart flow or flows and/or block diagram block or blocks.
These computer program instructions may also be loaded onto a computer or other programmable data processing apparatus to cause a series of operational steps to be performed on the computer or other programmable apparatus to produce a computer implemented process such that the instructions which execute on the computer or other programmable apparatus provide steps for implementing the functions specified in the flowchart flow or flows and/or block diagram block or blocks.
The above description is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention.
Claims (8)
1. A method for measuring impedance of a transmission channel, the method being applied to a device for measuring impedance of a transmission channel, the device comprising a step signal generator, the method comprising:
sending the rapid step signal generated by the step signal generator to a test end of a transmission channel, wherein the transmission channel is a physical entity part for transmitting communication signals between a signal sending unit and a signal receiving unit;
acquiring a superimposed signal at the test end, wherein the superimposed signal represents the superimposition of the fast step signal and a reflection signal of the fast step signal at a point with discontinuous impedance in the transmission channel;
and obtaining the impedance value of the point with discontinuous impedance in the transmission channel according to the level amplitude of the quick step signal and the level amplitude of the superposed signal.
2. The method of claim 1, wherein the rising edge time of the fast step signal is equal to a preset time duration.
3. The method of claim 1, further comprising:
and when the rising edge of the rapid step signal is detected to leave the test end of the transmission channel, disconnecting the signal transmission link between the step signal generator and the test end.
4. The method of claim 1, wherein after obtaining the impedance value of the point of impedance discontinuity in the transmission channel based on the magnitude of the level of the fast step signal and the magnitude of the level of the superimposed signal, the method further comprises:
and when the impedance value is larger than or equal to a preset impedance threshold value, obtaining the distance between the impedance discontinuous point and the test end according to the sampling time of the superposed signal.
5. The device for measuring the impedance of the transmission channel is characterized by comprising a signal transceiving unit and a signal processing unit, wherein the signal transceiving unit comprises a step signal generator; wherein the content of the first and second substances,
the signal receiving and transmitting unit is used for transmitting the rapid step signal generated by the step signal generator to a testing end of a transmission channel, and the transmission channel is a physical entity part for transmitting communication signals between the signal transmitting unit and the signal receiving unit; acquiring a superimposed signal at the test end, wherein the superimposed signal represents the superimposition of the fast step signal and a reflection signal of the fast step signal at a point with discontinuous impedance in the transmission channel;
and the signal processing unit is used for obtaining the impedance value of the point with discontinuous impedance in the transmission channel according to the level amplitude of the quick step signal and the level amplitude of the superposed signal.
6. The apparatus of claim 5, wherein the rising edge time of the fast step signal is equal to a preset time duration.
7. The apparatus according to claim 5, wherein the signal transceiving unit is configured to disconnect the signal transmission link between the step signal generator and the test end when detecting that the rising edge of the fast step signal leaves the test end of the transmission channel.
8. The apparatus according to claim 6, wherein the signal transceiver unit is further configured to, after obtaining the impedance value of the impedance discontinuity point in the transmission channel according to the level amplitude of the fast step signal and the level amplitude of the superimposed signal, obtain, when the impedance value is greater than or equal to a preset impedance threshold, a distance between the impedance discontinuity point and the test end according to a sampling time of the superimposed signal.
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| CN201811642333.9A CN111381104A (en) | 2018-12-29 | 2018-12-29 | Method and device for measuring impedance of transmission channel |
| PCT/CN2019/127565 WO2020135354A1 (en) | 2018-12-29 | 2019-12-23 | Method and device for measuring impedance of transmission channel |
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| CN201811642333.9A CN111381104A (en) | 2018-12-29 | 2018-12-29 | Method and device for measuring impedance of transmission channel |
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| CN113092867A (en) * | 2021-03-29 | 2021-07-09 | 上海橙科微电子科技有限公司 | Method, system and medium for testing continuity of impedance of light module transmission system through square wave |
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| WO2020135354A1 (en) | 2020-07-02 |
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