CN111357180B

CN111357180B - Gate driving circuit

Info

Publication number: CN111357180B
Application number: CN201980005744.3A
Authority: CN
Inventors: 张盘龙; 赵德琦; 吴壬华
Original assignee: Shenzhen Shinry Technologies Co Ltd
Current assignee: Shenzhen Shinry Technologies Co Ltd
Priority date: 2019-08-09
Filing date: 2019-08-09
Publication date: 2021-07-13
Anticipated expiration: 2039-08-09
Also published as: WO2021026702A1; CN111357180A

Abstract

The embodiment of the application discloses gate drive circuit includes: the power supply circuit comprises a rectifying circuit, an energy supply circuit, an amplifying circuit, a resistor, an MOS (metal oxide semiconductor) tube and a transformer; the first end of the transformer is connected with the first end of the amplifying circuit and the first end of the rectifying circuit, and the second end of the transformer is connected with the source electrode of the MOS tube and the second end of the energy supply circuit; the second end of the rectifying circuit is connected with the first end of the energy supply circuit and the second end of the amplifying circuit; the third end of the amplifying circuit is connected with the first end of the resistor; the second end of the resistor is connected with the grid electrode of the MOS tube; the drain electrode of the MOS tube is connected with an external circuit; the transformer is used for producing drive signal, and rectifier circuit is used for controlling energy supply circuit and charges, and amplifier circuit is used for enlargiing the drive signal that signal and transformer that energy supply circuit output produced, and the signal of amplifier circuit output is used for driving the MOS pipe, implements this application embodiment, can effectively strengthen the drive capability that the transformer provided to MOSFET gate pole drive circuit.

Description

Gate driving circuit

Technical Field

The application relates to the technical field of electronics, especially, relate to a gate drive circuit.

Background

With the development of switching power supplies and motor control technologies, Metal-Oxide-Semiconductor Field-Effect transistors (MOSFETs) gate driver circuits have been developed, and various MOSFET gate driver circuits have appeared in the market. The drive circuit is used for controlling the on-off operation of the MOSFET through a low-voltage signal.

Referring to fig. 1, as shown in fig. 1, a conventional transformer generally has two winding methods during winding, one is parallel winding of an original secondary wire, and the other is single winding of the original secondary wire. When the original secondary line is wound in parallel, the coupling degree is high, the leakage inductance is small, the driving capability is large, but the generated common-mode voltage is large; when the original secondary line is wound singly, the leakage inductance is large, the driving capability is small, and the common mode voltage is small.

A conventional gate drive circuit is shown in fig. 2, which has the following disadvantages: because the driving transformer T1 adopts the original secondary wire single-winding method, the transformer T1 has large leakage inductance and small voltage, so the driving capability of the transformer T1 to the MOSFET gate driving circuit is small, and a Metal-Oxide-Semiconductor (MOS) transistor in the driving circuit cannot be turned on, thereby providing energy for an external circuit.

Disclosure of Invention

The embodiment of the application provides a gate drive circuit, can avoid leading to the problem that transformer crowd's ability is not enough because former auxiliary line is singly wound among the prior art, has effectively strengthened the driving force that the transformer provided MOSFET gate drive circuit to switch on the MOS pipe.

In a first aspect, an embodiment of the present application provides a gate driving circuit, including: rectifier circuit, energy supply circuit, amplifier circuit, resistor, MOS pipe and transformer. The first end of the transformer is connected with the first end of the amplifying circuit and the first end of the rectifying circuit, and the second end of the transformer is connected with the source electrode of the MOS tube and the second end of the energy supply circuit; the second end of the rectifying circuit is connected with the first end of the energy supply circuit and the second end of the amplifying circuit; the third end of the amplifying circuit is connected with the first end of the resistor; the second end of the resistor is connected with the grid electrode of the MOS tube; the drain electrode of the MOS tube is connected with an external circuit; the transformer is used for producing drive signal, works as drive signal flows through when rectifier circuit, rectifier circuit is used for controlling energy supply circuit charges, amplifier circuit is used for right the signal of energy supply circuit output with the drive signal that the transformer produced is enlargied, the signal of amplifier circuit output is used for right the MOS pipe drives, the resistor is used for right the signal of amplifier circuit output carries out the current-limiting.

In one embodiment, the transformer includes a first coil and a second coil, the first coil includes a first end and a second end, the second coil includes a first end and a second end, the first end of the first coil and the first end of the second coil are homonymous ends, the first end of the transformer is the first end of the second coil, and the second end of the transformer is the second end of the second coil.

In one embodiment, the rectifier circuit includes a first rectifier diode and a second rectifier diode; and the first end of the second coil is connected with the cathode of the first rectifying diode and the anode of the second rectifying diode.

In one embodiment, the energy supply circuit comprises a first capacitor and a second capacitor, the second end of the second coil is connected to the first end of the first capacitor and the first end of the second capacitor, the anode of the first rectifier diode is connected to the second end of the first capacitor, and the cathode of the second rectifier diode is connected to the second end of the second capacitor.

In one embodiment, the amplification circuit includes a first semiconductor transistor and a second semiconductor transistor; the first end of the second coil is connected with the base electrode of the first semiconductor triode and the base electrode of the second semiconductor triode; the emitter electrode of the first semiconductor triode and the emitter electrode of the second semiconductor triode are connected with the first end of the resistor; the cathode of the second rectifier diode is connected with the collector of the second semiconductor triode, and the anode of the first rectifier diode is connected with the collector of the first semiconductor triode.

In one embodiment, the first semiconductor transistor is a PNP semiconductor transistor and the second semiconductor transistor is an NPN semiconductor transistor.

In one embodiment, the gate drive circuit further comprises: an input circuit for providing a drive signal to the transformer; the input circuit includes: the first end of the third capacitor is connected with the first end of the first coil of the transformer; and the anode of the power supply driving device is connected with the second end of the third capacitor, and the cathode of the power supply driving device is connected with the second end of the first coil of the transformer. The power supply driving device is used for providing a driving signal for the gate driving circuit, and the third capacitor is used for eliminating a direct current component in the driving signal.

In one embodiment, the turn-on voltage of the MOS transistor does not exceed 20 volts.

In one embodiment, the energy generated by the first capacitor is greater than the energy generated by the transformer drive signal.

In a second aspect, the present application further provides a charging device, which includes the gate driving circuit described in the first aspect and the optional embodiments thereof.

The embodiment of the application is implemented, the transformer generates a driving signal, when the driving signal flows through the rectifying circuit, the rectifying circuit controls the energy supply circuit to charge, the amplifying circuit amplifies the signal output by the energy supply circuit, the signal output by the amplifying circuit is used for driving the MOS transistor, the driving signal generated by the transformer is amplified by the embodiment of the application, and the driving capability of the transformer to a gate circuit is effectively improved.

Drawings

Reference will now be made in brief to the drawings that are needed in describing embodiments or prior art.

FIG. 1 is a schematic diagram of a structure of primary and secondary winding of a transformer in the prior art;

FIG. 2 is a schematic diagram of a gate driving circuit in the prior art;

fig. 3 is a schematic structural diagram of a gate driving circuit according to an embodiment of the present disclosure;

FIG. 4 is a schematic structural diagram of another gate driver circuit according to an embodiment of the present disclosure;

fig. 5 is a schematic structural diagram of another gate driving circuit provided in the embodiment of the present application;

fig. 6 is a schematic structural diagram of a charging device according to an embodiment of the present application.

Detailed Description

The technical solutions in the embodiments of the present application will be described below with reference to the drawings in the embodiments of the present application. It will be understood that the terms "comprises" and/or "comprising," when used in this specification and the appended claims, specify the presence of stated features, integers, steps, operations, elements, and/or components, but do not preclude the presence or addition of one or more other features, integers, steps, operations, elements, components, and/or groups thereof. Furthermore, the terms "first," "second," and "third," etc. are used to distinguish between different objects and are not used to describe a particular order.

It is to be understood that the terminology used in the embodiments of the present application is for the purpose of describing particular embodiments only, and is not intended to be limiting of the application. As used in the examples of this application and the appended claims, the singular forms "a", "an", and "the" are intended to include the plural forms as well, unless the context clearly indicates otherwise. It should also be understood that the term "and/or" as used herein refers to and encompasses any and all possible combinations of one or more of the associated listed items.

Fig. 3 is a schematic structural diagram of a gate driving circuit according to an embodiment of the present disclosure. As can be seen from fig. 3, the gate driving circuit 300 includes: the power supply circuit comprises a rectifying circuit 301, a power supply circuit 302, an amplifying circuit 303, a resistor R1, a MOS tube and a transformer T1.

The structure and function of the gate driving circuit 300 according to the embodiment of the present application will be described in detail below.

As shown in fig. 3, a first terminal 3001 of the transformer T1 is connected to the first terminal 3011 of the rectifying circuit 301 and the first terminal 3031 of the amplifying circuit 303, and a second terminal 3002 of the transformer T1 is connected to the second terminal 3022 of the power supply circuit and the source of the MOS transistor; the second end 3012 of the rectifying circuit 301 is connected to the first end 3021 of the power supply circuit 302 and the second end 3032 of the amplifying circuit 303; the third end of the amplifying circuit 303 is connected with the first end 3003 of the resistor R1; the second end 3004 of the resistor R1 is connected to the gate of the MOS transistor, and the drain of the MOS transistor is connected to the external circuit.

The working principle of the gate drive circuit provided by the embodiment of the application is as follows: the transformer T1 is used for generating a driving signal, when the driving signal flows through the rectifying circuit 301, the rectifying circuit 301 controls the energy supply circuit 302 to charge, the amplifying circuit 303 is used for amplifying the signal output by the energy supply circuit 302 and the driving signal generated by the transformer T1, the signal output by the amplifying circuit 303 is used for driving the MOS tube, and the MOS tube is conducted when the driving signal reaches a preset threshold value. The resistor R1 is used to limit the current of the signal output by the amplifying circuit 303, and functions as a protection circuit. The driving signal generated by the transformer T1 is amplified, and the driving capability of the transformer T1 to a gate circuit is effectively improved.

Optionally, the predetermined threshold is determined according to actual requirements, and this is not specifically limited in this embodiment of the application.

Specifically, the external circuit connected to the drain of the MOS transistor may be a light sensing circuit, a coupling circuit or other external circuits.

FIG. 4 is a schematic structural diagram of another gate driver circuit according to an embodiment of the present disclosure; optionally, as shown in fig. 4, the transformer T1 includes a first coil S1 and a second coil S2, the second coil S2 includes a first end 3001 and a second end 3002, the first coil S1 includes a first end 3005 and a second end 3006, the first end 3001 of the second coil S2 and the first end 3005 of the first coil S1 are homonymous ends, the first end of the transformer T1 is the first end 3001 of the second coil S2, and the second end of the transformer is the second end 3002 of the second coil S2.

Optionally, the rectifying circuit 301 includes a first rectifying diode D1 and a second rectifying diode D2; the power supply circuit 302 includes a first capacitor C1 and a second capacitor C2, and the amplifying circuit 303 includes a first transistor Q1 and a second transistor Q2.

The first end 3001 of the second coil S2 of the transformer T1 is connected to the base of the second semiconductor transistor Q2 and the base of the first semiconductor transistor Q1; the first end 3001 of the second coil S2 of the transformer T1 is connected to the cathode of the first rectifying diode D1 and the anode of the second rectifying diode D2. A second end 3002 of the second coil S2 of the transformer T1 is connected to a first end 3024 of the first capacitor C1 and a first end 3026 of the second capacitor C2, an anode of the first rectifying diode D1 is connected to a second end 3023 of the first capacitor C1, and a cathode of the second rectifying diode D2 is connected to a second end 3025 of the second capacitor C2; the anode of the first rectifying diode D1 is connected to the collector of the first semiconductor transistor Q1, and the cathode of the second rectifying diode D2 is connected to the collector of the second semiconductor transistor Q2.

Optionally, the third terminal of the amplifying circuit 303 is connected to the first terminal of the resistor R1, and includes:

the emitters of the first transistor Q1 and the second transistor Q2 are connected to a first terminal of a resistor R1.

Optionally, the first semiconductor transistor Q1 is a PNP semiconductor transistor, and the second semiconductor transistor Q2 is an NPN semiconductor transistor.

In the embodiment of the present application, when the transformer T1 generates the driving signal, the driving signal flows to the second capacitor C2 through the second rectifying diode D2 and finally flows back to the transformer T1 to provide the driving energy for the second capacitor C2, and the first capacitor C1 is in the off state. The second capacitor C2 discharges driving energy to the outside, the driving energy flows to the collector of the second transistor Q2, the driving signal generated by the transformer T1 flows to the base of the second transistor Q2, the driving energy of the second capacitor C2 and the driving signal of the transformer are amplified by the second transistor Q2 and then flow from the emitter of the second transistor Q2 to the MOS transistor, and the MOS transistor is turned on when the driving signal reaches a predetermined threshold, and the first transistor Q1 is in a cut-off state. When the driving signal of the transformer T1 disappears, the MOS transistor releases energy to the gate driving circuit, and at this time, the energy flows back to the first capacitor C1 through the first semiconductor transistor Q1 to provide driving energy for the first capacitor C1, and at this time, the second capacitor C2 is in an off state, and the second semiconductor transistor Q2 is in an off state. Therefore, the driving energy stored by the energy supply circuit and the reliable turn-off of the MOS tube can be effectively ensured, and the driving signal of the gate driving circuit is effectively improved.

Fig. 5 is a schematic structural diagram of another gate driving circuit provided in the embodiment of the present application; optionally, as shown in fig. 5, the gate driving circuit further includes: an input circuit 304 for providing a drive signal to the transformer; the input circuit includes: the third capacitor C3 and the power driving device, the power driving device is used for providing the driving signal for the gate driving circuit, and the third capacitor C3 is used for eliminating the DC component in the driving signal.

In the embodiment of the invention, the input circuit is mainly used for generating a driving signal for a transformer in the gate electrode driving circuit, and the third capacitor plays a role in eliminating a direct current component for the input circuit. The driving signal can be effectively provided for the transformer, and the direct current component generated by the driving device can be eliminated.

As shown in fig. 5, the second end 3042 of the third capacitor C3 is connected to the first end 3005 of the first coil S1 of the transformer T1; the positive electrode of the power driving device is connected to the first end 3041 of the third capacitor C3, and the negative electrode of the power driving device is connected to the second end 3006 of the first coil S1 of the transformer T1.

In the embodiment of the application, the driving signal generated by the power driving device flows to the transformer T1 through the third capacitor C3, and the third capacitor C3 eliminates the dc component in the driving signal, thereby effectively ensuring the reliability of the driving signal circuit.

Optionally, the current value of the power driving apparatus in the embodiment of the present application is determined according to an actual requirement, and the embodiment of the present application does not limit this.

Optionally, the turn-on voltage of the MOS transistor does not exceed 20 volts, and the energy generated by the first capacitor is greater than the energy generated by the transformer driving signal.

In the embodiment of the application, if the conduction voltage of the MOS transistor is too large, the corresponding driving signal to the gate driving circuit also needs to be increased, and the group energy to the semiconductor triode and the capacitor also needs to be increased, so that the hardware consumption and the energy cost are increased, and the cost of the hardware and the energy can be reduced by controlling the conduction voltage of the MOS transistor. Because the driving signal generated by the transformer is small, most of the conduction energy of the MOS tube is the driving energy of the capacitor, so that the energy of the first capacitor is larger than the energy generated by the driving signal of the transformer, and the turn-off effect of the gate driving circuit on the MOS tube can be ensured.

It can be understood that the gate driving circuit provided in this embodiment of the present invention may be applied to a chip having a driving function, such as a SCALE, an ASIC, and the like, and may also be applied to a device or an electronic product having a driving function, which is not limited in this embodiment of the present invention.

Referring to fig. 6, fig. 6 is a schematic diagram of a hardware structure of a charging device according to an embodiment of the present disclosure. The charging device 600 includes: a memory 601, a processor 602 coupled to the memory 601, and a gate drive circuit 603. The memory 601 is used to store instructions, the processor 602 is used to execute the instructions, and the gate drive circuit 603 is used to provide power to other components.

Optionally, the charging device 600 may further include a transceiver 605, and the transceiver 605 is used for communicating with other devices under the control of the processor 602.

The processor 602 may be a Central Processing Unit (CPU), a general-purpose processor, a Digital Signal Processor (DSP), an application-specific integrated circuit (ASIC), a Field Programmable Gate Array (FPGA), other programmable logic devices (FPGAs), a transistor logic device, a hardware component, or any combination thereof. Which may implement or perform the various illustrative logical blocks, modules, and circuits described in connection with the disclosure of the embodiments of the application. A processor may also be a combination of computing functions, e.g., comprising one or more microprocessors, a DSP and a microprocessor, or the like. The transceiver 605 may be a communication interface, transceiver circuitry, etc., where a communication interface is a generic term that may include one or more interfaces.

Optionally, the charging device may also include a bus 604. The memory 601, the transceiver 605, the processor 602, and the gate driving circuit 603 may be connected to each other via a bus 604; the bus 604 may be a Peripheral Component Interconnect (PCI) bus, an Extended Industry Standard Architecture (EISA) bus, or the like. The bus 604 may be divided into an address bus, a data bus, a control bus, and the like. For ease of illustration, only one thick line is shown in FIG. 6, but this is not intended to represent only one bus or type of bus.

In addition to the memory 601, the transceiver 605, the processor 602, the gate driving circuit 603 and the bus 604 shown in fig. 6, the charging device in the embodiment of the present application may further include other hardware according to the actual function of the charging device, which is not described in detail herein. Optionally, the device can achieve the beneficial effects of the gate driving circuit, and the structure and function of the gate driving circuit 603 may refer to the related descriptions in the foregoing embodiments, which are not described herein again.

In another embodiment of the present application, there is further provided a chip, which may be the gate driving circuit described in the first aspect, or a chip integrating the gate driving circuit described in the first aspect and the external circuit.

The above-mentioned embodiments are intended to illustrate the objects, technical solutions and advantages of the embodiments of the present application in further detail, and it should be understood that the above-mentioned embodiments are only specific embodiments of the present application, and are not intended to limit the scope of the embodiments of the present application, and any modifications, equivalent substitutions, improvements and the like made on the basis of the technical solutions of the embodiments of the present application should be included in the scope of the embodiments of the present application.

Claims

1. A gate drive circuit, comprising: the power supply circuit comprises a rectifying circuit, an energy supply circuit, an amplifying circuit, a resistor, an MOS (metal oxide semiconductor) tube and a transformer;

the first end of the transformer is connected with the first end of the amplifying circuit and the first end of the rectifying circuit, and the second end of the transformer is connected with the source electrode of the MOS tube and the second end of the energy supply circuit;

the second end of the rectifying circuit is connected with the first end of the energy supply circuit and the second end of the amplifying circuit;

the third end of the amplifying circuit is connected with the first end of the resistor;

the second end of the resistor is connected with the grid electrode of the MOS tube;

the drain electrode of the MOS tube is connected with an external circuit;

the transformer is used for generating a driving signal, when the driving signal generated by the transformer flows through the rectifying circuit, the rectifying circuit is used for controlling the energy supply circuit to be charged, the amplifying circuit is used for amplifying the signal output by the energy supply circuit and the driving signal generated by the transformer, the signal output by the amplifying circuit is used for driving the MOS tube, and the resistor is used for limiting the current of the signal output by the amplifying circuit;

the rectifying circuit comprises a first rectifying diode and a second rectifying diode; the first end of the transformer is connected with the cathode of the first rectifying diode and the anode of the second rectifying diode;

the energy supply circuit comprises a first capacitor and a second capacitor, the second end of the transformer is connected with the first end of the first capacitor and the first end of the second capacitor, the anode of the first rectifier diode is connected with the second end of the first capacitor, and the cathode of the second rectifier diode is connected with the second end of the second capacitor.

2. The gate drive circuit of claim 1,

the transformer includes first coil and second coil, first coil includes first end and second end, the second coil includes first end and second end, the first end of first coil with the first end of second coil is the end of same name, the first end of transformer is the first end of second coil, the second end of transformer is the second end of second coil.

3. The gate drive circuit of claim 1, wherein the amplification circuit includes a first semiconductor transistor and a second semiconductor transistor; the first end of the transformer is connected with the base electrode of the first semiconductor triode and the base electrode of the second semiconductor triode; the emitter electrode of the first semiconductor triode and the emitter electrode of the second semiconductor triode are connected with the first end of the resistor; the cathode of the second rectifier diode is connected with the collector of the second semiconductor triode, and the anode of the first rectifier diode is connected with the collector of the first semiconductor triode.

4. The gate drive circuit of claim 3, wherein the first semiconductor transistor is a PNP type semiconductor transistor and the second semiconductor transistor is an NPN type semiconductor transistor.

5. The gate drive circuit of claim 2, further comprising: an input circuit for providing a drive signal to the transformer; the input circuit includes: the first end of the third capacitor is connected with the first end of the first coil of the transformer; the positive electrode of the power supply driving device is connected with the second end of the third capacitor, and the negative electrode of the power supply driving device is connected with the second end of the first coil of the transformer;

the power supply driving device is used for providing a driving signal for the gate driving circuit, and the third capacitor is used for eliminating a direct current component in the driving signal provided by the power supply driving device.

6. The gate drive circuit of any one of claims 1-5, wherein the MOS transistor has a turn-on voltage of no more than 20 volts.

7. The gate drive circuit of claim 1, wherein the first capacitor generates more energy than the drive signal generated by the transformer.

8. A charging device comprising the gate driver circuit according to any one of claims 1 to 7.