CN215581093U - Push-pull type driving device - Google Patents

Push-pull type driving device Download PDF

Info

Publication number
CN215581093U
CN215581093U CN202121995844.6U CN202121995844U CN215581093U CN 215581093 U CN215581093 U CN 215581093U CN 202121995844 U CN202121995844 U CN 202121995844U CN 215581093 U CN215581093 U CN 215581093U
Authority
CN
China
Prior art keywords
triode
resistor
push
circuit
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
CN202121995844.6U
Other languages
Chinese (zh)
Inventor
宋众春
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Guangzhou Chuoli Technology Co ltd
Original Assignee
Guangzhou Chuoli Technology Co ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Guangzhou Chuoli Technology Co ltd filed Critical Guangzhou Chuoli Technology Co ltd
Priority to CN202121995844.6U priority Critical patent/CN215581093U/en
Application granted granted Critical
Publication of CN215581093U publication Critical patent/CN215581093U/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Abstract

The utility model belongs to the technical field of driving circuits, and discloses a push-pull type driving device which comprises a level conversion amplifying circuit, a push-pull circuit and an MOS (metal oxide semiconductor) tube circuit which are sequentially connected; the level conversion amplifying circuit comprises a first triode and a second triode which are different in type; the base electrode of the first triode is connected with the signal input end, the collector electrode of the first triode is connected with the first power output end, the emitter electrode of the first triode is connected with the grounding end, the collector electrode of the first triode is connected with the base electrode of the second triode, the emitter electrode of the second triode is connected with the first power output end, and the collector electrode of the second triode is connected with the input end of the push-pull circuit; the level conversion amplifying circuit is formed by arranging the first triode and the second triode which are different in type, the level can be converted and amplified, the condition that the MOS tube is conducted by mistake or not conducted is avoided, the stability of the driving circuit can be improved, and the MOS tube is ensured to be normally conducted and cut off.

Description

Push-pull type driving device
Technical Field
The utility model belongs to the technical field of driving circuits, and particularly relates to a push-pull type driving device.
Background
The most important characteristic of a Metal-Oxide-Semiconductor Field-Effect Transistor (MOS) is that the MOS Transistor has a good switching characteristic, so that the MOS Transistor is widely applied to the electronic Field, and particularly, the application of the MOS Transistor is widely seen in the Field of small-power motor control.
In the field of low-power motor control, a driving circuit is generally used for driving a MOS transistor to be turned on or off. When designing a driving Circuit, an Integrated Circuit (IC) Chip, such as a driving IC Chip of the international rectifier IR corporation, is commonly used. However, these devices are expensive, and have technical parameters (such as operating frequency) limitations in use, so they are not suitable for some practical applications.
Some input Pulse Width Modulation (PWM) signals are provided in the prior art, and are output through a push-pull structure to drive a driving circuit of a MOS transistor, which is built by discrete devices, so that the cost is within an acceptable range, and the signals can be flexibly combined in practical use without being limited by technical parameters.
However, in practice, it is found that the PWM signal is generally output by the CPU of the processor, the amplitude of the PWM signal is generally 3.3V or 5V, and the turn-on threshold voltage of the MOS transistor to be driven is generally 4-5V, so that the level of the input PWM signal is often too low or insufficient, which results in that the push-pull circuit cannot normally output the driving signal, and there may be a situation that the MOS transistor is erroneously turned on or turned off, so that the circuit cannot normally operate. Therefore, the stability of the driving circuit of the existing MOS tube is poor.
SUMMERY OF THE UTILITY MODEL
The utility model aims to overcome the defects of the prior art and provide a push-pull type driving device which can avoid the condition that an MOS (metal oxide semiconductor) tube is conducted or not conducted by mistake, improve the stability of a driving circuit and ensure the normal conduction and the normal disconnection of the MOS tube.
The utility model discloses and provides a push-pull type driving device, which comprises a level conversion amplifying circuit, a push-pull circuit and an MOS (metal oxide semiconductor) tube circuit, wherein the level conversion amplifying circuit is connected with the push-pull circuit; the level conversion amplifying circuit comprises a first triode and a second triode which are different in type; the base of the first triode is connected with a signal input end, the collector of the first triode is connected with a first power output end, the emitter of the first triode is connected with a grounding end, the collector of the first triode is connected with the base of the second triode, the emitter of the second triode is connected with the first power output end, the collector of the second triode is connected with the input end of the push-pull circuit, and the output end of the push-pull circuit is connected with the input end of the MOS tube circuit.
In one embodiment, the level shift amplifying circuit further includes a first resistor, a second resistor, a third resistor, and a fourth resistor; the base electrode of the first triode is connected with the signal input end through the first resistor, the collector electrode of the first triode is connected with the first power output end through the second resistor, the collector electrode of the first triode is connected with the base electrode of the second triode through the third resistor, and the collector electrode of the second triode is connected with the grounding end through the fourth resistor.
In one embodiment, the push-pull circuit comprises a third transistor and a fourth transistor; the collector electrode of the second triode is respectively connected with the base electrodes of the third triode and the fourth triode, the collector electrode of the third triode is connected with the first power output end, the emitter electrode of the third triode is connected with the emitter electrode of the fourth triode, the collector electrode of the fourth triode is connected with the grounding end, and the input end of the MOS tube circuit is connected between the emitter electrode of the third triode and the emitter electrode of the fourth triode.
In one embodiment, the push-pull circuit further includes a fifth resistor, and a collector of the second transistor is connected to bases of the third transistor and the fourth transistor, respectively, through the fifth resistor.
In one embodiment, the MOS transistor circuit includes a sixth resistor and a MOS transistor, one end of the sixth resistor is connected between the emitter of the third triode and the emitter of the fourth triode, the other end of the sixth resistor is connected to the gate of the MOS transistor, the drain of the MOS transistor is connected to the second power output terminal, and the source of the MOS transistor is connected to the ground terminal.
In one embodiment, the MOS transistor circuit further includes a first diode, an anode of the first diode is connected to one end of the sixth resistor close to the MOS transistor, and a cathode of the first diode is connected to one end of the sixth resistor close to the third transistor.
In one embodiment, the MOS transistor circuit further includes a bypass resistor, one end of the bypass resistor is connected to the gate of the MOS transistor, and the other end of the bypass resistor is connected to the source of the MOS transistor.
In one embodiment, the MOS transistor circuit further includes a bypass capacitor, one end of the bypass capacitor is connected to the gate of the MOS transistor, and the other end of the bypass capacitor is connected to the source of the MOS transistor.
In one embodiment, the MOS transistor further comprises a drive protection circuit, and the drive protection circuit is arranged between the gate and the source of the MOS transistor.
In one embodiment, the driving protection circuit comprises a second diode and a third diode; and the second diode and the third diode are connected in series in an opposite direction and then are respectively connected to the grid electrode and the source electrode of the MOS tube.
The push-pull type driving device has the advantages that the first triode and the second triode which are different in type are arranged to form the level conversion amplifying circuit, level conversion and amplification can be achieved, the limitation that the push-pull circuit cannot normally output driving signals due to the fact that the level of input PWM signals is too low or insufficient is eliminated, the situation that MOS transistors are conducted or not conducted by mistake can be avoided, the stability of the driving circuit can be improved, and the MOS transistors can be normally conducted and shut off. Moreover, the circuit has simple structure, no limit to the level of the front-end driving PWM signal, lower cost and wide application range.
In addition, the function that the level of the input PWM signal and the level of the push-pull output PWM signal are in the same logic can be realized, so that the on-off of the MOS tube is synchronous with the input PWM signal, the problem that the MOS tube at the rear end cannot be normally switched on or off due to the fact that the PWM signal and the output level of the push-pull circuit are in different logics is avoided, and the driving capability and the flexibility can be improved.
Drawings
The accompanying drawings, which are incorporated in and constitute a part of this specification, illustrate embodiments of the utility model and, together with the description, serve to explain the principles and effects of the utility model.
Unless otherwise specified or defined, the same reference numerals in different figures refer to the same or similar features, and different reference numerals may be used for the same or similar features.
Fig. 1 is a circuit diagram of a push-pull driving apparatus disclosed in this embodiment.
Description of reference numerals:
10. a level conversion amplifying circuit; 20. a push-pull circuit; 30. a drive protection circuit; q1, the first triode; q2, the second triode; q3, third triode; q4, fourth triode; r1, a first resistor; r2, a second resistor; r3, third resistor; r4, fourth resistor; r5, fifth resistor; r6, sixth resistor; r7, shunt resistance; d1, a first diode; d2, a second diode; d3, a third diode; c1, bypass capacitance; m1, MOS tube; B. a base electrode; E. an emitter; C. a collector electrode; G. a gate electrode; D. a drain electrode; s, a source electrode; VCC, a first power supply output terminal; VDD, a second power supply output terminal; GND and ground.
Detailed Description
In order to facilitate an understanding of the utility model, specific embodiments thereof will be described in more detail below with reference to the accompanying drawings.
Unless specifically stated or otherwise defined, all technical and scientific terms used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. In the case of combining the technical solutions of the present invention in a realistic scenario, all technical and scientific terms used herein may also have meanings corresponding to the purpose of achieving the technical solutions of the present invention.
As used herein, unless otherwise specified or defined, "first" and "second" … are used merely for name differentiation and do not denote any particular quantity or order. As used herein, the term "and/or" includes any and all combinations of one or more of the associated listed items.
It will be understood that when an element is referred to as being "secured to" another element, it can be directly secured to the other element or intervening elements may also be present; when an element is referred to as being "connected" to another element, it can be directly connected to the other element or intervening elements may also be present; when an element is referred to as being "mounted on" another element, it can be directly on the other element or intervening elements may also be present. When an element is referred to as being "on" another element, it can be directly on the other element or intervening elements may also be present.
As shown in fig. 1, an embodiment of the present invention discloses a push-pull driving apparatus, which includes a level shift amplifier circuit 10, a push-pull circuit 20, and a MOS transistor circuit; the level shift amplifying circuit 10 includes a first transistor Q1 and a second transistor Q2; the base B of the first triode Q1 is connected with the PWM signal input end, the collector C of the first triode Q1 is connected with the first power output end VCC, the emitter of the first triode Q1 is connected with the grounding end, the collector C of the first triode Q1 is connected with the base B of the second triode Q2, the emitter E of the second triode Q2 is connected with the first power output end VCC, the collector C of the second triode Q2 is connected with the input end of the push-pull circuit 20, and the output end of the push-pull circuit 20 is connected with the input end of the MOS tube circuit.
The first power output terminal VCC is a 15V high-voltage output terminal, the first triode Q1 is an NPN type triode or a PNP type triode, and the second triode Q2 may also be an NPN type triode or a PNP type triode, but the types of the first triode Q1 and the second triode Q2 are different, that is, when the first triode Q1 is an NPN type triode, the second triode Q2 is a PNP type triode; and when the first transistor Q1 is a PNP transistor, the second transistor Q2 is an NPN transistor. In the present embodiment, the first transistor Q1 is an NPN transistor, and the second transistor Q2 is a PNP transistor.
In this manner, the level conversion amplifier circuit 10 is configured by providing the first transistor Q1 and the second transistor Q2 of different types, and level conversion and amplification can be achieved. For example, when the PWM signal at the PWM signal input terminal is at a high level (3.3V to 5V), the NPN type first transistor Q1 is turned on, the voltage of the collector C of the first transistor Q1 is at a low level, i.e., the voltage of the base B of the PNP type second transistor Q2 is also at a low level, and the voltage of the emitter E of the second transistor Q2 is 15V, so that the second transistor Q2 is also turned on, and the voltage of the collector C of the second transistor Q2 (the output terminal of the level shift amplifier circuit 10) is at a high level (15V), i.e., the amplitude of the level signal output to the push-pull circuit 20 is greater than the input PWM signal, so that level shifting and amplifying can be achieved, thereby getting rid of the limitation that the push-pull circuit cannot normally output the driving signal due to the too low or insufficient level of the input PWM signal, further avoiding the situation that the MOS transistor is erroneously turned on or off, and improving the stability of the driving circuit, and normal on and off of the MOS tube are ensured. Moreover, the circuit has simple structure, no limit to the level of the front-end driving PWM signal, lower cost and wide application range.
In addition, when the input PWM signal is at a high level, the signal output to the push-pull circuit 20 is also at a high level, and the signal output by the push-pull circuit 20 to the back-end MOS transistor is also at a high level; when the input PWM signal is at low level, the signal output to the push-pull circuit 20 is also at low level, and the signal output to the rear MOS transistor by the push-pull circuit 20 is also at low level; therefore, the function that the level of the input PWM signal and the level of the push-pull output PWM signal are in the same logic can be realized, so that the on-off of the MOS tube is synchronous with the input PWM signal, the problem that the MOS tube at the rear end cannot be normally switched on or off due to the fact that the level of the output of the push-pull circuit 20 is different from the level of the PWM signal is avoided, and the driving capability and the flexibility can be improved.
In the present embodiment, the level shift amplifier circuit 10 further includes a first resistor R1, a second resistor R2, a third resistor R3, and a fourth resistor R4. Specifically, the base B of the first transistor Q1 is connected to the PWM signal input terminal through a first resistor R1, the collector C of the first transistor Q1 is connected to the first power output terminal VCC through a second resistor R2, the collector C of the first transistor Q1 is connected to the base B of the second transistor Q2 through a third resistor R3, and the collector C of the second transistor Q2 is connected to the ground terminal through a fourth resistor R4.
In the present embodiment, the push-pull circuit 20 includes a third transistor Q3 and a fourth transistor Q4; the collector C of the second triode Q2 is connected to the bases B of the third triode Q3 and the fourth triode Q4, the collector C of the third triode Q3 is connected to the first power output terminal VCC, the emitter E of the third triode Q3 is connected to the emitter E of the fourth triode Q4, the collector C of the fourth triode Q4 is connected to the ground terminal, and the input terminal of the MOS transistor circuit is connected between the emitter E of the third triode Q3 and the emitter E of the fourth triode Q4. The push-pull circuit 20 further includes a fifth resistor R5, and a collector C of the second transistor Q2 is connected to bases B of the third transistor Q3 and the fourth transistor Q4 through the fifth resistor R5, respectively.
In this embodiment, the MOS transistor circuit includes a sixth resistor R6 (gate resistor) and a MOS transistor M1, one end of the sixth resistor R6 is connected between the emitter E of the third transistor Q3 and the emitter E of the fourth transistor Q4, the other end of the sixth resistor R6 is connected to the gate G of the MOS transistor M1, the drain D of the MOS transistor M1 is connected to the second power output terminal VDD, and the source S of the MOS transistor M1 is connected to the ground terminal.
The switching tubes (the third triode Q3 and the fourth triode Q4) with the same parameters form a push-pull output structure, and exist in the circuit in a push-pull mode. When the circuit works, only one of the two symmetrical switching tubes is conducted at a time, so that the conduction loss is small and the efficiency is high. The output can both pour current into the load and draw current from the load, so that the push-pull output stage can improve the load capacity of the circuit and the switching speed.
When the input PWM signal is at a high level, the first transistor Q1 is turned on, the voltage of the collector C of the first transistor Q1 is at a low level, at this time, the second transistor Q2 is also turned on, the voltage of the collector C of the second transistor Q2 is at a high level, at this time, the third transistor Q3 is turned on, thereby driving the MOS transistor M1 to be turned on; when the input PWM signal is at a low level, the first transistor Q1 is turned off, the voltage of the collector C of the first transistor Q1 is at a high level, the second transistor Q2 is also turned off, the voltage of the collector C of the second transistor Q2 is at a low level, the fourth transistor Q4 is turned on, and the MOS transistor M1 is turned off by discharging through the sixth resistor R6 and the fourth transistor Q4.
In this embodiment, the MOS transistor circuit further includes a first diode D1, the first diode D1 is connected in parallel to two ends of the sixth resistor R6, an anode of the first diode D1 is connected to one end of the sixth resistor R6 close to the MOS transistor, and a cathode of the first diode D1 is connected to one end of the sixth resistor R6 close to the third transistor Q3. The first diode D1 is connected in parallel to two ends of the sixth resistor R6, so that the turn-off speed of the MOS transistor M1 during turn-off can be increased, and the loss during turn-off can be reduced.
In this embodiment, the MOS transistor circuit further includes a bypass resistor R7, one end of the bypass resistor R7 is connected to the gate G of the MOS transistor M1, and the other end of the bypass resistor R7 is connected to the source S of the MOS transistor M1. The bypass resistor R7 is used to prevent the MOS transistor M1 from floating between the gate G and the source S, which causes the potential between the gate G and the source S to be too high to damage the MOS transistor.
In this embodiment, the MOS transistor circuit further includes a bypass capacitor C1, one end of the bypass capacitor C1 is connected to the gate G of the MOS transistor M1, and the other end of the bypass capacitor C1 is connected to the source S of the MOS transistor M1. By adjusting the resistance value of the sixth resistor R6 and/or the capacitance value of the bypass capacitor C1, the turn-on speed of the MOS transistor M1 can be adjusted, thereby reducing the turn-on loss of the MOS transistor M1.
When the MOS transistor M1 is in the on state, the influence of the miller capacitance may cause the driving voltage to be over-voltage, which may damage the MOS transistor M1. Therefore, the push-pull driving apparatus may further include a driving protection circuit 30, and the driving protection circuit 30 is disposed between the gate G and the source S of the MOS transistor M1.
The driving protection circuit can be combined by adopting a voltage stabilizing diode and/or a voltage stabilizing triode with a voltage stabilizing function, and also can be combined with a common diode by adopting the voltage stabilizing diode and/or the voltage stabilizing triode, and rapid clamping is carried out when positive overvoltage or negative overvoltage is driven, so that stable and safe driving voltage is kept. Compared with a transient voltage regulator (TVS) for voltage stabilization, the risk of circuit damage caused by insufficient flow can be avoided.
In the present embodiment, the driving protection circuit 30 includes a second diode D2 and a third diode D3; the second diode D2 and the third diode D3 are connected in series in reverse and then are connected to the gate G and the source S of the MOS transistor M1, respectively, the anode of the second diode D2 is connected to the anode of the third diode D3, the cathode of the second diode D2 is connected to the gate G of the MOS transistor M1, and the cathode of the third diode D3 is connected to the source S of the MOS transistor M1. The second diode D2 and the third diode D3 are both zener diodes.
Based on this, when the MOS transistor M1 is in the on state, if the driving voltage is over-voltage in the forward direction, the driving voltage can be clamped within the safety range by breaking down the second diode D2; if the driving voltage is in negative overvoltage, the third diode D3 can be broken down to clamp the driving voltage within a safe range, so that the driving protection capability of the push-pull type driving device can be improved, and the risk of damage to the MOS transistor M1 can be further reduced by utilizing the series connection of the double voltage-stabilizing tubes to drive overvoltage clamping.
The above embodiments are provided to illustrate, reproduce and deduce the technical solutions of the present invention, and to fully describe the technical solutions, the objects and the effects of the present invention, so as to make the public more thoroughly and comprehensively understand the disclosure of the present invention, and not to limit the protection scope of the present invention.
The above examples are not intended to be exhaustive of the utility model and there may be many other embodiments not listed. Any alterations and modifications without departing from the spirit of the utility model are within the scope of the utility model.

Claims (10)

1. The push-pull type driving device is characterized by comprising a level conversion amplifying circuit, a push-pull circuit and an MOS (metal oxide semiconductor) tube circuit; the level conversion amplifying circuit comprises a first triode and a second triode which are different in type; the base of the first triode is connected with a signal input end, the collector of the first triode is connected with a first power output end, the emitter of the first triode is connected with a grounding end, the collector of the first triode is connected with the base of the second triode, the emitter of the second triode is connected with the first power output end, the collector of the second triode is connected with the input end of the push-pull circuit, and the output end of the push-pull circuit is connected with the input end of the MOS tube circuit.
2. The push-pull driving apparatus according to claim 1, wherein the level shift amplifying circuit further comprises a first resistor, a second resistor, a third resistor, and a fourth resistor; the base electrode of the first triode is connected with the signal input end through the first resistor, the collector electrode of the first triode is connected with the first power output end through the second resistor, the collector electrode of the first triode is connected with the base electrode of the second triode through the third resistor, and the collector electrode of the second triode is connected with the grounding end through the fourth resistor.
3. The push-pull drive apparatus of claim 1, wherein the push-pull circuit comprises a third transistor and a fourth transistor; the collector electrode of the second triode is respectively connected with the base electrodes of the third triode and the fourth triode, the collector electrode of the third triode is connected with the first power output end, the emitter electrode of the third triode is connected with the emitter electrode of the fourth triode, the collector electrode of the fourth triode is connected with the grounding end, and the input end of the MOS tube circuit is connected between the emitter electrode of the third triode and the emitter electrode of the fourth triode.
4. The push-pull driving apparatus as claimed in claim 3, wherein the push-pull circuit further comprises a fifth resistor, and a collector of the second transistor is connected to bases of the third transistor and the fourth transistor, respectively, via the fifth resistor.
5. The push-pull driving device according to claim 3 or 4, wherein the MOS transistor circuit includes a sixth resistor and a MOS transistor, one end of the sixth resistor is connected between the emitter of the third transistor and the emitter of the fourth transistor, the other end of the sixth resistor is connected to the gate of the MOS transistor, the drain of the MOS transistor is connected to the second power output terminal, and the source of the MOS transistor is connected to the ground terminal.
6. The push-pull driving apparatus as claimed in claim 5, wherein the MOS transistor circuit further comprises a first diode, an anode of the first diode is connected to one end of the sixth resistor close to the MOS transistor, and a cathode of the first diode is connected to one end of the sixth resistor close to the third transistor.
7. The push-pull driving device according to claim 5, wherein the MOS transistor circuit further comprises a bypass resistor, one end of the bypass resistor is connected to the gate of the MOS transistor, and the other end of the bypass resistor is connected to the source of the MOS transistor.
8. The push-pull driving device according to claim 5, wherein the MOS transistor circuit further comprises a bypass capacitor, one end of the bypass capacitor is connected to the gate of the MOS transistor, and the other end of the bypass capacitor is connected to the source of the MOS transistor.
9. The push-pull driving device according to claim 5, further comprising a driving protection circuit disposed between the gate and the source of the MOS transistor.
10. The push-pull drive arrangement according to claim 9, wherein the drive protection circuit comprises a second diode and a third diode; and the second diode and the third diode are connected in series in an opposite direction and then are respectively connected to the grid electrode and the source electrode of the MOS tube.
CN202121995844.6U 2021-08-23 2021-08-23 Push-pull type driving device Active CN215581093U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
CN202121995844.6U CN215581093U (en) 2021-08-23 2021-08-23 Push-pull type driving device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
CN202121995844.6U CN215581093U (en) 2021-08-23 2021-08-23 Push-pull type driving device

Publications (1)

Publication Number Publication Date
CN215581093U true CN215581093U (en) 2022-01-18

Family

ID=79840969

Family Applications (1)

Application Number Title Priority Date Filing Date
CN202121995844.6U Active CN215581093U (en) 2021-08-23 2021-08-23 Push-pull type driving device

Country Status (1)

Country Link
CN (1) CN215581093U (en)

Similar Documents

Publication Publication Date Title
US20220069817A1 (en) Power switch drive circuit and device
US8537515B2 (en) Driving circuit and semiconductor device with the driving circuit
CN102545559A (en) Gate driver and semiconductor device employing the same
US20230291399A1 (en) Miller clamping device for parallel switching transistors and driver comprising same
US11476845B2 (en) Driver circuit, corresponding device and method of operation
JP2007104805A (en) Gate drive circuit of voltage-driven semiconductor element
CN108649938A (en) A kind of metal-oxide-semiconductor driving circuit inhibiting negative drive voltage spike
CN209994110U (en) NMOS tube-based reverse connection prevention protection circuit for vehicle-mounted direct-current power supply
CN114400996A (en) Direct drive circuit of depletion type power device
CN215581093U (en) Push-pull type driving device
CN115314038A (en) Gate-level buffer circuit based on SiC power device
CN113676029B (en) Active clamp circuit based on IGBT
CN113746312A (en) Current-limiting protection circuit of bipolar process switching power supply
US11831307B2 (en) Power switch drive circuit and device
CN216794850U (en) Push-pull boost circuit module and push-pull boost circuit
CN216599452U (en) Double-power switch tube driving circuit based on low-voltage transistor
CN111082788B (en) Gate driving device and electronic equipment
CN214480288U (en) Magnetic isolation driving circuit
CN218416177U (en) Drive circuit and test circuit
CN217522739U (en) Pressure reducing device
CN219611599U (en) Double-tube forward driving power supply circuit
CN117375597A (en) Intelligent PFC module capable of avoiding parasitic turn-on during turn-off of IGBT
CN217335422U (en) IGBT drive circuit
CN215222156U (en) Three-level IGBT driving and direct-connection protection circuit
CN218450078U (en) Semiconductor device drive circuit

Legal Events

Date Code Title Description
GR01 Patent grant
GR01 Patent grant