CN111327302B - SiC MOSFET active driving circuit - Google Patents
SiC MOSFET active driving circuit Download PDFInfo
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- CN111327302B CN111327302B CN202010097316.2A CN202010097316A CN111327302B CN 111327302 B CN111327302 B CN 111327302B CN 202010097316 A CN202010097316 A CN 202010097316A CN 111327302 B CN111327302 B CN 111327302B
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- H—ELECTRICITY
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- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/51—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
- H03K17/56—Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
- H03K17/567—Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT
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Abstract
The invention discloses an active drive circuit of a SiC MOSFET, which comprises: the device comprises a driving circuit, a voltage sampling circuit, a pulse generating circuit and a voltage injection circuit; the voltage sampling circuit is used for collecting voltage signals at two ends of a gate source electrode in the switching process of the SiC MOSFET and transmitting the voltage signals to the pulse generating circuit; the pulse generating circuit is used for generating a pulse signal in a specific time period of the SiC MOSFET switching process and transmitting the pulse signal to the voltage injection circuit; the voltage injection circuit is used for injecting voltage into the driving circuit according to the pulse signal. The advantages are that: the circuit is simple, can inhibit current and voltage overshoot and oscillation, does not increase the resistance value of the driving resistor, and does not prolong the switching time and increase the switching loss of the SiC MOSFET.
Description
Technical Field
The invention relates to an active drive circuit of a SiC MOSFET, and belongs to the technical field of power electronics.
Background
SiC (silicon carbide) semiconductors have the advantage of having a higher penetrating electric field, a larger thermal conductivity, a faster electron saturation velocity and a lower intrinsic carrier concentration than Si (silicon), and are therefore being widely used in high power density and high switching frequency applications. Ideally, siC MOSFETs can switch faster and overall switching losses can be reduced to a large extent, but in practical applications the parasitic inductance present in the circuit layout and the parasitic capacitance of the load seriously affect this advantage of SiC MOSFETs, since different LC networks are formed between the parasitic inductance, the device voltage and the load parasitic capacitance, and thus overshoot and oscillation of the device voltage and current occur, which can cause unwanted stress to the device and increase the overall switching losses, which need to be addressed in order to popularize the application of SiC MOSFETs.
Currently, there are several main solutions to this problem. On the one hand, current, voltage overshoot and oscillation phenomena occurring in the switching process of the SiC MOSFET can be relieved by increasing the resistance value of the driving resistor, but the switching time of the SiC MOSFET can be prolonged by increasing the resistance value of the driving resistor, and meanwhile, the switching loss can be increased. On the other hand, current, voltage overshoot and oscillation phenomena occurring in the switching process of the SiC MOSFET can be relieved by adding the RCD absorption circuit at two ends of the drain and the source of the SiC MOSFET, but the addition of the RCD absorption circuit requires the use of additional devices, so that the circuit complexity is increased, and meanwhile, the switching loss of the SiC MOSFET is increased.
Content of the light
The invention aims to overcome the defects of the prior art and provide an active drive circuit of a SiC MOSFET.
In order to solve the technical problem, the present invention provides an active driving circuit of a SiC MOSFET, which is characterized by comprising: the device comprises a driving circuit, a voltage sampling circuit, a pulse generating circuit and a voltage injection circuit;
the voltage sampling circuit is used for collecting voltage signals at two ends of a gate source electrode in the switching process of the SiC MOSFET and transmitting the voltage signals to the pulse generating circuit;
the pulse generating circuit is used for generating a pulse signal according to the received voltage signal and transmitting the pulse signal to the voltage injection circuit;
the voltage injection circuit is used for injecting voltage into the driving circuit according to the pulse signal;
the driving circuit is used for generating driving voltage required by the SiC MOSFET switch.
Further, the voltage sampling circuit comprises an on voltage sampling circuit and an off voltage sampling circuit; the switching-on voltage sampling circuit is used for collecting voltage signals at two ends of a gate source electrode in the switching-on process of the SiC MOSFET; the turn-off voltage sampling circuit is used for collecting voltage signals at two ends of a gate source electrode in the turn-off process of the SiC MOSFET;
the pulse generating circuit comprises an on pulse generating circuit and an off pulse generating circuit; the switching-on pulse generation circuit is used for receiving the voltage signal acquired by the switching-on voltage sampling circuit and outputting a switching-on pulse signal; the turn-off pulse generating circuit is used for receiving the voltage signal acquired by the turn-off voltage sampling circuit and outputting a turn-off pulse signal;
the voltage injection circuit comprises an on voltage injection circuit and an off voltage injection circuit; the switching-on voltage injection circuit is used for receiving the switching-on pulse signal output by the switching-on pulse generating circuit and outputting injection voltage; the turn-off voltage injection circuit is used for receiving the turn-off pulse signal output by the turn-off pulse generating circuit and outputting injection voltage.
Further, the driving circuit comprises a first switch tube Q1, a second switch tube Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D1, a second diode D2, a first node, a second node, a third node and a fourth node, wherein the collector of the first switch tube Q1 is connected with Vcc power supply voltage, the base of the first switch tube Q1 is connected with the base of the second switch tube Q2, the emitter of the first switch tube Q1 is connected with the first node, the emitter of the second switch tube Q2 is connected with the first node, the collector of the second switch tube Q2 is connected with Vee power supply voltage, one end of the first resistor R1 is connected with the first node, the other end of the first resistor R1 is connected with the second node, one end of the second resistor R2 is connected with the first node, the other end of the second resistor R2 is connected with the anode of the first diode D1, the cathode of the first diode D1 is connected with the fourth node, one end of the third resistor R3 is connected with the first node, the other end of the third resistor R3 is connected with the third node, one end of the fourth resistor R4 is connected with the third node, the other end of the fourth resistor R4 is connected with the cathode of the second diode D2, the anode of the second diode D2 is connected with the fourth node, the fourth node is connected with the grid of the SiC MOSFET, vcc is the turn-on voltage of the SiC MOSFET, and Vee is the turn-off voltage of the SiC MOSFET.
Further, the turn-on voltage sampling circuit includes a fifth resistor R5, a sixth resistor R6, a first capacitor C1, and a fifth node, where one end of the fifth resistor R5 is connected to the fourth node, the other end of the fifth resistor R5 is connected to the fifth node, one end of the sixth resistor R6 is connected to the fifth node, the other end of the sixth resistor R6 is grounded, one end of the first capacitor C1 is connected to the fifth node, and the other end of the first capacitor C1 is grounded.
Further, the off-voltage sampling circuit includes a seventh resistor R7, an eighth resistor R8, a second capacitor C2, and a sixth node, where one end of the seventh resistor R7 is connected to the fourth node, the other end of the seventh resistor R7 is connected to the sixth node, one end of the eighth resistor R8 is connected to the sixth node, the other end of the eighth resistor R8 is grounded, one end of the second capacitor C2 is connected to the sixth node, and the other end of the second capacitor C2 is grounded.
Further, the turn-on pulse generating circuit includes a first voltage comparator COM1, a second voltage comparator COM2 AND a first logic AND gate AND1, where a positive input end of the first voltage comparator COM1 is connected to the second reference voltage Vref2, a negative input end of the first voltage comparator COM1 is connected to the fifth node, a positive input end of the second voltage comparator COM2 is connected to the fifth node, a negative input end of the second voltage comparator COM2 is connected to the first reference voltage Vref1, an output end of the first voltage comparator COM1 is connected to an input end of the first logic AND gate AND1, AND an output end of the second voltage comparator COM2 is connected to another input end of the first logic AND gate AND 1.
Further, the turn-off pulse generating circuit includes a third voltage comparator COM3, a fourth voltage comparator COM4, a second logic AND gate AND2, AND a first pulse signal amplifier X1, where a positive input end of the third voltage comparator COM3 is connected to the fourth reference voltage Vref4, a negative input end of the third voltage comparator COM3 is connected to the sixth node, a positive input end of the fourth voltage comparator COM4 is connected to the sixth node, a negative input end of the fourth voltage comparator COM4 is connected to the third reference voltage Vref3, an output end of the third voltage comparator COM3 is connected to an input end of the second logic AND gate AND2, an output end of the fourth voltage comparator COM4 is connected to another input end of the second logic AND gate AND2, AND an output end of the second logic AND gate AND2 is connected to an input end of the first pulse signal amplifier X1.
Further, the turn-on voltage injection circuit includes a third switch tube Q3, a third diode D3 AND a ninth resistor R9, where an emitter of the third switch tube Q3 is connected to the fifth reference voltage Vref5, a base of the third switch tube Q3 is connected to an output end of the first logic AND gate AND1, a collector of the third switch tube Q3 is connected to a cathode of the third diode D3, an anode of the third diode D3 is connected to one end of the ninth resistor R9, AND another end of the ninth resistor R9 is connected to the second node.
Further, the turn-off voltage injection circuit includes a fourth switching tube Q4, a fourth diode D4 and a tenth resistor R10, where a collector of the fourth switching tube Q4 is connected to the sixth reference voltage Vref6, a base of the fourth switching tube Q4 is connected to the output end of the first pulse signal amplifier X1, an emitter of the fourth switching tube Q4 is connected to an anode of the fourth diode D4, a cathode of the fourth diode D4 is connected to one end of the tenth resistor R10, and another end of the tenth resistor R10 is connected to the third node.
The invention has the beneficial effects that:
the circuit is simple, can inhibit current and voltage overshoot and oscillation, does not increase the resistance value of the driving resistor, and does not prolong the switching time and increase the switching loss of the SiC MOSFET.
Drawings
FIG. 1 is a schematic diagram of a circuit module according to the present invention;
fig. 2 is a schematic diagram of an active driving circuit of a SiC MOSFET according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a SiC MOSFET active drive circuit test circuit in accordance with one embodiment of the invention;
FIG. 4 is a schematic diagram of a test experimental turn-on waveform of an active drive circuit of a SiC MOSFET according to an embodiment of the invention;
FIG. 5 is a schematic diagram of a conventional driving circuit test turn-on waveform;
FIG. 6 is a schematic diagram of a test experimental turn-off waveform of an active drive circuit of a SiC MOSFET according to an embodiment of the invention;
fig. 7 is a schematic diagram of a conventional driving circuit test shutdown waveform.
Detailed Description
The invention is further described below with reference to the accompanying drawings. The following examples are only for more clearly illustrating the technical aspects of the present invention, and are not intended to limit the scope of the present invention.
As shown in fig. 1, a circuit block diagram of an active driving circuit of a SiC MOSFET according to an embodiment of the present invention includes: the device comprises a driving circuit, a voltage sampling circuit, a pulse generating circuit and a voltage injection circuit.
The voltage sampling circuit is used for collecting voltage signals at two ends of a gate source electrode in the switching process of the SiC MOSFET and transmitting the voltage signals to the pulse generating circuit;
the pulse generating circuit is used for generating a pulse signal according to the received voltage signal and transmitting the pulse signal to the voltage injection circuit;
the voltage injection circuit is used for injecting voltage into the driving circuit according to the pulse signal;
the driving circuit is used for generating driving voltage required by the SiC MOSFET switch.
As shown in fig. 2, the driving circuit includes a first switch Q1, a second switch Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D1, and a second diode D2, where the collector of the first switch Q1 is connected to the Vcc supply voltage, the base of the first switch Q1 is connected to the base of the second switch Q2, the emitter of the first switch Q2 is connected to the first node, the emitter of the second switch Q2 is connected to the first node, the collector of the second switch Q2 is connected to the Vee supply voltage, one end of the first resistor R1 is connected to the first node, the other end of the first resistor R1 is connected to the second node, one end of the second resistor R2 is connected to the first node, the other end of the second resistor R2 is connected to the anode of the first diode D1, the first cathode of the first diode D1 is connected to the first node, the other end of the second resistor R3 is connected to the second node, the other end of the second resistor R2 is connected to the fourth node, and the other end of the fourth resistor R2 is connected to the third node, and the fourth resistor R4 is connected to the other end of the fourth resistor R2.
The voltage sampling circuit comprises an on-voltage sampling circuit and an off-voltage sampling circuit, wherein the on-voltage sampling circuit comprises a fifth resistor R5, a sixth resistor R6 and a first capacitor C1, one end of the fifth resistor R5 is connected with the fourth node, the other end of the fifth resistor R5 is connected with the fifth node, one end of the sixth resistor R6 is connected with the fifth node, the other end of the sixth resistor R6 is grounded, one end of the first capacitor C1 is connected with the fifth node, the other end of the first capacitor C1 is grounded, the off-voltage sampling circuit comprises a seventh resistor R7, an eighth resistor R8 and a second capacitor C2, one end of the seventh resistor R7 is connected with the fourth node, the other end of the seventh resistor R7 is connected with the sixth node, one end of the eighth resistor R8 is connected with the sixth node, the other end of the eighth resistor R8 is grounded, the other end of the second capacitor C2 is connected with the sixth node, and the other end of the second capacitor C2 is grounded.
The pulse generating circuit comprises an on pulse generating circuit AND an off pulse generating circuit, wherein the on pulse generating circuit comprises a first voltage comparator COM1, a second voltage comparator COM2 AND a first logic AND gate AND1, wherein the positive input end of the first voltage comparator COM1 is connected with the second reference voltage Vref2, the negative input end of the first voltage comparator COM1 is connected with the fifth node, the positive input end of the second voltage comparator COM2 is connected with the fifth node, the negative input end of the second voltage comparator COM2 is connected with the first reference voltage Vref1, the output end of the first voltage comparator COM1 is connected with the first input end of the first logic AND gate AND1, the output end of the second voltage comparator COM2 is connected with the other input end of the first logic AND gate AND1, the off pulse generating circuit comprises a third voltage comparator COM3, a fourth voltage comparator COM4 AND a first pulse signal amplifier X1, the negative input end of the third voltage comparator COM3 is connected with the fourth voltage comparator COM3, the fourth voltage comparator COM3 is connected with the other input end of the fourth voltage comparator COM4, AND the fourth input end of the fourth voltage comparator COM2 is connected with the other input end of the first logic AND1, AND the fourth input end of the fourth voltage comparator COM3 is connected with the fourth input end of the fourth voltage comparator AND the fourth input end of the fourth voltage comparator.
The voltage injection circuit comprises an on voltage injection circuit AND an off voltage injection circuit, the on voltage injection circuit comprises a third switch tube Q3, a third diode D3 AND a ninth resistor R9, wherein an emitter of the third switch tube Q3 is connected with a fifth reference voltage Vref5, a base of the third switch tube Q3 is connected with an output end of the first logic AND gate AND1, a collector of the third switch tube Q3 is connected with a cathode of the third diode D3, an anode of the third diode D3 is connected with one end of the ninth resistor R9, the other end of the ninth resistor R9 is connected with the second node, the off voltage injection circuit comprises a fourth switch tube Q4, a fourth diode D4 AND a tenth resistor R10, a collector of the fourth switch tube Q4 is connected with a sixth reference voltage Vref6, a base of the fourth switch tube Q4 is connected with an output end of the first pulse signal amplifier X1, a fourth switch tube Q4 is connected with an anode of the fourth diode D4, AND the other end of the fourth switch tube Q4 is connected with the tenth resistor R10.
The SiC MOSFET active drive circuit will be further described by way of specific embodiments.
In one embodiment of the invention, vcc and Vee are SiC MOSFET drive voltages, vcc is an on voltage, vee is an off voltage, the selected Vcc and Vee drive voltages are determined based on the actual SiC MOSFET selected,
in this embodiment, vcc is +20v, vee is-5V, and those skilled in the art may specifically select the Vcc according to practical situations, which is not specifically limited herein.
In one embodiment of the present invention, the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 have equal resistance values.
In one embodiment of the present invention, the values of the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the first capacitor C1 and the second capacitor C2 are not limited.
In one embodiment of the present invention, the first voltage comparator COM1, the second voltage comparator COM2, the third voltage comparator COM3 and the fourth voltage comparator COM4 are not limited.
In one embodiment of the present invention, the values of the first reference voltage Vref1, the second reference voltage Vref2, the third reference voltage Vref3 and the fourth reference voltage Vref4 are determined in relation to the type of SiC MOSFET used, and are not limited herein.
In one embodiment of the present invention, the determination of the values of the fifth reference voltage Vref5 and the sixth reference voltage Vref6 is related to the type of SiC MOSFET used, and is not limited herein.
In one embodiment of the present invention, the first switching tube Q1, the third switching tube Q3 and the fourth switching tube Q4 are low-power NPN transistors, the second switching tube Q2 is a low-power PNP transistor, and the types of the first switching tube Q1, the second switching tube Q2, the third switching tube Q3 and the fourth switching tube Q4 are not limited.
The SiC MOSFET active driving circuit provided by the embodiment of the invention can inhibit current and voltage overshoot and oscillation in the switching process of the SiC MOSFET, is realized based on the circuit, and has the following specific working principle:
in the turn-on process of the SiC MOSFET, the turn-on voltage sampling circuit samples the gate-source voltage of the SiC MOSFET, the divided voltage is transmitted into the first comparator COM1 AND the second comparator COM2 after being divided by the sampling resistor, when the divided voltage is lower than the first reference voltage Vref1, the first comparator COM1 outputs a high level, the second comparator COM2 outputs a low level, so the first logic AND gate AND1 outputs a low level, the third switching tube Q3 is turned off, the turn-on voltage injection circuit does not operate, when the divided voltage is lower than the second reference voltage Vref2 AND higher than the first reference voltage Vref1, both the first comparator COM1 AND the second comparator COM2 output a high level, so the first logic AND gate 1 outputs a high level, the third switching tube Q3 is turned on, the turn-on voltage injection circuit operates, the SiC MOSFET gate is injected with a voltage, when the divided voltage is higher than the second reference voltage Vref2, the first comparator COM1 outputs a low level, the second comparator COM2 outputs a high level, so the first logic AND gate AND1 outputs a low level, AND the turn-on voltage injection circuit does not operate. And injecting voltage into the grid electrode of the device in the rising stage of the drain current in the SiC MOSFET opening process, and inhibiting the rising rate of the drain current of the SiC MOSFET, thereby inhibiting current overshoot and oscillation in the SiC MOSFET opening process.
In the turn-off process of the SiC MOSFET, the gate-source voltage of the SiC MOSFET is sampled by the turn-off voltage sampling circuit, the divided voltage is divided by the sampling resistor AND then is transmitted into the third comparator COM3 AND the fourth comparator COM4, when the divided voltage is lower than the third reference voltage Vref3, the third comparator COM3 outputs a high level, the fourth comparator COM4 outputs a low level, so that the second logic AND gate AND2 outputs a low level, the fourth switching tube Q4 is turned off by the first pulse signal amplifier, the turn-off voltage injection circuit does not operate, when the divided voltage is higher than the third reference voltage Vref3 AND lower than the fourth reference voltage Vref4, both the third comparator COM3 AND the fourth comparator COM4 output a high level, so that the second logic AND gate AND2 outputs a high level, the third switching tube Q4 is turned on, the turn-off voltage injection circuit operates, AND the SiC MOSFET gate is injected with a voltage, when the divided voltage is higher than the fourth reference voltage Vref4, the third comparator COM3 outputs a low level, the fourth comparator COM4 outputs a high level, so that the second logic AND gate AND2 outputs a low level, AND the turn-off voltage does not operate. And injecting voltage into the grid electrode of the device in the drain current falling stage of the turn-off process of the SiC MOSFET to inhibit the rising rate of the drain-source voltage of the SiC MOSFET, thereby inhibiting voltage overshoot and oscillation in the turn-off process of the SiC MOSFET.
FIG. 3 shows a test circuit of the present embodimentThe active driving circuit is used for testing the actual effect of the SiC MOSFET active driving circuit, wherein D is a freewheeling diode which is connected with a drain electrode of the SiC MOSFET, L and R are a load inductance and a load resistance respectively, the load inductance and the load resistance are connected in series and connected with the freewheeling diode in parallel, vdc is a direct current bus voltage, an anode is connected with a cathode of the freewheeling diode, and a cathode is grounded. As can be seen from fig. 4 and fig. 5, compared with the conventional driving circuit, the proposed active driving circuit can significantly suppress the current overshoot and the oscillation in the turn-on process of the device, and as can be seen from fig. 6 and fig. 7, compared with the conventional driving circuit, the proposed active driving circuit can significantly suppress the voltage overshoot and the oscillation in the turn-off process of the device. U in FIGS. 4-7 gs 、u ds 、i d The device gate-source voltage, drain-source voltage, and drain current, respectively.
In summary, the SiC MOSFET active driving circuit according to the embodiment of the present invention is capable of detecting the gate-source voltage of the device during the operation of the SiC MOSFET, and injecting a voltage into the gate of the device during a specific period of time of switching the device, thereby suppressing the current and voltage rising speed during the switching of the SiC MOSFET, and thus suppressing the current, voltage overshoot and oscillation phenomena. The SiC MOSFET active driving circuit can be used as driving circuits of various SiC MOSFETs and is applied to application occasions such as high power density, high temperature and the like, such as various devices such as a photovoltaic inverter, a transformer, an electric automobile and the like.
The foregoing is merely a preferred embodiment of the present invention, and it should be noted that modifications and variations could be made by those skilled in the art without departing from the technical principles of the present invention, and such modifications and variations should also be regarded as being within the scope of the invention.
Claims (8)
1. An SiC MOSFET active drive circuit, comprising: the device comprises a driving circuit, a voltage sampling circuit, a pulse generating circuit and a voltage injection circuit;
the voltage sampling circuit is used for collecting voltage signals at two ends of a gate source electrode in the switching process of the SiC MOSFET and transmitting the voltage signals to the pulse generating circuit;
the pulse generating circuit is used for generating a pulse signal according to the received voltage signal and transmitting the pulse signal to the voltage injection circuit;
the voltage injection circuit is used for injecting voltage into the driving circuit according to the pulse signal;
the driving circuit is used for generating driving voltage required by the SiC MOSFET switch;
the voltage sampling circuit comprises an on voltage sampling circuit and an off voltage sampling circuit; the switching-on voltage sampling circuit is used for collecting voltage signals at two ends of a gate source electrode in the switching-on process of the SiC MOSFET; the turn-off voltage sampling circuit is used for collecting voltage signals at two ends of a gate source electrode in the turn-off process of the SiC MOSFET;
the pulse generating circuit comprises an on pulse generating circuit and an off pulse generating circuit; the switching-on pulse generation circuit is used for receiving the voltage signal acquired by the switching-on voltage sampling circuit and outputting a switching-on pulse signal; the turn-off pulse generating circuit is used for receiving the voltage signal acquired by the turn-off voltage sampling circuit and outputting a turn-off pulse signal;
the voltage injection circuit comprises an on voltage injection circuit and an off voltage injection circuit; the switching-on voltage injection circuit is used for receiving the switching-on pulse signal output by the switching-on pulse generating circuit and outputting injection voltage; the turn-off voltage injection circuit is used for receiving the turn-off pulse signal output by the turn-off pulse generating circuit and outputting injection voltage.
2. The active driving circuit of a SiC MOSFET according to claim 1, wherein the driving circuit includes a first switch Q1, a second switch Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D1, a second diode D2, a first node, a second node, a third node, and a fourth node, wherein a collector of the first switch Q1 is connected to a Vcc supply voltage, a base of the first switch Q1 is connected to a base of the second switch Q2, an emitter of the first switch Q1 is connected to the first node, an emitter of the second switch Q2 is connected to the first node, a collector of the second switch Q2 is connected to a Vee supply voltage, one end of the first resistor R1 is connected to the first node, another end of the first resistor R1 is connected to the second node, one end of the second resistor R2 is connected to the first node, another end of the second resistor R2 is connected to the second node, another end of the second resistor R2 is connected to the fourth node, another end of the second resistor is connected to the fourth node is connected to the third node, and the fourth node is connected to the fourth node, the SiC node is connected to the fourth node, and the fourth node is connected to the third node.
3. The SiC MOSFET active driving circuit of claim 2, wherein the turn-on voltage sampling circuit comprises a fifth resistor R5, a sixth resistor R6, a first capacitor C1 and a fifth node, wherein one end of the fifth resistor R5 is connected to the fourth node, the other end of the fifth resistor R5 is connected to the fifth node, one end of the sixth resistor R6 is connected to the fifth node, the other end of the sixth resistor R6 is grounded, one end of the first capacitor C1 is connected to the fifth node, and the other end of the first capacitor C1 is grounded.
4. The SiC MOSFET active driving circuit of claim 2, wherein the off-voltage sampling circuit comprises a seventh resistor R7, an eighth resistor R8, a second capacitor C2 and a sixth node, wherein one end of the seventh resistor R7 is connected to the fourth node, the other end of the seventh resistor R7 is connected to the sixth node, one end of the eighth resistor R8 is connected to the sixth node, the other end of the eighth resistor R8 is grounded, one end of the second capacitor C2 is connected to the sixth node, and the other end of the second capacitor C2 is grounded.
5. A SiC MOSFET active driving circuit according to claim 3, characterized in that the on pulse generating circuit comprises a first voltage comparator COM1, a second voltage comparator COM2 AND a first logic AND gate AND1, wherein the positive input terminal of the first voltage comparator COM1 is connected to a second reference voltage Vref2, the negative input terminal of the first voltage comparator COM1 is connected to the fifth node, the positive input terminal of the second voltage comparator COM2 is connected to the fifth node, the negative input terminal of the second voltage comparator COM2 is connected to a first reference voltage Vref1, the output terminal of the first voltage comparator COM1 is connected to an input terminal of the first logic AND gate AND1, AND the output terminal of the second voltage comparator COM2 is connected to the other input terminal of the first logic AND gate AND 1.
6. The SiC MOSFET active driving circuit of claim 4, wherein said off pulse generating circuit comprises a third voltage comparator COM3, a fourth voltage comparator COM4, a second logic AND gate AND2, AND a first pulse signal amplifier X1, wherein a positive input terminal of said third voltage comparator COM3 is connected to a fourth reference voltage Vref4, a negative input terminal of said third voltage comparator COM3 is connected to said sixth node, a positive input terminal of said fourth voltage comparator COM4 is connected to said sixth node, a negative input terminal of said fourth voltage comparator COM4 is connected to a third reference voltage Vref3, an output terminal of said third voltage comparator COM3 is connected to an input terminal of said second logic AND gate AND2, an output terminal of said fourth voltage comparator COM4 is connected to another input terminal of said second logic AND gate AND2, AND an output terminal of said second logic AND gate AND2 is connected to an input terminal of said first pulse signal amplifier X1.
7. The SiC MOSFET active driving circuit of claim 5, wherein the turn-on voltage injection circuit comprises a third switching tube Q3, a third diode D3 AND a ninth resistor R9, wherein an emitter of the third switching tube Q3 is connected to a fifth reference voltage Vref5, a base of the third switching tube Q3 is connected to the output terminal of the first logic AND gate AND1, a collector of the third switching tube Q3 is connected to a cathode of the third diode D3, an anode of the third diode D3 is connected to one end of the ninth resistor R9, AND another end of the ninth resistor R9 is connected to the second node.
8. The SiC MOSFET active driving circuit of claim 6, wherein the turn-off voltage injection circuit comprises a fourth switching tube Q4, a fourth diode D4 and a tenth resistor R10, wherein a collector of the fourth switching tube Q4 is connected to a sixth reference voltage Vref6, a base of the fourth switching tube Q4 is connected to an output terminal of the first pulse signal amplifier X1, an emitter of the fourth switching tube Q4 is connected to an anode of the fourth diode D4, a cathode of the fourth diode D4 is connected to one end of the tenth resistor R10, and another end of the tenth resistor R10 is connected to the third node.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
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| CN114070282B (en) * | 2022-01-12 | 2022-04-08 | 南京航空航天大学 | Varistor driving circuit for inhibiting overshoot of SiC MOSFET |
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| CN105977905A (en) * | 2016-07-04 | 2016-09-28 | 西安电子科技大学 | Over-current and over-voltage and under-voltage drive protection system based on SiC MOSFET |
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| CN109302169A (en) * | 2018-08-23 | 2019-02-01 | 湖南强军科技有限公司 | A kind of SiC MOSFET Drive Protecting Circuit and its guard method |
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