CN212543643U - Circuit for controlling switching speed of super junction MOSFET - Google Patents
Circuit for controlling switching speed of super junction MOSFET Download PDFInfo
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- CN212543643U CN212543643U CN202021505383.5U CN202021505383U CN212543643U CN 212543643 U CN212543643 U CN 212543643U CN 202021505383 U CN202021505383 U CN 202021505383U CN 212543643 U CN212543643 U CN 212543643U
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Abstract
The utility model relates to a circuit for controlling the switching speed of a super junction MOSFET, which comprises a PWM signal, a first resistor, a diode, a first capacitor, a super junction MOSFET and a second capacitor, wherein the first resistor is connected with the PWM signal and the anode of the diode; the cathode of the diode is connected with the grid electrode of the super junction MOSFET, one end of the first capacitor is connected with the grid electrode of the super junction MOSFET, and the other end of the first capacitor is connected with the drain electrode of the super junction MOSFET; one end of the capacitor II is connected with the grid electrode of the super junction MOSFET, and the other end of the capacitor II is connected with the source electrode of the super junction MOSFET; and the capacitor III and the resistor IV are connected in series and then connected in parallel between the drain electrode and the source electrode of the super junction MOSFET. The utility model has the advantages of simple structure, convenient realization and the like. And negative effects of oscillation, interference, overhigh voltage spike, poor system EMI characteristics and the like caused by overhigh switching speed when the super junction MOSFET is used are avoided.
Description
Technical Field
The utility model relates to a circuit of control super junction MOSFET switching speed.
Background
In a switching power supply circuit, a key switching tube mainly uses a MOSFET. When the circuit operates, the MOSFET is always in an on state and an off state to play a role of a switch, current flows when the MOSFET is switched on, and current is cut off when the MOSFET is switched off, so that energy is transmitted for the circuit repeatedly, and the whole power supply circuit system converts the electric energy of an alternating current power grid into direct current electric energy of specific voltage and current. The speed of turn-on and turn-off at the time of MOSFET switching affects the characteristics of the overall circuitry, such as EMI, efficiency, etc.
Due to the limitation of a process structure, the MOSFET with the traditional structure has limited on-resistance in the high-voltage field of more than 600V and larger loss. For reasons of efficiency rating, environmental protection, etc., a super junction MOSFET with a lower on-resistance has to be used. Compared with the MOSFET with the traditional structure, the super-junction MOSFET has lower conduction loss and faster switching speed. The use of the super junction MOSFET can relatively improve the efficiency and power density of the whole system. Too fast a switching speed can cause some unavoidable problems, such as: oscillations, excessive voltage spikes, and poor system EMI characteristics. Therefore, some measures need to be taken to control the switching speed of the superjunction MOSFET.
A conventional circuit for controlling the switching speed of a MOSFET is shown in fig. 1, and comprises a PWM signal, a resistor R1, a MOSFET, a high level Vh, and a ground reference GND, wherein one end of the resistor R1 is connected to the PWM signal, the other end of the resistor R1 is connected to the gate of the MOSFET, the drain of the MOSFET is connected to the high level Vh, and the source of the MOSFET is connected to the ground reference GND. This circuit is insufficient in controlling the switching speed of the MOSFET and cannot suppress an excessively high switching speed. Super junction MOSFETs have faster switching speeds than conventional MOSFETs and it is therefore necessary to employ a circuit that controls the switching speed of super junction MOSFETs.
SUMMERY OF THE UTILITY MODEL
In order to avoid when using super junction MOSFET, because shock, interference, the too high, system EMI characteristic such as poor negative effects that bring of its switching speed is too fast, the utility model discloses the technical problem that will solve is: a circuit for controlling the switching speed of a super junction MOSFET is provided.
A circuit for controlling the switching speed of a super junction MOSFET comprises a super junction MOSFET, wherein the grid electrode of the super junction MOSFET is connected with one end of a first resistor R1 through a diode D1, the source electrode is connected with a ground reference point, the drain electrode is connected with a high level Vh, the other end of a first resistor R1 is connected with a signal PWM signal which is output by a main control chip and drives the super junction MOSFET Q2, wherein a PWM signal, a first resistor R1, a diode D1, a first capacitor C1, the super junction MOSFET Q2 and a second capacitor C2 jointly form an open loop, one end of a resistor R1 is connected with the PWM signal, and the other end of the resistor R1 is connected with the anode of a diode D1; the anode of the diode D1 is connected with the R1, the cathode of the diode D1 is connected with the grid of the super junction MOSFET Q2, one end of the capacitor C1 is connected with the grid of the super junction MOSFET Q2, and the other end of the capacitor C1 is connected with the drain of the super junction MOSFET Q2; one end of the capacitor C2 is connected with the grid electrode of the super junction MOSFET Q2, and the other end of the capacitor C2 is connected with the source electrode of the super junction MOSFET Q2; the capacitor three C3 and the resistor four R4 are connected in series and then connected in parallel between the drain and the source of the super junction MOSFET Q2, so that the drain of the super junction MOSFET Q2 and one end of the C3 are connected to the high-voltage input end Vh in common.
The PWM signal is a signal output by the main control chip to drive the super junction MOSFET Q2, and is a square wave signal with a certain period of voltage, and the voltage of the ground signal GND is generally zero volt. The PWM signal which is output by the main control chip and drives the super junction MOSFET Q2 reaches the grid electrode of the super junction MOSFET through the resistor R1 and the diode D1 to supply a starting signal to the super junction MOSFET Q2, at the moment, the capacitor I C1 and the capacitor II C2 can absorb part of the energy of the signal, the input capacitance effect of the super junction MOSFET is enhanced through the capacitor C1 and the capacitor C2, the time and the waveform smoothness of the MOSFET switching moment can be adjusted, the rising edge of the driving signal is slow, the switching-on time of the super junction MOSFET Q2 is prolonged, the switching-on waveform is smooth, and the interference caused by the fact that the switching-on is too fast is avoided. Meanwhile, the high-voltage input end Vh is generally 400V-700V, when the super junction MOSFET Q2 is turned off, at the moment of turning off, the resistor R4 and the capacitor C3 can absorb part of energy of the super junction MOSFET Q2 at the turning off moment, and the voltage rising speed between the drain electrode and the source electrode of the super junction MOSFET is slowed down, so that the problems of oscillation, radiation and the like caused by too fast voltage change of the super junction MOSFET at the turning off moment are solved. The capacitor three C3 and the resistor four R4 can adjust the time of the super junction MOSFET Q2 at the turn-off moment and the change rate of the waveform, thereby playing a role in controlling the switching speed of the super junction MOSFET.
Furthermore, a triode Q1 and a resistor two R2 are connected in parallel with the grid and the source of the super junction MOSFET Q2, the base of the triode Q1 is connected with the anode of a diode D1, the collector of the triode Q1 is connected with the source of the super junction MOSFET Q2, the triode is grounded, and the emitter is connected with the grid of the super junction MOSFET Q2 through the resistor two R2. When the super junction MOSFET Q2 is turned off, the triode Q1 is switched on, the power supply of the grid electrode of the super junction MOSFET Q2 is pulled down, the MOSFET is turned off, the area of a turn-off loop of the super junction MOSFET Q2 is reduced, interference and oscillation are avoided, meanwhile, the current in the MOSFET is also rapidly reduced to zero, and the turn-off loss is reduced. The second resistor R2 can suppress the oscillation and interference when the transistor Q1 is turned on.
Furthermore, the resistors R2 and R3 are connected in series and then connected in parallel between the gate and the source of the super junction MOSFET Q2, and when the circuit works, the resistor R2 and the resistor R3 can discharge the redundant energy accumulated on the gate of the super junction MOSFET Q2, so that the super junction MOSFET Q2 cannot be turned on by mistake, and the super junction MOSFET Q2 is protected.
The circuit is connected in parallel at the grid and the source of the super junction MOSFET Q2 through the triode Q1 and the resistor R2, the area of a turn-off loop can be reduced, interference and oscillation are reduced, meanwhile, the current of the super junction MOSFET Q2 can be rapidly reduced to zero when the circuit is turned off, and turn-off loss is reduced.
Specifically, the super junction MOSFET Q2 is an N-type high-voltage super junction MOSFET, each capacitor and each resistor are nonpolar devices, the triode Q1 and the resistor two R2 are connected in parallel with the gate and the source of the super junction MOSFET Q2, a circuit for reducing interference and oscillation is formed between the super junction MOSFET Q2 and the resistor one R1 by a diode D1, a PNP triode Q1, a resistor two R2, a resistor three R3, a capacitor one C1 and a capacitor two C2, one end of the resistor one R1 is connected with the anode of a diode D1, the cathode of the diode D1 is connected with the gate of the super junction MOSFET Q2, and the resistor two R2 and the resistor three R3 are connected in series and then connected in parallel between the gate and the source of the super junction MOSFET Q2; the base electrode of the triode Q1 is connected with the anode of the diode D1, the collector electrode of the triode Q1 is connected with the source electrode of the super junction MOSFET Q2, and the emitter electrode of the triode Q1 is connected with the connection point of the second resistor R2 and the third resistor R3; the capacitor I C1 is connected in parallel between the grid and the drain of the super junction MOSFET Q2; the capacitor two C2 is connected in parallel between the gate and the source of the super junction MOSFET Q2.
The capacitor C1 is connected with the grid and the drain of the super junction MOSFET Q2 in parallel, the capacitor C2, the resistor R2 and the resistor R3 are connected with the grid and the source of the super junction MOSFET Q2 in parallel, and the capacitor C3 is connected with the resistor R4 in series and then connected with the drain and the source of the super junction MOSFET Q2 in parallel, so that the switching speed of the super junction MOSFET can be well controlled.
All capacitors and resistors in the circuit of the utility model have no difference between positive and negative electrodes or between the positive and negative electrodes, and the PWM signal is a signal which is output by the main control chip and drives the super junction MOSFET, generally a voltage square wave signal with a certain period; vh is a direct-current high-voltage level in the circuit; the ground signal GND is a reference ground in the circuit.
The utility model has the advantages that: the circuit for controlling the switching speed of the super-junction MOSFET has the advantages of simple structure, convenience in implementation and the like. And negative effects of oscillation, interference, too high voltage spike, poor system EMI characteristics and the like caused by too high switching speed of the super junction MOSFET are avoided.
Drawings
FIG. 1 is a conventional circuit for controlling the switching speed of a MOSFET;
fig. 2 is a schematic diagram of the circuit structure of the present invention.
Detailed Description
The present invention provides a circuit for controlling the switching speed of a super junction MOSFET, and the exemplary embodiments will be more fully described in detail below with reference to the accompanying drawings.
As shown in fig. 2, a circuit for controlling the switching speed of a super junction MOSFET includes a super junction MOSFET, a gate of the super junction MOSFET is connected to one end of a first resistor R1, a source is connected to a ground reference point, a drain is connected to a high level Vh, the other end of the first resistor R1 is connected to a PWM signal outputted by a main control chip for driving the super junction MOSFET, and a capacitor tri C3 and a resistor tetra R4 are connected in series and then connected in parallel between the drain and the source of the super junction MOSFET Q2.
As shown in fig. 2, the capacitor tri-C3 is connected in series with the resistor tetra-R4 and then connected in parallel between the drain and the source of the super junction MOSFET Q2, the drain of the super junction MOSFET Q2 and one end of the capacitor tri-C3 are commonly connected to a high voltage input Vh, which is generally 400V-700V; when the super junction MOSFET Q2 is turned off, at the moment of turning off, the resistor R4 and the capacitor C3 can absorb part of energy of the super junction MOSFET Q2 at the turning off moment, and the voltage rising speed between the drain and the source of the super junction MOSFET is slowed down, so that the problems of oscillation, radiation and the like caused by too fast voltage change of the super junction MOSFET at the turning off moment are avoided.
In this embodiment, the structure is the same as the conventional MOSFET structure, wherein the gate is the control electrode, the drain is the high-level input stage, and the source is the common terminal.
As shown in fig. 2, in this embodiment, a PWM signal, a resistor R1, a diode D1, a capacitor C1, a super junction MOSFET Q2, and a capacitor C2 jointly form an open loop, one end of the resistor R1 is connected to the PWM signal, and the other end is connected to an anode of a diode D1; the anode of the diode D1 is connected with the first resistor R1, the cathode of the diode D1 is connected with the grid of the super junction MOSFET Q2, one end of the capacitor C1 is connected with the grid of the super junction MOSFET Q2, and the other end of the capacitor C1 is connected with the drain of the super junction MOSFET Q2; one end of the capacitor II C2 is connected with the grid electrode of the super junction MOSFET Q2, and the other end of the capacitor II C2 is connected with the source electrode of the super junction MOSFET Q2; the PWM signal is a signal which is output by the main control chip and drives the super junction MOSFET Q2, and is generally a voltage square wave signal with a certain period, and the amplitude of the square wave signal is generally 8-15V; the ground signal GND is a reference ground in the circuit, and the reference ground voltage is generally zero volts. The PWM signal which is output by the main control chip and drives the super junction MOSFET Q2 reaches the grid electrode of the super junction MOSFET Q2 through the resistor I R1 and the diode D1, and gives a starting signal to the super junction MOSFET Q2, at the moment, the capacitor I C1 and the capacitor II C2 can absorb part of the energy of the signal, so that the rising edge of the driving signal becomes slow, the turn-on time of the super junction MOSFET Q2 becomes long, the turn-on waveform becomes smooth, and the interference caused by the fact that the super junction MOSFET Q2 is turned on too fast is avoided.
As shown in fig. 2, the resistors R2 and R3 are connected in series and then connected in parallel between the gate and the source of the super junction MOSFET Q2, and when the circuit operates, the resistor two R2 and the resistor three R3 can discharge the excess energy accumulated on the gate of the super junction MOSFET Q2, so that the super junction MOSFET Q2 is not turned on by mistake, and the super junction MOSFET Q2 is protected.
As shown in fig. 2, the triode Q1 and the second resistor R2 are connected in parallel between the gate and the source of the super junction MOSFET Q2, when the super junction MOSFET is turned off, the triode Q1 is turned on to pull down the power supply of the gate of the super junction MOSFET Q2, and the MOSFET is turned off, so that the area of a turn-off loop of the super junction MOSFET Q2 is reduced, interference and oscillation are avoided, meanwhile, the current in the MOSFET is also rapidly reduced to zero, and the turn-off loss is reduced. The resistor R2 can suppress the oscillation and interference when the triode is conducted.
Claims (4)
1. The utility model provides a circuit of control super junction MOSFET switching speed, includes super junction MOSFET pipe, the grid of super junction MOSFET pipe passes through diode (D1) and connects the one end of resistance one (R1), source ground reference point, the drain electrode connects high level Vh, the PWM signal of the drive super junction MOSFET of main control chip output is connected to the other end of resistance one (R1), its characterized in that: a PWM signal, a resistor I (R1), a diode (D1), a capacitor I (C1), a super junction MOSFET (Q2) and a capacitor II (C2) jointly form a switching-on loop, one end of the resistor I (R1) is connected with the PWM signal, and the other end of the resistor I (R1) is connected with the anode of the diode (D1); the anode of the diode (D1) is connected with the resistor I (R1), the cathode of the diode is connected with the grid of the super junction MOSFET (Q2), one end of the capacitor I (C1) is connected with the grid of the super junction MOSFET (Q2), and the other end of the capacitor I (C1) is connected with the drain of the super junction MOSFET (Q2); one end of the capacitor II (C2) is connected with the grid electrode of the super junction MOSFET (Q2), and the other end of the capacitor II (C2) is connected with the source electrode of the super junction MOSFET (Q2); the capacitor three (C3) and the resistor four (R4) are connected in series and then connected in parallel between the drain and the source of the super junction MOSFET (Q2).
2. The circuit of claim 1, wherein the switching speed of the super junction MOSFET is selected from the group consisting of: a triode (Q1) and a resistor II (R2) are connected between the grid and the source of the super junction MOSFET (Q2) in parallel, the base of the triode (Q1) is connected with the anode of a diode (D1), the collector of the triode (Q1) is connected with the source of the super junction MOSFET (Q2), the collector of the triode is grounded, and the emitter of the triode is connected with the grid of the super junction MOSFET (Q2) through the resistor II (R2).
3. The circuit of claim 2, wherein the switching speed of the super junction MOSFET is selected from the group consisting of: the second resistor (R2) and the third resistor (R3) are connected in series and then connected in parallel between the grid and the source of the super junction MOSFET (Q2), and when the circuit works, the second resistor (R2) and the third resistor (R3) discharge the redundant energy accumulated on the grid of the super junction MOSFET (Q2).
4. The circuit of claim 3, wherein the switching speed of the super junction MOSFET is selected from the group consisting of: the super junction MOSFET (Q2) is an N-type high-voltage super junction MOSFET, each capacitor and each resistor are nonpolar devices, the super junction MOSFET (Q1) and a resistor II (R2) are connected in parallel with the grid and the source of the super junction MOSFET (Q2), a circuit for reducing interference and oscillation is formed between the super junction MOSFET (Q2) and the resistor I (R1) by a diode (D1), a PNP triode (Q1), a resistor II (R2), a resistor III (R3), a capacitor I (C1) and a capacitor II (C2), one end of the resistor I (R1) is connected with the anode of a diode (D1), the cathode of the diode (D1) is connected with the grid of the super junction MOSFET (Q2), and the resistor II (R2) and the resistor III (R3) are connected in series and then connected in parallel between the grid and the source of the super junction MOSFET (Q2); the base electrode of the triode (Q1) is connected with the anode of the diode (D1), the collector electrode of the triode (Q1) is connected with the source electrode of the super junction MOSFET (Q2), and the emitter electrode of the triode (Q1) is connected with the connection point of the second resistor (R2) and the third resistor (R3); the capacitor I (C1) is connected in parallel between the grid and the drain of the super junction MOSFET (Q2); and the second capacitor (C2) is connected in parallel between the gate and the source of the super junction MOSFET (Q2).
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021505383.5U CN212543643U (en) | 2020-07-27 | 2020-07-27 | Circuit for controlling switching speed of super junction MOSFET |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202021505383.5U CN212543643U (en) | 2020-07-27 | 2020-07-27 | Circuit for controlling switching speed of super junction MOSFET |
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| Publication Number | Publication Date |
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| CN212543643U true CN212543643U (en) | 2021-02-12 |
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| Application Number | Title | Priority Date | Filing Date |
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| CN202021505383.5U Active CN212543643U (en) | 2020-07-27 | 2020-07-27 | Circuit for controlling switching speed of super junction MOSFET |
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| CN (1) | CN212543643U (en) |
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- 2020-07-27 CN CN202021505383.5U patent/CN212543643U/en active Active
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