CN111327302A - SiC MOSFET active drive circuit - Google Patents
SiC MOSFET active drive circuit Download PDFInfo
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- CN111327302A CN111327302A CN202010097316.2A CN202010097316A CN111327302A CN 111327302 A CN111327302 A CN 111327302A CN 202010097316 A CN202010097316 A CN 202010097316A CN 111327302 A CN111327302 A CN 111327302A
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Abstract
The invention discloses a SiC MOSFET active drive circuit, comprising: the pulse generator comprises a driving circuit, a voltage sampling circuit, a pulse generating circuit and a voltage injection circuit; the voltage sampling circuit is used for collecting voltage signals at two ends of a grid source electrode in the switching process of the SiC MOSFET and transmitting the voltage signals to the pulse generating circuit; the pulse generating circuit is used for generating a pulse signal in a specific time period of the switching process of the SiC MOSFET and transmitting the pulse signal to the voltage injection circuit; and the voltage injection circuit is used for injecting voltage into the driving circuit according to the pulse signal. The advantages are that: the circuit of the invention is simple, can inhibit the phenomena of current, voltage overshoot and oscillation, does not increase the resistance value of the driving resistor, does not prolong the switching time of the SiC MOSFET and does not increase the switching loss.
Description
Technical Field
The invention relates to a SiC MOSFET active driving circuit, and belongs to the technical field of power electronics.
Background
SiC (silicon carbide) semiconductors have advantages in that they have a higher penetrating electric field, a greater thermal conductivity, a faster electron saturation velocity and a lower intrinsic carrier concentration than Si (silicon), and thus silicon carbide metal oxide semiconductor field effect transistors (SiC MOSFETs) are being widely used in high power density and high switching frequency applications. Ideally, the SiC MOSFET can switch faster and the total switching loss can be reduced to a large extent, but in practical applications, parasitic inductance present in the circuit layout and parasitic capacitance of the load seriously affect the advantages of the SiC MOSFET, and overshoot and oscillation of the device voltage and current can occur due to the different LC networks formed between the parasitic inductance, the device and the parasitic capacitance of the load, which can cause undesirable stress on the device and increase the overall switching loss, and the problem needs to be solved in order to promote the application of the SiC MOSFET.
At present, there are several main solutions to this problem. On one hand, the phenomena of current, voltage overshoot and oscillation in the switching process of the SiC MOSFET can be relieved by increasing the resistance value of the driving resistor, but the switching time of the SiC MOSFET can be prolonged by increasing the resistance value of the driving resistor, and meanwhile, the switching loss can be increased. On the other hand, the phenomena of current, voltage overshoot and oscillation in the switching process of the SiC MOSFET can be relieved by adding the RCD absorption circuits at the two ends of the drain and source electrodes of the SiC MOSFET, but the addition of the RCD absorption circuits requires the use of additional devices, so that the circuit complexity is increased, and the switching loss of the SiC MOSFET is increased.
Content of Ming dynasty
The invention aims to overcome the defects of the prior art and provides a SiC MOSFET active driving circuit.
In order to solve the above-mentioned technical problem, the present invention provides a SiC MOSFET active driving circuit, comprising: the pulse generator comprises a driving circuit, a voltage sampling circuit, a pulse generating circuit and a voltage injection circuit;
the voltage sampling circuit is used for collecting voltage signals at two ends of a grid source electrode in the switching process of the SiC MOSFET and transmitting the voltage signals to the pulse generating circuit;
the pulse generating circuit is used for generating a pulse signal according to the received voltage signal and transmitting the pulse signal to the voltage injection circuit;
the voltage injection circuit is used for injecting voltage into the driving circuit according to the pulse signal;
the driving circuit is used for generating driving voltage required by the SiC MOSFET switch.
Further, the voltage sampling circuit comprises an on voltage sampling circuit and an off voltage sampling circuit; the switching-on voltage sampling circuit is used for collecting voltage signals at two ends of a grid source electrode in the switching-on process of the SiC MOSFET; the turn-off voltage sampling circuit is used for collecting voltage signals at two ends of a grid source electrode in the turn-off process of the SiC MOSFET;
the pulse generating circuit comprises an on pulse generating circuit and an off pulse generating circuit; the switching-on pulse generating circuit is used for receiving the voltage signal collected by the switching-on voltage sampling circuit and outputting a switching-on pulse signal; the turn-off pulse generating circuit is used for receiving the voltage signal acquired by the turn-off voltage sampling circuit and outputting a turn-off pulse signal;
the voltage injection circuit comprises a switching-on voltage injection circuit and a switching-off voltage injection circuit; the switching-on voltage injection circuit is used for receiving a switching-on pulse signal output by the switching-on pulse generation circuit and outputting an injection voltage; and the turn-off voltage injection circuit is used for receiving the turn-off pulse signal output by the turn-off pulse generation circuit and outputting injection voltage.
Further, the driving circuit includes a first switch tube Q1, a second switch tube Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D1, a second diode D2, a first node, a second node, a third node, and a fourth node, wherein a collector of the first switch tube Q1 is connected to a Vcc supply voltage, a base of the first switch tube Q1 is connected to a base of the second switch tube Q2, an emitter of the first switch tube Q1 is connected to the first node, an emitter of the second switch tube Q2 is connected to the first node, a collector of the second switch tube Q2 is connected to a Vee supply voltage, one end of the first resistor R1 is connected to the first node, the other end of the first resistor R1 is connected to the second node, one end of the second resistor R2 is connected to the first node, and the other end of the second resistor R2 is connected to the anode of the first resistor R1, the cathode of the first diode D1 is connected with the fourth node, one end of the third resistor R3 is connected with the first node, the other end of the third resistor R3 is connected with the third node, one end of the fourth resistor R4 is connected with the third node, the other end of the fourth resistor R4 is connected with the cathode of the second diode D2, the anode of the second diode D2 is connected with the fourth node, the fourth node is connected with the grid of the SiC MOSFET, Vcc is the SiC MOSFET turn-on voltage, and Vee is the SiC MOSFET turn-off voltage.
Further, the turn-on voltage sampling circuit includes a fifth resistor R5, a sixth resistor R6, a first capacitor C1 and a fifth node, wherein one end of the fifth resistor R5 is connected to the fourth node, the other end of the fifth resistor R5 is connected to the fifth node, one end of the sixth resistor R6 is connected to the fifth node, the other end of the sixth resistor R6 is grounded, one end of the first capacitor C1 is connected to the fifth node, and the other end of the first capacitor C1 is grounded.
Further, the turn-off voltage sampling circuit includes a seventh resistor R7, an eighth resistor R8, a second capacitor C2, and a sixth node, wherein one end of the seventh resistor R7 is connected to the fourth node, the other end of the seventh resistor R7 is connected to the sixth node, one end of the eighth resistor R8 is connected to the sixth node, the other end of the eighth resistor R8 is grounded, one end of the second capacitor C2 is connected to the sixth node, and the other end of the second capacitor C2 is grounded.
Further, the turn-on pulse generating circuit includes a first voltage comparator COM1, a second voltage comparator COM2 AND a first logical AND gate 1, wherein a positive input terminal of the first voltage comparator COM1 is connected to the second reference voltage Vref2, a negative input terminal of the first voltage comparator COM1 is connected to the fifth node, a positive input terminal of the second voltage comparator COM2 is connected to the fifth node, a negative input terminal of the second voltage comparator COM2 is connected to the first reference voltage Vref1, an output terminal of the first voltage comparator COM1 is connected to an input terminal of the first logical AND gate 1, AND an output terminal of the second voltage comparator COM2 is connected to another input terminal of the first logical AND gate 1.
Further, the shutdown pulse generation circuit includes a third voltage comparator COM3, a fourth voltage comparator COM4, a second logical AND gate 2 AND a first pulse signal amplifier X1, wherein a positive input terminal of the third voltage comparator COM3 is connected to the fourth reference voltage Vref4, a negative input terminal of the third voltage comparator COM3 is connected to the sixth node, a positive input terminal of the fourth voltage comparator COM4 is connected to the sixth node, a negative input terminal of the fourth voltage comparator COM4 is connected to the third reference voltage Vref3, an output terminal of the third voltage comparator COM3 is connected to an input terminal of the second logical AND gate 2, an output terminal of the fourth voltage comparator COM4 is connected to another input terminal of the second logical AND gate 2, AND an output terminal of the second logical AND gate 2 is connected to an input terminal of the first pulse signal amplifier X1.
Further, the turn-on voltage injection circuit includes a third switching tube Q3, a third diode D3 AND a ninth resistor R9, wherein an emitter of the third switching tube Q3 is connected to the fifth reference voltage Vref5, a base of the third switching tube Q3 is connected to an output terminal of the first logic AND gate 1, a collector of the third switching tube Q3 is connected to a cathode of the third diode D3, an anode of the third diode D3 is connected to one end of the ninth resistor R9, AND the other end of the ninth resistor R9 is connected to the second node.
Further, the turn-off voltage injection circuit includes a fourth switching tube Q4, a fourth diode D4 and a tenth resistor R10, wherein a collector of the fourth switching tube Q4 is connected to the sixth reference voltage Vref6, a base of the fourth switching tube Q4 is connected to the output end of the first pulse signal amplifier X1, an emitter of the fourth switching tube Q4 is connected to an anode of the fourth diode D4, a cathode of the fourth diode D4 is connected to one end of the tenth resistor R10, and the other end of the tenth resistor R10 is connected to the third node.
The invention achieves the following beneficial effects:
the circuit of the invention is simple, can inhibit the phenomena of current, voltage overshoot and oscillation, does not increase the resistance value of the driving resistor, does not prolong the switching time of the SiC MOSFET and does not increase the switching loss.
Drawings
FIG. 1 is a schematic diagram of a circuit module according to the present invention;
FIG. 2 is a schematic diagram of an active driver circuit for a SiC MOSFET according to an embodiment of the present invention;
FIG. 3 is a schematic diagram of a SiC MOSFET active drive circuit test circuit according to one embodiment of the present invention;
FIG. 4 is a schematic diagram of a test experiment turn-on waveform for a SiC MOSFET active drive circuit according to one embodiment of the present invention;
FIG. 5 is a schematic diagram of a conventional test switching waveform of a driving circuit;
FIG. 6 is a schematic diagram of a test experiment turn-off waveform for a SiC MOSFET active drive circuit according to one embodiment of the present invention;
fig. 7 is a schematic diagram of a shutdown waveform of a test experiment of a conventional driving circuit.
Detailed Description
The invention is further described below with reference to the accompanying drawings. The following examples are only for illustrating the technical solutions of the present invention more clearly, and the protection scope of the present invention is not limited thereby.
As shown in fig. 1, which is a block diagram of a circuit module of a SiC MOSFET active driving circuit according to an embodiment of the present invention, the SiC MOSFET active driving circuit includes: the device comprises a driving circuit, a voltage sampling circuit, a pulse generating circuit and a voltage injection circuit.
The voltage sampling circuit is used for collecting voltage signals at two ends of a grid source electrode in the switching process of the SiC MOSFET and transmitting the voltage signals to the pulse generating circuit;
the pulse generating circuit is used for generating a pulse signal according to the received voltage signal and transmitting the pulse signal to the voltage injection circuit;
the voltage injection circuit is used for injecting voltage into the driving circuit according to the pulse signal;
the driving circuit is used for generating driving voltage required by the SiC MOSFET switch.
As shown in fig. 2, the driving circuit includes a first switch Q1, a second switch Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D1, and a second diode D2, wherein a collector of the first switch Q1 is connected to a Vcc supply voltage, a base of the first switch Q1 is connected to a base of the second switch Q2, an emitter of the first switch Q2 is connected to the first node, an emitter of the second switch Q2 is connected to the first node, a collector of the second switch Q2 is connected to a Vee supply voltage, one end of the first resistor R1 is connected to the first node, the other end of the first resistor R1 is connected to the second node, one end of the second resistor R2 is connected to the first node, and the other end of the second resistor R2 is connected to an anode of the first diode D1, the cathode of the first diode D1 is connected to the fourth node, one end of the third resistor R3 is connected to the first node, the other end of the third resistor R3 is connected to the third node, one end of the fourth resistor R4 is connected to the third node, the other end of the fourth resistor R4 is connected to the cathode of the second diode D2, and the anode of the second diode D2 is connected to the fourth node.
The voltage sampling circuit comprises an on-voltage sampling circuit and an off-voltage sampling circuit, wherein the on-voltage sampling circuit comprises a fifth resistor R5, a sixth resistor R6 and a first capacitor C1, one end of the fifth resistor R5 is connected with the fourth node, the other end of the fifth resistor R5 is connected with the fifth node, one end of the sixth resistor R6 is connected with the fifth node, the other end of the sixth resistor R6 is grounded, one end of the first capacitor C1 is connected with the fifth node, the other end of the first capacitor C1 is grounded, the off-voltage sampling circuit comprises a seventh resistor R7, an eighth resistor R8 and a second capacitor C2, one end of the seventh resistor R7 is connected with the fourth node, the other end of the seventh resistor R7 is connected with the sixth node, and one end of the eighth resistor R8 is connected with the sixth node, the other end of the eighth resistor R8 is grounded, one end of the second capacitor C2 is connected to the sixth node, and the other end of the second capacitor C2 is grounded.
The pulse generating circuit comprises an on-pulse generating circuit AND an off-pulse generating circuit, wherein the on-pulse generating circuit comprises a first voltage comparator COM1, a second voltage comparator COM2 AND a first logic AND gate 1, wherein the positive input end of the first voltage comparator COM1 is connected with the second reference voltage Vref2, the negative input end of the first voltage comparator COM1 is connected with the fifth node, the positive input end of the second voltage comparator COM2 is connected with the fifth node, the negative input end of the second voltage comparator COM2 is connected with the first reference voltage Vref1, the output end of the first voltage comparator COM1 is connected with one input end of the first logic AND gate 1, the output end of the second voltage comparator COM2 is connected with the other input end of the first logic AND gate 1, the off-pulse generating circuit comprises a third voltage comparator COM3, a fourth voltage comparator COM4, a second logic AND gate 2 AND a first pulse signal amplifier X1, wherein a positive input terminal of the third voltage comparator COM3 is connected to the fourth reference voltage Vref4, a negative input terminal of the third voltage comparator COM3 is connected to the sixth node, a positive input terminal of the fourth voltage comparator COM4 is connected to the sixth node, a negative input terminal of the fourth voltage comparator COM4 is connected to the third reference voltage Vref3, an output terminal of the third voltage comparator COM3 is connected to an input terminal of the second logic AND gate 2, an output terminal of the fourth voltage comparator COM4 is connected to another input terminal of the second logic AND gate 2, AND an output terminal of the second logic AND gate 2 is connected to an input terminal of the first pulse signal amplifier X1.
The voltage injection circuit comprises a turn-on voltage injection circuit AND a turn-off voltage injection circuit, the turn-on voltage injection circuit comprises a third switch tube Q3, a third diode D3 AND a ninth resistor R9, wherein the emitter of the third switch tube Q3 is connected with the fifth reference voltage Vref5, the base of the third switch tube Q3 is connected with the output end of the first logic AND gate 1, the collector of the third switch tube Q3 is connected with the cathode of the third diode D3, the anode of the third diode D3 is connected with one end of the ninth resistor R9, the other end of the ninth resistor R9 is connected with the second node, the turn-off voltage injection circuit comprises a fourth switch tube Q4, a fourth diode D4 AND a tenth resistor R10, wherein the collector of the fourth switch tube Q4 is connected with the sixth reference voltage Vref6, AND the base of the fourth switch tube Q4 is connected with the output end of the first pulse signal amplifier X1, an emitter of the fourth switching tube Q4 is connected to an anode of the fourth diode D4, a cathode of the fourth diode D4 is connected to one end of the tenth resistor R10, and the other end of the tenth resistor R10 is connected to the third node.
The SiC MOSFET active drive circuit will be further explained by specific embodiments below.
In one embodiment of the invention, Vcc and Vee are SiC MOSFET drive voltages, Vcc is the turn-on voltage, Vee is the turn-off voltage, the selected Vcc and Vee drive voltages are determined based on the actual SiC MOSFET selected,
in this embodiment, Vcc takes the value of +20V, Vee takes the value of-5V, and those skilled in the art may specifically select the Vcc value and Vee value according to actual conditions, which are not specifically limited herein.
In one embodiment of the present invention, the first resistor R1, the second resistor R2, the third resistor R3 and the fourth resistor R4 have the same resistance.
In an embodiment of the present invention, values of the fifth resistor R5, the sixth resistor R6, the seventh resistor R7, the eighth resistor R8, the first capacitor C1, and the second capacitor C2 are not limited.
In one embodiment of the invention, the models of the first voltage comparator COM1, the second voltage comparator COM2, the third voltage comparator COM3 and the fourth voltage comparator COM4 are not limited.
In one embodiment of the present invention, the values of the first reference voltage Vref1, the second reference voltage Vref2, the third reference voltage Vref3 and the fourth reference voltage Vref4 are determined according to the type of SiC MOSFET used, and are not limited herein.
In one embodiment of the present invention, the values of the fifth reference voltage Vref5 and the sixth reference voltage Vref6 are determined in relation to the type of SiC MOSFET used, and are not limited herein.
In an embodiment of the present invention, the types of the first switch tube Q1, the third switch tube Q3, and the fourth switch tube Q4 are low-power NPN transistors, the second switch tube Q2 is a low-power PNP transistor, and the types of the first switch tube Q1, the second switch tube Q2, the third switch tube Q3, and the fourth switch tube Q4 are not limited.
The SiC MOSFET active driving circuit provided by the embodiment of the invention can inhibit current, voltage overshoot and oscillation in the switching process of the SiC MOSFET, is realized based on the circuit, and has the following specific working principle:
in the turn-on process of the SiC MOSFET, the turn-on voltage sampling circuit samples the grid-source voltage of the SiC MOSFET, the divided voltage is transmitted into the first comparator COM1 AND the second comparator COM2 after being divided by the sampling resistor, when the divided voltage is lower than a first reference voltage Vref1, the first comparator COM1 outputs a high level, the second comparator COM2 outputs a low level, so that the first logic AND gate 1 outputs a low level, the third switching tube Q3 is turned off, the turn-on voltage injection circuit does not work, when the divided voltage is lower than the second reference voltage Vref2 AND higher than the first reference voltage Vref1, the first comparator COM1 AND the second comparator COM2 both output a high level, so that the first logic AND gate 1 outputs a high level, the third switching tube Q3 is turned on, the turn-on voltage injection circuit works, voltage is injected to the grid of the SiC MOSFET, when the divided voltage is higher than the second reference voltage Vref2, the first comparator 1 outputs a low level, the second comparator COM2 outputs a high level, so the first logic AND gate AND1 outputs a low level, AND the turn-on voltage injection circuit does not operate. And injecting voltage into the grid of the device in the drain current rising stage of the SiC MOSFET opening process to inhibit the drain current rising rate of the SiC MOSFET, thereby inhibiting current overshoot and oscillation in the SiC MOSFET opening process.
In the turn-off process of the SiC MOSFET, the turn-off voltage sampling circuit samples the gate-source voltage of the SiC MOSFET, the divided voltage is transmitted into the third comparator COM3 AND the fourth comparator COM4 after being divided by the sampling resistor, when the divided voltage is lower than a third reference voltage Vref3, the third comparator COM3 outputs a high level, the fourth comparator COM4 outputs a low level, the second logic AND gate 2 outputs a low level, the fourth switching tube Q4 is turned off through the first pulse signal amplifier, the turn-off voltage injection circuit does not work, when the divided voltage is higher than the third reference voltage Vref3 AND lower than the fourth reference voltage Vref4, the third comparator COM3 AND the fourth comparator COM4 both output a high level, the second logic AND gate 2 outputs a high level, the third switching tube Q4 is turned on, the turn-off voltage injection circuit works to inject voltage into the gate of the SiC MOSFET, when the divided voltage is higher than the fourth reference voltage Vref4, the third comparator COM3 outputs a low level, AND the fourth comparator COM4 outputs a high level, so the second logic AND gate AND2 outputs a low level, AND the off-voltage injection circuit does not operate. And injecting voltage into the grid of the device in the drain current descending stage of the SiC MOSFET turn-off process to inhibit the drain-source voltage rising rate of the SiC MOSFET, thereby inhibiting voltage overshoot and oscillation in the turn-off process of the SiC MOSFET.
Fig. 3 is a test circuit of this embodiment, which is used to test the actual effect of the SiC MOSFET active driving circuit of the embodiment of the present invention, where D is a freewheeling diode connected to the drain of the SiC MOSFET, L and R are a load inductor and a load resistor, respectively, the load inductor and the load resistor are connected in series and in parallel with the freewheeling diode, Vdc is a dc bus voltage, the anode is connected to the cathode of the diode, and the cathode is grounded. As can be seen from fig. 4 and 5, the current overshoot and oscillation during the turn-on process of the device can be significantly suppressed by the active driving circuit as compared with the conventional driving circuit, and as can be seen from fig. 6 and 7, the voltage overshoot and oscillation during the turn-off process of the device can be significantly suppressed by the active driving circuit as compared with the conventional circuit. U in FIGS. 4-7gs、uds、idRespectively a device gate-source voltage, a drain-source voltage and a drain current.
In summary, the SiC MOSFET active driving circuit according to the embodiment of the present invention can detect the gate-source voltage of the device during the operation of the SiC MOSFET, and inject the voltage into the gate of the device during the specific time period of the switching of the device, so as to suppress the rising speed of the current and the voltage during the switching of the SiC MOSFET, thereby suppressing the overshoot and the oscillation of the current and the voltage. The SiCMOS active drive circuit can be used as a drive circuit of various SiC MOSFETs, and is applied to application occasions of high power density, high temperature and the like, such as various devices of photovoltaic inverters, transformers, electric vehicles and the like.
The above description is only a preferred embodiment of the present invention, and it should be noted that, for those skilled in the art, several modifications and variations can be made without departing from the technical principle of the present invention, and these modifications and variations should also be regarded as the protection scope of the present invention.
Claims (9)
1. A SiC MOSFET active drive circuit, comprising: the pulse generator comprises a driving circuit, a voltage sampling circuit, a pulse generating circuit and a voltage injection circuit;
the voltage sampling circuit is used for collecting voltage signals at two ends of a grid source electrode in the switching process of the SiC MOSFET and transmitting the voltage signals to the pulse generating circuit;
the pulse generating circuit is used for generating a pulse signal according to the received voltage signal and transmitting the pulse signal to the voltage injection circuit;
the voltage injection circuit is used for injecting voltage into the driving circuit according to the pulse signal;
the driving circuit is used for generating driving voltage required by the SiC MOSFET switch.
2. The SiC MOSFET active drive circuit of claim 1,
the voltage sampling circuit comprises an on voltage sampling circuit and an off voltage sampling circuit; the switching-on voltage sampling circuit is used for collecting voltage signals at two ends of a grid source electrode in the switching-on process of the SiC MOSFET; the turn-off voltage sampling circuit is used for collecting voltage signals at two ends of a grid source electrode in the turn-off process of the SiC MOSFET;
the pulse generating circuit comprises an on pulse generating circuit and an off pulse generating circuit; the switching-on pulse generating circuit is used for receiving the voltage signal collected by the switching-on voltage sampling circuit and outputting a switching-on pulse signal; the turn-off pulse generating circuit is used for receiving the voltage signal acquired by the turn-off voltage sampling circuit and outputting a turn-off pulse signal;
the voltage injection circuit comprises a switching-on voltage injection circuit and a switching-off voltage injection circuit; the switching-on voltage injection circuit is used for receiving a switching-on pulse signal output by the switching-on pulse generation circuit and outputting an injection voltage; and the turn-off voltage injection circuit is used for receiving the turn-off pulse signal output by the turn-off pulse generation circuit and outputting injection voltage.
3. The SiC MOSFET active drive circuit of claim 2, wherein the drive circuit comprises a first switch Q1, a second switch Q2, a first resistor R1, a second resistor R2, a third resistor R3, a fourth resistor R4, a first diode D1, a second diode D2, a first node, a second node, a third node, and a fourth node, wherein the collector of the first switch Q1 is connected to a Vcc supply voltage, the base of the first switch Q1 is connected to the base of the second switch Q2, the emitter of the first switch Q1 is connected to the first node, the emitter of the second switch Q2 is connected to the first node, the collector of the second switch Q2 is connected to a Vee supply voltage, one end of the first resistor R1 is connected to the first node, the other end of the first resistor R1 is connected to the second node, one end of the second resistor R2 is connected with the first node, the other end of the second resistor R2 is connected with the anode of the first diode D1, the cathode of the first diode D1 is connected with the fourth node, one end of the third resistor R3 is connected with the first node, the other end of the third resistor R3 is connected with the third node, one end of the fourth resistor R4 is connected with the third node, the other end of the fourth resistor R4 is connected with the cathode of the second diode D2, the anode of the second diode D2 is connected with the fourth node, the fourth node is connected with the gate of the MOSFET, Vcc is the SiC turn-on voltage of the MOSFET, and Vee is the SiC turn-off voltage of the MOSFET.
4. The SiC MOSFET active driver circuit of claim 3, wherein the turn-on voltage sampling circuit comprises a fifth resistor R5, a sixth resistor R6, a first capacitor C1 and a fifth node, wherein one end of the fifth resistor R5 is connected to the fourth node, the other end of the fifth resistor R5 is connected to the fifth node, one end of the sixth resistor R6 is connected to the fifth node, the other end of the sixth resistor R6 is connected to ground, one end of the first capacitor C1 is connected to the fifth node, and the other end of the first capacitor C1 is connected to ground.
5. The SiC MOSFET active drive circuit of claim 3, wherein the turn-off voltage sampling circuit comprises a seventh resistor R7, an eighth resistor R8, a second capacitor C2 and a sixth node, wherein one end of the seventh resistor R7 is connected to the fourth node, the other end of the seventh resistor R7 is connected to the sixth node, one end of the eighth resistor R8 is connected to the sixth node, the other end of the eighth resistor R8 is connected to ground, one end of the second capacitor C2 is connected to the sixth node, and the other end of the second capacitor C2 is connected to ground.
6. The SiC MOSFET active driving circuit of claim 4, wherein the turn-on pulse generating circuit comprises a first voltage comparator COM1, a second voltage comparator COM2 AND a first logical AND gate AND1, wherein the positive input terminal of the first voltage comparator COM1 is connected to the second reference voltage Vref2, the negative input terminal of the first voltage comparator COM1 is connected to the fifth node, the positive input terminal of the second voltage comparator COM2 is connected to the fifth node, the negative input terminal of the second voltage comparator COM2 is connected to the first reference voltage Vref1, the output terminal of the first voltage comparator COM1 is connected to an input terminal of the first logical AND gate 1, AND the output terminal of the second voltage comparator COM2 is connected to the other input terminal of the first logical AND gate 35AND 1.
7. The SiC MOSFET active drive circuit of claim 5, the off pulse generating circuit includes a third voltage comparator COM3, a fourth voltage comparator COM4, a second logic AND gate AND2, AND a first pulse signal amplifier X1, wherein a positive input terminal of the third voltage comparator COM3 is connected to the fourth reference voltage Vref4, the negative input end of the third voltage comparator COM3 is connected to the sixth node, the positive input end of the fourth voltage comparator COM4 is connected to the sixth node, the negative input terminal of the fourth voltage comparator COM4 is connected to the third reference voltage Vref3, the output end of the third voltage comparator COM3 is connected to an input end of the second logic AND gate AND2, the output end of the fourth voltage comparator COM4 is connected to the other input end of the second logic AND gate AND2, the output end of the second logic AND gate 2 is connected with the input end of the first pulse signal amplifier X1.
8. The SiC MOSFET active driving circuit of claim 6, wherein the turn-on voltage injection circuit comprises a third switching tube Q3, a third diode D3 AND a ninth resistor R9, wherein an emitter of the third switching tube Q3 is connected to the fifth reference voltage Vref5, a base of the third switching tube Q3 is connected to an output terminal of the first logic AND gate 1, a collector of the third switching tube Q3 is connected to a cathode of the third diode D3, an anode of the third diode D3 is connected to one end of the ninth resistor R9, AND the other end of the ninth resistor R9 is connected to the second node.
9. The SiC MOSFET active driving circuit of claim 7, wherein the turn-off voltage injection circuit comprises a fourth switch transistor Q4, a fourth diode D4 and a tenth resistor R10, wherein a collector of the fourth switch transistor Q4 is connected to the sixth reference voltage Vref6, a base of the fourth switch transistor Q4 is connected to the output terminal of the first pulse signal amplifier X1, an emitter of the fourth switch transistor Q4 is connected to an anode of the fourth diode D4, a cathode of the fourth diode D4 is connected to one end of the tenth resistor R10, and the other end of the tenth resistor R10 is connected to the third node.
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| CN111327302B (en) | 2024-02-13 |
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