CN219247698U - Gate driving circuit of MOS type semiconductor device - Google Patents

Gate driving circuit of MOS type semiconductor device Download PDF

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CN219247698U
CN219247698U CN202223601219.6U CN202223601219U CN219247698U CN 219247698 U CN219247698 U CN 219247698U CN 202223601219 U CN202223601219 U CN 202223601219U CN 219247698 U CN219247698 U CN 219247698U
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circuit
voltage
resistor
semiconductor device
output
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刘敏安
罗海辉
卢圣文
王旭
李�诚
陈彦
任亚东
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Zhuzhou CRRC Times Semiconductor Co Ltd
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Zhuzhou CRRC Times Semiconductor Co Ltd
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    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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    • Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
    • Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes

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Abstract

The present disclosure provides a gate driving circuit of a MOS type semiconductor device. The circuit comprises: the driving voltage output circuit, the fourth resistor, the sampling circuit, the comparison circuit and the resistance value conversion circuit; the resistance conversion circuit is connected with two ends of the fourth resistor and the output end of the comparison circuit, and is used for setting the resistance value of the equivalent resistor between the grid electrode of the MOS type semiconductor device and the output end of the driving voltage output circuit to be a relatively large value when the level state of the comparison result voltage represents that the analog sampling voltage is in a preset continuous voltage interval in the invalid edge period of the driving voltage, and setting the resistance value of the equivalent resistor between the grid electrode of the MOS type semiconductor device and the output end of the driving voltage output circuit to be a relatively small value when the level state of the comparison result voltage represents that the analog sampling voltage is not in the preset continuous voltage interval. The circuit contributes to improving the safety of the circuit.

Description

Gate driving circuit of MOS type semiconductor device
Technical Field
The disclosure belongs to the technical field of power electronics, and in particular relates to a gate driving circuit of a MOS type semiconductor device.
Background
This section is intended to provide a background or context for the embodiments recited in the claims. The description herein is not admitted to be prior art by inclusion in this section.
In the field of power electronic conversion, an IGBT (Insulated Gate BipolarTransistor: insulated gate bipolar transistor) made of a Si-based material is generally used as a high-speed switching element to form a power conversion circuit for performing power conversion from dc to ac, from ac to dc, from dc to dc, from ac to ac, and from ac to ac. In recent years, a power electronic converter device of a low-loss SiC MOSFET (Metal-Oxide-Semi conductor FieldEffect Transistor: metal-insulator-semiconductor field effect transistor) is becoming popular.
The phenomenon that the emitter-collector voltage or the source-drain voltage is overlarge is easy to generate in the turn-off process of the IGBT or the MOSFET due to stray inductance in the circuit, so that devices are lost.
Disclosure of Invention
The present disclosure provides a gate driving circuit of a MOS type semiconductor device.
The technical scheme adopted by the present disclosure is as follows: a gate driving circuit of a MOS semiconductor device, comprising: the driving voltage output circuit, the fourth resistor, the sampling circuit, the comparison circuit and the resistance value conversion circuit;
the output end of the driving voltage output circuit is connected with the grid electrode of the MOS type semiconductor device through the fourth resistor, and the common end of the driving voltage output circuit is connected with the first electrode of the MOS type switching device;
the sampling circuit is used for sampling the voltage between the output end and the common end of the driving voltage output circuit, and the output end of the sampling circuit outputs analog sampling voltage;
the comparison circuit is used for judging whether the analog sampling voltage is in a preset continuous voltage interval or not, and the output end of the comparison circuit outputs comparison result voltage;
the resistance conversion circuit is connected with the two ends of the fourth resistor and the output end of the comparison circuit, and is used for setting the resistance value of the equivalent resistor between the grid electrode of the MOS type semiconductor device and the output end of the driving voltage output circuit to be a relatively large value when the level state of the comparison result voltage represents that the analog sampling voltage is in the preset continuous voltage interval and setting the resistance value of the equivalent resistor between the grid electrode of the MOS type semiconductor device and the output end of the driving voltage output circuit to be a relatively small value when the level state of the comparison result voltage represents that the analog sampling voltage is not in the preset continuous voltage interval.
In some embodiments, the resistance value conversion circuit includes: the control electrode of the transistor is connected with the output end of the comparison circuit, the transistor is conducted when the output end of the comparison circuit outputs effective comparison voltage, the transistor is turned off when the output end of the comparison circuit outputs ineffective comparison voltage, a serial branch formed by the transistor, the fifth resistor and the diode is connected in parallel with the two ends of the fourth resistor, and the diode is conducted at the initial moment of the ineffective edge of the applied driving voltage.
In some embodiments, the resistance value conversion circuit includes: the transistor, the third resistor, the fifth resistor and the transistor are connected in series, the serial branch of the fifth resistor and the transistor is connected in parallel with the third resistor, the first end of the diode is connected with the first end of the fourth resistor, the second end of the diode is connected with the first end of the third resistor, and the second end of the third resistor is connected with the second end of the fourth resistor; the control electrode of the transistor is connected with the output end of the comparison circuit.
In some embodiments, the comparison circuit comprises: the positive electrode input end of the first voltage comparator is connected with a first reference voltage end, the negative electrode input end of the first voltage comparator and the positive electrode input end of the second voltage comparator are connected with the output end of the sampling circuit, and the negative electrode input end of the second voltage comparator is connected with the second reference voltage end.
In some embodiments, the sampling circuit comprises: the driving circuit comprises a driving voltage output circuit, a first resistor, a second resistor and a first capacitor, wherein two ends of the first resistor are respectively connected with the output end of the driving voltage output circuit and one end of the second resistor, the other end of the second resistor is connected with a common end of the driving voltage output circuit, and the first capacitor is connected with the second resistor in parallel.
In some embodiments, when the MOS semiconductor device is a MOSFET, its first electrode is its source; when the MOS type semiconductor device is an IGBT, the first electrode is an emitter electrode.
In some embodiments, the MOS type semiconductor device is an N type MOSFET, and the inactive edge of the drive voltage is its falling edge.
In some embodiments, the MOS type semiconductor device is an N type MOSFET, and a cathode of the diode is directed to an output end of the driving voltage output circuit.
The circuit structure provided in some of the above embodiments helps to improve the safety of the turn-off process of the MOS semiconductor device.
Drawings
Fig. 1 is a circuit diagram of a gate driving circuit of a MOS semiconductor device of an embodiment of the present disclosure.
Fig. 2 is a voltage waveform diagram of a MOS semiconductor device turn-off process in a comparative example of the present disclosure.
Fig. 3 is a voltage waveform diagram of a MOS semiconductor device turn-off process in an embodiment of the present disclosure.
Detailed Description
The disclosure is further described below with reference to the embodiments shown in the drawings.
Fig. 1 is a circuit diagram of a gate driving circuit of a MOS semiconductor device of an embodiment of the present disclosure.
Referring to fig. 1, an embodiment of the present disclosure provides a gate driving circuit of a MOS semiconductor device, including: a driving voltage output circuit 101, a fourth resistor R4, a sampling circuit 102, a comparison circuit 103, and a resistance conversion circuit 104.
An output terminal of the driving voltage output circuit 101 is connected to a gate of the MOS semiconductor device Q4 through a fourth resistor R4, and a common terminal of the driving voltage output circuit 101 is connected to a first pole of the MOS switching device G4.
In the circuit diagram shown in fig. 1, the MOS semiconductor device Q4 is an N-type MOSFET, the first electrode is a source S, and the second electrode is a drain D.
In other embodiments, the MOS semiconductor device Q4 may be an IGBT with a first pole emitter and a second pole collector.
The driving voltage output circuit 101 functions to apply a driving voltage between the gate and the first pole of the MOS type semiconductor device Q4, thereby turning on or off the MOS type semiconductor device Q4.
Specifically, the driving voltage output circuit 101 includes a control module and a pair of push-pull connected transistors Q1, Q2. When the control module outputs a high level voltage, the transistor Q1 is turned on, the transistor Q2 is turned off, and the driving voltage output circuit 101 applies a positive voltage to the gate and the first pole of the MOS type semiconductor device Q4. When the control module outputs a low level voltage, the transistor Q1 is turned off, the transistor Q2 is turned on, and the driving voltage output circuit 101 applies a negative voltage to the gate and the first pole of the MOS type semiconductor device Q4.
In the embodiment shown in fig. 1, the MOS type semiconductor device Q4 is an N type SiC MOSFET, which is turned on when the gate-source voltage is greater than the threshold voltage, and turned off when the gate-source voltage is less than the threshold voltage.
The sampling circuit 102 is configured to sample a voltage between an output terminal of the driving voltage output circuit 101 and a common terminal, and an output terminal of the sampling circuit outputs an analog sampling voltage.
Specifically, the sampling circuit 102 includes: the driving voltage output circuit comprises a first resistor R1, a second resistor R2 and a first capacitor C1, wherein two ends of the first resistor R1 are respectively connected with the output end of the driving voltage output circuit 101 and one end of the second resistor R2, the other end of the second resistor R2 is connected with the common end of the driving voltage output circuit 102, and the first capacitor C1 is connected with the second resistor R2 in parallel.
The voltage at two ends of the first capacitor C1 is the analog sampling voltage.
The comparison circuit 103 is configured to determine whether the analog sampling voltage is within a preset continuous voltage interval, and an output terminal of the comparison circuit 103 outputs a comparison result voltage.
Specifically, the comparison circuit 103 includes: the first voltage comparator COMP1, the second voltage comparator COMP2, and the NAND gate NAND1, and the positive input terminal of the first voltage comparator COMP1 is connected to a first reference voltage terminal (not shown, the first reference voltage terminal providing the first reference voltage Vref 1). The negative input terminal of the first voltage comparator COMP1 and the positive input terminal of the second voltage comparator are connected to the output terminal of the comparison circuit 103. The negative input terminal of the second voltage comparator COMP2 is connected to a second reference voltage terminal (not shown) which provides the second reference voltage Vref 2. The output terminals of the first voltage comparator COMP1 and the second voltage comparator COMP2 are respectively connected to the input terminal of the nand gate NAN1, and the output terminal of the nand gate NAN1 is used as the output terminal of the comparison circuit 103 to output the comparison result voltage.
The resistance conversion circuit 104 is connected to both ends of the fourth resistor R4 and the output terminal of the comparison circuit 103, and is configured to set the resistance of the equivalent resistor between the gate of the MOS type semiconductor device Q4 and the output terminal of the driving voltage output circuit 104 to a relatively large value when the level state of the comparison result voltage indicates that the analog sampling voltage is in a preset continuous voltage interval, and to set the resistance of the equivalent resistor between the gate of the MOS type semiconductor device Q4 and the output terminal of the driving voltage output circuit 104 to a relatively small value when the level state of the comparison result voltage indicates that the analog sampling voltage is not in the preset continuous voltage interval.
Referring to fig. 1, the resistance value conversion circuit 104 includes: the transistor Q3, the third resistor R3, the fifth resistor R5 and the diode D1, wherein the fifth resistor R5 is connected with the transistor Q3 in series, a serial branch of the fifth resistor R5 and the transistor Q3 is connected with the third resistor R3 in parallel, the first end of the diode D1 is connected with the first end of the fourth resistor R4, the second end of the diode D1 is connected with the first end of the third resistor R3, and the second end of the third resistor R3 is connected with the second end of the fourth resistor R4; the control electrode of the transistor Q3 is connected to the output terminal of the comparison circuit 103.
Specifically, the MOS-type semiconductor device Q4 is an N-type SiC MOSFET, and the cathode of the diode D1 is directed to the driving voltage output circuit. So that the diode D1 is turned on at the start of the inactive edge (even the falling edge of the turn-off thereof) of the MOS type semiconductor device Q4 and for a plurality of periods of the inactive edge.
In the case of neglecting the on-voltage drop of the diode D1 and the on-voltage drop of the transistor Q3, the fifth resistor R5, the third resistor R3, and the fourth resistor R4 are connected in parallel when the transistor Q3 is turned on, and the resistance of the equivalent resistor between the gate of the MOS semiconductor device Q4 and the output terminal of the driving voltage output circuit 104 is relatively small. The third resistor R3 and the fourth resistor R4 are connected in parallel when the transistor Q3 is turned off, and the resistance of the equivalent resistor between the gate of the MOS semiconductor device Q4 and the output terminal of the driving voltage output circuit 104 is relatively large.
When the output terminal of the driving voltage output circuit 101 outputs a high level voltage, the diode D1 is turned off. The resistance conversion circuit 104 has no influence on the gate voltage rising edge and on state of the MOS semiconductor device Q4.
In other embodiments, the resistance value conversion circuit includes: the control electrode of the transistor is connected with the output end of the comparison circuit, the transistor is turned on when the output end of the comparison circuit outputs effective comparison voltage, the transistor is turned off when the output end of the comparison circuit outputs ineffective comparison voltage, a serial branch formed by the transistor, the fifth resistor and the diode is connected in parallel with the two ends of the fourth resistor, and the diode is turned on at the initial moment of the ineffective edge of the applied driving voltage. The third resistor R3 in fig. 1 can be omitted.
Fig. 2 is a voltage waveform diagram of a MOS semiconductor device turn-off process in a comparative example of the present disclosure. In this comparative example, the equivalent resistance between the output terminal of the driving voltage output circuit 101 and the gate of the MOS semiconductor device Q4 is constant.
The MOS type semiconductor device Q4 is an N type SiC MOSFET. In the turn-off process of the MOS type semiconductor device Q4, the gate-source voltage Ugs of the MOS type semiconductor device Q4 gradually decreases, when the gate-source voltage Ugs decreases to the vicinity of the threshold voltage, the MOS type semiconductor device Q4 is in the vicinity of the critical state of turn-off and turn-off, and due to the influence of the stray inductance, the source-drain voltage Uds of the MOS type semiconductor device Q4 may oscillate severely, and the highest voltage Udsmax of the source-drain voltage of the MOS type semiconductor device Q4 may exceed the safety voltage of the MOS type semiconductor device Q4, losing the MOS type semiconductor device Q4.
Fig. 3 is a voltage waveform diagram of a MOS semiconductor device turn-off process in an embodiment of the present disclosure.
With the circuit structure shown in fig. 1, by properly adjusting the magnitudes of the first reference voltage Vref1 and the second reference voltage Vref2, when the gate-source voltage Ugs decreases to the vicinity of the threshold voltage, the equivalent resistance between the output terminal of the driving voltage output circuit 101 and the gate of the MOS type semiconductor device Q4 is properly increased in a relatively short period of time, so that the rate of decrease of the gate-source voltage Ugs becomes slow, the rate of decrease of the MOS type semiconductor device Q4 becomes slow, and the additional voltage fluctuation generated by the stray inductance is weakened, thereby improving the safety of the circuit. The equivalent resistance between the output terminal of the driving voltage output circuit 101 and the gate of the MOS semiconductor device Q4 is relatively small in the remaining period of the falling edge of the gate-source voltage Ugs, thereby avoiding excessively increasing the turn-off loss.
The various embodiments in this disclosure are described in a progressive manner, and identical and similar parts of the various embodiments are all referred to each other, and each embodiment is mainly described as different from other embodiments.
The scope of the present disclosure is not limited to the above-described embodiments, and it is apparent that various modifications and variations can be made to the present disclosure by those skilled in the art without departing from the scope and spirit of the disclosure. Such modifications and variations are intended to be included herein within the scope of the following claims and their equivalents.

Claims (8)

1. A gate driving circuit of a MOS semiconductor device, comprising: the driving voltage output circuit, the fourth resistor, the sampling circuit, the comparison circuit and the resistance value conversion circuit;
the output end of the driving voltage output circuit is connected with the grid electrode of the MOS type semiconductor device through the fourth resistor, and the common end of the driving voltage output circuit is connected with the first electrode of the MOS type semiconductor device;
the sampling circuit is used for sampling the voltage between the output end and the common end of the driving voltage output circuit, and the output end of the sampling circuit outputs analog sampling voltage;
the comparison circuit is used for judging whether the analog sampling voltage is in a preset continuous voltage interval or not, and the output end of the comparison circuit outputs comparison result voltage;
the resistance conversion circuit is connected with two ends of the fourth resistor and the output end of the comparison circuit, and is used for setting the resistance value of the equivalent resistor between the grid electrode of the MOS type semiconductor device and the output end of the driving voltage output circuit to be a relatively large value when the level state of the comparison result voltage represents that the analog sampling voltage is in the preset continuous voltage interval and setting the resistance value of the equivalent resistor between the grid electrode of the MOS type semiconductor device and the output end of the driving voltage output circuit to be a relatively small value when the level state of the comparison result voltage represents that the analog sampling voltage is not in the preset continuous voltage interval.
2. The gate driving circuit according to claim 1, wherein the resistance value conversion circuit includes: the control electrode of the transistor is connected with the output end of the comparison circuit, the transistor is conducted when the output end of the comparison circuit outputs effective comparison voltage, the transistor is turned off when the output end of the comparison circuit outputs ineffective comparison voltage, a serial branch formed by the transistor, the fifth resistor and the diode is connected in parallel with the two ends of the fourth resistor, and the diode is conducted at the initial moment of the ineffective edge of the driving voltage.
3. The gate driving circuit according to claim 1, wherein the resistance value conversion circuit includes: the transistor, the third resistor, the fifth resistor and the transistor are connected in series, the serial branch of the fifth resistor and the transistor is connected in parallel with the third resistor, the first end of the diode is connected with the first end of the fourth resistor, the second end of the diode is connected with the first end of the third resistor, and the second end of the third resistor is connected with the second end of the fourth resistor; the control electrode of the transistor is connected with the output end of the comparison circuit.
4. The gate drive circuit according to claim 1, wherein the comparison circuit includes: the positive electrode input end of the first voltage comparator is connected with a first reference voltage end, the negative electrode input end of the first voltage comparator and the positive electrode input end of the second voltage comparator are connected with the output end of the sampling circuit, and the negative electrode input end of the second voltage comparator is connected with a second reference voltage end.
5. The gate drive circuit of claim 1, wherein the sampling circuit comprises: the driving circuit comprises a driving voltage output circuit, a first resistor, a second resistor and a first capacitor, wherein two ends of the first resistor are respectively connected with the output end of the driving voltage output circuit and one end of the second resistor, the other end of the second resistor is connected with a common end of the driving voltage output circuit, and the first capacitor is connected with the second resistor in parallel.
6. The gate driving circuit according to claim 1, wherein when the MOS type semiconductor device is a MOSFET, a first electrode thereof is a source electrode thereof; when the MOS type semiconductor device is an IGBT, the first electrode is an emitter electrode.
7. The gate driving circuit according to claim 1, wherein the MOS type semiconductor device is an N type MOSFET, and the inactive edge of the driving voltage is a falling edge thereof.
8. A gate drive circuit according to claim 2 or 3, wherein the MOS-type semiconductor device is an N-type MOSFET, and the cathode of the diode is directed to the output terminal of the drive voltage output circuit.
CN202223601219.6U 2022-12-22 2022-12-22 Gate driving circuit of MOS type semiconductor device Active CN219247698U (en)

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CN202223601219.6U CN219247698U (en) 2022-12-22 2022-12-22 Gate driving circuit of MOS type semiconductor device

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