CN111277253A - High-voltage load switch circuit with constant current function - Google Patents

High-voltage load switch circuit with constant current function Download PDF

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Publication number
CN111277253A
CN111277253A CN201911423426.7A CN201911423426A CN111277253A CN 111277253 A CN111277253 A CN 111277253A CN 201911423426 A CN201911423426 A CN 201911423426A CN 111277253 A CN111277253 A CN 111277253A
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mos transistor
voltage
module
input
switch circuit
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CN201911423426.7A
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Chinese (zh)
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吴珂
高峰
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Qipan Microelectronics Shanghai Co Ltd
Chiphomer Technology Ltd
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Qipan Microelectronics Shanghai Co Ltd
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Priority to CN201911423426.7A priority Critical patent/CN111277253A/en
Publication of CN111277253A publication Critical patent/CN111277253A/en
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    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/08Modifications for protecting switching circuit against overcurrent or overvoltage
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02HEMERGENCY PROTECTIVE CIRCUIT ARRANGEMENTS
    • H02H3/00Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection
    • H02H3/08Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current
    • H02H3/087Emergency protective circuit arrangements for automatic disconnection directly responsive to an undesired change from normal electric working condition with or without subsequent reconnection ; integrated protection responsive to excess current for dc applications

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Abstract

The invention relates to the technical field of circuits, in particular to a high-voltage load switch circuit with a constant current function, which comprises: the input end of the sampling module is connected to the input port, and the output end of the sampling module is connected to the output port and used for collecting input voltage in the high-voltage load switch circuit; the input end of the error amplification module is connected with the output end of the sampling module and used for receiving input voltage and converting a high-voltage signal of the input voltage into a low-voltage signal; and the input end of the driving module is connected with the output end of the error amplification module and is used for receiving the low-voltage signal and driving the pulse signal of the overcurrent turn-off module to be turned off according to the low-voltage signal. The technical scheme of the invention has the beneficial effects that: the high-voltage signal of the input voltage is converted into the low-voltage signal, and the pulse signal of the overcurrent turn-off module is driven to be turned off through the low-voltage signal, so that the output current of the error amplification module is limited.

Description

High-voltage load switch circuit with constant current function
Technical Field
The invention relates to the technical field of circuits, in particular to a high-voltage load switch circuit with a constant current function.
Background
At present, the high-voltage load switch circuit comprises a switch tube NMOS (N-Metal-Oxide-Semiconductor), a voltage regulator, a charge pump and a comparator, wherein the charge pump drives the NMOS to be conducted, so that a voltage difference higher than a source electrode 5V is obtained by a grid electrode of the NMOS, the voltage regulator generates a power voltage of about 5V to supply power to an internal module, the comparator is used for monitoring overcurrent, when the current exceeds a set value, a voltage difference (usually tens of millivolts) is formed between a drain electrode and a source electrode of the switch tube NMOS, the comparator is turned over, and the load switch is turned off to achieve the overcurrent turn-off function.
However, in most applications, it is desirable that the output current does not exceed the set current limit in any case, and there is always a current output, but the prior art does not have this function, that is, there is no high-voltage constant current function, so that the above problem is a problem to be solved by those skilled in the art.
Disclosure of Invention
In view of the above problems in the prior art, a high voltage load switch circuit with a constant current function is provided.
The specific technical scheme is as follows:
the invention provides a high-voltage load switch circuit with a constant current function, which comprises an input port, an output port, a voltage regulator, an overcurrent turn-off module and a charge pump, wherein the overcurrent turn-off module is connected with the input port, the output port and the charge pump are arranged between the output port and the charge pump, the voltage regulator is connected between the input port and the overcurrent turn-off module, and the high-voltage load switch circuit also comprises:
the input end of the sampling module is connected to the input port, and the output end of the sampling module is connected to the output port and used for collecting input voltage in the high-voltage load switch circuit;
the input end of the error amplification module is connected to the output end of the sampling module and used for receiving the input voltage and converting a high-voltage signal of the input voltage into a low-voltage signal;
and the input end of the driving module is connected with the output end of the error amplification module and is used for receiving the low-voltage signal and driving the pulse signal of the overcurrent turn-off module to be turned off according to the low-voltage signal.
Preferably, the overcurrent shutdown module includes:
the drain electrode of the first MOS tube is connected to the input port, and the grid electrode of the first MOS tube is connected to the input end of the charge pump;
and the comparator is connected between the drain electrode of the first MOS tube and the source electrode of the first MOS tube.
Preferably, the sampling module includes:
a first resistor connected to the input port;
and the drain electrode of the second MOS tube is connected to the first resistor, the grid electrode of the second MOS tube is connected to the grid electrode of the first MOS tube, and the source electrode of the second MOS tube is connected to the source electrode of the first MOS tube.
Preferably, the error amplification module includes:
the current limiting unit is used for limiting the input current corresponding to the input voltage;
and the input end of the operational amplifier unit is connected with the output end of the current limiting unit and is used for converting the high-voltage signal into the low-voltage signal.
Preferably, the driving module includes a third MOS transistor, a gate of the third MOS transistor is connected to the output end of the error amplification module, a drain of the third MOS transistor is connected to the gate of the first MOS transistor, and a source of the third MOS transistor is connected to a ground terminal.
Preferably, the first and second liquid crystal materials are,
the error amplification module is an error amplifier.
Preferably, the first MOS transistor, the second MOS transistor and the third MOS transistor are all thin gate N-type MOS transistors.
The technical scheme of the invention has the beneficial effects that: by adding the sampling module, the error amplification module and the driving module in the prior art, the high-voltage signal of the input voltage is converted into the low-voltage signal, and the pulse signal of the overcurrent turn-off module is driven to be turned off through the low-voltage signal, so that the output current of the error amplification module is limited, the current output is ensured all the time, and the high-voltage constant-current function is realized.
Drawings
Embodiments of the present invention will now be described more fully hereinafter with reference to the accompanying drawings. The drawings are, however, to be regarded as illustrative and explanatory only and are not restrictive of the scope of the invention.
FIG. 1 is an overall circuit block diagram of an embodiment of the present invention;
FIG. 2 is a circuit diagram of a current limiting unit according to an embodiment of the present invention;
fig. 3 is a circuit diagram of an operational amplifier unit according to an embodiment of the present invention.
Detailed Description
The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.
It should be noted that the embodiments and features of the embodiments of the present invention may be combined with each other without conflict.
The invention is further described with reference to the following drawings and specific examples, which are not intended to be limiting.
The invention provides a high-voltage load switch circuit with a constant current function, which comprises an input port VIN, an output port VOUT, a voltage regulator 1, an overcurrent turn-off module 2 and a charge pump 3, wherein the overcurrent turn-off module 2 is connected between the input port VIN, the output port VOUT and the charge pump 3, and the voltage regulator 1 is connected between the input port VIN and the overcurrent turn-off module 2, and the high-voltage load switch circuit is characterized by also comprising:
the input end of the sampling module 4 is connected to the input port VIN, and the output end of the sampling module 4 is connected to the output port VOUT and is used for collecting input voltage in the high-voltage load switch circuit;
the input end of the error amplification module 5 is connected to the output end of the sampling module 4 and used for receiving input voltage and converting a high-voltage signal of the input voltage into a low-voltage signal;
and the input end of the driving module 6 is connected with the output end of the error amplifying module 5 and is used for receiving the low-voltage signal and driving the pulse signal of the overcurrent turn-off module 2 to be turned off according to the low-voltage signal.
Through the above-mentioned high-voltage load switch circuit, as shown in fig. 1, it includes an input port VIN, an output port VOUT, a voltage regulator 1, an overcurrent shutdown module 2 and a charge pump 3, and in this embodiment, a sampling module 4, an error amplification module 5 and a driving module 6 are added, wherein an input end of the sampling module 4 is connected to the input port VIN, an output end of the sampling module 4 is connected to the output port VOUT to collect an input voltage in the high-voltage load switch circuit, an input end of the error amplification module 5 is connected to an output end of the sampling module 4 to receive the input voltage collected by the sampling module 4 and convert a high-voltage signal of the input voltage into a low-voltage signal, and it should be noted that the high-voltage signal in this embodiment is a voltage value higher than 6V and lower than 40V, the low voltage signal means a voltage value not higher than 6V.
Further, after receiving the low-voltage signal output by the error amplification module 5, the driving module 6 drives the pulse signal of the overcurrent turn-off module 2 to turn off, and ensures that current is always output, thereby having the function of high voltage and constant current.
In a preferred embodiment, the overcurrent shutdown module 2 comprises:
a first MOS transistor M1, wherein the drain of the first MOS transistor M1 is connected to the input port VOUT, and the gate of the first MOS transistor M1 is connected to the input terminal of the charge pump 3;
and the comparator 20 is connected between the drain electrode of the first MOS tube and the source electrode of the first MOS tube.
Specifically, as shown in fig. 1, in the present embodiment, the first MOS transistor M1 is a thin gate oxide N-type MOS transistor, so that the first MOS transistor M1 has better mobility, and can achieve the expected on-resistance in a smaller area than a P-type MOS transistor or a thick-gate N-type MOS transistor, because a thin gate N-type MOS tube is adopted to drive the N-type MOS tube to be conducted, a charge pump 3 is needed, so that the grid electrode of the first MOS tube (N-type MOS tube) obtains a voltage difference which is 5V higher than the source electrode of the first MOS tube, the voltage regulator 1 generates a power supply voltage of about 5V to supply power for the overcurrent turn-off module 2, the comparator 20 of the overcurrent turn-off module 2 is used for monitoring overcurrent, when the current exceeds a set value, a voltage difference (usually tens of millivolts) is formed between the drain and the source of the first MOS transistor, so that the comparator 3 is turned over, thereby turning off the load switch to realize an overcurrent turn-off function.
In a preferred embodiment, the sampling module 4 comprises:
a first resistor R1 connected to the input port VIN;
a second MOS transistor M2, the drain of the second MOS transistor M2 is connected to the first resistor R1, the gate of the second MOS transistor M2 is connected to the gate of the first MOS transistor M1, and the source of the second MOS transistor M2 is connected to the source of the first MOS transistor M1.
Specifically, the sampling module 4 added in the present invention includes a first resistor R1 and a second MOS switch M2, a drain of the second MOS transistor M2 is connected to the first resistor R1, a gate of the second MOS transistor M2 is connected to a gate of the first MOS transistor M1, a source of the second MOS transistor M2 is connected to a source of the first MOS transistor M1, and a size of the second MOS transistor M2 is generally 1/1000-1/10000 of the first MOS transistor M1, and is configured to collect an input voltage in the high-voltage load switch circuit and superimpose the input voltage on the sampling first resistor R2.
In a preferred embodiment, the error amplification module 5 comprises:
a current limiting unit 50 for limiting the output current of the error amplifying module 5;
and the input end of the operational amplifier unit 51 is connected with the output end of the current limiting unit 50 and is used for converting the high-voltage signal into the low-voltage signal.
The driving module 6 includes a third MOS transistor M3, the gate of the third MOS transistor M3 is connected to the output terminal of the error amplifying module 5, the drain of the third MOS transistor M3 is connected to the gate of the first MOS transistor M1, and the source of the third MOS transistor M3 is connected to the ground GND.
Specifically, the error amplifying module 5 in this embodiment includes two parts, which are a current limiting unit (not shown) and an operational amplifier unit (not shown), respectively, wherein the current limiting unit (not shown) is used to limit the current, as shown in fig. 2, and includes:
an amplifier 52, a first input terminal of the amplifier 52 is connected to a reference voltage, and a second input terminal of the amplifier 50 is connected to the ground GND through a second resistor R2;
a fourth MOS transistor M4, the gate of the fourth MOS transistor M4 is connected to the output terminal of the amplifier 5, and the source of the fourth MOS transistor M4 is connected to the ground GND through the third resistor R3;
a fifth MOS transistor M5, wherein the source of the fifth MOS transistor M5 is connected to the low voltage signal terminal VDD;
a sixth MOS transistor M6, wherein the source of the sixth MOS transistor M6 is connected to the drain of the fifth MOS transistor M5, the gate of the sixth MOS transistor M6 is connected to the gate of the fifth MOS transistor M5, and the drain of the sixth MOS transistor M6 is connected to the ground GND;
a first current mirror 500, comprising:
a seventh MOS transistor M7, wherein the source of the seventh MOS transistor M7 is connected to the low voltage signal terminal VDD;
an eighth MOS transistor M8, wherein the gate of the eighth MOS transistor M8 is connected to the gate of the seventh MOS transistor M7, and the source of the eighth MOS transistor M8 is connected to the low-voltage signal terminal VDD;
a second current mirror 501, comprising:
a ninth MOS transistor M9, wherein the source of the ninth MOS transistor M9 is connected to the drain of the seventh MOS transistor M7, and the drain of the ninth MOS transistor M9 is connected to the drain of the fourth MOS transistor;
a tenth MOS transistor M10, the gate of the tenth MOS transistor M10 is connected to the gate of the ninth MOS transistor M9, and the source of the tenth MOS transistor M10 is connected to the drain of the eighth MOS transistor M8;
an eleventh MOS transistor M11, wherein the source of the eleventh MOS transistor M10 is connected to the low-voltage signal terminal VDD, the gate of the eleventh MOS transistor M11 is connected to the ground terminal GND, and the gate of the eleventh MOS transistor M11 is connected to the gate of the seventh MOS transistor M7;
a third current mirror 502, comprising:
a twelfth MOS transistor M12, the drain of the twelfth MOS transistor M12 is connected to the drain of the tenth MOS transistor M10;
a thirteenth MOS transistor M13, wherein the gate of the thirteenth MOS transistor M13 is connected to the gate of the twelfth MOS transistor M12, the thirteenth MOS transistor M13 is connected to the high voltage signal terminal IN through a fourth resistor R4, and the fourth resistor R4 is connected to a node INP;
a fourth current mirror 503, comprising:
a fourteenth MOS transistor M14, wherein the drain of the fourteenth MOS transistor M14 is connected to the source of the thirteenth MOS transistor M13, and the source of the fourteenth MOS transistor M14 is connected to the ground GND;
a fifteenth MOS transistor M15, wherein the gate of the fifteenth MOS transistor M15 is connected to the gate of the fourteenth MOS transistor M14, the drain of the fifteenth MOS transistor M15 is connected to the source of the thirteenth MOS transistor M13, and the source of the fifteenth MOS transistor M15 is connected to the ground GND;
a sixteenth MOS transistor M16, wherein the gate of the sixteenth MOS transistor M16 is connected to the gate of the fifteenth MOS transistor M15, and the drain of the sixteenth MOS transistor M16 is connected to the drain of the fifteenth MOS transistor M15;
a seventeenth MOS transistor M17, wherein the drain of the seventeenth MOS transistor M17 is connected to the source of the sixteenth MOS transistor M16, and the source of the seventeenth MOS transistor M17 is connected to the ground GND;
an eighteenth MOS transistor M18, wherein the source of the eighteenth MOS transistor M18 is connected to the gate of the twelfth MOS transistor M12;
a nineteenth MOS transistor M19, a drain of the nineteenth MOS transistor M19 is connected to the source of the eighteenth MOS transistor M18, a source of the nineteenth MOS transistor M19 is connected to the ground, and a gate of the nineteenth MOS transistor M19 is connected to a gate of the eighteenth MOS transistor M18;
the first resistor R1 is connected between the high voltage signal terminal IN and the node INN;
the current limiting unit 50 generates a reference current through the reference voltage and the second resistor R2, the reference current passes through the first current mirror 500 to be converted from the low-voltage signal terminal VDD to the high-voltage signal terminal IN, the INP node is the input voltage minus a first voltage, the voltage at the node INN is the input voltage minus a second voltage, and the first voltage is the second voltage due to the existence of the operational amplifier unit 51 and the loop, so as to realize the current limiting.
The error amplifying module 5 further includes an operational amplifier unit 51, as shown in fig. 3, including:
a twentieth MOS transistor M20, wherein the drain of the twentieth MOS transistor M20 is connected to the node INP, and the gate of the twentieth MOS transistor M20 is connected to the ground GND;
a twenty-first MOS transistor M21, the gate of the twenty-first MOS transistor M21 is connected to the ground GND, and the drain of the twenty-first MOS transistor M21 is connected to the node INN;
a twenty-second MOS transistor M22, wherein the drain of the twenty-second MOS transistor M22 is connected to the drain of the twentieth MOS transistor M20;
a twenty-third MOS transistor M23, the gate of the twenty-third MOS transistor M23 is connected to the gate of the twenty-second MOS transistor M22, and the source of the twenty-third MOS transistor M23 is connected to the source of the twentieth MOS transistor M20;
a twenty-fourth MOS transistor M24, the gate of the twenty-fourth MOS transistor M24 is connected to the gate of the twenty-third MOS transistor M23, and the source of the twenty-fourth MOS transistor M24 is connected to the source of the twentieth MOS transistor M20;
a twenty-fifth MOS transistor M25, wherein the drain of the twenty-fifth MOS transistor M25 is connected to the drain of the twenty-first MOS transistor M21;
a twenty-sixth MOS transistor M26, a gate of the twenty-sixth MOS transistor M26 is connected to a gate of the twenty-fifth MOS transistor M25, and a source of the twenty-sixth MOS transistor M26 is connected to a source of the twenty-fifth MOS transistor M25;
a twenty-seventh MOS transistor M27, a gate of the twenty-seventh MOS transistor M27 is connected to a gate of the twenty-sixth MOS transistor M26, and a source of the twenty-seventh MOS transistor M27 is connected to a source of the twenty-first MOS transistor M21;
a twenty-eighth MOS transistor M28, wherein the source of the twenty-eighth MOS transistor M28 is connected to the drain of the twenty-third MOS transistor M23;
a twenty-ninth MOS transistor M29, wherein the gate of the twenty-ninth MOS transistor M29 is connected to the ground GND, and the source of the twenty-ninth MOS transistor M29 is connected to the drain of the twenty-sixth MOS transistor M26;
a thirtieth MOS transistor M30, wherein the source of the thirtieth MOS transistor M30 is connected to the gate of the twenty-eighth MOS transistor M28;
a thirty-first MOS transistor M31, wherein the source of the thirty-first MOS transistor M31 is connected to the gate of the thirty-first MOS transistor M30
A thirty-second MOS transistor M32, wherein the source of the third twelve MOS transistor M32 is connected to the drain of the twenty-seventh MOS transistor M27;
a thirty-third MOS transistor M33, the source of the thirty-third MOS transistor M33 is connected to the gate of the thirty-second MOS transistor M32, the gate of the thirty-third MOS transistor M33 is Lina cut off from the ground GND,
a thirty-fourth MOS transistor M34, the gate of the thirty-fourth MOS transistor M34 is connected to the drain of the thirty-first MOS transistor M31, the source of the thirty-fourth MOS transistor M34 is connected to the drain of the twenty-eighth MOS transistor M28, and the gate of the thirty-fourth MOS transistor M34 is connected to the drain of the thirty-first MOS transistor M31;
a thirty-fifth MOS transistor M35, the gate of the thirty-fifth MOS transistor M35 is connected to the gate of the thirty-fourth MOS transistor M34, and the source of the thirty-fifth MOS transistor M35 is connected to the drain of the thirty-fifth MOS transistor M30;
a thirty-sixth MOS transistor M36, the gate of the thirty-sixth MOS transistor M36 is connected to the drain of the thirty-third MOS transistor M33, and the source of the thirty-sixth MOS transistor M36 is connected to the drain of the thirty-second MOS transistor M32;
a thirty-seventh MOS transistor M37, the gate of the thirty-seventh MOS transistor M37 is connected to the ground GND, and the drain of the thirty-seventh MOS transistor M37 is connected to the drain of the thirty-fourth MOS transistor M34;
a thirty-eighth MOS transistor M38, wherein the source of the thirty-eighth MOS transistor M38 is connected to the low-voltage signal terminal VDD, the drain of the thirty-eighth MOS transistor M38 is connected to the source of the thirty-seventh MOS transistor M37, and the gate of the thirty-eighth MOS transistor M38 is connected to the ground terminal GND;
a thirty-ninth MOS transistor M39, wherein the drain of the thirty-ninth MOS transistor M39 is connected to the source of the thirty-seventh MOS transistor M37;
a fortieth MOS transistor M40, a gate of the fortieth MOS transistor M40 is connected to a gate of the thirty-ninth MOS transistor M39, and a source of the fortieth MOS transistor M40 is connected to a source of the thirty-ninth MOS transistor M39;
a forty-first MOS transistor M41, a drain of the forty-first MOS transistor M41 is connected to a drain of the thirty-fifth MOS transistor M35, and a source of the forty-first MOS transistor M41 is connected to a source of the thirty-ninth MOS transistor M39;
a forty-second MOS transistor M42, a drain of the fourth twelve MOS transistor M42 is connected to a drain of the thirty-sixth MOS transistor M36, and a source of the forty-second MOS transistor M42 is connected to a source of the forty-first MOS transistor M41;
a forty-third MOS transistor M43, wherein the gate of the forty-third MOS transistor M43 is connected to the gate of the forty-first MOS transistor M41;
a forty-fourth MOS transistor M44, the gate of the forty-fourth MOS transistor M44 is connected to the gate of the forty-second MOS transistor M42, and the source of the forty-fourth MOS transistor M44 is connected to the source of the forty-third MOS transistor M43;
a forty-fifth MOS transistor M45, wherein the drain of the forty-fifth MOS transistor M45 is connected to the drain of the forty-fourth MOS transistor M44;
a forty-sixth MOS transistor M46, the gate of the forty-sixth MOS transistor M46 is connected to the gate of the forty-fifth MOS transistor M45, and the drain of the forty-sixth MOS transistor M46 is connected to the drain of the forty-third MOS transistor M43;
a forty-seventh MOS transistor M47, wherein the drain of the forty-seventeenth MOS transistor M47 is connected to the source of the forty-sixth MOS transistor M46, and the source of the forty-seventh MOS transistor M47 is connected to the low-voltage signal terminal VDD;
a forty-eighth MOS transistor M48, the gate of the forty-eighth MOS transistor M48 is connected to the gate of the forty-seventh MOS transistor M47, the drain of the forty-eighth MOS transistor M48 is connected to the source of the forty-fifth MOS transistor M45, and the source of the forty-eighth MOS transistor M48 is connected to the source of the forty-seventh MOS transistor M47.
The operational amplifier unit 51 makes all MOS transistors not see a voltage difference of + a threshold voltage VTH (about 0.7V) higher than the voltage VDD of the low voltage signal terminal between the gate and the source through the clamping structure of each stage, realizes the conversion from a high voltage signal to a low voltage current signal, and finally outputs a low voltage signal.
The error amplifying module 5 in this embodiment is an error amplifier, and the error amplifier converts a high-voltage signal of an input voltage into a low-voltage signal, and transmits the low-voltage signal to the driving module 6, so as to drive the third MOS transistor M3, implement a weak pull-down, and implement control of driving the gate of the third MOS transistor M3 with the pull-up of the charge pump 3, thereby implementing a constant current.
In addition, it should be noted that, if and only if the input and the output have a certain voltage difference, that is, during the starting process or during abnormal heavy load, but during normal operation, the voltage difference between the input and the output is small, the second MOS transistor and the first resistor R1 in the sampling module 4 cannot achieve the desired sampling, and are in a voltage dividing relationship.
In a preferred embodiment, the first MOS transistor, the second MOS transistor and the third MOS transistor are thin-gate N-type MOS transistors.
In a preferred embodiment, the comparator 20 used in the present invention can also completely adopt the above-mentioned architecture of the error amplifier, and a schmitt trigger (not shown) is added to the output of the operational amplifier unit 51, which becomes a comparator, and the comparator is turned over when the input/output voltage difference exceeds the first voltage.
While the invention has been described with reference to a preferred embodiment, it will be understood by those skilled in the art that various changes in form and detail may be made therein without departing from the spirit and scope of the invention.

Claims (7)

1. A high-voltage load switch circuit with a constant current function comprises an input port, an output port, a voltage regulator, an overcurrent turn-off module and a charge pump, wherein the overcurrent turn-off module is connected with the input port, the output port reaches between the charge pump, the voltage regulator is connected with the input port and between the overcurrent turn-off modules, and the high-voltage load switch circuit is characterized by further comprising:
the input end of the sampling module is connected to the input port, and the output end of the sampling module is connected to the output port and used for collecting input voltage in the high-voltage load switch circuit;
the input end of the error amplification module is connected with the output end of the sampling module and used for receiving the input voltage and converting a high-voltage signal of the input voltage into a low-voltage signal;
and the input end of the driving module is connected with the output end of the error amplification module and is used for receiving the low-voltage signal and driving the pulse signal of the overcurrent turn-off module to be turned off according to the low-voltage signal.
2. The high-voltage load switch circuit with the constant-current function according to claim 1, wherein the overcurrent shutdown module comprises:
the drain electrode of the first MOS tube is connected to the input port, and the grid electrode of the first MOS tube is connected to the input end of the charge pump;
and the comparator is connected between the drain electrode of the first MOS tube and the source electrode of the first MOS tube.
3. The high-voltage load switch circuit with the constant-current function according to claim 2, wherein the sampling module comprises:
a first resistor connected to the input port;
and the drain electrode of the second MOS tube is connected to the first resistor, the grid electrode of the second MOS tube is connected to the grid electrode of the first MOS tube, and the source electrode of the second MOS tube is connected to the source electrode of the first MOS tube.
4. The high-voltage load switch circuit with the constant-current function according to claim 1, wherein the error amplification module comprises:
the current limiting unit is used for limiting the output current of the error amplification module;
and the input end of the operational amplifier unit is connected with the output end of the current limiting unit and is used for converting the high-voltage signal into the low-voltage signal.
5. The high-voltage load switch circuit with the constant current function according to claim 1, wherein the driving module comprises a third MOS transistor, a gate of the third MOS transistor is connected to the output terminal of the error amplifying module, a drain of the third MOS transistor is connected to the gate of the first MOS transistor, and a source of the third MOS transistor is connected to a ground terminal.
6. The high-voltage load switch circuit with the constant-current function according to claim 5, wherein the error amplification module is an error amplifier.
7. The high-voltage load switch circuit with the constant current function according to claim 3 or 5, wherein the first MOS transistor, the second MOS transistor and the third MOS transistor are thin gate N-type MOS transistors.
CN201911423426.7A 2019-12-31 2019-12-31 High-voltage load switch circuit with constant current function Pending CN111277253A (en)

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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN116346113A (en) * 2023-05-23 2023-06-27 晶艺半导体有限公司 High-precision current-controlled load switch circuit and trimming method thereof

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