CN108233878B

CN108233878B - AB class audio power amplifier

Info

Publication number: CN108233878B
Application number: CN201711441061.1A
Authority: CN
Inventors: 薛蓉; 张仁富
Original assignee: Shanghai Awinic Technology Co Ltd
Current assignee: Shanghai Awinic Technology Co Ltd
Priority date: 2017-12-27
Filing date: 2017-12-27
Publication date: 2021-12-10
Anticipated expiration: 2037-12-27
Also published as: CN108233878A

Abstract

The embodiment of the invention discloses an AB class audio power amplifier, which comprises: the amplifier comprises a first component circuit, a second component circuit and a third component circuit, wherein the third component circuit comprises a seventh transistor and an eighth transistor besides a ninth transistor and a tenth transistor; a gate of the seventh transistor is electrically connected with a fifth bias voltage, a source of the seventh transistor is electrically connected with a drain of the ninth transistor, the drain of the seventh transistor is electrically connected with the first end of the first component circuit, and a substrate of the seventh transistor is grounded; the gate of the eighth transistor is electrically connected with the fifth bias voltage, the source of the eighth transistor is electrically connected with the drain of the tenth transistor, the drain of the eighth transistor is electrically connected with the second end of the first component circuit, the substrate is grounded, so that the voltage gain of the amplifier does not follow the power supply voltage V within a wider voltage range_PVDDMay vary.

Description

AB class audio power amplifier

Technical Field

The invention relates to the technical field of integrated circuits, in particular to an AB-type audio power amplifier.

Background

With the improvement of the technology level, the development of power integrated circuits is rapid. The power integrated circuit is an integrated circuit which integrates a high-voltage power device, a signal processing system, a peripheral driving circuit, an interface circuit, a protection circuit, a detection circuit and the like on the same chip. Audio power amplifiers are an important component of power integrated circuits and are widely used in consumer electronics.

As shown in fig. 1, fig. 1 is a schematic circuit diagram of a conventional class AB audio power amplifier. Power supply voltage V of existing AB class audio power amplifier_PVDDWill fluctuate within a certain range when the supply voltage V_PVDDWhen the voltage rises to a certain voltage, the drain voltages of the transistors M9 and M10 follow V_PVDDSo that the drain-substrate voltage difference V of the transistors M9 and M10 is increased_DBIncrease, resulting in drain-substrate leakage of transistors M9 and M10And the current reduces the gain of the AB class audio power amplifier.

Disclosure of Invention

To solve the above technical problem, embodiments of the present invention provide a class AB audio power amplifier to achieve a wide voltage range, and the gain of the amplifier is kept unchanged.

In order to solve the above problems, the embodiments of the present invention provide the following technical solutions:

a class AB audio power amplifier, the amplifier comprising: the amplifier comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit, a common mode feedback circuit and a Miller compensation circuit, wherein the amplifying circuit comprises a first composition circuit, a second composition circuit and a third composition circuit, and the third composition circuit comprises: a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor;

a gate of the ninth transistor is electrically connected with a gate of the tenth transistor, a source of the ninth transistor is electrically connected with the first end of the second component circuit, a drain of the ninth transistor is electrically connected with a source of the seventh transistor, and the substrate is grounded;

a gate of the seventh transistor is electrically connected with a fifth bias voltage, a source of the seventh transistor is electrically connected with a drain of the ninth transistor, the drain of the seventh transistor is electrically connected with the first end of the first component circuit, and a substrate of the seventh transistor is grounded;

a gate of the tenth transistor is electrically connected with a gate of the ninth transistor, a source of the tenth transistor is electrically connected with the second end of the second circuit, a drain of the tenth transistor is electrically connected with a source of the eighth transistor, and the substrate is grounded;

and the gate of the eighth transistor is electrically connected with the fifth bias voltage, the source of the eighth transistor is electrically connected with the drain of the tenth transistor, the drain of the eighth transistor is electrically connected with the second end of the first component circuit, and the substrate is grounded.

Optionally, the fifth bias voltage satisfies the following relationship:

V_PVDD-V_SG27+V_TH7≥V_B≥V_GS9-V_TH9+V_GS7+V_D-V_TH11；

wherein, V_BRepresents the fifth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG27Representing a voltage difference between a source and a gate of the twenty-seventh transistor; v_TH7Represents a threshold voltage of the seventh transistor; v_GS9Representing a voltage difference between the gate and the source of the ninth transistor; v_TH9Represents a threshold voltage of the ninth transistor; v_GS7Representing a voltage difference between the gate and the source of the seventh transistor; v_DRepresents a third bias voltage; v_TH11Representing the threshold voltage of the eleventh transistor in the amplifying circuit.

Optionally, the method further includes:

a fifth transistor located between the drain of the seventh transistor and the first end of the first component circuit, the gate of the fifth transistor being electrically connected to a sixth bias voltage, the source of the fifth transistor being electrically connected to the drain of the seventh transistor, the drain of the fifth transistor being electrically connected to the first end of the first component circuit, the substrate being grounded;

and the sixth transistor is positioned between the drain of the eighth transistor and the second end of the first composition circuit, the gate of the sixth transistor is electrically connected with the sixth bias voltage, the source of the sixth transistor is electrically connected with the drain of the eighth transistor, the drain of the sixth transistor is electrically connected with the second end of the first composition circuit, and the substrate is grounded.

Optionally, the sixth bias voltage satisfies the following relationship:

V_PVDD-V_SG27+V_TH5≥V_A≥V_GS5+V_B-V_TH7≥V_GS5+V_GS9-V_TH9+V_GS7+V_D-V_TH11-V_TH7；

wherein, V_ARepresents the sixth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG27Representing a voltage difference between a source and a gate of a twenty-seventh transistor in the output circuit; v_TH5Represents a threshold voltage of the fifth transistor; v_GS5Representing a voltage difference between the gate and the source of the fifth transistor; v_BRepresents the fifth bias voltage; v_TH7Representing the threshold voltage of the seventh transistor.

A class AB audio power amplifier, the amplifier comprising: the gain control circuit comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit and a Miller compensation circuit, wherein the amplifying circuit comprises a first composition circuit, a second composition circuit and a third composition circuit, and the third composition circuit comprises: an eighth transistor and a tenth transistor;

a gate of the tenth transistor is electrically connected to the bias circuit, a source of the tenth transistor is electrically connected to the second component circuit, a drain of the tenth transistor is electrically connected to a source of the eighth transistor, and a substrate of the tenth transistor is grounded;

and the gate of the eighth transistor is electrically connected with a fifth bias voltage, the source of the eighth transistor is electrically connected with the drain of the tenth transistor, the drain of the eighth transistor is electrically connected with the first component circuit, and the substrate of the eighth transistor is grounded.

Optionally, the fifth bias voltage V_BThe following relationship is satisfied:

V_PVDD-V_SG26+V_TH8≥V_B≥V_GS10-V_TH10+V_GS8+V_D-V_TH12；

wherein, V_BRepresents the fifth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG26Representing a voltage difference between a source and a gate of a twenty-sixth transistor; v_TH8Represents a threshold voltage of the eighth transistor; v_GS10Representing a voltage difference between the gate and the source of the tenth transistor; v_TH10Represents a threshold voltage of the tenth transistor; v_GS8Representing a voltage difference between the gate and the source of the eighth transistor; v_DRepresents a third bias voltage; v_TH12Representing the threshold voltage of the twelfth transistor in the amplifying circuit.

Optionally, the method further includes:

and the sixth transistor is positioned between the drain of the eighth transistor and the first composition circuit, the grid of the sixth transistor is electrically connected with a sixth bias voltage, the source of the sixth transistor is electrically connected with the drain of the eighth transistor, the drain of the sixth transistor is electrically connected with the first composition circuit, and the substrate is grounded.

Optionally, the sixth bias voltage satisfies the following relationship:

V_PVDD-V_SG26+V_TH6≥V_A≥V_GS6+V_B-V_TH8≥V_GS6+V_GS10-V_TH10+V_GS8+V_D-V_TH12-V_TH8；

wherein, V_ARepresents the sixth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG26Representing a voltage difference between a source and a gate of a twenty-sixth transistor in the output circuit; v_TH6Represents a threshold voltage of the sixth transistor; v_GS6Representing a voltage difference between the gate and the source of the sixth transistor; v_BRepresents the fifth bias voltage; v_TH8Representing the threshold voltage of the eighth transistor.

A class AB audio power amplifier, the amplifier comprising: the amplifier comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit, a common mode feedback circuit and a Miller compensation circuit, wherein the amplifying circuit comprises a first composition circuit, a second composition circuit and a third composition circuit, and the third composition circuit comprises: a ninth transistor and a tenth transistor;

the grid electrode of the ninth transistor is electrically connected with the grid electrode of the tenth transistor, the source electrode of the ninth transistor is electrically connected with the first end of the second component circuit, the drain electrode of the ninth transistor is electrically connected with the first end of the first component circuit, and the substrate of the ninth transistor is electrically connected with the source electrode of the substrate;

the gate of the tenth transistor is electrically connected to the gate of the ninth transistor, the source of the tenth transistor is electrically connected to the second terminal of the second component circuit, the drain of the tenth transistor is electrically connected to the second terminal of the first component circuit, and the substrate is electrically connected to its own source.

A class AB audio power amplifier, the amplifier comprising: the circuit comprises an input circuit, a bias circuit, an amplifying circuit and an output circuit, wherein the amplifying circuit comprises a first composition circuit, a second composition circuit and a third composition circuit, and the third composition circuit comprises: a tenth transistor;

the tenth transistor has a gate electrically connected to the bias circuit, a source electrically connected to the second component circuit, a drain electrically connected to the first component circuit, and a substrate electrically connected to its own source.

Compared with the prior art, the technical scheme has the following advantages:

according to the technical scheme provided by the embodiment of the invention, the drain voltage of the ninth transistor is reduced by the voltage difference between the drain and the source of the seventh transistor compared with the drain voltage of the previous transistor, and the drain voltage of the tenth transistor is reduced by the voltage difference between the drain and the source of the eighth transistor compared with the previous transistor, so that the voltage difference between the source and the source of the power supply voltage V is reduced_PVDDWhen the voltage of the drain electrodes of the ninth transistor and the tenth transistor is increased, the voltage of the drain electrodes of the ninth transistor and the tenth transistor is increased slightly, no leakage current is basically generated between the drain electrodes of the ninth transistor and the tenth transistor and the substrate, the resistance from the drain electrodes to the substrate is large, the influence of the resistance on the voltage gain can be basically ignored, a wider voltage range is realized, and the voltage gain of the amplifier is not influenced by the power supply voltage V_PVDDMay vary.

Drawings

In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the drawings used in the description of the embodiments or the prior art will be briefly described below, it is obvious that the drawings in the following description are only some embodiments of the present invention, and for those skilled in the art, other drawings can be obtained according to the drawings without creative efforts.

FIG. 1 is a schematic circuit diagram of a prior art class AB audio power amplifier;

FIG. 2 is a graph of voltage Gain along with supply voltage V of a class AB audio power amplifier in the prior art_PVDDA schematic diagram of a variation curve;

FIG. 3 is a schematic circuit diagram of a class AB audio power amplifier according to an embodiment of the present invention;

FIG. 4 is a schematic circuit diagram of a class AB audio power amplifier according to another embodiment of the present invention;

fig. 5 is a schematic structural diagram of a circuit for generating a fifth bias voltage and a sixth bias voltage in a class AB audio power amplifier according to an embodiment of the present invention;

FIG. 6 is a graph of voltage Gain of a class AB audio power amplifier as a function of supply voltage V in an embodiment of the present invention_PVDDA schematic diagram of a variation curve;

FIG. 7 is a schematic circuit diagram of a class AB audio power amplifier according to an embodiment of the present invention;

FIG. 8 is a schematic circuit diagram of a class AB audio power amplifier according to another embodiment of the present invention;

FIG. 9 is a schematic diagram of a circuit configuration of a class AB audio power amplifier according to another embodiment of the present invention;

fig. 10 is a schematic circuit diagram of a class AB audio power amplifier according to yet another embodiment of the present invention.

Detailed Description

The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the drawings in the embodiments of the present invention, and it is obvious that the described embodiments are only a part of the embodiments of the present invention, and not all of the embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present invention.

In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present invention, but the present invention may be practiced in other ways than those specifically described and will be readily apparent to those of ordinary skill in the art without departing from the spirit of the present invention, and therefore the present invention is not limited to the specific embodiments disclosed below.

The existing audio power amplifier generally has an external playing mode and an earphone mode, so that the power supply voltage of the class AB audio power amplifier can select whether to need boosting according to the two modes, for example, the battery voltage of a mobile phone fluctuates within the range of 3V-5.5V, when boosting is not needed, the battery is directly used for supplying voltage to the class AB audio power amplifier, when the boosting mode is selected, a boosting circuit or a charge pump can be used for boosting the voltage output by the battery and then supplying power to the class AB audio power amplifier, and therefore, according to the application requirements, the working voltage of the class AB audio power amplifier generally floats within the range of 3.2-8.5.

Specifically, the class AB audio power amplifier includes: the circuit comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit, a common mode feedback circuit and a Miller compensation circuit, wherein the amplifying circuit is used for amplifying signals output by the input circuit and outputting the signals to the output circuit; the common mode feedback circuit is used for detecting the common mode voltage of the output end of the output circuit; the bias circuit is used for providing bias for the amplifying circuit. The Miller compensation circuit is used for meeting the stability requirement of the AB class audio power amplifier.

Continuing with fig. 1, the input circuit includes: a first transistor M1, a second transistor M2, a thirty-fifth transistor M35 and a thirty-fourth transistor M34, wherein the gate of the first transistor M1 is electrically connected to the first input voltage Vin-, the source is electrically connected to the source of the second transistor M2, the drain is electrically connected to the bias circuit, and the substrate is electrically connected to its own source; the gate of the second transistor M2 is electrically connected with a second input voltage Vin +, the source is electrically connected with the source of the first transistor M1, the drain is electrically connected with the bias circuit, and the substrate is electrically connected with the source of the second transistor M2; the gate of the thirty-fourth transistor M34 is connected to a first bias voltage V_EElectrically connected source to supply voltage V_PVDDElectrically connected to the drain of the thirty-fifth transistor M35, the substrate connected to the power supply voltage V_PVDDElectrically connecting; the gate of the thirty-fifth transistor M35 and a second bias voltage V_FElectrically connected to the source of the thirty-fourth transistor M34, the drain of the transistor M1 and the common terminal of the transistor M2, and the substrate connected to the power supply voltage V_PVDDAnd (6) electrically connecting. The first input voltage Vin-and the second input voltage Vin + are differential signals just inputted to the input end of the class AB audio power amplifier.

The bias circuit includes: a thirtieth transistor M30, a thirty-first transistor M31, a thirty-second transistor M32, a thirty-third transistor M33, a thirty-sixth transistor M36, a fifteenth transistor M15, a twentieth transistor M20, a twenty-first transistor M21, a twentieth transistor M22, a twenty-third transistor M23, a twenty-fourth transistor M24, and a twenty-fifth transistor M25, wherein a gate of the thirtieth transistor M30 is connected to a third bias voltage V_DElectrically connected to the drain of the first transistor M1, the source electrically connected to the drain of the thirty-sixth transistor M36, the substrate electrically connected to ground V_GNDElectrically connecting; the gate of the thirty-one transistor M31 is connected to a third bias voltage V_DElectrically connected, the source is electrically connected with the drain of the second transistor M2, the drain is electrically connected with the drain of the fifteenth transistor M15, and the substrate is electrically connected with ground; the gate of the thirtieth transistor M32 is electrically connected with the negative output end of the common mode feedback circuit, the source is electrically connected with the ground, the drain is electrically connected with the source of the thirtieth transistor M30, and the substrate is electrically connected with the ground; the gate of the thirty-third transistor M33 is electrically connected with the negative output end of the common mode feedback circuit, the source is electrically connected with the ground, the drain is electrically connected with the source of the thirty-first transistor M31, and the substrate is electrically connected with the ground; the gate of the thirty-sixth transistor M36 and the second bias voltage V_FElectrically connected to the source of the twentieth transistor M20, the drain of the twentieth transistor M30, the substrate of the first transistor M30 and the power supply voltage V_PVDDElectrically connecting; the gate of the fifteenth transistor M15 is connected to a second bias voltage V_FElectrically connected to the source of the twenty-first transistor M21, the drain of the twenty-first transistor M31, the substrate of the second transistor and the supply voltage V_PVDDElectrically connecting; the gate of the twentieth transistor M20 is electrically connected to the drain of the thirty-sixth transistor M36, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the thirty-sixth transistor M36, the substrate connected to the power supply voltage V_PVDDElectrically connecting; the gate of the twenty-first transistor M21 and the gate of the fifteenth transistor M15A drain electrode electrically connected to the source electrode_PVDDElectrically connected to the drain of the fifteenth transistor M15, the substrate connected to the supply voltage V_PVDDElectrically connecting; a gate of the twenty-second transistor M22 is electrically connected to a source of the twenty-third transistor M23, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the twenty-third transistor M23, the substrate is connected to the supply voltage V_PVDDElectrically connecting; the gate of the twenty-third transistor M23 is electrically connected to its own drain, the source is electrically connected to the drain of the twenty-second transistor M22, the drain is simultaneously electrically connected to the first current source I1 and the amplification circuit, and the substrate is electrically connected to its own source; the gate of the twenty-fourth transistor M24 is electrically connected to its own drain, the drain is electrically connected to both the second current source I2 and the amplifying circuit, the source is electrically connected to the drain of the twenty-fifth transistor M25, and the substrate is electrically connected to ground; the gate of the twenty-fifth transistor M25 is electrically connected to its own drain, the drain is electrically connected to the source of the twenty-fourth transistor M24, the source is electrically connected to ground, and the substrate is electrically connected to ground.

The amplification circuit includes: a first, a second, and a third constituent circuit, wherein the first constituent circuit comprises: a third transistor M3, a fourth transistor M4, a sixteenth transistor M16, a seventeenth transistor M17, an eighteenth transistor M18, and a nineteenth transistor M19; the second component circuit includes: an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, and a fourteenth transistor M14; the third component circuit includes: a ninth transistor M9 and a tenth transistor M10. Wherein the gate of the sixteenth transistor M16 is electrically connected to the gate of the twentieth transistor M20, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the eighteenth transistor M18, the substrate connected to the power supply voltage V_PVDDElectrically connecting; a gate of the seventeenth transistor M17 is electrically connected to the gate of the twenty-first transistor M21, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected to the drain of the nineteenth transistorM19 source electrode is electrically connected, substrate is connected with the power voltage V_PVDDElectrically connecting; the gate of the eighteenth transistor M18 and a fourth bias voltage V_CElectrically connected to the source of the sixteenth transistor M16, the drain of the sixteenth transistor M3, the substrate of the third transistor M3, and the power supply voltage V_PVDDElectrically connecting; the gate of the nineteenth transistor M19 and the fourth bias voltage V_CElectrically connected to the drain of the seventeenth transistor M17, the drain of the seventeenth transistor M4, the substrate of the transistor and the supply voltage V_PVDDElectrically connecting; the gate of the third transistor M3 is electrically connected to the common terminal of the twenty-third transistor M23 and the first current source I1, the source is electrically connected to the drain of the eighteenth transistor M18, the drain is electrically connected to the second component circuit, and the substrate is electrically connected to its own source; the gate of the fourth transistor M4 is electrically connected to the common terminal of the twenty-third transistor M23 and the first current source I1, the source is electrically connected to the drain of the nineteenth transistor M19, the drain is electrically connected to the second component circuit, and the substrate is electrically connected to its own source; the gate of the ninth transistor M9 is electrically connected to the common terminal of the twenty-fourth transistor M24 and the second current source I2, the drain is electrically connected to the drain of the eighteenth transistor M18, the source is electrically connected to the second component circuit, and the substrate is grounded; the gate of the tenth transistor M10 is electrically connected to the common terminal of the twenty-fourth transistor M24 and the second current source I2, the drain is electrically connected to the drain of the nineteenth transistor M19, the source is electrically connected to the second component circuit, and the substrate is grounded; the gate of the eleventh transistor M11 and the third bias voltage V_DElectrically connected, the source is electrically connected with the drain of the thirteenth transistor M13, the drain is electrically connected with the source of the ninth transistor M9, and the substrate is grounded; the gate of the twelfth transistor M12 and the third bias voltage V_DElectrically connected, the drain is electrically connected to the source of the tenth transistor M10, the source is electrically connected to the drain of the fourteenth transistor M14, and the substrate is grounded; the gate of the thirteenth transistor M13 is electrically connected to the positive output of the common mode feedback circuit,the source is grounded, the drain is electrically connected with the source of the eleventh transistor M11, and the substrate is grounded; the gate of the fourteenth transistor M14 is electrically connected to the positive output terminal of the common mode feedback circuit, the source thereof is grounded, the drain thereof is electrically connected to the source of the twelfth transistor M12, and the substrate thereof is grounded.

The output circuit includes: a twenty-sixth transistor M26, a twenty-seventh transistor M27, a twenty-eighth transistor M28 and a twenty-ninth transistor M29, wherein the gate of the twenty-sixth transistor M26 is electrically connected to the drain of the nineteenth transistor M19, and the source is connected to the supply voltage V_PVDDElectrically connected, the drain is the negative output terminal Vout-, the substrate and the power supply voltage V of the output circuit_PVDDElectrically connecting; a gate of the twenty-seventh transistor M27 is electrically connected to a drain of the eighteenth transistor M18, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected with the substrate and the power supply voltage V, the drain being the positive output terminal Vout + of the output circuit_PVDDElectrically connecting; the gate of the twenty-eighth transistor M28 is electrically connected to the source of the tenth transistor M10, the source is grounded, the drain is the negative output terminal Vout-of the output circuit, and the substrate is grounded; the gate of the twenty-ninth transistor M29 is electrically connected to the source of the ninth transistor M9, the source is grounded, and the drain is the positive output terminal Vout + of the output circuit.

The common mode feedback circuit includes: the common-mode feedback circuit comprises a first common-mode feedback detection circuit, a second common-mode feedback detection circuit and a common-mode feedback operational amplifier, wherein one end of the first common-mode feedback detection circuit is electrically connected with a negative output end Vout-of the output circuit, and the other end of the first common-mode feedback detection circuit is electrically connected with a negative input end of the common-mode feedback operational amplifier; one end of the second common mode feedback detection circuit is electrically connected with a positive output end Vout + of the output circuit, and the other end of the second common mode feedback detection circuit is also electrically connected with a negative input end of the common mode feedback operational amplifier; the positive input end of the common mode feedback operational amplifier is electrically connected with a reference voltage VCOM. The first common mode feedback detection circuit and the second common mode feedback detection circuit have the same structure, and include a first resistor R1 and a first capacitor C1 connected in parallel.

The miller compensation circuit comprises: a first miller compensation circuit, a second miller compensation circuit, a third miller compensation circuit and a fourth miller compensation circuit, wherein one end of the first miller compensation circuit is electrically connected with the gate of the twenty-sixth transistor M26, and the other end of the first miller compensation circuit is electrically connected with the drain of the twenty-sixth transistor M26; one end of the second miller compensation circuit is electrically connected with the gate of the twenty-eighth transistor M28, and the other end of the second miller compensation circuit is electrically connected with the drain of the twenty-eighth transistor M28; one end of the third miller compensation circuit is electrically connected with the grid electrode of the twenty-seventh transistor M27, and the other end of the third miller compensation circuit is electrically connected with the drain electrode of the twenty-seventh transistor M27; one end of the fourth miller compensation circuit is electrically connected with the gate of the twenty-ninth transistor M29, and the other end is electrically connected with the drain of the twenty-ninth transistor M29. The first miller compensation circuit, the second miller compensation circuit, the third miller compensation circuit and the fourth miller compensation circuit have the same structure and respectively comprise a second capacitor C2 and a second resistor R2 which are connected in parallel.

In the above circuit structure, when the power supply voltage V of the AB class audio power amplifier_PVDDWhen the voltage changes from 3.2V to 8.5V, the drain voltage of the ninth transistor M9 is V_D9＝V_PVDD-V_SG27The drain voltage of the tenth transistor M10 is V_D10＝V_PVDD-V_SG26Wherein V is_PVDDIs the supply voltage, V, of the class AB audio power amplifier_SG27Is the voltage difference, V, between the source and the gate of the twenty-seventh transistor M27_SG26Is the voltage difference between the source and the gate of the twenty-sixth transistor M26. Since M27 and M22 are current mirror relationships, V is therefore a direct current mirror_SG27Mainly with the bias voltage of M22, the size of M22 and the size of M27, and the substrate of M9 is grounded, therefore, the drain voltage of M9 follows the supply voltage V of the AB class audio power amplifier_PVDDIs increased.

When the power supply voltage V_PVDDWhen the voltage of the drain electrode of the M9 is small, the drain electrode to the substrate leakage current of the M9 is small and can be ignored, at the moment, the resistance of the drain electrode to the substrate of the M9 can be regarded as infinite and can be ignored, and at the moment, the voltage of the AB type audio power amplifier can be ignoredGain A_v1About:

wherein, g_m1、g_m18、g_m11、g_m26、g_m28Transconductance of transistors M1, M18, M11, M26, and M28, respectively; r is_o18、r_o16、r_o11、r_o13、r_o26、r_o28Output resistances of the transistors M18, M16, M11, M13, M26, M28, respectively; r_LIs the load resistance between the output terminals Vout + and Vout-of the class AB audio power amplifier.

It can be seen that when the supply voltage V is applied_PVDDSmaller, the amplification factor A of the AB class audio power amplifier_v1Independent of M9, it was not affected by M9.

When the power supply voltage V_PVDDThe drain voltage of M9 is increased continuously until the drain-to-substrate leakage current of M9 is larger, at which time, the drain-to-substrate resistance R of M9_DB9Cannot be approximated to infinity, i.e., cannot be ignored. The voltage gain a of the class AB audio power amplifier_v2About:

it follows that when the supply voltage V is applied_PVDDWhen the voltage is increased to M9 to generate leakage current, the voltage gain A of the AB class audio power amplifier_v2And a drain-to-substrate resistance R of the ninth transistor M9_DB9It is related. And is dependent on the supply voltage V_PVDDThe drain-to-substrate voltage difference V of M9_DB9Increase, drain to substrate leakage current, resistance R_DB9Reducing the voltage gain A of the AB class audio power amplifier_v2And decreases.

Similarly, when the power supply voltage V is_PVDDSmaller, the amplification factor A of the AB class audio power amplifier_v1Also related to M10Affected by M10. When the power supply voltage V_PVDDWhen the voltage is increased to M10 to generate leakage current, the voltage gain A of the AB class audio power amplifier_v2And the drain-to-substrate resistance R of transistor M10_DB10It is related. And is dependent on the supply voltage V_PVDDThe drain-to-substrate voltage difference V of M10_DB9Increase, drain to substrate leakage current, resistance R_DB10Reducing the voltage gain A of the AB class audio power amplifier_v2And decreases.

As shown in FIG. 2, FIG. 2 shows the voltage Gain of the class AB audio power amplifier as a function of the supply voltage V_PVDDA curve of variation.

In view of the above, an embodiment of the present invention provides a class AB audio power amplifier, as shown in fig. 3, the power amplifier includes: the amplifier includes: the amplifier comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit, a common mode feedback circuit and a Miller compensation circuit, wherein the amplifying circuit comprises a first composition circuit, a second composition circuit and a third composition circuit, and the third composition circuit comprises: a seventh transistor M7, an eighth transistor M8, a ninth transistor M9, and a tenth transistor M10;

the gate of the ninth transistor M9 is electrically connected to the gate of the tenth transistor M10, the source is electrically connected to the first terminal of the second component circuit, the drain is electrically connected to the source of the seventh transistor M7, and the substrate is grounded;

the gate of the seventh transistor M7 is connected to a fifth bias voltage V_BElectrically connected, the source is electrically connected to the drain of the ninth transistor M9, the drain is electrically connected to the first end of the first component circuit, and the substrate is grounded;

the gate of the tenth transistor M10 is electrically connected to the gate of the ninth transistor M9, the source is electrically connected to the second terminal of the second component circuit, the drain is electrically connected to the source of the eighth transistor M8, and the substrate is grounded;

the gate of the eighth transistor M8 and the fifth bias voltage V_BElectrically connected to the drain of the tenth transistor M10 at its source, and electrically connected to the second component circuit at its drainThe end is electrically connected, and the substrate is grounded.

Specifically, in an embodiment of the present invention, the input circuit includes: a first transistor M1, a second transistor M2, a thirty-fifth transistor M35 and a thirty-fourth transistor M34, wherein the gate of the first transistor M1 is electrically connected to the first input voltage Vin-, the source is electrically connected to the source of the second transistor M2, the drain is electrically connected to the bias circuit, and the substrate is electrically connected to its own source; the gate of the second transistor M2 is electrically connected with a second input voltage Vin +, the source is electrically connected with the source of the first transistor M1, the drain is electrically connected with the bias circuit, and the substrate is electrically connected with the source of the second transistor M2; the gate of the thirty-fourth transistor M34 is connected to a first bias voltage V_EElectrically connected source to supply voltage V_PVDDElectrically connected to the drain of the thirty-fifth transistor M35, the substrate connected to the power supply voltage V_PVDDElectrically connecting; the gate of the thirty-fifth transistor M35 and a second bias voltage V_FElectrically connected to the source of the thirty-fourth transistor M34, the drain of the transistor M1 and the common terminal of the transistor M2, and the substrate connected to the power supply voltage V_PVDDAnd (6) electrically connecting. The first input voltage Vin-and the second input voltage Vin + are differential signals input by positive and negative input ends of the AB class audio power amplifier.

The bias circuit includes: a first bias circuit and a second bias circuit, the first bias circuit comprising: a thirtieth transistor M30, a thirty-first transistor M31, a thirtieth transistor M32, a thirty-third transistor M33, a thirty-sixth transistor M36, a fifteenth transistor M15, a twentieth transistor M20, and a twenty-first transistor M21; the second bias circuit includes: a twenty-second transistor M22, a twenty-third transistor M23, a twenty-fourth transistor M24, and a twenty-fifth transistor M25, wherein the first bias circuit is configured to provide a bias to the input circuit and the amplification circuit, and the second bias circuit is configured to provide a bias to the output circuit.

Specifically, the gate of the thirtieth transistor M30 is connected to the third bias voltageV_DThe source electrode of the first transistor M1 is electrically connected with the drain electrode of the first transistor M36, the drain electrode of the first transistor M1 is electrically connected with the drain electrode of the thirty-sixth transistor M36, and the substrate of the first transistor M3578 is electrically connected with the ground; the gate of the thirty-one transistor M31 is connected to a third bias voltage V_DElectrically connected, the source is electrically connected with the drain of the second transistor M2, the drain is electrically connected with the drain of the fifteenth transistor M15, and the substrate is electrically connected with ground; the gate of the thirtieth transistor M32 is electrically connected with the negative output end of the common mode feedback circuit, the source is electrically connected with the ground, the drain is electrically connected with the source of the thirtieth transistor M30, and the substrate is electrically connected with the ground; the gate of the thirty-third transistor M33 is electrically connected with the negative output end of the common mode feedback circuit, the source is electrically connected with the ground, the drain is electrically connected with the source of the thirty-first transistor M31, and the substrate is electrically connected with the ground; the gate of the thirty-sixth transistor M36 and the second bias voltage V_FElectrically connected to the source of the twentieth transistor M20, the drain of the twentieth transistor M30, the substrate of the first transistor M30 and the power supply voltage V_PVDDElectrically connecting; the gate of the fifteenth transistor M15 is connected to a second bias voltage V_FElectrically connected to the source of the twenty-first transistor M21, the drain of the twenty-first transistor M31, the substrate of the second transistor and the supply voltage V_PVDDElectrically connecting; the gate of the twentieth transistor M20 is electrically connected to the drain of the thirty-sixth transistor M36, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the thirty-sixth transistor M36, the substrate connected to the power supply voltage V_PVDDElectrically connecting; a gate of the twenty-first transistor M21 is electrically connected to a drain of the fifteenth transistor M15, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected to the drain of the fifteenth transistor M15, the substrate connected to the supply voltage V_PVDDElectrically connecting; a gate of the twenty-second transistor M22 is electrically connected to a source of the twenty-third transistor M23, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the twenty-third transistor M23, the substrate is connected to the supply voltage V_PVDDElectrically connecting; the gate of the twenty-third transistor M23 is electrically connected to its own drain, the source is electrically connected to the drain of the twenty-second transistor M22, the drain is simultaneously electrically connected to the first current source I1 and the amplification circuit, and the substrate is electrically connected to its own source; the gate of the twenty-fourth transistor M24 is electrically connected to its own drain, the drain is simultaneously electrically connected to the second current source I2 and the gate of the tenth transistor M10 in the amplifying circuit, the source is electrically connected to the drain of the twenty-fifth transistor M25, and the substrate is electrically connected to ground; the gate of the twenty-fifth transistor M25 is electrically connected to its own drain, the drain is electrically connected to the source of the twenty-fourth transistor M24, the source is electrically connected to ground, and the substrate is electrically connected to ground.

The first component circuit includes: a third transistor M3, a fourth transistor M4, a sixteenth transistor M16, a seventeenth transistor M17, an eighteenth transistor M18, and a nineteenth transistor M19; wherein the gate of the sixteenth transistor M16 is electrically connected to the gate of the twentieth transistor M20, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the eighteenth transistor M18, the substrate connected to the power supply voltage V_PVDDElectrically connecting; a gate of the seventeenth transistor M17 is electrically connected to the gate of the twenty-first transistor M21, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected to the drain of said nineteenth transistor M19, the substrate being connected to said supply voltage V_PVDDElectrically connecting; the gate of the eighteenth transistor M18 and a fourth bias voltage V_CElectrically connected to the source of the sixteenth transistor M16, the drain of the sixteenth transistor M3, the substrate of the third transistor M3, and the power supply voltage V_PVDDElectrically connecting; the gate of the nineteenth transistor M19 and the fourth bias voltage V_CElectrically connected to the drain of the seventeenth transistor M17, the drain of the seventeenth transistor M4, the substrate of the transistor and the supply voltage V_PVDDElectrically connecting; a gate of the third transistor M3 is electrically connected to a common terminal of the twenty-third transistor M23 and the first current source I1, and a source thereof is connected to the first current source IThe drain of the eighteenth transistor M18 is electrically connected, the drain is electrically connected with the source of the ninth transistor M9 and the second component circuit, and the substrate is electrically connected with the source of the substrate; the gate of the fourth transistor M4 is electrically connected to the common terminal of the twenty-third transistor M23 and the first current source I1, the source is electrically connected to the drain of the nineteenth transistor M19, the drain is electrically connected to both the second component circuit and the source of the tenth transistor M10, and the substrate is electrically connected to its own source.

The second component circuit includes: an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, and a fourteenth transistor M14. The gate of the eleventh transistor M11 and the third bias voltage V_DElectrically connected, the source is electrically connected with the drain of the thirteenth transistor M13, the drain is electrically connected with the source of the ninth transistor M9, and the substrate is grounded; the gate of the twelfth transistor M12 and the third bias voltage V_DElectrically connected, the drain is electrically connected to the source of the tenth transistor M10, the source is electrically connected to the drain of the fourteenth transistor M14, and the substrate is grounded; the gate of the thirteenth transistor M13 is electrically connected to the positive output terminal of the common mode feedback circuit, the source is grounded, the drain is electrically connected to the source of the eleventh transistor M11, and the substrate is grounded; the gate of the fourteenth transistor M14 is electrically connected to the positive output terminal of the common mode feedback circuit, the source thereof is grounded, the drain thereof is electrically connected to the source of the twelfth transistor M12, and the substrate thereof is grounded.

The common mode feedback circuit includes: the common-mode feedback circuit comprises a first common-mode feedback detection circuit, a second common-mode feedback detection circuit and a common-mode feedback operational amplifier, wherein one end of the first common-mode feedback detection circuit is electrically connected with a negative output end Vout-of the output circuit, and the other end of the first common-mode feedback detection circuit is electrically connected with a negative input end of the common-mode feedback operational amplifier; one end of the second common mode feedback detection circuit is electrically connected with a positive output end Vout + of the output circuit, and the other end of the second common mode feedback detection circuit is also electrically connected with a negative input end of the common mode feedback operational amplifier; and the positive input end of the common mode feedback operational amplifier is electrically connected with a reference voltage. The first common mode feedback detection circuit and the second common mode feedback detection circuit have the same structure, and include a first resistor R1 and a first capacitor C1 connected in parallel.

Specifically, in the embodiment of the present invention, the drain of the seventh transistor M7 is electrically connected to the drain of the eighteenth transistor M18, and the drain of the eighth transistor M8 is electrically connected to the drain of the nineteenth transistor M19.

On the basis of the above embodiments, in an embodiment of the present invention, the seventh transistor M7 and the eighth transistor M8 are N-type transistors, which has a simple process and a low cost.

In an embodiment of the invention, based on any of the above embodiments, the fifth bias voltage V_BThe following relationship is satisfied:

V_PVDD-V_SG27+V_TH7≥V_B≥V_GS9-V_TH9+V_GS7+V_D-V_TH11；

wherein, V_BRepresents the fifth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG27Representing a voltage difference between a source and a gate of the twenty-seventh transistor; v_TH7Represents a threshold voltage of the seventh transistor; v_GS9Represents a voltage difference between the gate and the source of the ninth transistor M9; v_TH9Represents the threshold voltage of the ninth transistor M9; v_GS7Represents a voltage difference between the gate and the source of the seventh transistor M7; v_DRepresenting the third bias voltage; v_TH11Which represents the threshold voltage of the eleventh transistor M11 in the amplifying circuit.

In the embodiment of the invention, the drain voltage V of the ninth transistor M9_D9Comprises the following steps: v_D9＝V_PVDD-V_SG27-V_DS7Wherein V is_SG27Is the voltage difference between the source and the gate of M27, V_DS7The difference between the drain voltage and the source voltage of M7 shows that, compared to the prior art, in the amplifier provided by the embodiment of the present invention, the drain voltage of M9 is reduced by V compared to the prior art_DS7So as to be at said supply voltage V_PVDDWhen the voltage is increased, the drain voltage of the M9 can be increased less, and the condition that basically no leakage current exists between the drain of the M9 and the substrate is ensuredDrain to substrate resistance R_DB9The equivalent can be approximate to infinity, namely the influence on the gain of the amplifier can be ignored, and the voltage gain of the amplifier is not along with the power supply voltage V in a wider voltage range_PVDDMay vary.

Similarly, the drain voltage V of the tenth transistor M10_D10Comprises the following steps: v_D10＝V_PVDD-V_SG26-V_DS8Wherein V is_SG26Is the voltage difference between the source and the gate of M26, V_DS8The difference between the drain voltage and the source voltage of M8 shows that, compared with the prior art, the drain voltage of M10 in the amplifier provided by the embodiment of the present invention is reduced by V compared with the prior art_DS8So as to be at said supply voltage V_PVDDWhen the voltage is increased, the drain voltage of the M10 is slightly increased, the drain of the M10 and the substrate are ensured to have no leakage current basically, and the resistance R from the drain to the substrate_DB10Approximately infinite, namely the influence on the gain of the amplifier can be ignored, and the voltage gain of the amplifier is not dependent on the power supply voltage V in a wider voltage range_PVDDMay vary.

On the basis of any one of the above embodiments, in an embodiment of the present invention, as shown in fig. 4, the amplifier further includes:

a fifth transistor M5 between the drain of the seventh transistor M7 and the first terminal of the first component circuit, the gate of the fifth transistor M5, and a sixth bias voltage V_AElectrically connected, the source is electrically connected with the drain of the seventh transistor M7, the drain is electrically connected with the first end of the first component circuit, and the substrate is grounded;

a sixth transistor M6 between the drain of the eighth transistor M8 and the second terminal of the first component circuit, the gate of the sixth transistor M6 and the sixth bias voltage V_AAnd the source of the eighth transistor M8 is electrically connected to the drain of the eighth transistor M8, the drain of the eighth transistor M8 is electrically connected to the second terminal of the first component circuit, and the substrate is grounded. Specifically, the drain of the fifth transistor M5 is electrically connected to the drain of the eighteenth transistor M18, and the drain of the sixth transistor M6 is electrically connected to the drain of the eighth transistor M18The drain of the nineteenth transistor M19 is electrically connected.

It should be noted that, in the above embodiment, the currents in the twenty-second transistor M22 and the twenty-third transistor M23 come from the first current source I1, and the currents in the twenty-fourth transistor M24 and the twenty-fifth transistor M25 come from the second current source I2, and the first current source and the second current source are dc bias current mirrors. A twenty-second transistor M22, a twenty-third transistor M23, a third transistor M3, a fourth transistor M4, a twenty-sixth transistor M26 and a twenty-seventh transistor M27 form a transconductance linear ring; likewise, the twenty-fourth transistor M24, the twenty-fifth transistor M25, the ninth transistor M9, and the tenth transistor M10 also form a transconductance linear loop. The sixteenth transistor M16, the seventeenth transistor M17, the eighteenth transistor M18, and the nineteenth transistor M19 are first-stage PMOS differential current amplifiers. The third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, and the ninth transistor M9, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9, and the tenth transistor M10, and the twentieth transistor M22, the twenty-third transistor M23, the twenty-fourth transistor M24, and the twenty-fifth transistor M25 are used to set the quiescent currents of the twenty-sixth transistor M26, the twenty-seventh transistor M27, the twenty-eighth transistor, and the twenty-ninth transistor M29, which are output transistors. The third transistor M3, the fourth transistor M4, the fifth transistor M5, the sixth transistor M6, the seventh transistor M7, the eighth transistor M8, the ninth transistor M9 and the tenth transistor M10 also shield the alternating current characteristic, represent infinite alternating current impedance for the current from the first stage, and drive the P-transistor and the N-transistor of the output stage respectively, thereby realizing class AB amplification.

On the basis of the above embodiments, in an embodiment of the present invention, the fifth transistor M5 and the sixth transistor M6 are N-type transistors, which is simple in process and low in cost.

On the basis of the above embodiments, in one embodiment of the present invention, the sixth bias voltage V_AThe following relationship is satisfied:

wherein, V_ARepresents the sixth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG27Represents a voltage difference between the source and the gate of the twenty-seventh transistor M27; v_TH5Represents the threshold voltage of the fifth transistor M5; v_GS5Represents a voltage between the gate and the source of the fifth transistor M5; v_TH7Indicating the threshold voltage of the seventh transistor M7.

In the embodiment of the invention, the drain voltage V of the ninth transistor M9_D9Comprises the following steps: v_D9＝V_PVDD-V_SG27-V_DS5-V_DS7Wherein V is_SG27Is the voltage difference between the source and the gate of M27, V_DS7Is the difference between the drain voltage and the source voltage of M7, V_DS5The difference between the drain voltage and the source voltage of M5 shows that, compared to the prior art, in the amplifier provided by the embodiment of the present invention, the drain voltage of M9 is reduced by V compared to the prior art_DS7+V_DS5So as to be at said supply voltage V_PVDDWhen the voltage is increased, the drain voltage of the M9 can be increased less, the M9 is ensured to have substantially no leakage current between the drain and the substrate, and the resistance R from the drain to the substrate_DB9Approximately infinite, i.e. the influence on the amplifier gain can be neglected, and a wider voltage range can be realized, and the voltage gain of the amplifier is not dependent on the power supply voltage V_PVDDMay vary.

Similarly, the drain voltage V of the tenth transistor M10_D10Comprises the following steps: v_D10＝V_PVDD-V_SG26-V_DS6-V_DS8Wherein V is_SG26Is the voltage difference between the source and the gate of M26, V_DS8Is the difference between the drain voltage and the source voltage of M8, V_DS6The difference between the drain voltage and the source voltage of M6 shows that compared to the prior art, the embodiment of the present invention providesIn the amplifier of (3), the drain voltage of M10 is reduced by V compared with the previous one_DS8+V_DS6So as to be at said supply voltage V_PVDDWhen the voltage is increased, the drain voltage of the M10 can be increased less, the M10 is ensured to have substantially no leakage current between the drain and the substrate, and the resistance R from the drain to the substrate_DB10Approximately infinite, i.e. the influence on the amplifier gain can be neglected, and a wider voltage range can be realized, and the voltage gain of the amplifier is not dependent on the power supply voltage V_PVDDMay vary.

On the basis of any of the above embodiments, in an embodiment of the present invention, the amplifier may further include a plurality of N-type transistors connected in series between the drain of the fifth transistor M5 and the drain of the eighteenth transistor M18, and a plurality of N-type transistors connected in series between the drain of the sixth transistor M6 and the drain of the nineteenth transistor M19, so as to achieve a wider range, wherein the voltage gain of the amplifier is not dependent on the power supply voltage V_PVDDMay vary. The present invention is not limited in this regard, as the case may be.

On the basis of any one of the above embodiments, in an embodiment of the present invention, as shown in fig. 5, the amplifier further includes: a third current source IB, a fortieth transistor M40, a forty-first transistor M41, a forty-second transistor M42, a forty-third transistor M43, a forty-fourth transistor M44, a forty-fifth transistor M45, a forty-sixth transistor M46, a forty-seventh transistor M47, a forty-eighth transistor M48, a forty-ninth transistor M49, a fifty-first transistor M50, a fifty-first transistor M51, a fifty-second transistor M52, and a fifty-third transistor M53; wherein the content of the first and second substances,

the gate of the fortieth transistor M40 is electrically connected with the gates of the third current source IB and the fortieth transistor M41 at the same time, the source is grounded, the drain is electrically connected with the third current source IB, and the substrate is grounded;

the gate of the forty-first transistor M41 is electrically connected to the gate of the forty-third transistor M40, the source is grounded, the drain is electrically connected to the drain of the forty-third transistor M43, and the substrate is grounded;

the gate of the forty-second transistor M42 is electrically connected with the gate of the forty-first transistor M41, the source is grounded, the drain is electrically connected with the drain of the forty-sixth transistor M46, and the substrate is grounded;

the gate of the forty-third transistor M43 is electrically connected to its own drain, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of said forty-first transistor M41, the substrate being connected to a supply voltage V_PVDDElectrically connecting;

a gate of the forty-fourth transistor M44 is electrically connected to a gate of the forty-third transistor M43, and a source thereof is connected to a power supply voltage V_PVDDElectrically connected to the drain of the forty-seventh transistor M47, and connected to the substrate via a power supply voltage V_PVDDElectrically connecting;

the gate of the forty-fifth transistor M45 is electrically connected with the gate of the forty-fourth transistor M44, and the source is connected with a power supply voltage V_PVDDElectrically connected to the drain of the forty-eighth transistor M48, the substrate connected to a supply voltage V_PVDDElectrically connecting;

the gate of the forty-sixth transistor M46 is electrically connected to its own drain, the source to the supply voltage V_PVDDElectrically connected to the drain of the forty-second transistor M42, the substrate and a supply voltage V_PVDDElectrically connecting;

the gate of the forty-seventh transistor M47 is electrically connected with the gate of the forty-sixth transistor M46, and the source is connected with the power supply voltage V_PVDDElectrically connected to the drain of the forty-ninth transistor M49, and connected to the substrate via a power supply voltage V_PVDDElectrically connecting;

the gate of the forty-eighth transistor M48 is electrically connected with the gate of the forty-seventh transistor M47, and the source is connected with the power supply voltage V_PVDDElectrically connected to the drain of the fifty-second transistor M52, and connected to the substrate via a power supply voltage V_PVDDElectrically connecting;

the gate of the forty-ninth transistor M49 is electrically connected with its own drain, the source is electrically connected with the drain of the fifty-fifth transistor M50, the drain is electrically connected with the drain of the forty-seventh transistor M47, and the substrate is grounded;

the gate of the fifty-first transistor M50 is electrically connected to its own drain, the source is electrically connected to the drain of the fifty-first transistor M51, the drain is electrically connected to the source of the forty-ninth transistor M49, and the substrate is grounded;

the gate of the fifty-first transistor M51 is electrically connected to its own drain, the source is grounded, the drain is electrically connected to the source of the fifty-first transistor M50, and the substrate is grounded;

the gate of the fifty-second transistor M52 is electrically connected to its own drain, the source is electrically connected to the drain of the fifty-third transistor M53, the drain is electrically connected to the drain of the forty-eighth transistor M48, and the substrate is grounded;

the gate of the fifty-third transistor M53 is electrically connected to its own drain, the source is grounded, the drain is electrically connected to the source of the fifty-second transistor M52, and the substrate is grounded.

In the above embodiment, the drain output voltage of the forty-seventh transistor M47 is the sixth bias voltage V_A(ii) a The drain output voltage of the forty-eighth transistor M48 is the fifth bias voltage V_B(ii) a The gate of the forty-fourth transistor M44 has the voltage of the first bias voltage V_E(ii) a The gate of the forty-seventh transistor M47 has the second bias voltage V_F。

As shown in FIG. 6, FIG. 6 shows the voltage Gain of the class AB audio amplifier provided by the embodiment of the present invention as a function of the supply voltage V_PVDDA curve of variation. As can be seen from fig. 6, the class AB audio amplifier provided by the embodiment of the present invention can achieve a wide voltage range (3.2V-8.5V), and the voltage gain of the class AB audio amplifier is kept unchanged.

An embodiment of the present invention further provides another class AB audio amplifier, as shown in fig. 7, the amplifier includes: the amplifier comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit, a common mode feedback circuit and a Miller compensation circuit, wherein the amplifying circuit comprises a first composition circuit, a second composition circuit and a third composition circuit, and the third composition circuit comprises: a ninth transistor M9 and a tenth transistor M10;

the gate of the ninth transistor M9 is electrically connected to the gate of the tenth transistor M10, the source is electrically connected to the first terminal of the second component circuit, the drain is electrically connected to the first terminal of the first component circuit, and the substrate is electrically connected to its own source;

the gate of the tenth transistor M10 is electrically connected to the gate of the ninth transistor M9, the source is electrically connected to the second terminal of the second component circuit, the drain is electrically connected to the second terminal of the first component circuit, and the substrate is electrically connected to its own source.

Specifically, the gate of the thirtieth transistor M30 is connected to the third bias voltage V_DThe source electrode of the first transistor M1 is electrically connected with the drain electrode of the first transistor M36, the drain electrode of the first transistor M1 is electrically connected with the drain electrode of the thirty-sixth transistor M36, and the substrate of the first transistor M3578 is electrically connected with the ground; the gate of the thirty-one transistor M31 is connected to a third bias voltage V_DElectrically connected, the source is electrically connected with the drain of the second transistor M2, the drain is electrically connected with the drain of the fifteenth transistor M15, and the substrate is electrically connected with ground; the gate of the thirtieth transistor M32 is electrically connected with the negative output end of the common mode feedback circuit, the source is electrically connected with the ground, the drain is electrically connected with the source of the thirtieth transistor M30, and the substrate is electrically connected with the ground; the gate of the thirty-third transistor M33 is electrically connected with the negative output end of the common mode feedback circuit, the source is electrically connected with the ground, the drain is electrically connected with the source of the thirty-first transistor M31, and the substrate is electrically connected with the ground; the gate of the thirty-sixth transistor M36 and the second bias voltage V_FElectrically connected to the source of the twentieth transistor M20, the drain of the twentieth transistor M30, the substrate of the first transistor M30 and the power supply voltage V_PVDDElectrically connecting; the gate of the fifteenth transistor M15 is connected to a second bias voltage V_FElectrically connected to the source of the twenty-first transistor M21, the drain of the twenty-first transistor M31, the substrate of the second transistor and the supply voltage V_PVDDElectrically connecting; the gate of the twentieth transistor M20 is electrically connected to the drain of the thirty-sixth transistor M36, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the thirty-sixth transistor M36, the substrate connected to the power supply voltage V_PVDDElectric connectionConnecting; a gate of the twenty-first transistor M21 is electrically connected to a drain of the fifteenth transistor M15, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected to the drain of the fifteenth transistor M15, the substrate connected to the supply voltage V_PVDDElectrically connecting; a gate of the twenty-second transistor M22 is electrically connected to a source of the twenty-third transistor M23, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the twenty-third transistor M23, the substrate is connected to the supply voltage V_PVDDElectrically connecting; the gate of the twenty-third transistor M23 is electrically connected to its own drain, the source is electrically connected to the drain of the twenty-second transistor M22, the drain is simultaneously electrically connected to the first current source I1 and the amplification circuit, and the substrate is electrically connected to its own source; the gate of the twenty-fourth transistor M24 is electrically connected to its own drain, the source is electrically connected to the drain of the twenty-fifth transistor M25, the drain is simultaneously electrically connected to the second current source I2 and the gate of the tenth transistor M10 in the amplifying circuit, and the substrate is electrically connected to its own source; the gate of the twenty-fifth transistor M25 is electrically connected to its own drain, the drain is electrically connected to the source of the twenty-fourth transistor M24, the source is electrically connected to ground, and the substrate is electrically connected to ground.

The first component circuit includes: a third transistor M3, a fourth transistor M4, a sixteenth transistor M16, a seventeenth transistor M17, an eighteenth transistor M18, and a nineteenth transistor M19; wherein the gate of the sixteenth transistor M16 is electrically connected to the gate of the twentieth transistor M20, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the eighteenth transistor M18, the substrate connected to the power supply voltage V_PVDDElectrically connecting; a gate of the seventeenth transistor M17 is electrically connected to the gate of the twenty-first transistor M21, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected to the drain of said nineteenth transistor M19, the substrate being connected to said supply voltage V_PVDDElectrically connecting; the gate of the eighteenth transistor M18 and a fourth bias voltage V_CElectrically connected to the source and the drainA drain of the sixteenth transistor M16 is electrically connected to a source of the third transistor M3, a substrate thereof is connected to the power supply voltage V_PVDDElectrically connecting; the gate of the nineteenth transistor M19 and the fourth bias voltage V_CElectrically connected to the drain of the seventeenth transistor M17, the drain of the seventeenth transistor M4, the substrate of the transistor and the supply voltage V_PVDDElectrically connecting; the gate of the third transistor M3 is electrically connected to the common terminal of the twenty-third transistor M23 and the first current source I1, the source is electrically connected to the drain of the eighteenth transistor M18, the drain is electrically connected to both the second component circuit and the source of the ninth transistor M9, and the substrate is electrically connected to its own source; the gate of the fourth transistor M4 is electrically connected to the common terminal of the twenty-third transistor M23 and the first current source I1, the source is electrically connected to the drain of the nineteenth transistor M19, the drain is electrically connected to both the second component circuit and the source of the tenth transistor M10, and the substrate is electrically connected to its own source.

The second component circuit includes: an eleventh transistor M11, a twelfth transistor M12, a thirteenth transistor M13, and a fourteenth transistor M14. The gate of the eleventh transistor M11 and the third bias voltage V_DElectrically connected, the source is electrically connected with the drain of the thirteenth transistor M13, the drain is electrically connected with the source of the ninth transistor M9, and the substrate is grounded; the gate of the twelfth transistor M12 and the third bias voltage V_DElectrically connected, the source is electrically connected to the drain of the fourteenth transistor M14, the drain is electrically connected to the source of the tenth transistor M10, and the substrate is grounded; the gate of the thirteenth transistor M13 is electrically connected to the positive output terminal of the common mode feedback circuit, the source is grounded, the drain is electrically connected to the source of the eleventh transistor M11, and the substrate is grounded; the gate of the fourteenth transistor M14 is electrically connected to the positive output terminal of the common mode feedback circuit, the source thereof is grounded, the drain thereof is electrically connected to the source of the twelfth transistor M12, and the substrate thereof is grounded.

The output circuit includes: twenty-sixth transistor M26, twenty-seventh transistor M27, twenty-fifth transistorEight transistors M28 and a twenty-ninth transistor M29, wherein the gate of the twenty-sixth transistor M26 is electrically connected to the drain of the nineteenth transistor M19, and the source is connected to the supply voltage V_PVDDElectrically connected, the drain is the negative output terminal Vout-, the substrate and the power supply voltage V of the output circuit_PVDDElectrically connecting; a gate of the twenty-seventh transistor M27 is electrically connected to a drain of the eighteenth transistor M18, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected with the substrate and the power supply voltage V, the drain being the positive output terminal Vout + of the output circuit_PVDDElectrically connecting; the gate of the twenty-eighth transistor M28 is electrically connected to the source of the tenth transistor M10, the source is grounded, the drain is the negative output terminal Vout-of the output circuit, and the substrate is grounded; the gate of the twenty-ninth transistor M29 is electrically connected to the source of the ninth transistor M9, the source is grounded, and the drain is the positive output terminal Vout + of the output circuit.

In the embodiment of the invention, the drain voltage V of the ninth transistor M9_D9Comprises the following steps: v_D9＝V_PVDD-V_SG27Substrate voltage V_B9And its source voltage V_S9Equal, the voltage difference V between its drain and the substrate_DB9＝V_PVDD-V_SG27-V_S9Wherein V is_SG27Is the voltage difference between the source and the gate of M27, V_S9Is the source voltage of M9. When the power supply voltage V_PVDDWhen the voltage of the drain of the M9 is increased, the voltage of the source of the M9 is increased, that is, the substrate voltage of the M9 is increased, so that the voltage difference V between the drain and the gate of the M9 is increased_DB9The variation is not large, the leakage current between the drain electrode of the M9 and the substrate is basically ensured, and the resistance R from the drain electrode to the substrate_DB9Equivalent to infinity, and realizes a wide voltage range, and the voltage gain of the amplifier does not follow the power supply voltage V_PVDDMay vary.

Similarly, the drain voltage V of the tenth transistor M10_D10Comprises the following steps: v_D10＝V_PVDD-V_SG26Substrate voltage V_B10For its source voltage V_S10Voltage difference V between drain and substrate_DB10＝V_PVDD-V_SG26-V_S10Wherein V is_SG26Is the voltage difference between the source and the gate of M26, V_S10Is the source voltage of M10. When the power supply voltage V_PVDDAt the time of increase, the drain voltage of M10 increases, but the source voltage of M10 also increases, namely M10The substrate voltage increases, so that the voltage difference V between the drain and the gate of M10_DB10The variation is not large, the leakage current between the drain electrode of the M10 and the substrate is basically ensured, and the resistance R from the drain electrode to the substrate_DB10Equivalent to infinity, and realizes a wide voltage range, and the voltage gain of the amplifier does not follow the power supply voltage V_PVDDMay vary.

In the above embodiments, the ninth transistor M9 and the tenth transistor M10 employ Deep N-well transistors, i.e., Deep N-well transistors. The deep N well adopts a method that a deep N well mask is added on the process to isolate the drains of M9 and M10 from the substrate, so that the resistance from the drain to the substrate can be approximately equivalent to infinity and can be ignored, the problem that the equivalent resistance from the drains of M9 and M10 to the substrate is reduced due to the rise of the drain voltage of M9 and M10 is solved, a wider voltage range is realized, and the voltage gain of the amplifier is not reduced along with the supply voltage V_PVDDMay vary.

Furthermore, in the embodiment of the present invention, the substrate of the twenty-fourth transistor M24 is also electrically connected to its source, using a deep N-well transistor. In the embodiment of the invention, when the currents of M9, M10 and M24 are equal, the sizes are the same, the gate voltages are the same, and only when M24, M9 and M10 adopt deep N wells simultaneously, the V is enabled to be V_SB10＝^V _SB9＝V_SB24＝0，V_GS10＝V_GS9＝V_GS24At this time, V can be made_GS25＝V_GS29Namely, the mirror image of M25 and M29 is realized, the quiescent current of M29 is controlled, and the influence of the body effect is reduced.

From the above, the class AB audio power amplifier provided by the embodiment of the present invention can also achieve a wider voltage range, and the voltage gain of the amplifier does not follow the power supply voltage V_PVDDIs changed and the body effect influence is small.

It should be noted that, in the above embodiments, all of the class AB audio power amplifiers are fully differential class AB audio power amplifiers, and in other embodiments of the present invention, the class AB audio power amplifiers may also be single-ended class AB audio power amplifiers, which is not limited in this respect, and is determined as the case may be.

The class AB audio power amplifier provided in the embodiment of the present invention is described below with the class AB audio power amplifier being a single-ended class AB audio power amplifier, and for convenience of description, only different parts from the above embodiment are described below, and like parts may be referred to each other.

Specifically, as shown in fig. 8, the class AB audio power amplifier provided in the embodiment of the present invention includes: the gain control circuit comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit and a Miller compensation circuit, wherein the amplifying circuit comprises a first composition circuit, a second composition circuit and a third composition circuit, and the third composition circuit comprises: an eighth transistor M8 and a tenth transistor M10;

the gate of the tenth transistor M10 is electrically connected to the bias circuit, the source is electrically connected to the second component circuit, the drain is electrically connected to the source of the eighth transistor M8, and the substrate is grounded;

the gate of the eighth transistor M8 is connected to a fifth bias voltage V_BAnd the source is electrically connected to the drain of the tenth transistor M10, the drain is electrically connected to the first component circuit, and the substrate is grounded.

Specifically, in an embodiment of the present invention, the input circuit includes: a first transistor M1, a second transistor M2, a thirty-fifth transistor M35 and a thirty-fourth transistor M34, wherein the gate of the first transistor M1 is electrically connected to the first input voltage Vin-, the source is electrically connected to the source of the second transistor M2, the drain is electrically connected to the bias circuit, and the substrate is electrically connected to its own source; the gate of the second transistor M2 is electrically connected with a second input voltage Vin +, the source is electrically connected with the source of the first transistor M1, the drain is electrically connected with the bias circuit, and the substrate is electrically connected with the source of the second transistor M2; the gate of the thirty-fourth transistor M34 is connected to a first bias voltage V_EElectrically connected source to supply voltage V_PVDDElectrically connected to the drain of the thirty-fifth transistor M35, the substrate connected to the power supply voltage V_PVDDElectrically connecting; a gate of the thirty-fifth transistor M35And a second bias voltage V_FElectrically connected to the source of the thirty-fourth transistor M34, the drain of the transistor M1 and the common terminal of the transistor M2, and the substrate connected to the power supply voltage V_PVDDAnd (6) electrically connecting. The first input voltage Vin-and the second input voltage Vin + are differential signals input by positive and negative input ends of the AB class audio power amplifier.

The bias circuit includes: a first bias circuit and a second bias circuit, the first bias circuit comprising: a thirty-first transistor M31, a thirty-third transistor M33, a fifteenth transistor M15, a twenty-first transistor M21; the second bias circuit includes: a twenty-second transistor M22, a twenty-third transistor M23, a twenty-fourth transistor M24, and a twenty-fifth transistor M25, wherein the first bias circuit is configured to provide a bias to the input circuit and the amplification circuit, and the second bias circuit is configured to provide a bias to the output circuit.

Specifically, the gate of the thirty-first transistor M31 is connected to a third bias voltage V_DElectrically connected, the source is electrically connected with the drain of the first transistor M1, the drain is electrically connected with the drain of the fifteenth transistor M15, and the substrate is electrically connected with ground; a gate of the thirty-third transistor M33 and a seventh bias voltage V_GThe source electrode of the third eleventh transistor M31 is electrically connected with the ground, the drain electrode of the third eleventh transistor M31 is electrically connected with the source electrode of the third eleventh transistor M31, and the substrate of the third eleventh transistor M31 is electrically connected with the ground; a gate of the fifteenth transistor M15 and a fourth bias voltage V_CElectrically connected to the source of the twenty-first transistor M21, the drain of the twenty-first transistor M31, the substrate of the second transistor and the supply voltage V_PVDDElectrically connecting; a gate of the twenty-first transistor M21 is electrically connected to a drain of the fifteenth transistor M15, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected to the drain of the fifteenth transistor M15, the substrate connected to the supply voltage V_PVDDElectrically connecting; a gate of the twenty-second transistor M22 is electrically connected to a source of the twenty-third transistor M23, and the source is connected to the power supply voltage V_PVDDElectric connection, leakageA source electrode of the twenty-third transistor M23, a substrate and the power supply voltage V_PVDDElectrically connecting; the gate of the twenty-third transistor M23 is electrically connected to its own drain, the source is electrically connected to the drain of the twenty-second transistor M22, the drain is simultaneously electrically connected to the first current source I1 and the gate of the fourth transistor M4 in the amplifying circuit, and the substrate is electrically connected to its own source; the gate of the twenty-fourth transistor M24 is electrically connected to its own drain, the source is electrically connected to the drain of the twenty-fifth transistor M25, the drain is simultaneously electrically connected to the second current source I2 and the gate of the tenth transistor M10 in the amplifying circuit, and the substrate is grounded; the gate of the twenty-fifth transistor M25 is electrically connected to its own drain, the drain is electrically connected to the source of the twenty-fourth transistor M24, the source is electrically connected to ground, and the substrate is electrically connected to ground.

The first component circuit includes: a fourth transistor M4, a seventeenth transistor M17, and a nineteenth transistor M19; wherein a gate of the seventeenth transistor M17 is electrically connected to a gate of the twenty-first transistor M21, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected to the drain of said nineteenth transistor M19, the substrate being connected to said supply voltage V_PVDDElectrically connecting; the gate of the nineteenth transistor M19 and the fourth bias voltage V_CElectrically connected to the drain of the seventeenth transistor M17, the drain of the seventeenth transistor M4, the substrate of the transistor and the supply voltage V_PVDDElectrically connecting; the gate of the fourth transistor M4 is electrically connected to the common terminal of the twenty-third transistor M23 and the first current source I1, the source is electrically connected to the drain of the nineteenth transistor M19, the drain is electrically connected to both the second component circuit and the source of the tenth transistor M10, and the substrate is electrically connected to its own source.

The second component circuit includes: a twelfth transistor M12 and a fourteenth transistor M14. The gate of the twelfth transistor M12 and the third bias voltage V_DElectrically connected to the drain of the second transistor M2 at its source and to the tenth transistor M10 at its drainThe source electrode is electrically connected, and the substrate is grounded; the gate of the fourteenth transistor M14 is electrically connected to the gate of the thirtieth transistor M33, the source thereof is grounded, the drain thereof is electrically connected to the source of the twelfth transistor M12, and the substrate thereof is grounded.

The output circuit includes: a twenty-sixth transistor M26 and a twenty-eighth transistor M28, wherein the gate of the twenty-sixth transistor M26 is electrically connected to the drain of the nineteenth transistor M19, and the source is connected to the supply voltage V_PVDDElectrically connected, the drain being the output terminal Vout of said output circuit, the substrate being connected to said supply voltage V_PVDDElectrically connecting; the gate of the twenty-eighth transistor M28 is electrically connected to the source of the tenth transistor M10, the source is grounded, the drain is the output terminal Vout, and the substrate is grounded.

The miller compensation circuit comprises: the first miller compensation circuit is electrically connected with the gate of the twenty-sixth transistor M26 at one end and the drain of the twenty-sixth transistor M26 at the other end; one end of the second miller compensation circuit is electrically connected with the gate of the twenty-eighth transistor M28, and the other end of the second miller compensation circuit is electrically connected with the drain of the twenty-eighth transistor M28. The first miller compensation circuit and the second miller compensation circuit have the same structure and respectively comprise a second capacitor C2 and a second resistor R2 which are connected in parallel.

On the basis of the above embodiments, in an embodiment of the present invention, the eighth transistor M8 is an N-type transistor, which has a simple process and a low cost.

In an embodiment of the invention, on the basis of any one of the above embodiments, the fifth bias voltage V_BThe following relationship is satisfied:

V_PVDD-V_SG26+V_TH8≥V_B≥V_GS10-V_TH10+V_GS8+V_D-V_TH12；

wherein, V_BRepresents the fifth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG26Representing the source and gate of a twenty-sixth transistor M26The voltage difference between the poles; v_TH8Represents a threshold voltage of the eighth transistor M8; v_GS10Represents a voltage difference between the gate and the source of the tenth transistor M10; v_TH10Represents the threshold voltage of the tenth transistor M10; v_GS8Represents a voltage difference between the gate and the source of the eighth transistor M8; v_DRepresents a third bias voltage; v_TH12Which represents the threshold voltage of the twelfth transistor M12 in the amplifying circuit.

In the embodiment of the present invention, the drain voltage V of the tenth transistor M10_D10Comprises the following steps: v_D10＝V_PVDD-V_SG26-V_DS8Wherein V is_SG26Is the voltage difference between the source and the gate of M26, V_DS8The difference between the drain voltage and the source voltage of M8 shows that, compared with the prior art, the drain voltage of M10 in the amplifier provided by the embodiment of the present invention is reduced by V compared with the prior art_DS8So as to be at said supply voltage V_PVDDWhen the voltage is increased, the drain voltage of the M10 is slightly increased, the drain of the M10 and the substrate are ensured to have no leakage current basically, and the resistance R from the drain to the substrate_DB10Approximately equivalent to infinity, namely the influence on the gain can be ignored, a wider voltage range is realized, and the voltage gain of the amplifier does not follow the power supply voltage V_PVDDMay vary.

On the basis of any one of the above embodiments, in an embodiment of the present invention, as shown in fig. 9, the amplifier further includes:

a sixth transistor M6 between the drain of the eighth transistor M8 and the first component circuit, the gate of the sixth transistor M6 and the sixth bias voltage V_AAnd the source is electrically connected to the drain of the eighth transistor M8, the drain is electrically connected to the first component circuit, and the substrate is grounded. Specifically, the drain of the sixth transistor M6 is electrically connected to the drain of the nineteenth transistor M19.

On the basis of the above embodiments, in an embodiment of the present invention, the sixth transistor M6 is an N-type transistor, which has a simple process and a low cost.

The sixth bias voltage V_AThe following relationship is satisfied:

wherein, V_ARepresents the sixth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG26Represents a voltage difference between the source and the gate of a twenty-sixth transistor M26 in the output circuit; v_TH6Represents the threshold voltage of the sixth transistor M6; v_GS6Represents a voltage between the gate and the source of the sixth transistor M6; v_BRepresents the fifth bias voltage; v_TH8Indicating the threshold voltage of the eighth transistor M8.

In the embodiment of the present invention, the drain voltage V of the tenth transistor M10_D10Comprises the following steps: v_D10＝V_PVDD-V_SG26-V_DS6-V_DS8Wherein V is_SG26Is the voltage difference between the source and the gate of M26, V_DS8Is the difference between the drain voltage and the source voltage of M8, V_DS6The difference between the drain voltage and the source voltage of M6 shows that, compared to the prior art, in the amplifier provided by the embodiment of the present invention, the drain voltage of M10 is reduced by V compared to the prior art_DS8+V_DS6So as to be at said supply voltage V_PVDDWhen the voltage is increased, the drain voltage of the M10 can be increased less, the M10 is ensured to have substantially no leakage current between the drain and the substrate, and the resistance R from the drain to the substrate_DB10Approximately equivalent to infinity, namely the influence on the gain can be ignored, a wider voltage range is realized, and the voltage gain of the amplifier does not follow the power supply voltage V_PVDDMay vary.

On the basis of any of the above embodiments, in an embodiment of the present invention, the amplifier may further include a plurality of N-type transistors connected in series between the drain of the sixth transistor M6 and the drain of the nineteenth transistor M19 to achieve a wider range, and the amplifier may further include a plurality of N-type transistors connected in series between the drain of the sixth transistor M6 and the drain of the nineteenth transistor M19Voltage gain of not following the supply voltage V_PVDDMay vary. The present invention is not limited in this regard, as the case may be.

The AB-type audio power amplifier provided by the embodiment of the invention can also realize a wider voltage range, and the voltage gain of the amplifier does not follow the power supply voltage V_PVDDIs changed and the body effect influence is small.

In addition, another class AB audio amplifier is provided in the embodiments of the present invention, as shown in fig. 10, the amplifier includes: the gain control circuit comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit and a Miller compensation circuit, wherein the amplifying circuit comprises a first composition circuit, a second composition circuit and a third composition circuit, and the third composition circuit comprises: a tenth transistor M10; the tenth transistor M10 has a gate electrically connected to the bias circuit, a source electrically connected to the second component circuit, a drain electrically connected to the first component circuit, and a substrate electrically connected to its own source.

Specifically, in an embodiment of the present invention, the input circuit includes: a first transistor M1, a second transistor M2, a thirty-fifth transistor M35 and a thirty-fourth transistor M34, wherein the gate of the first transistor M1 is electrically connected to the first input voltage Vin-, the source is electrically connected to the source of the second transistor M2, the drain is electrically connected to the bias circuit, and the substrate is electrically connected to its own source; the gate of the second transistor M2 is electrically connected with a second input voltage Vin +, the source is electrically connected with the source of the first transistor M1, the drain is electrically connected with the bias circuit, and the substrate is electrically connected with the source of the second transistor M2; the gate of the thirty-fourth transistor M34 is connected to a first bias voltage V_EElectrically connected source to supply voltage V_PVDDElectrically connected to the drain of the thirty-fifth transistor M35, the substrate connected to the power supply voltage V_PVDDElectrically connecting; the gate of the thirty-fifth transistor M35 and a second bias voltage V_FElectrically connected to the source of the thirty-fourth transistor M34, the drain of the transistor M1 and the common terminal of the transistor M2, and the substrate connected to the power supply voltage V_PVDDAnd (6) electrically connecting. The first input voltage Vin-and the second input voltage Vin + are differential signals of the AB class audio power amplifier.

Specifically, the gate of the thirty-first transistor M31 is connected to a third bias voltage V_DElectrically connected, the source is electrically connected with the drain of the first transistor M1, the drain is electrically connected with the drain of the fifteenth transistor M15, and the substrate is electrically connected with ground; a gate of the thirty-third transistor M33 and a seventh bias voltage V_GThe source electrode of the third eleventh transistor M31 is electrically connected with the ground, the drain electrode of the third eleventh transistor M31 is electrically connected with the source electrode of the third eleventh transistor M31, and the substrate of the third eleventh transistor M31 is electrically connected with the ground; a gate of the fifteenth transistor M15 and a fourth bias voltage V_CElectrically connected to the source of the twenty-first transistor M21, the drain of the twenty-first transistor M31, the substrate of the second transistor and the supply voltage V_PVDDElectrically connecting; a gate of the twenty-first transistor M21 is electrically connected to a drain of the fifteenth transistor M15, and a source thereof is connected to the power supply voltage V_PVDDElectrically connected to the drain of the fifteenth transistor M15, the substrate connected to the supply voltage V_PVDDElectrically connecting; a gate of the twenty-second transistor M22 is electrically connected to a source of the twenty-third transistor M23, and the source is connected to the power supply voltage V_PVDDElectrically connected to the drain of the twenty-third transistor M23, the substrate is connected to the supply voltage V_PVDDElectrically connecting; the gate of the twenty-third transistor M23 is electrically connected to its own drain, and the source is electrically connected to the drain of the twenty-second transistor M22The drain electrode is electrically connected with the first current source I1 and the grid electrode of the fourth transistor M4 in the amplifying circuit at the same time, and the substrate is electrically connected with the source electrode of the substrate; the gate of the twenty-fourth transistor M24 is electrically connected to its own drain, the source is electrically connected to the drain of the twenty-fifth transistor M25, the drain is simultaneously electrically connected to the second current source I2I2 and the gate of the tenth transistor M10 in the amplifying circuit, and the substrate is electrically connected to its own source; the gate of the twenty-fifth transistor M25 is electrically connected to its own drain, the drain is electrically connected to the source of the twenty-fourth transistor M24, the source is electrically connected to ground, and the substrate is electrically connected to ground.

The second component circuit includes: a twelfth transistor M12 and a fourteenth transistor M14. The gate of the twelfth transistor M12 and the third bias voltage V_DElectrically connected, the source is electrically connected with the drain of the second transistor M2, the drain is electrically connected with the source of the tenth transistor M10, and the substrate is grounded; the gate of the fourteenth transistor M14 is electrically connected to the gate of the thirtieth transistor M33, the source thereof is grounded, the drain thereof is electrically connected to the source of the twelfth transistor M12, and the substrate thereof is grounded.

The output circuit includes: a twenty-sixth transistor M26 and a twenty-eighth transistor M28, wherein the gate of the twenty-sixth transistor M26 is electrically connected to the drain of the nineteenth transistor M19, and the source is connected to the supply voltage V_PVDDElectrically connected, the drain being the output terminal Vout of said output circuit, the substrate being connected to said supply voltage V_PVDDElectrically connecting; the gate of the twenty-eighth transistor M28 is electrically connected to the source of the tenth transistor M10, the source is grounded, the drain is the output terminal Vout of the output circuit, and the substrate is grounded.

In the embodiment of the present invention, the drain voltage V of the tenth transistor M10_D10Comprises the following steps: v_D10＝V_PVDD-V_SG26Substrate voltage V_B10And its source voltage V_S10Equal, the voltage difference V between its drain and the substrate_DB10＝V_PVDD-V_SG26-V_S10Wherein V is_SG26Is the difference between the source voltage and the gate voltage of M26, V_S10Is the source voltage of M10. When the power supply voltage V_PVDDWhen the voltage of the drain of the M10 is increased, the voltage of the source of the M10 is increased, that is, the substrate voltage of the M10 is increased, so that the voltage difference V between the drain and the gate of the M10 is increased_DB10The variation is not large, the leakage current between the drain electrode of the M10 and the substrate is basically ensured, and the resistance R from the drain electrode to the substrate_DB10Approximately equivalent to infinity, namely the influence on the gain can be ignored, a wider voltage range is realized, and the voltage gain of the amplifier does not follow the power supply voltage V_PVDDMay vary.

In the above embodiments, the tenth transistor M10 is a Deep N-well transistor, i.e., a Deep N-well transistor. The deep N well adopts a method that a deep N well mask is added on the process to isolate the drain electrode of M10 from the substrate, so that the resistance from the drain electrode to the substrate can be approximately equivalent to infinity and can be ignored, the problem that the equivalent resistance from the drain electrode of M10 to the substrate is reduced due to the rise of the drain electrode voltage of M10 is solved, a wider voltage range is realized, and the voltage gain of the amplifier is not along with the supply voltage V_PVDDMay vary.

Furthermore, in the embodiment of the present invention, the substrate of the twenty-fourth transistor M24 is also electrically connected to its source, using a deep N-well transistor. In the embodiment of the invention, when the currents of M10 and M24 are equal, the size is the same, the gate voltages are the same, and only when M24 and M10 adopt deep N wells simultaneously, the V is enabled to be equal_SB10＝V_SB24＝0，V_GS10＝V_GS24At this time, V can be made_GS25＝V_GS29Namely, the mirror image of M25 and M29 is realized, the quiescent current of M29 is controlled, and the influence of the body effect is reduced.

In the description, each part is described in a progressive manner, each part is emphasized to be different from other parts, and the same and similar parts among the parts are referred to each other.

The previous description of the disclosed embodiments is provided to enable any person skilled in the art to make or use the present invention. Various modifications to these embodiments will be readily apparent to those skilled in the art, and the generic principles defined herein may be applied to other embodiments without departing from the spirit or scope of the invention. Thus, the present invention is not intended to be limited to the embodiments shown herein but is to be accorded the widest scope consistent with the principles and novel features disclosed herein.

Claims

1. A class AB audio power amplifier, comprising: the circuit comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit, a common mode feedback circuit and a Miller compensation circuit, wherein the amplifying circuit is used for amplifying signals output by the input circuit and outputting the signals to the output circuit; the common mode feedback circuit is used for detecting the common mode voltage of the output end of the output circuit; the bias circuit is used for providing bias for the amplifying circuit; the Miller compensation circuit is used for meeting the stability requirement of the AB class audio power amplifier; the amplification circuit includes a first constituent circuit, a second constituent circuit, and a third constituent circuit, the third constituent circuit including: a seventh transistor, an eighth transistor, a ninth transistor, and a tenth transistor;

a gate of the ninth transistor is electrically connected to a gate of the tenth transistor, a source of the ninth transistor is electrically connected to a drain of the eleventh transistor of the second component circuit, a drain of the ninth transistor is electrically connected to a source of the seventh transistor, and a substrate of the ninth transistor is grounded;

a gate of the seventh transistor is electrically connected to a fifth bias voltage, a source thereof is electrically connected to a drain of the ninth transistor, a drain thereof is electrically connected to a source of the third transistor of the first component circuit, and a substrate thereof is grounded;

a gate of the tenth transistor is electrically connected to a gate of the ninth transistor, a source of the tenth transistor is electrically connected to a drain of the twelfth transistor of the second component circuit, a drain of the tenth transistor is electrically connected to a source of the eighth transistor, and a substrate of the tenth transistor is grounded;

a gate of the eighth transistor is electrically connected to the fifth bias voltage, a source of the eighth transistor is electrically connected to a drain of the tenth transistor, a drain of the eighth transistor is electrically connected to a source of the fourth transistor of the first component circuit, and a substrate of the eighth transistor is grounded;

the first component circuit includes: a third transistor, a fourth transistor, a sixteenth transistor, a seventeenth transistor, an eighteenth transistor, and a nineteenth transistor;

the grid electrode of the sixteenth transistor is electrically connected with the grid electrode of the twentieth transistor, the source electrode of the sixteenth transistor is electrically connected with power supply voltage, the drain electrode of the sixteenth transistor is electrically connected with the source electrode of the eighteenth transistor, and the substrate of the sixteenth transistor is electrically connected with the power supply voltage;

a gate of the seventeenth transistor is electrically connected with a gate of the twenty-first transistor, a source of the seventeenth transistor is electrically connected with the power supply voltage, a drain of the seventeenth transistor is electrically connected with a source of the nineteenth transistor, and a substrate of the seventeenth transistor is electrically connected with the power supply voltage;

a gate of the eighteenth transistor is electrically connected to a fourth bias voltage, a source thereof is electrically connected to a drain of the sixteenth transistor, a drain thereof is electrically connected to a source of the third transistor, and a substrate thereof is electrically connected to the power supply voltage;

a gate of the nineteenth transistor is electrically connected to the fourth bias voltage, a source of the nineteenth transistor is electrically connected to a drain of the seventeenth transistor, a drain of the nineteenth transistor is electrically connected to a source of the fourth transistor, and a substrate of the nineteenth transistor is electrically connected to the power supply voltage;

the grid electrode of the third transistor is electrically connected with the common end of the twenty-third transistor and the first current source, the source electrode of the third transistor is electrically connected with the drain electrode of the eighteenth transistor, the drain electrode of the third transistor is electrically connected with the drain electrode of the eleventh transistor of the second composition circuit, and the substrate of the third transistor is electrically connected with the source electrode of the substrate;

a gate of the fourth transistor is electrically connected to a common terminal of the twenty-third transistor and the first current source, a source thereof is electrically connected to a drain of the nineteenth transistor, a drain thereof is electrically connected to a drain of the twelfth transistor of the second component circuit, and a substrate thereof is electrically connected to a source thereof;

the second component circuit includes: an eleventh transistor, a twelfth transistor, a thirteenth transistor, and a fourteenth transistor;

a gate of the eleventh transistor is electrically connected to a third bias voltage, a source of the eleventh transistor is electrically connected to a drain of the thirteenth transistor, a drain of the eleventh transistor is electrically connected to a source of the ninth transistor, and a substrate of the eleventh transistor is grounded;

a gate of the twelfth transistor is electrically connected with the third bias voltage, a drain of the twelfth transistor is electrically connected with a source of the tenth transistor, a source of the twelfth transistor is electrically connected with a drain of the fourteenth transistor, and a substrate of the twelfth transistor is grounded;

the grid electrode of the thirteenth transistor is electrically connected with the positive output end of the common mode feedback circuit, the source electrode of the thirteenth transistor is grounded, the drain electrode of the thirteenth transistor is electrically connected with the source electrode of the eleventh transistor, and the substrate of the thirteenth transistor is grounded;

and the grid electrode of the fourteenth transistor is electrically connected with the positive output end of the common mode feedback circuit, the source electrode of the fourteenth transistor is grounded, the drain electrode of the fourteenth transistor is electrically connected with the source electrode of the twelfth transistor, and the substrate of the fourteenth transistor is grounded.

2. The amplifier of claim 1, wherein the fifth bias voltage satisfies the following relationship:

V_PVDD-V_SG27+V_TH7≥V_B≥V_GS9-V_TH9+V_GS7+V_D-V_TH11；

3. The amplifier of claim 1 or 2, further comprising:

a fifth transistor between the drain of the seventh transistor and the first terminal of the first component circuit, the gate of the fifth transistor being electrically connected to a sixth bias voltage, the source of the fifth transistor being electrically connected to the drain of the seventh transistor, the drain of the fifth transistor being electrically connected to the source of the third transistor of the first component circuit, the substrate being grounded;

and the sixth transistor is positioned between the drain of the eighth transistor and the second end of the first composition circuit, the gate of the sixth transistor is electrically connected with the sixth bias voltage, the source of the sixth transistor is electrically connected with the drain of the eighth transistor, the drain of the sixth transistor is electrically connected with the source of the fourth transistor of the first composition circuit, and the substrate is grounded.

4. The amplifier of claim 3, wherein the sixth bias voltage satisfies the following relationship:

wherein, V_ARepresents the sixth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG27Representing a voltage difference between a source and a gate of a twenty-seventh transistor in the output circuit; v_TH5Represents a threshold voltage of the fifth transistor; v_GS5Representing a voltage difference between the gate and the source of the fifth transistor; v_BRepresents the fifth bias voltage; v_TH7Represents a threshold voltage of the seventh transistor; v_GS9Representing a voltage difference between the gate and the source of the ninth transistor; v_TH9Represents a threshold voltage of the ninth transistor; v_GS7Representing a voltage difference between the gate and the source of the seventh transistor; v_DRepresents a third bias voltage; v_TH11Representing the threshold voltage of the eleventh transistor in the amplifying circuit.

5. A class AB audio power amplifier, comprising: the circuit comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit and a Miller compensation circuit, wherein the amplifying circuit is used for amplifying a signal output by the input circuit and outputting the signal to the output circuit; the bias circuit is used for providing bias for the amplifying circuit; the Miller compensation circuit is used for meeting the stability requirement of the AB class audio power amplifier; the amplification circuit includes a first constituent circuit, a second constituent circuit, and a third constituent circuit, the third constituent circuit including: an eighth transistor and a tenth transistor;

a gate of the tenth transistor is electrically connected to the bias circuit, a source of the tenth transistor is electrically connected to a drain of the twelfth transistor of the second component circuit, a drain of the tenth transistor is electrically connected to a source of the eighth transistor, and a substrate of the tenth transistor is grounded;

a gate of the eighth transistor is electrically connected to a fifth bias voltage, a source of the eighth transistor is electrically connected to a drain of the tenth transistor, a drain of the eighth transistor is electrically connected to a source of the fourth transistor of the first component circuit, and a substrate of the eighth transistor is grounded;

the first component circuit includes: a fourth transistor, a seventeenth transistor, and a nineteenth transistor;

the gate of the seventeenth transistor is electrically connected with the gate of the twenty-first transistor, the source of the seventeenth transistor is electrically connected with a power supply voltage, the drain of the seventeenth transistor is electrically connected with the source of the nineteenth transistor, and the substrate of the seventeenth transistor is electrically connected with the power supply voltage;

a gate of the nineteenth transistor is electrically connected to a fourth bias voltage, a source of the nineteenth transistor is electrically connected to a drain of the seventeenth transistor, a drain of the nineteenth transistor is electrically connected to a source of the fourth transistor, and a substrate of the nineteenth transistor is electrically connected to the power supply voltage;

the grid electrode of the fourth transistor is electrically connected with the common end of the twenty-third transistor and the first current source, the source electrode of the fourth transistor is electrically connected with the drain electrode of the nineteenth transistor, the drain electrode of the fourth transistor is electrically connected with the drain electrode of the twelfth transistor of the second component circuit and the source electrode of the tenth transistor, and the substrate is electrically connected with the source electrode of the substrate;

the second component circuit includes: a twelfth transistor and a fourteenth transistor;

a grid electrode of the twelfth transistor is electrically connected with a third bias voltage, a source electrode of the twelfth transistor is electrically connected with a drain electrode of the second transistor, a drain electrode of the twelfth transistor is electrically connected with a source electrode of the tenth transistor, and the substrate of the twelfth transistor is grounded;

and the grid electrode of the fourteenth transistor is electrically connected with the grid electrode of the thirty-third transistor, the source electrode of the fourteenth transistor is grounded, the drain electrode of the fourteenth transistor is electrically connected with the source electrode of the twelfth transistor, and the substrate of the fourteenth transistor is grounded.

6. The amplifier of claim 5, wherein the fifth bias voltage V_BThe following relationship is satisfied:

V_PVDD-V_SG26+V_TH8≥V_B≥V_GS10-V_TH10+V_GS8+V_D-V_TH12；

7. The amplifier of claim 5 or 6, further comprising:

and the sixth transistor is positioned between the drain of the eighth transistor and the first composition circuit, the grid of the sixth transistor is electrically connected with a sixth bias voltage, the source of the sixth transistor is electrically connected with the drain of the eighth transistor, the drain of the sixth transistor is electrically connected with the source of the fourth transistor of the first composition circuit, and the substrate is grounded.

8. The amplifier of claim 7, wherein the sixth bias voltage satisfies the following relationship:

wherein the content of the first and second substances,V_Arepresents the sixth bias voltage; v_PVDDRepresenting a supply voltage of the class AB audio power amplifier; v_SG26Representing a voltage difference between a source and a gate of a twenty-sixth transistor in the output circuit; v_TH6Represents a threshold voltage of the sixth transistor; v_GS6Representing a voltage difference between the gate and the source of the sixth transistor; v_BRepresents the fifth bias voltage; v_TH8Represents a threshold voltage of the eighth transistor; v_GS9Representing a voltage difference between the gate and the source of the ninth transistor; v_TH9Represents a threshold voltage of the ninth transistor; v_GS7Representing a voltage difference between the gate and the source of the seventh transistor; v_DRepresents a third bias voltage; v_TH11Representing the threshold voltage of the eleventh transistor in the amplifying circuit.

9. A class AB audio power amplifier, comprising: the circuit comprises an input circuit, a bias circuit, an amplifying circuit, an output circuit, a common mode feedback circuit and a Miller compensation circuit, wherein the amplifying circuit is used for amplifying signals output by the input circuit and outputting the signals to the output circuit; the common mode feedback circuit is used for detecting the common mode voltage of the output end of the output circuit; the bias circuit is used for providing bias for the amplifying circuit; the Miller compensation circuit is used for meeting the stability requirement of the AB class audio power amplifier; the amplification circuit includes a first constituent circuit, a second constituent circuit, and a third constituent circuit, the third constituent circuit including: a ninth transistor and a tenth transistor;

a gate of the ninth transistor is electrically connected to a gate of the tenth transistor, a source thereof is electrically connected to a drain of the eleventh transistor of the second constituent circuit, a drain thereof is electrically connected to a source of the third transistor of the first constituent circuit, and a substrate thereof is electrically connected to a source thereof;

a gate of the tenth transistor is electrically connected to a gate of the ninth transistor, a source of the tenth transistor is electrically connected to a drain of the twelfth transistor of the second component circuit, a drain of the tenth transistor is electrically connected to a source of the fourth transistor of the first component circuit, and a substrate of the tenth transistor is electrically connected to a source of the substrate;

the grid electrode of the third transistor is electrically connected with the common end of the twenty-third transistor and the first current source, the source electrode of the third transistor is electrically connected with the drain electrode of the eighteenth transistor, the drain electrode of the third transistor is electrically connected with the drain electrode of the eleventh transistor of the second composition circuit and the source electrode of the ninth transistor, and the substrate is electrically connected with the source electrode of the substrate;

a gate of the fourth transistor is electrically connected to a common terminal of the twenty-third transistor and the first current source, a source of the fourth transistor is electrically connected to a drain of the nineteenth transistor, a drain of the fourth transistor is electrically connected to both a drain of the twelfth transistor of the second component circuit and a source of the tenth transistor, and a substrate is electrically connected to its own source;

a gate of the twelfth transistor is electrically connected with the third bias voltage, a source of the twelfth transistor is electrically connected with a drain of the fourteenth transistor, a drain of the twelfth transistor is electrically connected with a source of the tenth transistor, and a substrate of the twelfth transistor is grounded;

10. A class AB audio power amplifier, comprising: the circuit comprises an input circuit, a bias circuit, an amplifying circuit and an output circuit, wherein the amplifying circuit is used for amplifying a signal output by the input circuit and outputting the signal to the output circuit; the bias circuit is used for providing bias for the amplifying circuit; the amplification circuit includes a first constituent circuit, a second constituent circuit, and a third constituent circuit, the third constituent circuit including: a tenth transistor;

a gate of the tenth transistor is electrically connected to the bias circuit, a source of the tenth transistor is electrically connected to a drain of the twelfth transistor of the second component circuit, a drain of the tenth transistor is electrically connected to a source of the fourth transistor of the first component circuit, and a substrate of the tenth transistor is electrically connected to its own source;