CN111224621B

CN111224621B - Automatic amplitude control oscillating circuit and crystal-free high-precision clock generator

Info

Publication number: CN111224621B
Application number: CN202010075375.XA
Authority: CN
Inventors: 龚海波
Original assignee: Chongqing Xinlong Technology Co ltd
Current assignee: Chongqing Xinlong Technology Co ltd
Priority date: 2020-01-22
Filing date: 2020-01-22
Publication date: 2023-07-07
Anticipated expiration: 2040-01-22
Also published as: CN111224621A

Abstract

The invention discloses an automatic amplitude control oscillating circuit, which comprises an LC oscillator, an amplifying circuit and a switching circuit; the output end of the LC oscillator is connected with the input end of the amplifying circuit, and the output end of the amplifying circuit is connected with the control end of the switching circuit; the switching circuit is provided with an output filter unit, and the output end of the switching circuit is connected with the DC bias end of the LC oscillator and then used for adjusting the working current of the LC oscillator; the crystal-free high-precision clock generator comprises the automatic amplitude control oscillating circuit and a phase-locked loop circuit, and the automatic amplitude control oscillating circuit outputs a reference clock signal to the phase-locked loop circuit. The invention solves the problems of complex circuit structure, large circuit power consumption and high cost of the oscillating circuit with the automatic amplitude control function in the prior art, and the problems that the crystal oscillator is not integrated in a chip and the high-precision clock cannot be realized by a crystal-free clock generator.

Description

Automatic amplitude control oscillating circuit and crystal-free high-precision clock generator

Technical Field

The invention relates to the field of clock generation, in particular to an automatic amplitude control oscillating circuit and a crystal-free high-precision clock generator.

Background

The oscillating circuit is a circuit for generating oscillating voltage, the common oscillating circuit is an LC oscillating circuit, the amplitude of the LC oscillating circuit is often influenced by power supply voltage, temperature and the like to change in the using process, the frequency is shifted, and the reliability of the oscillating circuit is improved in order to reduce the frequency shift of an output oscillating signal. In the prior art, an automatic amplitude control technology is adopted in the oscillating circuit to reduce frequency offset caused by amplitude, but a detector and a comparator are generally adopted in the prior art to realize the automatic amplitude control technology, and the mode has the advantages of complex circuit structure, high circuit power consumption and high cost.

Clocks are widely used in communication systems, and in order to make the communication process more accurate, the communication system is required to have a high-precision clock. In general, an external high-precision crystal oscillator is adopted to provide a high-precision clock, but the crystal oscillator is generally low in frequency, an external double-frequency circuit is required to increase the clock frequency, and the crystal oscillator needs to be externally provided with a capacitor to match the generated clock. The crystal oscillator belongs to a physical device and cannot be integrated in a chip, so that a clock circuit formed by the crystal oscillator, the capacitor and the frequency doubling circuit has low integration level, difficult circuit layout, easy external interference and high cost. In addition, the crystal-free clock generator is easily affected by the process, the power supply voltage and the temperature, and generates larger frequency offset. The prior crystal-free clock generator generally adopts a scheme of directly compensating the frequency of an oscillator to improve the clock precision, namely, the smaller the capacitance value of a switch capacitor in the oscillator is, the higher the oscillation frequency precision is, but for a semiconductor process, the minimum value of the capacitor in a clock source is limited by a physical limit, and the capacitor cannot be infinitely small, so that the minimum value of frequency change is limited, the frequency precision is limited, and the clock with high precision cannot be realized.

Disclosure of Invention

Aiming at the defects existing in the prior art, the invention provides an automatic amplitude control oscillating circuit, which aims to solve the problems of complex structure, high circuit power consumption and high cost of the oscillating circuit with an automatic amplitude control function in the prior art.

In order to achieve the above purpose, the present invention adopts the following technical scheme:

the automatic amplitude control oscillating circuit comprises an LC oscillator, an amplifying circuit and a switching circuit; the output end of the LC oscillator is connected with the input end of the amplifying circuit, and the output end of the amplifying circuit is connected with the control end of the switching circuit; the switching circuit is provided with an output filter unit, and the output end of the switching circuit is connected with the DC bias end of the LC oscillator and then used for adjusting the working current of the LC oscillator.

The LC oscillator outputs an oscillation signal to the amplifying circuit, the amplitude of the oscillation signal is amplified by the amplifying circuit and then is output to the switching circuit, so that the working state of the switching circuit is controlled, the switching circuit outputs a direct-current voltage signal to the LC oscillator to adjust the working current of the LC oscillator, so that the amplitude of the oscillation signal output by the LC oscillator is adjusted, and the automatic amplitude control of the oscillation signal is realized.

Compared with the prior art, the invention has the following beneficial effects: according to the invention, an automatic amplitude control function is realized through the switch circuit, the amplifying circuit and the LC oscillator, the reliability of the oscillating circuit is improved, and the frequency offset caused by the amplitude is reduced; the switching circuit and the amplifying circuit are composed of universal components, the circuit structure is simple, the circuit power consumption is low, and the automatic amplitude control function is realized without the circuits with complex structures such as detectors, comparators and the like; the cost is low, and the method is more suitable for the field of integrated circuits.

Aiming at the defects existing in the prior art, the invention provides a crystal-free high-precision clock generator, which aims to solve the problems that a crystal oscillator cannot be integrated on a chip and the crystal-free clock generator cannot realize a high-precision clock.

the crystal-free high-precision clock generator comprises the automatic amplitude control oscillating circuit and a phase-locked loop circuit, wherein the automatic amplitude control oscillating circuit outputs a reference clock signal to the phase-locked loop circuit; the phase-locked loop circuit comprises a phase frequency detector, a charge pump, a low-pass filter, a voltage-controlled oscillator and a fractional frequency divider which are electrically connected in sequence, wherein the input end of the fractional frequency divider is connected with the output end of the voltage-controlled oscillator, and the output end of the fractional frequency divider is connected with the input end of the phase frequency detector.

One or more of a digital temperature sensor, a power supply voltage sensor and an EEPROM, wherein the EEPROM stores standard frequency values; the output end of the digital temperature sensor, the output end of the power supply voltage sensor and/or the output end of the EEPROM are respectively connected with the setting port of the frequency dividing ratio of the fractional frequency divider.

The invention adopts the design of a crystal-free oscillator, has no crystal oscillator, is easy for on-chip integration, and the automatic amplitude control oscillating circuit outputs a reference clock signal to the phase-locked loop circuit, and is respectively connected with a setting port of the frequency dividing ratio of the fractional frequency divider through the output end of the digital temperature sensor, the output end of the power supply voltage sensor and/or the output end of the EEPROM, and the digital temperature sensor, the power supply voltage sensor and the EEPROM adjust the frequency dividing value of the fractional frequency divider to respectively adjust the frequency offset caused by temperature, power supply voltage and technology, thereby realizing the output of a high-precision clock.

Compared with the prior art, the invention has the following beneficial effects: the invention is designed by adopting a crystal-free oscillator, has high integration level and simple wiring of a circuit board; and the frequency offset of the output clock signal is adjusted to realize the output of the high-precision clock.

Drawings

Fig. 1 is a block diagram of the structure of embodiment 1;

FIG. 2 is a schematic circuit diagram of embodiment 1;

FIG. 3 is a block diagram showing the overall structure of embodiment 1;

wherein L is inductance, C1, C2, C3, C4, C5, C6, C7 and C8 are capacitance, R1, R2, R3, R4, R5 and R6 are resistance, M1, M2, M3, Q2, Q4 and Q5 are NMOS tubes, Q1 and Q3 are PMOS tubes, VCC is power supply, and EN is enable control end.

Detailed Description

The technical scheme of the invention is further described below with reference to the accompanying drawings and examples.

Example 1

As shown in fig. 1, the automatic amplitude control oscillation circuit comprises an LC oscillator, an amplifying circuit, a switching circuit and an inverting circuit, wherein the LC oscillator has an automatic amplitude control function and can adjust the amplitude of an oscillation signal output by the LC oscillator. The LC oscillator outputs an oscillation signal to the amplifying circuit, the oscillation signal is a sine signal, the amplifying circuit amplifies the sine signal into a sine signal with full swing amplitude, and then a square wave signal is generated by the inverting circuit and is output from the output end OUT1 of the inverting circuit, and the square wave signal is a reference clock signal. The control end of the switching circuit is connected with the output end of the amplifying circuit, the output end of the amplifying circuit outputs a signal to the switching circuit so as to control the output of the switching circuit, the output end of the switching circuit is connected with the DC bias end of the LC oscillator, and the switching circuit outputs a DC voltage signal to control the working current of the LC oscillator so as to adjust the amplitude of the output oscillating signal of the LC oscillator and reduce the frequency offset caused by the amplitude. Further, as known from the prior art, the LC oscillator usually adopts an internal switched capacitor superposition manner to achieve smaller frequency accuracy, the smaller the capacitance value is, the lower the frequency accuracy is, but too many switched capacitors bring about serious frequency offset, and in the LC oscillator there is no switched capacitor inside, so that the frequency offset is further reduced, and the output of a high-accuracy clock is realized.

As shown in fig. 2, which is a schematic circuit diagram of an automatic amplitude control oscillating circuit, the LC oscillator adopts a typical structure of Class-C, wherein an inductor L, a capacitor C1 and a capacitor C2 form a resonant network, a power source VCC is connected to the inductor L to supply power to the resonant network, and the frequency of the oscillator is determined by the values of the inductor L, the capacitor C1 and the capacitor C2. M1, M2 are N channel MOS tubes, hereafter referred to as NMOS tube, one end of the capacitor C3 is connected with one end of the inductor, the other end of the capacitor C3 is connected with grid electrode of NMOS tube M2, one end of the capacitor C4 is connected with the other end of the inductor, the other end of the capacitor C4 is connected with grid electrode of NMOS tube M1, the capacitor C3 and the capacitor C4 play a role of through alternating and direct; the inductor L, the capacitor C1, the capacitor C2, the capacitor C3, the capacitor C4, the NMOS tube M1 and the NMOS tube M2 form a cross-coupling LC oscillator. The NMOS tube M1 and the NMOS tube M2 are negative resistances of the LC oscillator, which can be explained by the negative resistance theory of the oscillator in the prior art, the grid electrode of the NMOS tube M1 and the grid electrode of the NMOS tube M2 are respectively connected to the Vb end through the resistor R1 and the resistor R2, the Vb end is provided with a direct-current voltage signal by a switch circuit, the direct-current voltage value of the Vb end determines the working currents of the NMOS tube M1 and the NMOS tube M2, the Vb end is a direct-current bias end and is also an alternating-current ground, because the grid electrode of the NMOS tube M1 and the grid electrode of the NMOS tube M2 are alternating-current signals, the alternating-current ground is defined for the alternating-current signals, and the resistor R1 and the resistor R2 are used for guaranteeing the transmission of the direct-current signals and providing a high-resistance state between the alternating-current signals and the alternating-current ground. The drain electrode of the NMOS tube M1 and the drain electrode of the NMOS tube M2 are respectively connected to two ends of the inductor L, the source electrode of the NMOS tube M1 and the source electrode of the NMOS tube M2 are both connected to the drain electrode of the NMOS tube M3, the source electrode of the NMOS tube M3 is grounded, the grid electrode of the NMOS tube M3 is an enable control end EN, and an enable control signal is externally input to the enable control end EN to control the working switch state of the LC oscillator.

In the LC oscillator, the drain electrode of the NMOS transistor M2 may be considered as an oscillation signal output end of the LC oscillator, the oscillation signal output end is connected to an input end of the amplifying circuit, the LC oscillator outputs an oscillation signal to the amplifying circuit, the oscillation signal is a sinusoidal signal, the amplifying circuit amplifies the amplitude of the sinusoidal signal, and the amplitude of the amplified sinusoidal signal approaches to a full swing. The amplifying circuit comprises a capacitor C5, a resistor R3, a PMOS tube Q1 and an NMOS tube Q2, wherein the PMOS tube is a P-channel MOS tube. The oscillation signal output end of the LC oscillator is connected to the grid electrode of the PMOS tube Q1 and the grid electrode of the NMOS tube Q2 through a capacitor C5, the drain electrode of the PMOS tube Q1 is connected with the drain electrode of the NMOS tube Q2, a resistor R3 is connected between the grid electrode of the PMOS tube Q1 and the drain electrode of the NMOS tube Q2, the source electrode of the PMOS tube Q1 is connected with a power supply VCC, the source electrode of the NMOS tube Q1 is grounded, and the drain electrode of the PMOS tube Q1 and the drain electrode of the NMOS tube Q2 are connected together to form the output end of the amplifying circuit. One end of the capacitor C5 connected with the oscillation signal output end of the LC oscillator is an input end of an amplifying circuit, the capacitor C5 plays a role of alternating current and direct current, the resistor R3 provides bias for the PMOS tube Q1 and the NMOS tube Q2 to be used as loads, the current technology shows that the class AB amplifier is composed of the PMOS tube Q1 and the NMOS tube Q2, the amplifying circuit amplifies and outputs the amplitude of an input sinusoidal signal, and the amplified sinusoidal signal is a full-swing sinusoidal signal. The amplifying circuit supplies the amplified sinusoidal signal to the inverting circuit, which inverts the phase of the input sinusoidal signal by 180 degrees to output a square wave signal, as known in the art. The inverting circuit comprises a PMOS tube Q3 and an NMOS tube Q4, wherein the PMOS tube Q3 and the NMOS tube Q4 form a typical CMOS inverting circuit, the grid electrode of the PMOS tube Q3 and the grid electrode of the NMOS tube Q4 are connected together to form an input end of the inverting circuit, the output end of the amplifying circuit is connected with the input end of the inverting circuit, the source electrode of the PMOS tube Q3 is connected with a power supply VCC, the source electrode of the NMOS tube Q4 is grounded, the drain electrode of the NMOS tube Q3 is connected with the drain electrode of the NMOS tube Q4, the drain electrode of the PMOS tube Q3 and the drain electrode of the NMOS tube Q4 are connected together to form an output end of the inverting circuit, and the output end OUT1 of the inverting circuit outputs a square wave signal which is a reference clock signal.

The control end of the switching circuit is connected with the output end of the amplifying circuit, the output end of the amplifying circuit outputs a signal to the switching circuit, the switching circuit processes and outputs a direct-current voltage signal to the LC oscillator, the working current of the LC oscillator is controlled by the magnitude of the direct-current voltage value, and the magnitude of the direct-current voltage value is in direct proportion to the magnitude of the working current of the LC oscillator; the magnitude of the working current of the LC oscillator determines the magnitude of the oscillating signal output by the LC oscillator, the magnitude of the working current of the LC oscillator is in direct proportion to the magnitude of the oscillating signal output by the LC oscillator, namely the magnitude of the direct current voltage value output by the switching circuit is in direct proportion to the magnitude of the oscillating signal output by the LC oscillator. The amplitude value of the oscillation signal output by the LC oscillator is adjusted by outputting a signal to the switch circuit by the amplifying circuit, so that the stability of the amplitude of the output oscillation signal is realized, and the frequency offset caused by the amplitude of the oscillation signal is reduced. The switching circuit comprises a capacitor C6, a capacitor C7, a capacitor C8, a resistor R4, a resistor R5, a resistor R6 and an NMOS tube Q5, wherein the output end of the amplifying circuit is connected to the grid electrode of the NMOS tube Q5 through the capacitor C6 to control the switching state of the NMOS tube Q5, and one end of the output end of the amplifying circuit connected to the capacitor C6 is the control end of the switching circuit; one end of the resistor R4 is connected with the power VCC, the other end of the resistor R4 is connected with the drain electrode of the NMOS tube Q5, the source electrode of the NMOS tube Q5 is grounded, the voltage value of the drain electrode of the NMOS tube Q5 can be controlled and regulated by outputting a signal to the switch circuit through the output end of the amplifying circuit, the voltage value of the drain electrode of the NMOS tube Q5 changes along with the voltage value of the gate electrode of the NMOS tube Q5, the voltage of the gate electrode of the NMOS tube Q5 is increased, and the voltage value of the drain electrode of the NMOS tube Q5 is reduced as known in the prior art; the voltage value of the signal to the grid electrode of the NMOS tube Q5 is fluctuated and changed, the voltage value of the drain electrode of the NMOS tube Q5 is different, the direct current voltage value output by the switching circuit is different, the working current of the LC oscillator is different, and the amplitude of the oscillation signal output by the LC oscillator is different, so that the amplitude of the oscillation signal output by the LC oscillator is dynamically adjusted. The resistor R5 is connected between the drain electrode of the NMOS tube Q5 and the grid electrode of the NMOS tube Q5, and the resistor R5 is used for enabling the NMOS tube Q5 to work in a switching state; the n-type filter circuit is composed of a resistor R6, a capacitor C7 and a capacitor C8, one end of the capacitor C7 is connected with the drain electrode of the NMOS tube Q5, the other end of the capacitor C7 is grounded, the capacitor C7 absorbs the fluctuation voltage of the drain electrode of the NMOS tube Q5, the drain electrode voltage of the NMOS tube Q5 is stable, one end of the resistor R6 is connected with the drain electrode of the NMOS tube Q5, the other end of the resistor R6 is grounded through the capacitor C7 and is the output end of the switch circuit, and thermal noise and flicker noise at the high frequency position of the output end of the switch circuit are reduced. The output end of the switching circuit is connected to the Vb end of the LC oscillator to form a complete automatic amplitude control oscillating circuit. The invention adopts the switching circuit, the amplifying circuit and the LC oscillator to realize the automatic amplitude control function, improves the reliability of the oscillating circuit, reduces the frequency offset caused by the amplitude, and the components adopted in the circuit structure are all common simple components, the size of the components is small, the power consumption is small, the on-chip integration is easy, and the designed automatic amplitude control oscillating circuit has low cost.

When the initial LC oscillator is electrified, the output direct-current voltage signal of the switching circuit is determined by a resistor R4 and an NMOS tube Q5, the direct-current voltage value output by the switching circuit is just electrified, the amplifying circuit does not output a signal, the NMOS tube Q5 does not work, at the moment, the drain voltage value of the NMOS tube Q5 is determined by a power supply VCC and the resistor R4, the drain voltage value of the NMOS tube Q5 is a relatively high voltage value, the voltage to the Vb end is a relatively high voltage value, the working current of the LC oscillator is large, and the amplitude of the output oscillation signal of the LC oscillator is large. The amplitude of the sine signal output by the LC oscillator is close to full swing amplitude after being amplified by the amplifying circuit, the output end of the amplifying circuit outputs a signal which is in a switch working state after passing through the capacitor C6, the drain voltage value of the NMOS tube Q5 is changed, the drain voltage value of the NMOS tube Q5 is reduced, the direct current voltage value of the output end of the switch circuit is in a relatively low value after passing through the pi-shaped filter circuit, the working current of the LC oscillator is reduced, the amplitude of the oscillation signal output by the LC oscillator is reduced, and the direct current voltage value of the output end is dynamically adjusted by the switch circuit, so that the oscillation amplitude of the oscillation signal output by the LC oscillator reaches a stable state. When the LC oscillator is affected by temperature, power supply voltage and process, the amplitude of the oscillation signal output by the LC oscillator is shifted, and the frequency shift caused by the amplitude is reduced by dynamically adjusting the amplifying circuit and the switching circuit.

As shown in FIG. 3, the clock generator comprises an automatic amplitude control oscillating circuit, a phase-locked loop circuit, a digital temperature sensor, a power supply voltage sensor and an EEPROM which are integrated on one chip, so that the high integration is embodied, and the circuit layout is simpler. The automatic amplitude control oscillation circuit is used as a clock source to provide a reference clock signal for a phase-locked loop circuit, the phase-locked loop circuit is known from the prior art to realize phase synchronization, frequency equality or frequency doubling of two electric signals, the phase-locked loop circuit comprises a phase frequency detector PFD, a charge pump CP, a low-pass filter LPF, a voltage-controlled oscillator VCO and a fractional frequency divider SD_DIV which are sequentially and electrically connected, an input end of the fractional frequency divider SD_DIV is electrically connected with an output end OUT of the voltage-controlled oscillator VCO, and an output end of the fractional frequency divider SD_DIV is electrically connected with an input end of the phase frequency detector PFD to form a phase-locked loop. The phase frequency detector PFD has two input terminals for respectively inputting a reference clock signal provided by the automatic amplitude control oscillation circuit and a frequency division signal provided by the output terminal of the fractional frequency divider SD_DIV, and compares the two input signalsThe circuit is used for detecting the phase difference and the frequency difference of two signals, outputting a signal which is in direct proportion to the difference of the two input signals to the charge pump CP, amplifying the signal by the charge pump CP, and filtering high-frequency components in an error signal output by the phase frequency detector PFD by the low-pass filter LPF to play roles of filtering and guaranteeing loop stability; and then the output signal is supplied to the voltage-controlled oscillator VCO, the voltage-controlled oscillator VCO changes the frequency and the phase of the output signal according to the transmitted error signal, and finally the output signal of the voltage-controlled oscillator VCO is the same as the frequency and the phase of the reference clock signal supplied by the automatic amplitude control oscillation circuit. The voltage-controlled oscillator VCO outputs a signal to the phase frequency detector PFD, which is an important loop in the phase-locked loop, and the voltage-controlled oscillator VCO outputs a signal to the phase frequency detector PFD, so that the fractional frequency divider sd_div is adopted to achieve high precision, so that not only can relatively continuous frequency output be obtained, but also the precision of the output signal can be improved according to the fractional number of the fractional frequency divider sd_div. The relationship between the output clock signal and the reference clock signal is:

where Fout is an output clock signal, fref is a reference clock signal output by the automatic amplitude control oscillation circuit, N is an integer part of the fractional frequency divider sd_div and N is an integer greater than 0, N is an integer of the fractional frequency divider sd_div and N is an integer greater than 0, the value of N represents the number of bits of the fractional number, and the greater the number of bits, the higher the precision of the output signal.

Since the clock signal output by the LC oscillator is affected by the process, the power supply voltage and the temperature, a frequency shift is generated along with the change of the process, the power supply voltage and the temperature, and the output clock signal is changed. In order to solve the problem of frequency offset and improve the precision of output clock signals, a digital temperature sensor, a power supply voltage sensor and an EEPROM are adopted to respectively regulate the temperature, the power supply voltage and the frequency offset generated by the process. The output end of the digital temperature sensor, the output end of the power supply voltage sensor and the output end of the EEPROM are respectively and electrically connected with a setting port 1 of the frequency division ratio of the fractional frequency divider SD_DIV, a setting port 2 of the frequency division ratio and a setting port 3 of the frequency division ratio, the digital temperature sensor detects the outside temperature, the acquired temperature data result is dynamically fed back to the fractional frequency divider SD_DIV, when the temperature changes, the frequency division decimal value of the fractional frequency divider SD_DIV is adjusted, the frequency division decimal value is the decimal number of the fractional frequency divider SD_DIV, the compensation effect is achieved, and the output clock signal is not affected by the temperature and does not generate frequency offset. The power supply voltage sensor detects an external power supply voltage value, dynamically feeds back the detected power supply voltage value to the fractional frequency divider SD_DIV, and adjusts the frequency division fractional value of the fractional frequency divider SD_DIV when the external power supply voltage value changes, so that an output clock signal is not influenced by the power supply voltage and frequency offset does not occur. In the production process of the oscillator, the problem of frequency change caused by process deviation is solved by introducing the EEPROM, and the EEPROM is a charged erasable programmable read-only memory, has the characteristic of no loss of power-down data and can write data or erase data through a computer or special equipment. After the production is completed, a standard frequency value is written into an EEPROM in the clock generator, and the frequency division decimal value of the decimal frequency divider SD_DIV is adjusted through the written standard frequency value, so that the problem of frequency variation caused by process deviation is solved.

The clock generator has an automatic amplitude control function through the oscillation circuit, so that the amplitude control of the oscillation signal output by the LC oscillator is realized, and the frequency offset of the oscillation signal output by the LC oscillator is reduced; the digital temperature sensor, the power supply voltage sensor and the EEPROM outside the LC oscillator respectively regulate the temperature, the power supply voltage and the frequency offset generated by the process, so that the frequency offset of an output clock of the clock generator is further reduced, and the high-precision clock output is realized; and no crystal design, the automatic amplitude control oscillating circuit, the phase-locked loop circuit, the temperature sensor, the power supply voltage sensor and the EEPROM are integrated on one chip, so that the integration level is high, the complexity of wiring layout is reduced, and the interference of the outside on the clock circuit is reduced.

Finally, it is noted that the above embodiments are only for illustrating the technical solution of the present invention and not for limiting the same, and although the present invention has been described in detail with reference to the preferred embodiments, it should be understood by those skilled in the art that modifications and equivalents may be made thereto without departing from the spirit and scope of the technical solution of the present invention, which is intended to be covered by the scope of the claims of the present invention.

Claims

1. The automatic amplitude control oscillating circuit is characterized in that: the circuit comprises an LC oscillator, an amplifying circuit and a switching circuit; the output end of the LC oscillator is connected with the input end of the amplifying circuit, and the output end of the amplifying circuit is connected with the control end of the switching circuit; the switching circuit is provided with an output filter unit, and the output end of the switching circuit is connected with the DC bias end of the LC oscillator and then used for adjusting the working current of the LC oscillator; the switching circuit comprises an NMOS tube Q5, a capacitor C6, a resistor R4 and a resistor R5, the output filter unit is a pi-type filter circuit, the grid electrode of the NMOS tube Q5 is connected with the output end of the amplifying circuit through the capacitor C6, the drain electrode of the NMOS tube Q5 is connected with a power supply VCC through the resistor R4, the resistor R5 is connected between the grid electrode of the NMOS tube Q5 and the drain electrode of the NMOS tube Q5, the source electrode of the NMOS tube Q5 is grounded, and the drain electrode of the NMOS tube Q5 outputs a direct-current voltage signal to the LC oscillator after being filtered by the pi-type filter circuit.

2. The automatic amplitude control oscillating circuit of claim 1, wherein: the amplifying circuit comprises a PMOS tube Q1, an NMOS tube Q2 and a resistor R3, wherein the grid electrode of the PMOS tube Q1 is electrically connected with the grid electrode of the NMOS tube Q2, the drain electrode of the PMOS tube Q1 is electrically connected with the drain electrode of the NMOS tube Q2, the resistor R3 is connected between the grid electrode of the NMOS tube Q2 and the drain electrode of the NMOS tube Q2, the source electrode of the PMOS tube Q1 is connected to a power supply VCC, and the source electrode of the NMOS tube Q2 is grounded.

3. The automatic amplitude control oscillating circuit of claim 1, wherein: the LC oscillator comprises an inductor L, a capacitor C1, a capacitor C2, a capacitor C3, a capacitor C4, an NMOS tube M1, an NMOS tube M2, a resistor R1 and a resistor R2, wherein the inductor L, the capacitor C1, the capacitor C2, the capacitor C3, the capacitor C4, the NMOS tube M1 and the NMOS tube M2 form a cross coupling LC oscillator, one end of the resistor R1 and one end of the resistor R2 are connected together to form a direct current bias end of the LC oscillator, the other end of the resistor R1 is connected with the grid of the NMOS tube M1, the other end of the resistor R2 is connected with the grid of the NMOS tube M2, one end of the capacitor C3 is connected with the grid of the NMOS tube M2, the other end of the capacitor C3 is connected with one end of the inductor, one end of the capacitor C4 is connected with the grid of the NMOS tube M1, and the other end of the capacitor C4 is connected with the other end of the inductor.

4. The automatic amplitude control oscillating circuit of claim 3, wherein: the LC oscillator further comprises an NMOS tube M3, the grid electrode of the NMOS tube M3 is an enable control end EN of the LC oscillator, the drain electrode of the NMOS tube M3 is respectively connected with the drain electrodes of the NMOS tube M1 and the NMOS tube M2, and the source electrode of the NMOS tube M3 is grounded.

5. The automatic amplitude control oscillating circuit of claim 1, wherein: the circuit also comprises an inverter circuit, wherein the input end of the inverter circuit is connected with the output end of the amplifying circuit, and the inverter circuit changes an oscillating signal of the amplifying circuit into a square wave signal to be output.

6. The automatic amplitude control oscillating circuit of claim 5, wherein: the LC oscillator, the amplifying circuit, the switching circuit and the inverting circuit are all integrated on one chip.

7. The crystal-free high-precision clock generator is characterized in that: comprising an automatic amplitude control oscillator circuit as claimed in any one of claims 1-6, further comprising a phase-locked loop circuit, the automatic amplitude control oscillator circuit outputting a reference clock signal to the phase-locked loop circuit; the phase-locked loop circuit comprises a phase frequency detector, a charge pump, a low-pass filter, a voltage-controlled oscillator and a fractional frequency divider which are electrically connected in sequence, wherein the input end of the fractional frequency divider is connected with the output end of the voltage-controlled oscillator, and the output end of the fractional frequency divider is connected with the input end of the phase frequency detector.

8. The crystal-less high precision clock generator of claim 7, wherein: one or more of a digital temperature sensor, a power supply voltage sensor and an EEPROM, wherein the EEPROM stores standard frequency values; the output end of the digital temperature sensor, the output end of the power supply voltage sensor and/or the output end of the EEPROM are respectively connected with the setting port of the frequency dividing ratio of the fractional frequency divider.

9. The crystal-less high precision clock generator of claim 8, wherein: the automatic amplitude control oscillating circuit, the phase-locked loop circuit, the digital temperature sensor, the power supply voltage sensor and the EEPROM are integrated on one chip.