CN111146271A - 一种带有终端结构的超结mosfet结构及制备方法 - Google Patents

一种带有终端结构的超结mosfet结构及制备方法 Download PDF

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CN111146271A
CN111146271A CN201911330747.2A CN201911330747A CN111146271A CN 111146271 A CN111146271 A CN 111146271A CN 201911330747 A CN201911330747 A CN 201911330747A CN 111146271 A CN111146271 A CN 111146271A
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epitaxial layer
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王�华
刘学明
赵昕
张文敏
王昊
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Beijing Microelectronic Technology Institute
Mxtronics Corp
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Mxtronics Corp
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Abstract

一种带有终端结构的超结MOSFET结构及制备方法，N+型衬底上表面附着有N型外延层；N型外延层的部分区域加工有多个阵列的P柱；两相邻P柱之间作为N柱；在P柱和N柱的上表面通过浅离子注入一层阱；阱的上表面刻蚀部分区域，在刻蚀区域通过离子注入获得源区；N型外延层上终端区和超结区之间浅离子注入一层P‑区；N型外延层上表面依次淀积二氧化硅层、多晶硅层作为MOSFET结构的栅极；钝化层光刻开孔、淀积获得源极和场限环；N+型衬底的下表面附着有Al/Si/Cu合金作为漏极。本发明采用深槽截止的方式进行终端结构的制备，槽内填充高阻硅，防止拐角击穿，提高器件的耐压能力。采用金属场限环降低PN结处的电场峰值，使得终端表面电场平坦化，有效解决了器件终端区的尖端放电效应，提升器件性能。

Description

一种带有终端结构的超结MOSFET结构及制备方法
技术领域
本发明涉及一种带有终端结构的超结MOSFET结构及制备方法，属于半导体器件技术领域。
背景技术
超结功率MOSFET属于多子导电单极型器件，没有少子存储效应，开关速度快、工作效率高、开关损耗小；同时超结MOSFET器件的导通电阻小，有效降低了器件的通态功耗。超结MOSFET有效解决了击穿电压和导通电阻的矛盾，同时具备高击穿压和低导通电阻的特点，广泛应用于开关电源和同步整流电路中。
超结MOSFET器件常用于高压环境下，器件的击穿往往取决于一个小位置的的电场尖峰，尽管对元胞采取了很大程度上的优化和权衡妥协，但器件边缘的耐压不容忽视，需要考虑终端结构来提高器件的耐压。鉴于超结器件与传统器件不同，其漂移区由超结结构代替，其掺杂浓度很高，一方面高浓度掺杂区域耗尽使得空间电荷更集中，很容易使器件出现尖峰电场；另一方面高掺杂中性区的电阻更小，这使得电势更多的落到小范围的耗尽区上，从而大大增加了耗尽区电场峰值。边缘的杂质浓度非平衡很容易使得边缘区域无法完全耗尽，进而使后者发生。因此超结器件终端的相较传统VDMOS器件的终端设计更为复杂，需要考虑到电荷平衡。
终端结构的个数、间距对器件耐压起重要作用，终端结构的个数增加会提升器件耐压值，但是也会增大所占芯片面积，加大芯片成本。因此，在不增加终端结构个数的情况下，提高芯片终端结构的耐压特性，成为一个亟待解决的问题。
发明内容
本发明的技术解决问题是：克服现有技术的不足，提出了一种带有终端结构的超结MOSFET结构及制备方法，在不增加芯片面积的基础上，提高芯片面积的利用率使得器件的耐压有所增强。有效解决器件终端的电荷平衡问题，避免高掺杂区的尖端放电效应，从而提高芯片的击穿电压。
本发明的技术方案是：
一种带有终端结构的超结MOSFET结构，包括：N+型衬底、N型外延层、源极、栅极和漏极、钝化层；
N+型衬底上表面附着有N型外延层；
N型外延层的部分区域加工有多个阵列的P柱，所述P柱采用深沟槽干法刻蚀工艺进行制备；
两相邻P柱之间作为N柱；N型外延层上P柱和N柱所在区域作为超结区；
在P柱和N柱的上表面通过浅离子注入一层阱；所述阱通过轻掺杂获得；
阱的上表面刻蚀部分区域，在刻蚀区域通过离子注入获得源区；
N型外延层的部分区域加工有终端结构，所述终端结构的掺杂物为P型高阻硅；
N型外延层上终端结构所在区域作为终端区；
N型外延层上终端区和超结区之间通过浅离子注入一层P-区；
N型外延层上表面部分区域依次淀积二氧化硅层、多晶硅层作为MOSFET结构的栅极；
栅极和N型外延层上表面淀积复合钝化层PSG作为钝化层；
钝化层的部分区域通过光刻开孔、淀积Al/Si/Cu合金获得源极和场限环；源极覆盖在源区的上表面；
阱、源区的上表面均覆盖有钝化层；
N+型衬底的下表面附着有Al/Si/Cu合金作为漏极。
一种制备上述的一种带有终端结构的超结MOSFET结构的方法，包括步骤如下：
1)在N+型衬底上采用外延生长方式获得N型外延层；
2)在N型外延层上的部分区域进行深槽填充工艺制备P柱，相邻两个P柱之间作为N柱，交替存在的P柱、N柱形成超结区；
3)在N型外延层上进行深槽填充工艺制备终端结构，终端结构的填充物为P型高阻硅；N型外延层上终端结构所在区域作为终端区；终端结构的电阻率为200Ω·cm；
4)对完成步骤2)、3)的N型外延层上表面进行化学机械抛光使的N型外延层上表面无多余附着物；
5)在超结区进行轻掺杂获得阱；
6)在终端区与超结区之间的N型外延层表面浅离子注入一层P-区；
7)在N型外延层上表面依次淀积二氧化硅层、多晶硅层作为MOSFET的栅极6；
8)通过刻蚀的方法在阱的上方开孔，预留出源区位置，进行离子注入获得源区；
9)在MOSFET的上表面进行钝化处理，淀积出复合钝化层PSG作为钝化层；
10)在钝化层上表面的钝化层光刻开孔、淀积Al/Si/Cu合金，光刻源极和场限环的金属区，通过高温退火形成源极和场限环；
11)在衬底的下表面淀积金属Al/Si/Cu合金，通过高温退火形成漏极，形成完整的有终端结构的超结MOSFET。
本发明与现有技术相比的有益效果是：
1)本发明的一种带有终端结构的超结MOSFET，相对传统的MOFET其器件有效解决了高耐压与低导通电阻相矛盾的问题，有利于提高器件的击穿电压，同时减小器件的功耗。
2)本发明的一种带有终端结构的超结MOSFET，采用深槽填充的方式获得，在不增加芯片面积的情况下有效提高了芯片的耐压，节省了生产成本；
3)本发明的一种带有终端结构的超结MOSFET，采用金属场限环有效降低了终端处PN结的电场峰值，提高了击穿电压。
附图说明
图1为本发明带有终端的超结MOSFET的制作方法流程图；
图2为本发明带有终端结构的MOSFET超结区和终端结构意图；
图3为本发明带有终端的超结MOSFET剖面结构示意图；
图4为本发明带有终端的超结MOSFET的多元胞排布结构。
其中：1为衬底，2为N型外延层，31为P柱，32为N柱，33为阱，34为源区，41为终端结构，42为场限环，5为P-区，7为钝化层，8为源极，6为栅极，9为漏极
具体实施方式
本发明采用深槽截止的方式进行终端结构的制备，槽内填充高阻硅，防止拐角击穿，提高器件的耐压能力。采用金属场限环降低PN结处的电场峰值，使得终端表面电场平坦化，有效解决了器件终端区的尖端放电效应，提升器件性能。
下面结合附图和具体实施方式对本发明做进一步详细的描述。
如图2～4所示，一种带有终端结构的超结MOSFET结构，包括：N+型衬底1、N型外延层2、源极8、栅极6和漏极9、钝化层7。
N+型衬底1上表面附着有N型外延层2；
N型外延层2的部分区域加工有多个阵列的P柱31，所述P柱31采用深沟槽干法刻蚀工艺进行制备；主要采用单步稳态刻蚀技术获得侧壁较为光滑的P柱31，P柱31刻蚀深度不超过N型外延层2的下表面；所述N型外延层2的电阻率为5Ω·cm，作为漂移区；
两相邻P柱31之间作为N柱32；N型外延层2上P柱31和N柱32所在区域作为超结区；
在P柱31和N柱32的上表面通过浅离子注入一层阱33；所述阱33通过轻掺杂获得；
阱33的上表面刻蚀部分区域并通过离子注入获得源区34；
N型外延层2的部分区域加工有终端结构41，所述终端结构41的掺杂物为P型高阻硅，电阻率为200Ω·cm；
N型外延层2上终端结构41所在区域作为终端区；
N型外延层2上终端区和超结区之间通过浅离子注入一层P-区5；
N型外延层2上表面部分区域依次淀积二氧化硅层、多晶硅层作为MOSFET结构的栅极6；
栅极6和N型外延层2上表面淀积复合钝化层PSG作为钝化层7，保护MOSFET不受外界杂质离子的干扰；
钝化层7的部分区域通过光刻开孔、淀积Al/Si/Cu合金获得源极8和场限环42；源极8覆盖在源区34的上表面；
阱33、源区34的上表面均覆盖有钝化层7；
N+型衬底1的下表面附着有Al/Si/Cu合金作为漏极9。
所述漏极9、源极8和金属场限环42材料相同。
所述Al/Si/Cu合金中各个金属的质量比为质量比为Al：Si：Cu＝98.5％：1.0％：0.5％。
所述N+型衬底1的材料为N型掺杂的多晶硅，晶向沿100方向排列，所述N型掺杂的多晶硅具体选用电阻率为0.003Ω·cm的磷掺杂N型硅。主要是因为<100>晶向较<111>晶向来说，具有更小的界面态密度和相对较高的迁移率，可获得较大的导通电流。
所述栅极6由下到上依次是栅极氧化层和和多晶硅层；制备栅氧化层时采用干氧氧化，得到的氧化层界面态密度小、质量致密，有效防止栅氧化层的击穿漏电，提高器件的可靠性。选用N型掺杂的多晶硅进行淀积，得到阻值较小的栅电阻。所述栅极氧化层厚度为600～800埃，多晶硅层厚度为5000～7000埃。所述源极8采用溅射的方式进行金属淀积，源极8的厚度为3～5um。
如图1所示，一种制备上述的一种带有终端结构的超结MOSFET结构的方法，包括步骤如下：
1)在N+型衬底1上采用外延生长方式获得N型外延层2；
2)在N型外延层2上的部分区域进行深槽填充工艺制备P柱31，相邻两个P柱31之间作为N柱32，交替存在的P柱31、N柱32形成超结区；
3)在N型外延层2上进行深槽填充工艺制备终端结构41，终端结构41的填充物为P型高阻硅；N型外延层2上终端结构41所在区域作为终端区；终端结构41的电阻率为200Ω·cm；
4)对完成步骤2)、3)的N型外延层2上表面进行化学机械抛光使的N型外延层2上表面无多余附着物；
5)在超结区进行轻掺杂获得阱33；
6)在终端区与超结区之间的N型外延层2表面浅离子注入一层P-区5，来提高超结区的电荷平衡，这样的结构在横向上引入了一个梯形电场，可以有效提高终端区的耐压；
7)在N型外延层2上表面依次淀积二氧化硅层、多晶硅层作为MOSFET的栅极6；
8)通过刻蚀的方法在阱33的上方开孔，预留出源区34位置，进行离子注入获得源区34；
9)在MOSFET的上表面进行钝化处理，淀积出复合钝化层PSG作为钝化层7，保护MOSFET不受外界杂质离子的干扰；
10)在钝化层7上表面的钝化层7光刻开孔、淀积Al/Si/Cu合金，光刻源极8和场限环42的金属区，通过高温退火形成源极8和场限环42；
11)在衬底1的下表面淀积金属Al/Si/Cu合金，通过高温退火形成漏极9，形成完整的有终端结构的超结MOSFET。
本发明的一种带有终端结构的超结MOSFET具有耐压高、电阻低的优点(在500V达到耐压的基础上，器件导通电阻标准值为80mΩ)，在不增加芯片面积的基础上能够有限减少器件功耗。
以上所述，仅为本发明最佳的具体实施方式，但本发明的保护范围并不局限于此，任何熟悉本技术领域的技术人员在本发明揭露的技术范围内，可轻易想到的变化或替换，都应涵盖在本发明的保护范围之内。
本发明说明书中未作详细描述的内容属本领域专业技术人员的公知技术。

Claims (8)

1.一种带有终端结构的超结MOSFET结构，其特征在于，包括：N+型衬底(1)、N型外延层(2)、源极(8)、栅极(6)和漏极(9)、钝化层(7)；
N+型衬底(1)上表面附着有N型外延层(2)；
N型外延层(2)的部分区域加工有多个阵列的P柱(31)，所述P柱(31)采用深沟槽干法刻蚀工艺进行制备；
两相邻P柱(31)之间作为N柱(32)；N型外延层(2)上P柱(31)和N柱(32)所在区域作为超结区；
在P柱(31)和N柱(32)的上表面通过浅离子注入一层阱(33)；所述阱(33)通过轻掺杂获得；
阱(33)的上表面刻蚀部分区域，在刻蚀区域通过离子注入获得源区(34)；
N型外延层(2)的部分区域加工有终端结构(41)，所述终端结构(41)的掺杂物为P型高阻硅；
N型外延层(2)上终端结构(41)所在区域作为终端区；
N型外延层(2)上终端区和超结区之间通过浅离子注入一层P-区(5)；
N型外延层(2)上表面部分区域依次淀积二氧化硅层、多晶硅层作为MOSFET结构的栅极(6)；
栅极(6)和N型外延层(2)上表面淀积复合钝化层PSG作为钝化层(7)；
钝化层(7)的部分区域通过光刻开孔、淀积Al/Si/Cu合金获得源极(8)和场限环(42)；源极(8)覆盖在源区(34)的上表面；
阱(33)、源区(34)的上表面均覆盖有钝化层(7)；
N+型衬底(1)的下表面附着有Al/Si/Cu合金作为漏极(9)。
2.根据权利要求1所述的一种带有终端结构的超结MOSFET结构，其特征在于，所述漏极(9)、源极(8)和金属场限环(42)材料相同。
3.根据权利要求2所述的一种带有终端结构的超结MOSFET结构，其特征在于，所述Al/Si/Cu合金中各个金属的质量比为质量比为Al：Si：Cu＝98.5％：1.0％：0.5％。
4.根据权利要求1～3任意之一所述的一种带有终端结构的超结MOSFET结构，其特征在于，所述N+型衬底(1)的材料为N型掺杂的多晶硅，晶向沿100方向排列，所述N型掺杂的多晶硅具体选用电阻率为0.003Ω·cm的磷掺杂N型硅。
5.根据权利要求1所述的一种带有终端结构的超结MOSFET结构，其特征在于，所述栅极(6)由下到上依次是栅极氧化层和和多晶硅层；所述栅极氧化层厚度为600～800埃，多晶硅层厚度为5000～7000埃。
6.根据权利要求3所述的一种带有终端结构的超结MOSFET结构，其特征在于，所述源极(8)采用溅射的方式进行金属淀积，源极(8)的厚度为3～5um。
7.一种制备如权利要求1所述的一种带有终端结构的超结MOSFET结构的方法，其特征在于，包括步骤如下：
1)在N+型衬底(1)上采用外延生长方式获得N型外延层(2)；
2)在N型外延层(2)上的部分区域进行深槽填充工艺制备P柱(31)，相邻两个P柱(31)之间作为N柱(32)，交替存在的P柱(31)、N柱(32)形成超结区；
3)在N型外延层(2)上进行深槽填充工艺制备终端结构(41)，终端结构(41)的填充物为P型高阻硅；N型外延层(2)上终端结构(41)所在区域作为终端区；终端结构(41)的电阻率为200Ω·cm；
4)对完成步骤2)、3)的N型外延层(2)上表面进行化学机械抛光使的N型外延层(2)上表面无多余附着物；
5)在超结区进行轻掺杂获得阱(33)；
6)在终端区与超结区之间的N型外延层(2)表面浅离子注入一层P-区(5)；
7)在N型外延层(2)上表面依次淀积二氧化硅层、多晶硅层作为MOSFET的栅极(6)；
8)通过刻蚀的方法在阱(33)的上方开孔，预留出源区(34)位置，进行离子注入获得源区(34)；
9)在MOSFET的上表面进行钝化处理，淀积出复合钝化层PSG作为钝化层(7)；
10)在钝化层(7)上表面的钝化层(7)光刻开孔、淀积Al/Si/Cu合金，光刻源极(8)和场限环(42)的金属区，通过高温退火形成源极(8)和场限环(42)；
11)在衬底(1)的下表面淀积金属Al/Si/Cu合金，通过高温退火形成漏极(9)，形成完整的有终端结构的超结MOSFET。
8.根据权利要求7所述的一种制备带有终端结构的超结MOSFET结构的方法，其特征在于，步骤6)所述N型外延层(2)表面浅离子注入P-区(5)的厚度的取值范围为3～7微米。
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