CN111124025A - Low-noise linear voltage stabilizing circuit and implementation method thereof - Google Patents
Low-noise linear voltage stabilizing circuit and implementation method thereof Download PDFInfo
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- CN111124025A CN111124025A CN201911273264.3A CN201911273264A CN111124025A CN 111124025 A CN111124025 A CN 111124025A CN 201911273264 A CN201911273264 A CN 201911273264A CN 111124025 A CN111124025 A CN 111124025A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
- G05F1/561—Voltage to current converters
Abstract
The invention provides a low-noise linear voltage stabilizing circuit and a realization method thereof, wherein a control loop comprises the following steps: the negative end of the comparator is connected with a band gap voltage source BG, and the output end of the comparator connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input ends of the current source array I1-In and/or the diode array D1-Dn; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the grid of the source follower Mn 1; the output ends of the diode arrays D1-Dn are grounded; the first input end of the current source array I1-In and the drain electrode of the source follower Mn1 are both connected with a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected with Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator; the second terminal of R2 and the second terminal of C1 are both grounded. The band-gap voltage source is used as a voltage standard to participate in initial loop locking, and after the loop is locked, the loop is disconnected, so that the noise of the band-gap voltage source is isolated outside the loop fundamentally, and the noise of the LDO is reduced.
Description
Technical Field
The invention belongs to the technical field of semiconductor integrated circuits, and particularly relates to a low-noise linear voltage stabilizing circuit and an implementation method thereof.
Background
An LDO (linear voltage regulator) is a general regulator, and has the advantages of small jitter ripple, high PSRR, etc. compared to a switching regulator. The structure of the circuit is shown in fig. 1, wherein a bandgap voltage source generates VREF, operational amplifiers AMP and MP and R1, R2 forms a closed circuit loop, and the LDO output Vout is VREF (R1+ R2)/R1. In the whole loop, the band-gap voltage source generates noise, and the AMP also generates noise contribution, while the noise of the band-gap voltage source is the main contribution.
Patent 1(CN201210461088) achieves suppression of noise of the module by adding a low-pass filter after a bandgap voltage source, but the passive filter needs a large capacitance resistor, and integrating the large capacitance resistor in a chip consumes a huge chip area, or uses a high-resistance resistor under a special process, which is not beneficial to large-scale integration and commercialization, and increases corresponding chip cost. Patent 2(CN201710633876) utilizes an active device long channel MOS transistor to realize a high impedance resistor, thereby realizing the same filtering effect as patent 1, and achieving the purpose of filtering the noise of a band gap voltage source, while the active MOS resistor is easier to integrate than a passive resistor, and occupies a smaller chip area, but this method also has disadvantages, so although it has a smaller area than patent 1, it still cannot completely filter the noise of a band gap reference source, and the MOS transistor itself also contributes to flicker noise (flicker noise), and the noise KT/C of the whole filter is still affected by the size of the capacitor C, and if low noise is achieved, a larger on-chip capacitor is still needed.
Based on the defects in the prior art, it is necessary to invent a low noise linear voltage regulator circuit and a method for implementing the same to solve the above problems.
Disclosure of Invention
Aiming at the defects in the prior art, the invention aims to provide a low-noise linear voltage stabilizing circuit and an implementation method thereof, which isolate the noise of a band-gap voltage source outside a loop and fundamentally reduce the noise of an LDO (low dropout regulator).
In order to achieve the above purposes, the invention adopts the technical scheme that: a low noise linear voltage regulator circuit, comprising: a band gap voltage source BG and a control loop; the control loop includes: the comparator, the current source array I1-In and/or the diode array D1-Dn controlled by the control algorithm circuit, the capacitor C1, the resistors R1, R2 and the source follower Mn 1;
the S-negative end of the comparator is connected with a band gap voltage source BG, and the output end connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input end of the current source array I1-In; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the gate of the source follower Mn 1; the output end of the diode array D1-Dn is grounded; the first input terminal of the current source array I1-In and the drain of the source follower Mn1 are both connected to a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected to Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator S +; the second terminal of R2 and the second terminal of C1 are both grounded.
In order to achieve the above purposes, the invention adopts the technical scheme that: a low noise linear voltage regulator circuit, comprising: a band gap voltage source BG and a control loop; the control loop includes: the comparator, the current source array I1-In and/or the diode array D1-Dn controlled by the control algorithm circuit, the capacitor C1, the resistors R1, R2 and the source follower Mn 1;
the S-negative end of the comparator is connected with a band gap voltage source BG, and the output end connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input ends of the diode arrays D1-Dn; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the gate of the source follower Mn 1; the output end of the diode array D1-Dn is grounded; the first input terminal of the current source array I1-In and the drain of the source follower Mn1 are both connected to a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected to Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator S +; the second terminal of R2 and the second terminal of C1 are both grounded.
In order to achieve the above purposes, the invention adopts the technical scheme that: a low noise linear voltage regulator circuit, comprising: a band gap voltage source BG and a control loop; the control loop includes: the comparator, the current source array I1-In and/or the diode array D1-Dn controlled by the control algorithm circuit, the capacitor C1, the resistors R1, R2 and the source follower Mn 1;
the S-negative end of the comparator is connected with a band gap voltage source BG, and the output end connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input ends of the current source array I1-In and the diode array D1-Dn; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the gate of the source follower Mn 1; the output end of the diode array D1-Dn is grounded; the first input terminal of the current source array I1-In and the drain of the source follower Mn1 are both connected to a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected to Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator S +; the second terminal of R2 and the second terminal of C1 are both grounded.
In order to achieve the above purposes, the invention adopts the technical scheme that: a method for implementing a low noise linear voltage regulator circuit, comprising: when the mean value of Vo in the preset continuous time period accords with the preset threshold value, the control loop is considered to be stable, the control loop is cut off, and the output value of the control algorithm circuit is fixed.
Further, the preset threshold is 0.5.
The low-noise linear voltage stabilizing circuit and the implementation method thereof have the advantages that only the band-gap voltage source is used as a voltage standard to participate in initial loop locking, and when the loop is locked, the loop is disconnected, so that the noise of the band-gap voltage source is isolated outside the loop fundamentally, and the noise of the LDO is reduced.
Drawings
FIG. 1 is a schematic diagram of an embodiment of a linear voltage regulator circuit according to the prior art;
FIG. 2 is a schematic diagram illustrating a first embodiment of a low noise linear voltage regulator circuit according to the present invention;
FIG. 3 is a schematic diagram illustrating a second embodiment of a low noise linear voltage regulator circuit according to the present invention;
FIG. 4 is a schematic diagram illustrating a third embodiment of a low noise linear voltage regulator circuit according to the present invention.
Detailed Description
In order to make the technical problems solved, the technical solutions adopted, and the technical effects achieved by the present invention clearer, the technical solutions of the embodiments of the present invention will be further described in detail with reference to the accompanying drawings. It is to be understood that the described embodiments are merely exemplary of the invention, and not restrictive of the full scope of the invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
The invention provides a low-noise linear voltage stabilizing circuit, which comprises: a band gap voltage source BG and a control loop; the control loop includes: the comparator, the current source array I1-In and/or the diode array D1-Dn controlled by the control algorithm circuit, the capacitor C1, the resistors R1 and R2 and the source follower Mn 1.
The specific connection relationship is as follows: the S-negative end of the comparator is connected with a band gap voltage source BG, and the output end connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input ends of the current source array I1-In and/or the diode array D1-Dn; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the gate of the source follower Mn 1; the output end of the diode array D1-Dn is grounded; the first input terminal of the current source array I1-In and the drain of the source follower Mn1 are both connected to a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected to Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator S +; the second terminal of R2 and the second terminal of C1 are both grounded.
Referring to FIG. 2, FIG. 2 is a schematic diagram illustrating a first embodiment of a low noise linear voltage regulator circuit according to the present invention. In a specific embodiment, the output end of the control algorithm circuit is connected with the input end of the current source array I1-In.
The current source I1-In generates current with controllable magnitude according to different switch control signals, the current is input into the diode array D1-Dn to generate a voltage, then the voltage is reduced to Vout through the source follower Mn1, the Vout is divided by the R1 and the R2 and compared with Vref generated by BG, and the comparison result Vo (digital signal) is input into a control algorithm. Since the diode is a device below the gate surface, the noise is small compared to a conventional CMOS circuit, and therefore the noise generated by the analog circuit in the entire loop is small compared to the bandgap voltage source in the conventional architecture (fig. 1), the operational Amplifier (AMP).
The principle is as follows: when Vo is high (digital logic 1), indicating that Vout is greater than desired voltage Vref (R1+ R2)/R2, the control algorithm output will decrease the current of the current source array, thereby decreasing Vout; when Vo is low (digital logic 0), indicating that Vout is less than the desired voltage Vref (R1+ R2)/R2, the control algorithm output will raise the current of the current source array, thereby raising Vout; when the mean value of Vo in a continuous time is close to 0.5, the loop is considered to be stable, the loop is cut off at the moment, the output value of the control algorithm is fixed, and therefore the noise contribution of BG cannot enter the loop, and the output noise of the LDO is reduced fundamentally.
In another embodiment, referring to FIG. 3, a low noise linear voltage regulator circuit includes: a band gap voltage source BG and a control loop; the control loop includes: the comparator, the current source array I1-In and/or the diode array D1-Dn controlled by the control algorithm circuit, the capacitor C1, the resistors R1 and R2 and the source follower Mn 1.
The S-negative end of the comparator is connected with a band gap voltage source BG, and the output end connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input ends of the diode arrays D1-Dn; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the gate of the source follower Mn 1; the output end of the diode array D1-Dn is grounded; the first input terminal of the current source array I1-In and the drain of the source follower Mn1 are both connected to a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected to Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator S +; the second terminal of R2 and the second terminal of C1 are both grounded. The circuit principle is similar to that of the output control current source array I1-In of the control algorithm circuit, and the description is not expanded.
In another embodiment, referring to FIG. 4, a low noise linear voltage regulator circuit includes: a band gap voltage source BG and a control loop; the control loop includes: the comparator, the current source array I1-In and/or the diode array D1-Dn controlled by the control algorithm circuit, the capacitor C1, the resistors R1 and R2 and the source follower Mn 1.
The S-negative end of the comparator is connected with a band gap voltage source BG, and the output end connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input ends of the current source array I1-In and the diode array D1-Dn; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the gate of the source follower Mn 1; the output end of the diode array D1-Dn is grounded; the first input terminal of the current source array I1-In and the drain of the source follower Mn1 are both connected to a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected to Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator S +; the second terminal of R2 and the second terminal of C1 are both grounded.
The output end of the control algorithm circuit is simultaneously connected with the second input end of the current source array I1-In and the input end of the diode array D1-Dn. Namely, the control algorithm circuit controls the current source and the diode array simultaneously, one array is used as initial adjustment, the other array is used as fine adjustment, and the adjustment precision determines the final voltage precision of the LDO output.
When the mean value of Vo in a preset continuous time period accords with a preset threshold value, the control loop is considered to be stable, the control loop is cut off, and the output value of the control algorithm circuit is fixed.
Preferably, the preset threshold is 0.5.
Different from the prior art, the low-noise linear voltage stabilizing circuit and the implementation method thereof provided by the invention only use the band-gap voltage source as a voltage standard to participate in initial loop locking, and after the loop is locked, the loop is disconnected, so that the noise of the band-gap voltage source is fundamentally isolated outside the loop, and the noise of the LDO is reduced.
It will be appreciated by those skilled in the art that the circuit and method of the present invention are not limited to the embodiments described in the detailed description, and the detailed description is for the purpose of explanation and not limitation. Other embodiments will be apparent to those skilled in the art from the following detailed description, which is intended to cover all modifications, equivalents, and alternatives falling within the spirit and scope of the invention as defined by the appended claims.
Claims (5)
1. A low noise linear voltage regulator circuit, said circuit comprising: a band gap voltage source BG and a control loop; the control loop includes: the comparator, the current source array I1-In and/or the diode array D1-Dn controlled by the control algorithm circuit, the capacitor C1, the resistors R1, R2 and the source follower Mn 1;
the S-negative end of the comparator is connected with a band gap voltage source BG, and the output end connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input end of the current source array I1-In; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the gate of the source follower Mn 1; the output end of the diode array D1-Dn is grounded; the first input terminal of the current source array I1-In and the drain of the source follower Mn1 are both connected to a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected to Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator S +; the second terminal of R2 and the second terminal of C1 are both grounded.
2. A low noise linear voltage regulator circuit, said circuit comprising: a band gap voltage source BG and a control loop; the control loop includes: the comparator, the current source array I1-In and/or the diode array D1-Dn controlled by the control algorithm circuit, the capacitor C1, the resistors R1, R2 and the source follower Mn 1;
the S-negative end of the comparator is connected with a band gap voltage source BG, and the output end connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input ends of the diode arrays D1-Dn; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the gate of the source follower Mn 1; the output end of the diode array D1-Dn is grounded; the first input terminal of the current source array I1-In and the drain of the source follower Mn1 are both connected to a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected to Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator S +; the second terminal of R2 and the second terminal of C1 are both grounded.
3. A low noise linear voltage regulator circuit, said circuit comprising: a band gap voltage source BG and a control loop; the control loop includes: the comparator, a current source array I1-In and a diode array D1-Dn controlled by a control algorithm circuit, a capacitor C1, resistors R1, R2 and a source follower Mn 1;
the S-negative end of the comparator is connected with a band gap voltage source BG, and the output end connects the comparison result Vo with the input end of the control algorithm circuit; the output end of the control algorithm circuit is connected with the input ends of the current source array I1-In and/or the diode array D1-Dn; the output end of the current source array I1-In and the output end of the diode array D1-Dn are connected to the gate of the source follower Mn 1; the output end of the diode array D1-Dn is grounded; the first input terminal of the current source array I1-In and the drain of the source follower Mn1 are both connected to a power supply Vdd; the source output voltage Vout of the source follower Mn 1; a first end of the resistor R1 and a first end of the capacitor C1 are both connected to Vout; the second end of the resistor R1 and the first end of the resistor R2 are both connected to the positive end of the comparator S +; the second terminal of R2 and the second terminal of C1 are both grounded.
4. The method of any of claims 1-3, wherein when the average of Vo over a predetermined continuous period of time meets a predetermined threshold, the control loop is considered stable, and the control loop is cut off to keep the output of the control algorithm circuit constant.
5. The method of claim 4, wherein the predetermined threshold is 0.5.
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