CN110196611A - A kind of low-dropout regulator and its system - Google Patents

Abstract

The invention discloses low-dropout regulator and including the system of low-dropout regulator, wherein the low-dropout regulator can include: comparison circuit is configured as comparing the signal for the output for indicating the low-dropout regulator and reference signal to generate comparison result；The comparison circuit is coupled in loop control unit, is configured as being based at least partially on the comparison result to generate output circuit control signal；And output circuit, including two or more switching circuits, it is configured as controlling signal based on the output circuit to adjust the quantity of the switching circuit of the middle conducting of the two or more switching circuits.The output of low-dropout regulator can quickly be adjusted in real time according to the variation of the output of low-dropout regulator by implementing the embodiment of the present invention.

Description

A low dropout regulator and its system

【Technical field】

The invention relates to the field of electronic technology, in particular to a low-drop voltage regulator and a system thereof.

【Background technique】

Low dropout regulators are used in integrated circuits as a way to regulate the output voltage. Low dropout regulators are often designed to produce a regulated output voltage even when the output voltage is close to the supply voltage.

【Content of invention】

The invention provides a low dropout voltage stabilizer and a system including the low dropout voltage stabilizer, which can quickly adjust the output of the low dropout voltage stabilizer in real time according to the change of the output of the low dropout voltage stabilizer.

An output-generating low-dropout voltage regulator provided in an embodiment of the present invention may include: a comparison circuit configured to compare a signal representing the output of the low-dropout voltage regulator with a reference signal to generate a comparison result; a loop controller, coupled to the comparison circuit, configured to generate an output circuit control signal based at least in part on the comparison result; and an output circuit, including two or more switch circuits, configured to generate an output circuit control signal based on the output circuit control signal The number of switch circuits turned on among the two or more switch circuits is adjusted.

A system provided by an embodiment of the present invention may include: a load circuit, the load circuit including a plurality of sub-circuits; a first low-dropout voltage regulator, coupled to a first end of the load circuit, configured to convert the first low-voltage a first output of a dropout regulator is provided to the first terminal of the load circuit; and a second low dropout regulator, coupled to a second terminal of the load circuit, is configured to convert the second low voltage A second output of a dropout voltage regulator is provided to the second end of the load circuit; wherein the first low dropout voltage regulator is configured to send a signal indicative of the first output to the second low dropout voltage regulator A first indication of level change; wherein, the first low dropout voltage regulator is the low dropout voltage regulator described in each embodiment of the present invention.

As mentioned above, the low dropout voltage regulator and the system provided by the embodiments of the present invention can compare the signal representing the output of the low dropout voltage regulator with the reference signal through the comparison circuit to generate a comparison result, and use the loop controller based on the The comparison result generates an output circuit control signal to adjust the number of switching circuits that are turned on in the output circuit of the low dropout voltage regulator. Further, when the low dropout voltage regulator is connected to the load circuit, the embodiment of the present invention can quickly adapt to the change of the impedance of the load circuit to adjust the output of the low dropout voltage regulator.

【Description of drawings】

FIG. 1 shows a circuit board 100 including package components 110 and package external components 140 .

FIG. 2A shows an embodiment of an ILDO regulator 200 .

FIG. 2B shows an embodiment of a buffer circuit 240 and a switch circuit 250 .

FIG. 3 shows another embodiment of an ILDO regulator 300 including a first branch 330 and a second branch 340 .

FIG. 4 shows a single branch ILDO regulator 400 including a timer checking circuit 410 .

FIG. 5 shows a dual branch ILDO regulator 500 .

FIG. 6 shows a system 600 including a first ILDO regulator 620 and a second ILDO regulator 630 coupled across a load circuit 610 .

FIG. 7 shows a system 700 having a first ILDO 620 and a second ILDO 630 coupled across a load circuit 610 .

【Detailed ways】

An integrated low dropout (Integrated Low Dropout, ILDO) regulator can be an important part of many integrated circuit solutions. Ideally, an ILDO regulator would provide a controllable output voltage level close to the supply voltage level while maintaining low ripple and low noise. The ILDO regulator can adjust its output according to the change of the impedance of the load circuit coupled to its output terminal, so as to provide constant or nearly constant power, voltage or current at the output terminal. However, typical ILDO regulators require advance notification of changes in load conditions, indicating that the load impedance will change at a specific point in time to provide proper output regulation. ILDO regulators with advance notification systems may not provide adequate control when the load circuit needs to quickly adjust the current, voltage or power supplied by the ILDO regulator. In addition, if the signal is lost or delayed in advance, the ILDO regulator may not be able to provide the correct output voltage, current or power level, and the voltage, current or power level received by the load circuit may be insufficient, or too high. A typical ILDO regulator is usually synchronized to one clock cycle, which can introduce unnecessary delays when changing the supplied output voltage or current, as the ILDO regulator adjusts its output voltage, current or power level before Might have to wait for a clock edge. Described herein is an ILDO regulator with an asynchronous control system capable of quickly adjusting the low dropout regulator output in response to changes in the output of the low dropout regulator (eg, changes in load circuit impedance).

Before discussing the control system of the present invention, the presence of parasitics in the circuitry associated with the ILDO regulator will be discussed. FIG. 1 shows a circuit board 100 including package components 110 and package external components 140 . Package component 110 may include an integrated low dropout (ILDO) voltage regulator 120 coupled to a load circuit 130 . ILDO regulator 120 may provide its output to load circuit 130 . The package external component 140 may have parasitic inductance, parasitic capacitance and/or parasitic resistance and an external power management integrated circuit (Power Management Integrated Circuit, PMIC). For example, an off-package inductor may have parasitic capacitance between the inductor's winding turns. In another example, an off-package capacitor may have parasitic resistance at various frequencies. Additionally, packaged components 110 and coupling between packaged and non-packaged components may have parasitic inductance, parasitic capacitance, and/or parasitic resistance through similar mechanisms. Any or all of the parasitic effects described herein may vary over time. Additionally, the impedance of the load circuit 130 may vary over time. For example, if load circuit 130 is coupled to another circuit, the reflected impedance from the coupling may change over time, thereby changing the impedance of load circuit 130 seen by ILDO regulator 120 . In another example, the impedance 130 of the load circuit may vary due to time-varying parasitics within the load circuit 130 . In some embodiments, ILDO regulator 120 may be designed to provide power to load circuit 130 in a manner that mitigates parasitic effects, changes in voltage or current output and load impedance. It should be understood that the exoparts 140 shown in FIG. 1 are examples only, and that in some embodiments no exoparts may be used. In some embodiments, other than ILDO regulator 120 and load circuit 130 , no on-chip package components are used.

Load circuit 130 may be any circuit that receives power, current or voltage from ILDO regulator 120 . The impedance of the load circuit 130 may change over time due to a number of factors, such as changes in the size of the load or changes in parasitics. Thus, as will be described in further detail below, in some embodiments, ILDO regulator 120 can accommodate changes in impedance of the load circuit and parasitic effects of packaged component 110 and off-package components 140 .

FIG. 2A shows an embodiment of an ILDO regulator 200 . ILDO regulator 200 may include a control circuit 260 and a switch circuit 250 . Control circuit 260 may receive feedback signal VFB and reference signal VREF1 at comparator 210 . VFB may be a signal indicative of the voltage level at the output of ILDO regulator 200 (ie, VFB may reflect a change in impedance of the load circuit). For example, in some embodiments, VFB may be the output voltage of ILDO regulator 200 . In other embodiments, VFB may be a ratiometric representation of the output voltage of ILDO regulator 200 . In other embodiments, the feedback signal provided to comparator 210 may represent the current or power provided to the load circuit. VREF1 may be a reference voltage, which may be preset in memory of the system, set by a user of the system, or established by any suitable means. In other embodiments, the reference signal may be a reference current or power. Comparator 210 may compare the feedback signal and the reference signal and output a COMP signal indicating a state change between the two signals. For example, if VFB is initially lower than VREF1 and then becomes higher than VREF1 , comparator 210 may generate a first COMP signal indicating a change in state of VFB. Alternatively, if VFB is initially higher than VREF1 and then becomes lower than VREF1 , comparator 210 may generate a second COMP signal that indicates a change in state of VFB that is different from the first COMP signal. For example, a first COMP signal may be a pulse having a first shape, a first duration and/or a first amplitude, while a second COMP signal may be a pulse having a second shape, a second duration and/or a second amplitude . In some embodiments, the first COMP signal and the second COMP signal may be different and may vary with different states of VFB relative to VREF1 (eg, VFB falls below VREF1 or VFB rises above VREF1 ). Although voltage comparison is used as an example here, it should be understood that the comparison object may be current or power in a specific implementation. A change in the level of VFB relative to VREF1 (eg, VFB falling below VREF1 or VFB rising above VREF1 ) can be used to determine a change in the level of the output voltage provided by ILDO regulator 200 to the load circuit. Therefore, ILDO regulator 200 can adjust its output voltage to compensate for the level change of VFB relative to VREF1.

The output COMP of the comparator 210 may be sent to a pulse generator 220 . The output COMP may cause pulse generator 220 to generate pulses that may be sent to loop controller 230 . The pulse generator 220 may be adapted to generate a signal indicative of a state change detected by the comparator 210 . In some embodiments, pulse generator 220 may generate a first type of pulse if the output COMP of comparator 210 indicates that VFB has changed state above VREF1 For VREF1, the pulse generator 220 can generate a second type of pulse. In some embodiments, pulse generator 220 may generate the same pulse for any state change detected by comparator 210 . In such an embodiment, comparator 210 may be connected to both loop controller 230 and pulse generator 220, so that when loop controller 230 receives a pulse from pulse generator 220, it may receive the COMP signal generated by comparator 210 to indicate a change in the level of VFB relative to VREF1 (ie, VFB becomes higher than VREF1, or, VFB becomes lower than VREF1). It should be understood that in some embodiments, pulse generator 220 may not be used and the output of comparator 210 may be passed to loop controller 230 . In such an embodiment, as will be described in further detail below, the level of the COMP signal may indicate the level of VFB relative to VREF1, and the loop controller 230 uses the COMP signal in response to a change in state of the COMP signal. level to determine the number of switches enabled or disabled in the switch circuit 250 .

The loop controller 230 may receive the signal PULSE from the pulse generator 220 and/or the signal COMP from the comparator 210 and determine the number of switches enabled or disabled in the switch circuit 250 . In some embodiments where loop controller 230 receives only signal PULSE from pulse generator 220 , signal PULSE may correspond to the state of COMP output by comparator 210 . When COMP is at a first level, PULSE may correspond to a first pulse shape, first amplitude and/or first duration, and when COMP is at a second level, PULSE may correspond to a second pulse shape, second amplitude and/or or a second duration. In some embodiments where the loop controller receives both signals PULSE and COMP, PULSE may be the same pulse shape regardless of the level of COMP, and the loop controller 230 may be based on the level of COMP when signal PULSE is received Adjust the number of enable switches in the switch circuit 250 . In some embodiments where loop controller 230 receives COMP instead of PULSE, loop controller 230 may adjust the number of switches enabled in switch circuit 250 when signal COMP changes levels. The number of enable switches in the switch circuit 250 may correspond to the level of the output voltage VOUT of the ILDO regulator 200 . For example, if loop controller 230 receives an indication that feedback voltage VFB is low relative to VREF1, loop controller 230 may generate a signal to increase the number of switches enabled in switching circuit 250 in order to increase the output of ILDO regulator 200 Voltage. In such an example, if five switches are currently enabled in switch circuit 250, and loop controller 230 receives and indicates that VFB is low relative to VREF1, loop controller 230 may generate a signal to enable VFB in switch circuit 250. the sixth switch. Alternatively, loop controller 230 may receive an indication indicating the magnitude of the difference between VFB and VREF1 , and may enable a proportional number of switches in switching circuit 250 . In another example, if the loop controller 230 receives an indication that the feedback voltage VFB is high relative to VREF1, the loop controller 230 may generate a signal to disable additional switches in the switching circuit 250 in order to reduce the ILDO voltage regulator 200. The output voltage. In FIG. 2A , N switches are shown in switch circuit 250 , where N is any positive integer greater than one. Loop controller 230 may be any controller suitable for determining the number of switches in switching circuit 250 and generating signals to enable the switches, such as a field programmable gate array (FPGA), microprocessor, or hardware logic.

Signals from loop controller 230 may pass through optional buffer circuit 240 before reaching switch circuit 250 . The buffer circuit 240 may include N buffer amplifiers each connected from the loop controller 230 to a corresponding switch of the switch circuit 250 . Accordingly, each buffer amplifier of buffer circuit 240 may provide a separate signal path between loop controller 230 and each switch of switch circuit 250 . Buffer circuit 240 may adjust the impedance level seen by the output of loop controller 230 and the input of switch circuit 250 to drive the switches of switch circuit 250 .

The switch circuit 250 may include N switches controlled by the loop controller 230 for providing a conduction path between the high reference voltage VIN and the output VOUT of the ILDO regulator 200 . The high reference voltage VIN can be provided by any known voltage source, such as a power supply or a battery. As shown in FIG. 1 , the output VOUT of the ILDO regulator 200 may be connected to a load circuit.

FIG. 2B shows an embodiment of a buffer circuit 240 and a switch circuit 250 . In this example, N is equal to 3, but any positive integer greater than or equal to 2 can be used for N. Loop controller 230 provides three output signals, one for each switch in switching circuit 250 . The output signal from loop controller 230 may pass through a buffer amplifier in buffer circuit 240 before being connected to the control terminals (eg, gates) of the switches of switch circuit 250 . The switches in switching circuit 250 may be connected in parallel such that more switches are turned on to produce a higher output voltage or current at VOUT, and more switches are turned off to produce a lower output voltage at VOUT. output voltage, or current. It should be appreciated that the illustrated configuration of buffer amplifiers and switch connections is an example only, and that any suitable implementation that allows for the use of loop controller 230 to control switches within switch circuit 250 may be implemented in the present invention.

In some embodiments, it may be desirable to provide multiple reference voltages so that the loop controller can adjust the output voltage relative to the multiple reference voltages. Such an embodiment may allow the output voltage to remain within a range or ranges determined by a plurality of reference voltage levels. FIG. 3 shows another embodiment of an ILDO regulator 300 including a first branch 330 and a second branch 340 . The second branch 340 of the ILDO regulator 300 may include a second comparator 310 and a second pulse generator 320 . The second comparator 310 may receive the feedback voltage VFB and the second reference voltage VREF2 as input signals. VREF2 and VREF1 are the same or different reference voltages. Comparator 310 can compare VFB and VREF2 and indicate a state change between the two signals via signal COMP2. For example, if VFB is initially lower than VREF2 and then becomes higher than VREF2, comparator 310 may generate signal COMP2 indicating a change of state. Alternatively, if VFB is initially above VREF2 and then goes below VREF2, comparator 310 may generate a signal COMP2 indicating a change of state (Comp2 produced by VFB going from below VREF2 to above VREF2 is the same as VFB going from above VREF2 COMP2 generated for below VREF2 may have different duration, amplitude, etc.). The output COMP2 of the comparator 310 may go to the pulse generator 320 or the loop controller 230 .

The state change detected and output by comparator 310 may cause pulse generator 320 to generate pulse PULSE2 , which may be sent to loop controller 230 . Pulse generator 320 may be any circuit suitable for generating a signal representative of the change of state detected by comparator 310 . In some embodiments, pulse generator 320 may generate a first type of pulse if comparator 310 detects that VFB has changed state above VREF2, and if comparator 310 detects that VFB has changed state below VREF2, then Pulse generator 320 may generate a second type of pulse. In some embodiments, pulse generator 320 may periodically generate a pulse or signal PULSE2 unless comparator 310 detects a state change of VFB relative to VREF2. In some embodiments, pulse generator 320 may generate the same pulse for any change of state detected by comparator 310 . It should be understood that in some embodiments the pulse generator 320 may not be used and the output COMP2 of the comparator 310 may be passed to the loop controller 230 . In some embodiments, a pulse generator 320 may be used, and the output COMP2 of the comparator 310 may also be passed to the loop controller 230 . In such an embodiment, if two state changes are detected, loop controller 230 may use the outputs of comparators 210 and 310 in combination with the outputs of pulse generators 220 and 320 to determine the priority of the controller. For example, if VFB begins below VREF1 and VREF2, but then rises rapidly to exceed VREF1 and VREF2, in this example, VREF2>VREF1, loop controller 230 may determine that it should process the event generated by second branch 340, i.e., Events on the second comparator 310 and the second pulse generator 320, because based on the relationship between the two reference voltages, processing the events on the second branch 340 will inherently satisfy the events on the first branch 330.

Although two branches 330 and 340 are shown in FIG. 3, each branch serves as a signal chain receiving a signal indicative of an output voltage or a reference voltage, and is used to generate an event detection signal transmitted to the loop controller 230, it will be understood that the present invention Any number of branches can be used. The signal indicative of the output voltage may be a voltage or current signal with or without scaling to the output voltage. For example, three branches with three reference voltages may be used, or four branches with four reference voltages may be used. In addition, a single branch can use multiple reference voltages if suitable comparators are used. It should be understood that in some embodiments a single comparator may be used with two reference voltages VREF1 and VREF2 instead of two comparators. The output of the comparator can be a tristate signal indicating the level of VFB compared to two reference voltages, or the comparator can have two outputs each indicating the level of VFB compared to one of the two references Level.

The ILDO regulator 300 with two branches can be used to monitor and maintain the output voltage VOUT within predetermined limits. For example, VREF1 may be set as a lower limit voltage, and VREF2 may be set as an upper limit voltage. If VOUT, which is specified to be between VREF1 and VREF2 during system operation, increases due to various parasitic or loading effects such that VFB exceeds the upper limit voltage VREF2, the comparator 310 will trigger an event and send an indication of a change of state to the loop control device 230 and/or pulse generator 320. If the comparator 310 sends a signal to the pulse generator 320, the pulse generator 320 will then generate and send to the loop controller 230 a pulse corresponding to the change of state of the comparator. The loop controller 230 will then reduce the number of switches turned on in the switch circuit 250 to reduce the output voltage VOUT. The number of switches disabled can be a fixed amount (e.g., the loop controller disables one additional switch for each event), or can be a proportional amount (e.g., the loop controller disables VOUT compared to the reference The difference in voltage (that is, the amount by which VOUT is greater than the reference voltage) is proportional to the number of switches). If VOUT drops due to various parasitic or loading effects such that VFB falls below the lower limit voltage VREF1 , comparator 210 will trigger an event and send a signal to loop controller 230 and/or pulse generator 220 indicating a change of state. If the comparator 210 sends a signal to the pulse generator 220 , the pulse generator 220 will then generate a pulse corresponding to the state change of the comparator 210 and send it to the loop controller 230 . The loop controller 230 will then increase the number of turned-on switches in the switching circuit 250 to increase the output voltage VOUT. The number of switches turned on can be a fixed amount (e.g., the loop controller enables an additional switch for each event), or can be a proportional amount (e.g., the loop controller disables VOUT compared to The difference in the reference voltage (ie, the amount by which VOUT is less than the reference voltage) is proportional to the number of switches).

In some embodiments, it may be desirable to control the output voltage relative to a time reference. If the output voltage remains at a fixed level for longer than the reference time, it may be necessary to adjust the output voltage level to provide precise control of the output voltage level. For example, if the desired output voltage level is 0.70V, and the output voltage level remains at 0.69V for longer than a predetermined amount of time, it may be desirable to increase the output voltage level even if the resulting level is higher than 0.70V, such that The average output voltage over a period of time is close to 0.70V.

FIG. 4 shows a single branch ILDO regulator 400 including a timer checking circuit 410 . The timer check circuit 410 may include a time comparison circuit and an operation timer. In some embodiments, the run timer may be separate from timer check circuit 410, and timer check circuit 410 may receive timing signals from the run timer. When comparator 210 detects an event based on the relative value of feedback voltage VFB and reference voltage VREF1 (that is, the relative value of feedback voltage VFB and reference voltage VREF1 changes, for example, VFB changes from lower than VREF1 to higher than VREF1, or VFB When changing from above VREF1 to below VREF1), comparator 210 may send an indication to timer check circuit 410 and pulse generator 220 and loop controller 230 (where at least one of pulse generator 220 and loop controller 230 is selected) event signal. The timer check circuit 410 may compare the value of the run timer upon receiving the event from the comparator 210 with a threshold time T1, and if the value of the run timer is greater than the threshold time T1, it indicates that the output voltage VOUT remains at a single undesired level is too long, the timer check circuit 410 can trigger the loop controller 230 to adjust the number of switches in the switch circuit 250 to be turned on accordingly (for example, when the comparator 210 detects that the feedback voltage VFB is lower than the reference voltage VREF1 low becomes higher than the reference voltage VREF1, and the value of the running timer is greater than the threshold time T1, then the timer checking circuit 410 can trigger the loop controller 230 to reduce the number of switches that are turned on in the switching circuit 250 accordingly; on the contrary, When the comparator 210 detects that the feedback voltage VFB changes from being higher than the reference voltage VREF1 to being lower than the reference voltage VREF1, and the value of the running timer is greater than the threshold time T1, the timer check circuit 410 can trigger the loop controller 230 to increase The number of switched-on switches in the switching circuit 250;). In this embodiment, whenever the switch circuit 250 adjusts the number of switches that are internally turned on according to the comparison result between the value of the running timer and the threshold time T1, or whenever the timer checking circuit 410 compares the value of the running timer with After the threshold time T1, the running timer in the timer checking circuit 410 can be reset; or whenever the comparison result of the comparing circuit changes, the running timer in the timer checking circuit 410 can be reset. A run timer can be any suitable timekeeping circuit such as an oscillator, clock input or counter. The threshold time may be a preset time to regulate the action of the loop controller 230 . Additionally, timer check circuit 410 may also or alternatively receive feedback voltage VFB from comparator 210 or directly from the input of ILDO regulator 400 . Thus, if timer check circuit 410 detects that VFB is at a constant, undesired level for longer than threshold T1, timer check circuit 410 may trigger loop controller 230 to adjust the timing of the conducting switches in switch circuit 250 accordingly. Even if the comparator does not cause an event (for example, if timer check circuit 410 detects that VFB is at a constant, too-low voltage level for longer than T1, loop controller 230 may be triggered to increase the lead in switch circuit 250 accordingly Conversely, if the timer check circuit 410 detects that VFB is at a constant, excessively high voltage level for longer than T1, the loop controller 230 may be triggered to reduce the number of switches that are turned on in the switching circuit 250 accordingly quantity;). Time-based control allows finer control of the output voltage VOUT of the system by first changing said output voltage VOUT by using a voltage level based on a comparison relationship, and then readjusting it over time based on timer control the voltage level of the output voltage VOUT. Thus, in embodiments of the present invention, a timer check circuit may be used to prevent the output voltage VOUT from remaining at a single undesired level for longer than a determined period of time. For example, it is acceptable for the output voltage to be slightly above or below the desired output voltage for short periods of time, but it is undesirable for the output voltage to remain at this voltage level above or below the desired level.

FIG. 5 shows a two-branch ILDO regulator 500 with a timer check circuit for each branch. Wherein, the working principle of the first branch including the comparator 210 , the timer checking circuit 410 , the pulse generating circuit 220 and the loop controller 230 is the same as that in FIG. 4 , and will not be repeated here. This embodiment only discusses the working principle of the second branch including the comparator 310, the timer checking circuit 510, the pulse generating circuit 320 and the loop controller 230. Specifically, when the comparator 310 is based on the feedback voltage VFB and the reference voltage VREF2 When a relative value detection event (that is, the relative value of the feedback voltage VFB and the reference voltage VREF2 changes, for example, VFB changes from below VREF2 to above VREF2, or VFB changes from above VREF2 to below VREF2), the comparison The timer may send a signal indicative of the event to the timer check circuit 510 as well as the pulse generator 320 and the loop controller 230 (wherein at least one of the pulse generator 320 and the loop controller 230 may be selected for transmission). The timer check circuit 510 can compare the value of the run timer when the event from the comparator 310 is received with a threshold time T2, if the value of the run timer is greater than the threshold time T2, it indicates that the output voltage VOUT remains at a single undesired level is too long, the timer check circuit 510 can trigger the loop controller 230 to adjust the number of switches in the switching circuit 250 to be turned on accordingly (for example, when the comparator 310 detects that the feedback voltage VFB is lower than the reference When the voltage VREF2 is low and becomes higher than the reference voltage VREF2, and the value of the running timer is greater than the threshold time T2, the timer checking circuit 510 can trigger the loop controller 230 to correspondingly reduce the number of switches in the switching circuit 250; on the contrary , when the comparator 310 detects that the feedback voltage VFB changes from being higher than the reference voltage VREF2 to being lower than the reference voltage VREF2, and the value of the running timer is greater than the threshold time T2, the timer checking circuit 510 can trigger the loop controller 230 to respond accordingly Increase the number of switched-on switches in the switch circuit 250 ;). In this embodiment, whenever the switch circuit 250 adjusts the number of switches that are internally turned on according to the comparison result between the value of the running timer and the threshold time T2, or whenever the timer checking circuit 510 compares the value of the running timer with After the threshold time T2, the run timer in timer check circuit 510 may be reset. A running timer can be any suitable timekeeping mechanism such as an oscillator, clock input or counter. As mentioned above, the threshold time may be a preset time to regulate the action taken by the loop controller 230 . In addition, the timer check circuit 510 may also or alternatively receive the feedback voltage VFB from the comparator 310 , or receive the feedback voltage VFB directly from the input of the ILDO regulator 500 . Thus, if timer check circuit 510 detects that VFB is at a constant, undesired level for longer than threshold T2, timer check circuit 510 may trigger loop controller 230 to adjust the timing of the conducting switches in switch circuit 250 accordingly. amount, even if the comparator does not cause an event (for example, if timer check circuit 510 detects that VFB is at a constant, too-low voltage level for longer than T2, loop controller 230 may be triggered to increase the lead in switch circuit 250 accordingly Conversely, if the timer check circuit 510 detects that VFB is at a constant, excessively high voltage level for longer than T2, the loop controller 230 may be triggered to reduce the number of switches that are turned on in the switching circuit 250 accordingly ;) However, in multiple timer check circuits, the interval of multiple timer check circuits can be set to adjust the actions taken by the loop controller 230 . For example, if T1 is less than T2, loop controller 230 may set the number of switches turned on to the first configuration if the run timer reaches T1 and VOUT is at an undesired level. If the run timer reaches the time between T1 and T2 and VOUT is at an undesired level, loop controller 230 may set the number of switches turned on to the second configuration. Although two separate timer checking circuits 410 and 510 are shown in FIG. 5 . It should be understood that the two timer check circuits can be implemented as a single timer check circuit with multiple inputs and thresholds. In addition, it should be understood that although two branches are shown in FIG. 5 . Any number of branching and timer checking circuits can be used to provide finer control of the output voltage VOUT.

Furthermore, in another embodiment, an ILDO regulator 500 with two branches may be used to monitor and maintain the output voltage VOUT within predetermined limits. For example, VREF1 may be set as a lower limit voltage, and VREF2 may be set as an upper limit voltage. If VOUT, which is specified to be between VREF1 and VREF2 during system operation, increases due to various parasitic or loading effects such that VFB falls below the lower limit voltage VREF1, comparator 210 will trigger an event and send an indication of a change of state to the timing The generator inspection circuit 410, the loop controller 230, and the pulse generator 220 (wherein at least one of the pulse generator 220 and the loop controller 230 is selected). The timer check circuit 410 may compare the value of the run timer when the event from the comparator 210 is received with a threshold time T1, if the value of the run timer is greater than the threshold time T1, it indicates that the output voltage VOUT remains below VREF1 If the time of an undesired level is too long, the timer check circuit 410 may trigger the loop controller 230 to increase the number of switches in the switch circuit 250 that are turned on accordingly. In this embodiment, whenever the switch circuit 250 adjusts the number of switches that are internally turned on according to the comparison result between the value of the running timer and the threshold time T1, or whenever the timer checking circuit 410 compares the value of the running timer with After the threshold time T1, the run timer in timer check circuit 410 may be reset. If VOUT, which is specified to be between VREF1 and VREF2 during system operation, increases due to various parasitic or loading effects such that VFB exceeds the upper limit voltage VREF2, the comparator 310 will trigger an event and send an indication of a change of state to the timer Check circuit 510, loop controller 230, and pulse generator 320 (at least one of pulse generator 320 and loop controller 230 is selected). The timer check circuit 510 may compare the value of the run timer when the event from the comparator 310 is received with a threshold time T2, and if the value of the run timer is greater than the threshold time T2, it indicates that the output voltage VOUT is maintained at a value greater than VREF2. If the time of an undesired level is too long, the timer checking circuit 510 may trigger the loop controller 230 to reduce the number of switches in the switching circuit 250 to be turned on accordingly. In this embodiment, whenever the switch circuit 250 adjusts the number of switches that are internally turned on according to the comparison result between the value of the running timer and the threshold time T2, or whenever the timer checking circuit 510 compares the value of the running timer with After the threshold time T2, the run timer in timer check circuit 510 may be reset. In a specific implementation, the threshold times T1 and T2 may be the same or different.

In some embodiments, the load circuit at the output of the ILDO regulator may include a mesh circuit. In this case, supplying the output of the ILDO regulator to one end of the mesh circuit may result in uneven distribution of power, voltage or current across the load circuit. Described here is a system with multiple ILDO regulators used to provide power, voltage or current at multiple points in the load circuit, where the ILDO regulators can communicate to maintain system stability or otherwise way to improve control over the system.

FIG. 6 shows a system 600 including a first ILDO regulator 620 and a second ILDO regulator 630 coupled across a load circuit 610 . In embodiments where the load circuit 610 is equivalent to a grid of resistors, if a single ILDO regulator is used and connected to one side of the load circuit 610, the grid may cause the voltage from the ILDO regulator to be across the load circuit 610 dissipated unevenly, resulting in ineffective operation and high power loss. Thus, the system 600 uses the first ILDO regulator 620 on the first side of the load circuit 610 and uses the second ILDO regulator 630 on the second side of the load circuit 610 . By providing equal voltages on separate sides of the load circuit 610, voltage dissipation across the mesh can be reduced and more even power consumption can be achieved. However, if the first ILDO regulator 620 and the second ILDO regulator 630 independently provide voltage to the grid, the output voltages may suppress each other if the output voltages are not regulated in a synchronous manner.

FIG. 7 shows a system 700 having a first ILDO 620 and a second ILDO 630 coupled across a load circuit 610 . The load circuit 610 includes N sub-circuits arranged in a mesh network (regardless of the number of switches in the ILDO switching circuit), where N is a positive integer greater than or equal to 1. Each of the subcircuits 710, 720, and 730 may act as a subcircuit within the load circuit 610 coupled to the first ILDO 620 and the second ILDO 630, but if the first ILDO regulator 620 and the second ILDO regulator 630 operate independently, each Resistance values between the sub-circuits 710, 720, and 730 may result in uneven power dissipation across these sub-circuits. Accordingly, the first ILDO regulator 620 and the second ILDO regulator 630 may exchange control signals through the communication channel. For example, in a unidirectional embodiment, the loop controller of the first ILDO regulator 620 may receive signals from the comparator, pulse generator and/or timer check circuit of the second ILDO regulator 630 . Thus, if the second ILDO regulator 630 detects that an event on the second side of the load circuit 610 does not occur on the first side of the load circuit 610, the first ILDO regulator 620 may be notified and the first ILDO regulator The loop controller of the voltage regulator 620 can vary the number of switches turned on to regulate the output voltage of the first ILDO regulator 620 and prevent the damping effect by the uneven voltage applied to the load circuit 610 . In another bi-directional embodiment, both ILDOs 620 and 630 may communicate event information to each other based on their timer checking circuits, pulse generators and/or comparators to maintain a synchronized voltage output to load circuit 610 . Although two ILDOs are shown in FIGS. 6 and 7, it should be appreciated that any number of ILDOs may be applied to the load circuit and synchronized.

To this end, the data structures disclosed in the present invention and the codes mentioned can be stored in whole or in part in a computer-readable storage medium, hardware module or hardware device. The computer-readable storage medium includes, but is not limited to, volatile memory, non-volatile memory, magnetic or optical storage device (for example, hard disk, magnetic tape, optical disk drive, digital optical disk drive), or other known or A medium capable of storing code and/or data that will be developed in the future. The hardware modules or hardware devices disclosed in the present invention include, but are not limited to, application-specific integrated circuits (Application-Specific Integrated Circuits, ASICs), field-programmable gate arrays (Field-Programmable Gate Arrays, FPGAs), dedicated or shared processors , and other currently known or future hardware modules or devices.

Although the embodiments of the present invention have been described by way of some examples, the present invention is not limited to the specific forms described herein. Rather, the scope of the present invention is limited only by the accompanying claims. Additionally, although a feature may be described in only one particular embodiment, one skilled in the art would recognize that various features of the described embodiments may be combined in reference to the invention. In the claims, the term "comprising" does not exclude the presence of other elements or steps.

Further, although individual features may be included in different claims, these may possibly be advantageously combined, and the inclusion in different claims does not imply that a combination of features is not feasible and/or advantageous. . In addition, the inclusion of features in one type of claim does not mean that they are limited to that category, but rather that these features are equally applicable to other types of claims as the case may be.

The use of "first", "second", "third" and other ordinal numerals used to modify elements in the claims does not in itself imply any priority, order of precedence, order of priority among elements, or method of execution chronological order, but only used as an identification to distinguish between different elements with the same name (with different ordinal numbers).

Certain terms are used in the description and claims to refer to particular components. Those skilled in the art should understand that hardware manufacturers may use different terms to refer to the same component. The specification and claims do not use the difference in name as a way to distinguish components, but use the difference in function of components as a criterion for distinguishing. "Includes" and "comprises" mentioned throughout the description and claims are open-ended terms, so they should be interpreted as "including but not limited to". "Substantially" means that within an acceptable error range, those skilled in the art can solve the technical problem within a certain error range and basically achieve the technical effect. In addition, the term "coupled" includes any direct and indirect electrical connection means. Therefore, if it is described in the text that a first device is coupled to a second device, it means that the first device may be directly electrically connected to the second device, or indirectly electrically connected to the second device through other devices or connection means. device. The following descriptions are preferred modes for implementing the present invention, and the purpose is to illustrate the spirit of the present invention rather than limit the protection scope of the present invention. The protection scope of the present invention should be defined by the appended claims.

Although the present invention is disclosed above with preferred embodiments, it is not intended to limit the scope of the present invention. Any person skilled in the art may make some changes and modifications without departing from the spirit and scope of the present invention. Therefore, The scope of protection of the present invention should be defined by the claims.

Claims (23)

1. a kind of low-dropout regulator for generating output characterized by comprising

Comparison circuit is configured as comparing the signal for the output for indicating the low-dropout regulator and reference signal is compared with generating As a result；

The comparison circuit is coupled in loop control unit, is configured as being based at least partially on the comparison result defeated to generate Circuit control signal out；With

Output circuit, including two or more switching circuits are configured as controlling signal based on the output circuit to adjust The quantity of the switching circuit of the middle conducting of the two or more switching circuits.

2. low-dropout regulator according to claim 1, which is characterized in that the comparison circuit passes through pulse generator coupling The loop control unit is closed, the pulse generator is configured as generating pulse according to the variation of the comparison result.

3. low-dropout regulator according to claim 2, which is characterized in that the loop control unit is configured as based on institute It states pulse and generates the output circuit control signal.

4. low-dropout regulator according to claim 1, which is characterized in that further include be coupled in the loop control unit and Two or more buffer amplifiers between the output circuit.

5. low-dropout regulator according to claim 2, which is characterized in that the pulse generator is configured as described Output generates the pulse of the first kind when being greater than the reference signal, generate second when the output is less than the reference signal The pulse of type.

6. low-dropout regulator according to claim 1, which is characterized in that the loop control unit is configured as when described At least one switching circuit enabled in the two or more switching circuits is generated when output is less than the reference signal Output circuit controls signal.

7. low-dropout regulator according to claim 1, which is characterized in that the loop control unit is configured as when described Output generates at least one switching circuit in the two or more switching circuits of forbidden energy when being greater than the reference signal Output circuit controls signal.

8. low-dropout regulator according to claim 1, which is characterized in that further include:

Timer checks circuit, is configured as changing the comparison result when the variation of the comparison result of the comparison circuit When running timer runing time be compared with the first reference time with generation time check signal.

9. low-dropout regulator according to claim 8, which is characterized in that the loop control unit is further configured to The output circuit is generated based on the time check signal and controls signal, wherein transporting described in the time check signal designation When the row time is more than first reference time, the output circuit control signal is generated.

10. low-dropout regulator according to claim 8 or claim 9, which is characterized in that the runing time is in the output electricity It is reset after the quantity of the switching circuit of road adjustment conducting.

11. low-dropout regulator according to claim 8 or claim 9, which is characterized in that the runing time is in the timer It checks and is reset after the runing time is compared by circuit with the first reference time.

12. low-dropout regulator according to claim 8 or claim 9, which is characterized in that the runing time is electric in the comparison It is reset when the comparison result on road changes.

13. low-dropout regulator according to claim 1, which is characterized in that the comparison circuit is the first comparison circuit, The reference signal is the first reference signal, and the comparison result that the comparison circuit generates is the first comparison result, described Low-dropout regulator further include:

Second comparison circuit, be configured as comparing the signal for the output for indicating the low-dropout regulator and the second reference signal with Generate the second comparison result, wherein the loop control unit be further coupled to second comparison circuit and be configured as to First comparison result and second comparison result are at least partly based on to generate the output circuit control signal.

14. low-dropout regulator according to claim 13, which is characterized in that further include:

The second pulse generator being coupled between second comparison circuit and the pulse generator, second pulse produce Raw device is configured as generating the second pulse according to the variation of second comparison result.

15. low-dropout regulator according to claim 13, which is characterized in that further include:

First timer checks circuit, is configured as when the variation of the comparison result of first comparison circuit, by described first When the first runing time of the first running timer is compared with the first reference time to generate first when comparison result changes Between check signal；

Second timer checks circuit, is configured as when the variation of the comparison result of second comparison circuit, by described the The second runing time of the second running timer was compared to generate second with the second reference time when two comparison results change Time check signal.

16. low-dropout regulator according to claim 15, which is characterized in that the loop control unit is further configured To check that signal and/or the second time check signal generate the output circuit and control signal based on the first time；

Wherein when the first time checking that the first runing time described in signal designation is more than first reference time, it is based on First comparison result controls signal to generate output circuit；

When wherein the second runing time described in the second time check signal designation is more than second reference time, it is based on Second comparison result controls signal to generate output circuit.

17. low-dropout regulator according to claim 15 or 16, which is characterized in that first runing time and described Second runing time is reset after the quantity of the switching circuit of output circuit adjustment conducting.

18. low-dropout regulator according to claim 16 or 17, which is characterized in that first runing time is described First timer checks to be reset after first runing time is compared by circuit with the first reference time；Second fortune The row time is answered after second timer checks that second runing time is compared by circuit with the second reference time Position.

19. low-dropout regulator according to claim 13, which is characterized in that the loop control unit is configured as working as institute At least one enabled in the two or more switching circuits is generated when stating the signal of output less than first reference signal The output circuit of a switching circuit controls signal, and taboo is generated when the signal of the output is greater than second reference signal The output circuit of at least one switching circuit in the two or more switching circuits of energy controls signal.

20. a kind of system characterized by comprising

Load circuit, the load circuit include multiple sub-circuits；

First low-dropout regulator is coupled to the first end of the load circuit, is configured as the first low-dropout regulator First output provides the first end for arriving the load circuit；With

Second low-dropout regulator is coupled to the second end of the load circuit, is configured as the second low voltage difference pressure stabilizing Second output of device provides the second end for arriving load circuit；

Wherein first low-dropout regulator, which is configured as sending to second low-dropout regulator, indicates that described first is defeated First instruction of level change out；

Wherein, first low-dropout regulator is the low-dropout regulator as described in any one of claim 1-19.

21. system according to claim 20, which is characterized in that second low-dropout regulator is configured to based on institute It states the first instruction and second output is provided.

22. system according to claim 20, which is characterized in that second low-dropout regulator is configured as to described First low-dropout regulator sends the second instruction of the level change for indicating second output voltage, wherein second low pressure Poor voltage-stablizer is the low-dropout regulator as described in any one of claim 1-18.

23. system according to claim 22, which is characterized in that first low-dropout regulator is configured to based on institute It states the second instruction and first output is provided.