CN109144154A - Low-dropout linear voltage-regulating circuit without external capacitor - Google Patents
Low-dropout linear voltage-regulating circuit without external capacitor Download PDFInfo
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- CN109144154A CN109144154A CN201710461462.7A CN201710461462A CN109144154A CN 109144154 A CN109144154 A CN 109144154A CN 201710461462 A CN201710461462 A CN 201710461462A CN 109144154 A CN109144154 A CN 109144154A
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05F—SYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
- G05F1/00—Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
- G05F1/10—Regulating voltage or current
- G05F1/46—Regulating voltage or current wherein the variable actually regulated by the final control device is dc
- G05F1/56—Regulating voltage or current wherein the variable actually regulated by the final control device is dc using semiconductor devices in series with the load as final control devices
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Abstract
The invention discloses a kind of low-dropout linear voltage-regulating circuits of no external capacitor, comprising: NMOS tube, output end of the source electrode of NMOS tube as voltage regulator circuit；Shunt capacitance；Feed circuit, feed circuit are used to feed back the output voltage of voltage regulator circuit to export the first feedback voltage and the second feedback voltage；Comparison circuit, comparison circuit are compared for being compared to the first feedback voltage with reference voltage to export the first comparison signal, and to the second feedback voltage with the reference voltage that reference voltage end provides to export the second comparison signal by second output terminal；Charge-discharge circuit, charge-discharge circuit is used to carry out charge and discharge to adjust the gate drive voltage of first node offer, to make the output voltage of voltage regulator circuit be maintained at predeterminated voltage section by carrying out control to NMOS tube to shunt capacitance according to the first comparison signal and the second comparison signal.The voltage regulator circuit can effectively inhibit output pulsation and power supply noise, and stability is good, and is quick on the draw.
Description
Technical field
The present invention relates to low pressure difference linearity voltage stabilizing technique fields, and in particular to a kind of low pressure difference linearity of no external capacitor is steady
Volt circuit.
Background technique
With the reduction of Digital Logic supply voltage, LDO (Low Dropout Regulator, low pressure difference linearity pressure stabilizing
Device) it is integrated in various MCU (Micro-Control Unit, micro-control unit), DSP (Digital Signal extensively
Processing, Digital Signal Processing) etc. digital logic chips.
Fig. 1 is the structural schematic diagram of a tradition LDO.As shown in Figure 1, LDO relies on the equivalent series of output end external capacitor C
Resistance ESR is one Left half-plane zero point of system balance, to keep the stabilization of system.This, which requires Application Engineer that need to select, has
Thus the external capacitor C of specific ESR value range can improve the complexity and application cost of application, and the C meeting of this external capacitor
Certain pcb board space is occupied, the volume of product is restricted.
With the development of product, more and more application scenarios and customer requirement LDO are not necessarily to external capacitor.In the related technology,
Disclose LDO how to utilize loop, load the characteristic dimensions support ring road such as capacitor stability and transient response.But it has following
Two o'clock intercommunity:
1, power MOS (Metal Oxide Semiconductor) device uses PMOS.Integrated PMOS device unavoidably has parasitic capacitance, input power fluctuation with ground
When especially having amplitude surge, the gate source voltage Vgs stability of PMOS is excessively poor, this directly results in output voltage Vout ripple
Increase, may cause digital circuitry disorder.
2, it maintains to stablize by amplifier feedback regulation Vout voltage.Amplifier and feedback control loop limited speed, it is prominent if any load
Becoming, the control voltage of power P MOS can not keep up with completely driving demand, and output ripple certainly will be caused to increase, this may also cause
Digital circuitry disorder.
Theoretically, carefully assessment is inherent, external condition, and digital electricity can be made by being not difficult to design a loop stability, normal condition
The LDO of road system steady operation.But in practice, it is not possible to all external, internal conditions are all considered clear, inevitable meeting
There is carelessness, the output ripple that these carelessness may cause LDO increases, or even oscillation.And the output ripple of LDO will directly affect number
The stability of word circuit work, if fruit product is high to stability requirement, these subtle carelessness will generate fatal influence.
Summary of the invention
The present invention is directed to solve one of the technical problem in above-mentioned technology at least to a certain extent.For this purpose, of the invention
Purpose is to propose a kind of low-dropout linear voltage-regulating circuit of no external capacitor.The low-dropout linear voltage-regulating circuit can make to export
Voltage is maintained at predeterminated voltage section, while can effectively inhibit output pulsation and power supply noise, and stability is good, and reacts spirit
It is quick.
In order to achieve the above objectives, the embodiment of the present invention proposes a kind of low-dropout linear voltage-regulating circuit of no external capacitor,
It include: NMOS tube, the drain electrode of the NMOS tube is connected with power supply, and the source electrode of the NMOS tube is as the low pressure difference linearity pressure stabilizing
The output end of circuit；Shunt capacitance, one end of the shunt capacitance are connected with the grid of the NMOS tube and have a first node,
The other end of the shunt capacitance is grounded；Feed circuit, the first end of the feed circuit are connected with the source electrode of the NMOS tube,
The second end of the feed circuit is grounded, and the feed circuit includes that the first feedback voltage output end and the second feedback voltage export
End, the feed circuit are used to feed back the output voltage of the low-dropout linear voltage-regulating circuit respectively by described the
One feedback voltage output end exports the first feedback voltage and exports the second feedback voltage by the second feedback voltage output end；
Comparison circuit, the comparison circuit include that first input end, the second input terminal, reference voltage end, the first output end and second are defeated
Outlet, the first input end of the comparison circuit are connected with the first feedback voltage output end, and the second of the comparison circuit
Input terminal is connected with the second feedback voltage output end, and the comparison circuit is used for first feedback voltage and the ginseng
The reference voltage for examining voltage end offer is compared to export the first comparison signal by first output end, and to described the
Two feedback voltages are compared through second output terminal output second with the reference voltage that the reference voltage end provides
Comparison signal；Charge-discharge circuit, the charge-discharge circuit the first output end with the first node, the comparison circuit respectively
It is connected with second output terminal, the charge-discharge circuit is used for according to first comparison signal and second comparison signal to institute
State shunt capacitance and carry out charge and discharge to adjust the gate drive voltage that the first node provides, with by the NMOS tube into
Row control is so that the output voltage of the low-dropout linear voltage-regulating circuit is maintained at predeterminated voltage section.
The low-dropout linear voltage-regulating circuit without external capacitor of the embodiment of the present invention, by feed circuit to low pressure difference linearity
The output voltage of voltage regulator circuit is fed back to export the first feedback voltage and the second feedback voltage, by comparing circuit to first
Feedback voltage is compared to export the first comparison signal with the reference voltage that reference voltage end provides, and to the second feedback voltage
It is compared with the reference voltage that reference voltage end provides to export the second comparison signal, and then by charge-discharge circuit according to the
One comparison signal and the second comparison signal adjust the gate drive voltage of first node offer to shunt capacitance progress charge and discharge,
Predeterminated voltage section is maintained at the output voltage by being controlled such that low-dropout linear voltage-regulating circuit to NMOS tube.This is steady
Volt circuit is while stabilizing the output voltage, additionally it is possible to effectively inhibit output pulsation and power supply noise, stability is good, and reacts spirit
It is quick.
In addition, the low-dropout linear voltage-regulating circuit of no external capacitor according to the above embodiment of the present invention can also have as
Under additional technical characteristic:
According to one embodiment of present invention, the comparison circuit includes: first comparator, and the first comparator is born
Input terminal is connected with the first feedback voltage output end of the feed circuit, the positive input terminal of the first comparator and the ginseng
It examines voltage end to be connected, first output end of the output end of the first comparator as the comparison circuit；Second comparator, institute
The positive input terminal for stating the second comparator is connected with the second feedback voltage output end of the feed circuit, second comparator
Negative input end is connected with the reference voltage end, second output of the output end of second comparator as the comparison circuit
End.
According to one embodiment of present invention, the charge-discharge circuit includes: the first current source；First switch, described
The control terminal of one switch is connected with the output end of the first comparator, one end of the first switch and first current source
It is connected, the other end of the first switch is connected with the first node；Second switch, the control terminal of the second switch and institute
The output end for stating the second comparator is connected, one end of the second switch respectively with the other end of the first switch and described the
One node is connected；One end of second current source, second current source is connected with the other end of the second switch, and described second
The other end of current source is grounded.
According to one embodiment of present invention, the charge-discharge circuit further include: charge pump, the charge pump and described the
One current source is connected, and the charge pump is by promoting the charging voltage of the shunt capacitance so that the gate drive voltage is greater than
The voltage of the power supply.
According to one embodiment of present invention, the feed circuit includes: first resistor, one end of the first resistor with
The source electrode of the NMOS tube is connected；Second resistance, one end of the second resistance be connected with the other end of the first resistor and
With second node, wherein the second node is the first feedback voltage output end of the feed circuit；3rd resistor, institute
The one end for stating 3rd resistor is connected with the other end of the second resistance and has third node, the other end of the 3rd resistor
Ground connection, wherein the third node is the second feedback voltage output end of the feed circuit.
According to one embodiment of present invention, the low-dropout linear voltage-regulating circuit of the no external capacitor, further includes: third
One end of switch, the third switch is connected with the source electrode of the NMOS tube；Third current source, one end of the third current source
With the other end of third switch, the other end ground connection of the third current source；Wherein, when load current mutates,
The third disconnects again after closing the switch the first preset time, with prevent the output voltage of the low-dropout linear voltage-regulating circuit with
With mutation.
According to one embodiment of present invention, when load current becomes larger, the output of the low-dropout linear voltage-regulating circuit
Voltage becomes smaller, and first comparison signal is high level signal, and second comparison signal is low level signal, the charge and discharge
Circuit charges to the shunt capacitance to improve the gate drive voltage, so that the output of low-dropout linear voltage-regulating circuit
Voltage becomes larger.
According to one embodiment of present invention, when load current becomes smaller, the output of the low-dropout linear voltage-regulating circuit
Voltage becomes larger, and first comparison signal is low level signal, and second comparison signal is high level signal, the charge and discharge
Circuit discharges to the shunt capacitance to reduce the gate drive voltage, so that the output of low-dropout linear voltage-regulating circuit
Voltage becomes smaller.
According to one embodiment of present invention, first current source is pull-up current source, under second current source is
Sourcing current source.
Detailed description of the invention
Above-mentioned and/or additional aspect of the invention and advantage will become from the description of the embodiment in conjunction with the following figures
Obviously and it is readily appreciated that, in which:
Fig. 1 is the circuit diagram of low-dropout linear voltage-regulating circuit in the related technology；
Fig. 2 is the structural schematic diagram of the low-dropout linear voltage-regulating circuit without external capacitor of embodiment according to the present invention；
Fig. 3 is the structural schematic diagram of the low-dropout linear voltage-regulating circuit of an exemplary no external capacitor according to the present invention；
And
Fig. 4 is the structural representation of the low-dropout linear voltage-regulating circuit of another exemplary no external capacitor according to the present invention.
Specific embodiment
The embodiment of the present invention is described below in detail, examples of the embodiments are shown in the accompanying drawings, wherein from beginning to end
Same or similar label indicates same or similar element or element with the same or similar functions.Below with reference to attached
The embodiment of figure description is exemplary, it is intended to is used to explain the present invention, and is not considered as limiting the invention.
Below with reference to the accompanying drawings the low-dropout linear voltage-regulating circuit without external capacitor of the embodiment of the present invention is described.
Fig. 2 is the block diagram of the low-dropout linear voltage-regulating circuit of no external capacitor according to an embodiment of the present invention.Such as Fig. 2 institute
Show, the low-dropout linear voltage-regulating circuit without external capacitor, comprising: NMOS tube Q1, shunt capacitance C1, feed circuit 10, compare
Circuit 20 and charge-discharge circuit 30.
Referring to fig. 2, the drain electrode of NMOS tube Q1 is connected with power supply, and the source electrode of NMOS tube Q1 is as low-dropout linear voltage-regulating circuit
Output end out.One end of shunt capacitance C1 is connected with the grid of NMOS tube Q1 and has first node a, shunt capacitance C1's
Other end ground connection.The first end of feed circuit 10 is connected with the source electrode of NMOS tube Q1, the second end ground connection of feed circuit 10, feedback
Circuit 10 includes the first feedback voltage output end FB1 and the second feedback voltage output end FB2, and feed circuit 10 is used for low voltage difference
The output voltage Vout of linear voltage-stabilizing circuit is fed back respectively by the first feedback of the first feedback voltage output end FB1 output
Voltage VFB1 and by the second feedback voltage output end FB2 export the second feedback voltage V FB2.Comparison circuit 20 includes first defeated
Enter to hold in1, the second input terminal in2, reference voltage end ref, the first output end out1 and second output terminal out2, comparison circuit 20
First input end in1 be connected with the first feedback voltage output end FB1, the second input terminal in2 of comparison circuit 20 and second is anti-
Feedthrough voltage output end FB2 is connected, and comparison circuit 20 is used for the reference provided the first feedback voltage V FB1 and reference voltage end ref
Voltage Vref is compared to export the first comparison signal by the first output end out1, and to the second feedback voltage V FB2 and ginseng
The reference voltage Vref for examining voltage end ref offer is compared to export the second comparison signal by second output terminal out2.It fills
Discharge circuit 30 is connected with first node a, the first output end out1 of comparison circuit 20 and second output terminal out2 respectively, charge and discharge
Circuit 30 is used to carry out charge and discharge to shunt capacitance C1 according to the first comparison signal and the second comparison signal to adjust first segment
The gate drive voltage Vg that point a is provided, to pass through the output for being controlled such that low-dropout linear voltage-regulating circuit to NMOS tube Q1
Voltage Vout is maintained at predeterminated voltage section.
Wherein, the value of output voltage Vout may depend on the resistance value and comparison circuit 20 of the resistance in feed circuit 10
Reference voltage.It is appreciated that predeterminated voltage section can be the lesser section of range, it is possible thereby to guarantee input, output
Pressure difference very little between voltage.
In some embodiments of the invention, feed circuit 10 may include multiple resistance connected or connected in series and parallel,
Partial pressure can be realized by multiple resistance, and then can feed back different feedback voltages.For example, can by three of series connection or
Two different node feeding back voltages in the above resistance.Comparison circuit 20 may include at least two comparators, according to anti-
The corresponding comparison signal of feedback voltage and reference voltage output of current feed circuit 10, i.e. the first comparison signal and the second comparison signal.
Optionally, the first comparison signal can be high/low level signal, and the second comparison signal may be high/low level
Signal.
Further, when load current changes, charge and discharge circuit 30 can compare according to the first comparison signal and second
Compared with the charge and discharge of signal control shunt capacitance C1, to adjust the gate drive voltage Vg of first node a offer, by NMOS tube
Q1 is controlled such that the output voltage Vout of low-dropout linear voltage-regulating circuit is maintained at predeterminated voltage section.
For example, the output voltage Vout of low-dropout linear voltage-regulating circuit becomes smaller when load current becomes larger, first compares letter
It number is high level signal, the second comparison signal is low level signal, and charge-discharge circuit 30 charges to mention to shunt capacitance C1
High gate drive voltage Vg, so that the output voltage Vout of low-dropout linear voltage-regulating circuit becomes larger.It is low when load current becomes smaller
The output voltage Vout of pressure difference linear voltage-stabilizing circuit becomes larger, and the first comparison signal is low level signal, and the second comparison signal is height
Level signal, charge-discharge circuit 30 discharges to shunt capacitance C1 to reduce gate drive voltage Vg, so that low pressure difference linearity
The output voltage Vout of voltage regulator circuit becomes smaller.Thereby, it is possible to make the output voltage of low-dropout linear voltage-regulating circuit be maintained at pre-
If voltage range.
In one embodiment of the invention, as shown in figure 3, comparison circuit 20 may include: first comparator CMP1 and
Second comparator CMP2.Wherein, the first feedback voltage output end of the negative input end of first comparator CMP1 and feed circuit 10
FB1 is connected, and the positive input terminal of first comparator CMP1 is connected with reference voltage end ref, and the output end of first comparator CMP1 is made
For the first output end out1 of comparison circuit 20.The positive input terminal of second comparator CMP2 and the second feedback electricity of feed circuit 10
Output end FB2 is pressed to be connected, the negative input end of the second comparator CMP2 is connected with reference voltage end ref, the second comparator CMP2's
Second output terminal out2 of the output end as comparison circuit 20.
Referring to Fig. 3, charge-discharge circuit 30 may include: the first current source I1, first switch S1, second switch S2 and second
Current source I2.Wherein, the control terminal of first switch S1 is connected with the output end of first comparator CMP1, one end of first switch S1
It is connected with the first current source I1, the other end of first switch S1 is connected with first node a.The control terminal of second switch S2 and second
The output end of comparator CMP2 is connected, one end of second switch S2 respectively with the other end of first switch S1 and first node a phase
Even.One end of second current source I2 is connected with the other end of second switch S2, the other end ground connection of the second current source I2.
Wherein, the first current source I1 is pull-up current source, and the second current source I2 is pull-down current source.
In one embodiment of the invention, referring to Fig. 3, charge-discharge circuit 30 can also include: charge pump 40.Charge pump
40 are connected with the first current source I1, and charge pump 40 is by promoting the charging voltage of shunt capacitance C1 so that gate drive voltage Vg is big
In the voltage of power supply, to realize the demand of voltage regulator circuit low voltage difference.
Fig. 3 is participated in, feed circuit 10 may include: first resistor R1, second resistance R2 and 3rd resistor R3.Wherein,
One end of one resistance R1 is connected with the source electrode of NMOS tube Q1.One end of second resistance R2 be connected with the other end of first resistor R1 and
It is the first feedback voltage output end FB1 of feed circuit 10 with second node b, second node b.One end of 3rd resistor R3 with
The other end of second resistance R2 is connected and has third node c, and the other end of 3rd resistor R3 is grounded, and third node c is feedback
Second feedback voltage output end FB2 of circuit 10.
In order to which the variation for reducing the spike burr and proof load electric current that cause due to load sudden change is gradual, such as Fig. 4
Shown, above-mentioned voltage regulator circuit can also include: third switch S3 and third current source I3.
Wherein, one end of third switch S3 is connected with the source electrode of NMOS tube Q1.It is opened with third one end of third current source I3
Close the other end of S3, the other end ground connection of third current source I3.Specifically, when load current mutates, third switch S3
It is disconnected again after being closed the first preset time, to prevent the output voltage of low-dropout linear voltage-regulating circuit from following mutation.
In an example of the invention, when the low-dropout linear voltage-regulating circuit without external capacitor of the embodiment of the present invention is answered
When for digital circuitry, its working principle is described in combination with Fig. 4, specific as follows:
1. original state
Shunt capacitance C1 is 0 without charge, the voltage at both ends, the output voltage Vout=0V of voltage regulator circuit.
2. power up
After system electrification, reference voltage Vref is higher than the first feedback voltage V FB1, and comparator CMP1 exports high level signal,
First switch S1 closure, pull-up current source I1 is to shunt capacitance C1 Injection Current；Second feedback voltage V FB2 is lower than reference voltage
Vref, the second comparator CMP2 export low level signal, and second switch S2 is disconnected；It controls on signal (i.e. gate drive voltage) Vg
It rises, the output voltage Vout of voltage regulator circuit is also with rising.
3. stabilization process
With the lasting rising of output voltage Vout, work as output voltageWhen, with reference to electricity
Vref is pressed to be lower than the first feedback voltage V FB1, first comparator CMP1 exports low level signal, and first switch S1 is disconnected, pull-up electricity
Stream source I1 stops to shunt capacitance C1 Injection Current；Second feedback voltage V FB2 is lower than reference voltage Vref, the second comparator
CMP2 exports low level signal, and second switch S2 continues to remain open.In this process, output voltage Vout can reach target electricity
Pressure, and in predeterminated voltage section.
4. load current changes:
1) load current becomes larger
When load current becomes larger, output voltage Vout is lower, and reference voltage Vref is higher than the first feedback voltage V FB1, the
One comparator CMP1 exports high level signal, and first switch S1 closure, pull-up current source I1 is to shunt capacitance C1 Injection Current；The
Two feedback voltage V FB2 are lower than reference voltage Vref, and the second comparator CMP2 exports low level signal, and second switch S2 is disconnected.Control
Signal Vg processed rises, and the output voltage Vout of voltage regulator circuit is also with rising to target voltage
2) load current becomes smaller
When load current becomes smaller, output voltage Vout is got higher, ifThen second
Feedback voltage V FB2 is higher than reference voltage Vref, and the second comparator CMP2 exports high level signal, second switch S2 closure, drop-down
Current source I2 extracts electric current out from shunt capacitance C1.Signal Vg decline is controlled, output voltage Vout is also with dropping to target voltage
As can be seen that the voltage regulator circuit of the embodiment of the present invention can be realized output voltage Vout when load current variation
Automatic adjustment, so that output voltage Vout is existedWithBetween fluctuate.
5. entering suspend mode
After digital circuitry enters suspend mode, load current bust is 0, and the output voltage Vout of voltage regulator circuit may
Rise to very high voltage.In order to reduce the spike burr caused due to load sudden change, it is default that third switch S3 first can be closed
Third switch S3 is disconnected after time again, keeps load current slowly varying to 0.
6. entering normal mode of operation:
When digital circuitry enters normal mode of operation by suspend mode, load current becomes nominal load, pressure stabilizing from 0
The output voltage Vout of circuit may drop to very low.At this time, it may be necessary to which voltage regulator circuit is first advanced into normal mode of operation, it can
It is first closed third switch S3, after the first preset time, digital circuitry enters back into normal mode of operation, so that load electricity
It flows progressive to nominal load.
To sum up, the low-dropout linear voltage-regulating circuit without external capacitor of the embodiment of the present invention, on the one hand by feed circuit,
The loop of comparison circuit, charge-discharge circuit and shunt capacitance composition, when load current increases, the first feedback voltage is reduced, than
High level signal is exported compared with the first comparator in circuit, charge-discharge circuit fills shunt capacitance by pull-up current source
Electricity, so that the driving capability of NMOS tube be made to increase；When load current reduces, the electricity of shunt capacitance is reduced by above-mentioned loop
Pressure, reduces the driving capability of NMOS tube.The loop can smoothly control output voltage, can effectively avoid generating because of control defeated
It fluctuates out, and grid voltage excellent stability, can effectively inhibit power supply noise.On the other hand the self-characteristic of NMOS tube is utilized
Loop is formed, when load current increases, output voltage is reduced, and grid voltage is constant, and gate source voltage increases, the drive of NMOS tube
Kinetic force increases；When load current reduces, output voltage rises, and gate source voltage reduces, and the driving capability of NMOS tube reduces.It should
Loop reaction speed is fast, to load capacitance value no requirement (NR), the fluctuation that can effectively inhibit output voltage to generate due to load sudden change.
In the description of the present invention, it is to be understood that, term " first ", " second " are used for description purposes only, and cannot
It is interpreted as indication or suggestion relative importance or implicitly indicates the quantity of indicated technical characteristic.Define as a result, " the
One ", the feature of " second " can explicitly or implicitly include at least one of the features.In the description of the present invention, " multiple "
It is meant that at least two, such as two, three etc., unless otherwise specifically defined.
In the present invention unless specifically defined or limited otherwise, term " installation ", " connected ", " connection ", " fixation " etc.
Term shall be understood in a broad sense, for example, it may be being fixedly connected, may be a detachable connection, or integral；It can be mechanical connect
It connects, is also possible to be electrically connected；It can be directly connected, can also can be in two elements indirectly connected through an intermediary
The interaction relationship of the connection in portion or two elements, unless otherwise restricted clearly.For those of ordinary skill in the art
For, the specific meanings of the above terms in the present invention can be understood according to specific conditions.
In the present invention unless specifically defined or limited otherwise, fisrt feature in the second feature " on " or " down " can be with
It is that the first and second features directly contact or the first and second features pass through intermediary mediate contact.Moreover, fisrt feature exists
Second feature " on ", " top " and " above " but fisrt feature be directly above or diagonally above the second feature, or be merely representative of
First feature horizontal height is higher than second feature.Fisrt feature can be under the second feature " below ", " below " and " below "
One feature is directly under or diagonally below the second feature, or is merely representative of first feature horizontal height less than second feature.
In the description of this specification, reference term " one embodiment ", " some embodiments ", " example ", " specifically show
The description of example " or " some examples " etc. means specific features, structure, material or spy described in conjunction with this embodiment or example
Point is included at least one embodiment or example of the invention.In the present specification, schematic expression of the above terms are not
It must be directed to identical embodiment or example.Moreover, particular features, structures, materials, or characteristics described can be in office
It can be combined in any suitable manner in one or more embodiment or examples.In addition, without conflicting with each other, the skill of this field
Art personnel can tie the feature of different embodiments or examples described in this specification and different embodiments or examples
It closes and combines.
Although the embodiments of the present invention has been shown and described above, it is to be understood that above-described embodiment is example
Property, it is not considered as limiting the invention, those skilled in the art within the scope of the invention can be to above-mentioned
Embodiment is changed, modifies, replacement and variant.
Claims (9)
1. a kind of low-dropout linear voltage-regulating circuit of no external capacitor characterized by comprising
The drain electrode of NMOS tube, the NMOS tube is connected with power supply, and the source electrode of the NMOS tube is as the low pressure difference linearity pressure stabilizing
The output end of circuit；
Shunt capacitance, one end of the shunt capacitance are connected with the grid of the NMOS tube and have first node, the bypass
The other end of capacitor is grounded；
Feed circuit, the first end of the feed circuit are connected with the source electrode of the NMOS tube, the second end of the feed circuit
Ground connection, the feed circuit include that the first feedback voltage output end and the second feedback voltage output end, the feed circuit are used for
The output voltage of the low-dropout linear voltage-regulating circuit is fed back defeated to pass through the first feedback voltage output end respectively
Out the first feedback voltage and by the second feedback voltage output end export the second feedback voltage；
Comparison circuit, the comparison circuit include first input end, the second input terminal, reference voltage end, the first output end and
Two output ends, the first input end of the comparison circuit are connected with the first feedback voltage output end, the comparison circuit
Second input terminal is connected with the second feedback voltage output end, and the comparison circuit is used for first feedback voltage and institute
The reference voltage for stating reference voltage end offer is compared to export the first comparison signal by first output end, and to institute
It states the second feedback voltage and is compared with the reference voltage that the reference voltage end provides to be exported by the second output terminal
Second comparison signal；
Charge-discharge circuit, the charge-discharge circuit respectively with the first node, the first output end of the comparison circuit and
Two output ends are connected, and the charge-discharge circuit is used for according to first comparison signal and second comparison signal to the side
Road capacitor carries out charge and discharge to adjust the gate drive voltage that the first node provides, by controlling to the NMOS tube
System is so that the output voltage of the low-dropout linear voltage-regulating circuit is maintained at predeterminated voltage section.
2. as described in claim 1 without the low-dropout linear voltage-regulating circuit of external capacitor, which is characterized in that the comparison circuit
Include:
First comparator, the first feedback voltage output end phase of the negative input end of the first comparator and the feed circuit
Even, the positive input terminal of the first comparator is connected with the reference voltage end, and the output end of the first comparator is as institute
State the first output end of comparison circuit；
Second comparator, the second feedback voltage output end phase of the positive input terminal and the feed circuit of second comparator
Even, the negative input end of second comparator is connected with the reference voltage end, and the output end of second comparator is as institute
State the second output terminal of comparison circuit.
3. as claimed in claim 2 without the low-dropout linear voltage-regulating circuit of external capacitor, which is characterized in that the charge and discharge electricity
Road includes:
First current source；
First switch, the control terminal of the first switch are connected with the output end of the first comparator, the first switch
One end is connected with first current source, and the other end of the first switch is connected with the first node；
Second switch, the control terminal of the second switch are connected with the output end of second comparator, the second switch
One end is connected with the other end of the first switch and the first node respectively；
One end of second current source, second current source is connected with the other end of the second switch, second current source
The other end ground connection.
4. as claimed in claim 3 without the low-dropout linear voltage-regulating circuit of external capacitor, which is characterized in that the charge and discharge electricity
Road further include:
Charge pump, the charge pump are connected with first current source, and the charge pump is by promoting filling for the shunt capacitance
Piezoelectric voltage is so that the gate drive voltage is greater than the voltage of the power supply.
5. as described in claim 1 without the low-dropout linear voltage-regulating circuit of external capacitor, which is characterized in that the feed circuit
Include:
First resistor, one end of the first resistor are connected with the source electrode of the NMOS tube；
Second resistance, one end of the second resistance are connected with the other end of the first resistor and have second node, wherein
The second node is the first feedback voltage output end of the feed circuit；
3rd resistor, one end of the 3rd resistor is connected with the other end of the second resistance and has third node, described
The other end of 3rd resistor is grounded, wherein the third node is the second feedback voltage output end of the feed circuit.
6. the low-dropout linear voltage-regulating circuit of no external capacitor according to any one of claims 1 to 5, which is characterized in that also
Include:
One end of third switch, the third switch is connected with the source electrode of the NMOS tube；
Third current source, the other end of one end of the third current source and third switch, the third current source it is another
One end ground connection；
Wherein, when load current mutates, the third disconnects again after closing the switch the first preset time, described to prevent
The output voltage of low-dropout linear voltage-regulating circuit follows mutation.
7. the low-dropout linear voltage-regulating circuit of no external capacitor according to any one of claims 1 to 5, which is characterized in that when
When load current becomes larger, the output voltage of the low-dropout linear voltage-regulating circuit becomes smaller, and first comparison signal is high level
Signal, second comparison signal are low level signal, and the charge-discharge circuit charges to improve to the shunt capacitance
The gate drive voltage, so that the output voltage of low-dropout linear voltage-regulating circuit becomes larger.
8. as claimed in claim 7 without the low-dropout linear voltage-regulating circuit of external capacitor, which is characterized in that when load current becomes
Hour, the output voltage of the low-dropout linear voltage-regulating circuit becomes larger, and first comparison signal is low level signal, and described the
Two comparison signals are high level signal, and the charge-discharge circuit discharges to the shunt capacitance to reduce the gate driving
Voltage, so that the output voltage of low-dropout linear voltage-regulating circuit becomes smaller.
9. as claimed in claim 3 without the low-dropout linear voltage-regulating circuit of external capacitor, which is characterized in that first electric current
Source is pull-up current source, and second current source is pull-down current source.
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| CN116382409A (en) * | 2023-06-06 | 2023-07-04 | 上海灵动微电子股份有限公司 | Linear voltage stabilizing circuit system and control method thereof |
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