CN111082764A - Single-ended input-to-differential output circuit - Google Patents
Single-ended input-to-differential output circuit Download PDFInfo
- Publication number
- CN111082764A CN111082764A CN201911323325.2A CN201911323325A CN111082764A CN 111082764 A CN111082764 A CN 111082764A CN 201911323325 A CN201911323325 A CN 201911323325A CN 111082764 A CN111082764 A CN 111082764A
- Authority
- CN
- China
- Prior art keywords
- operational amplifier
- resistor
- input
- differential output
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000000087 stabilizing effect Effects 0.000 claims abstract description 12
- 238000010586 diagram Methods 0.000 description 2
- 238000006243 chemical reaction Methods 0.000 description 1
- 238000004132 cross linking Methods 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03F—AMPLIFIERS
- H03F3/00—Amplifiers with only discharge tubes or only semiconductor devices as amplifying elements
- H03F3/45—Differential amplifiers
- H03F3/45071—Differential amplifiers with semiconductor devices only
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Amplifiers (AREA)
Abstract
The invention provides a single-ended input-to-differential output circuit, wherein a single-ended input voltage is connected with an input negative terminal of a first operational amplifier through a resistor R1, the input negative terminal of the first operational amplifier is simultaneously connected with an output terminal through a resistor R2, and the input positive terminal of the first operational amplifier is grounded through a resistor R3; the single-ended input voltage is simultaneously connected with the input positive terminal of the second operational amplifier through a resistor R6, the input positive terminal of the second operational amplifier is simultaneously grounded through a resistor R7, the input negative terminal of the second operational amplifier is simultaneously grounded through a resistor R4 and is simultaneously connected with the output terminal through a resistor R5; a voltage stabilizing diode is connected between the output end of the first operational amplifier and the output end of the second operational amplifier, and the output end of the second operational amplifier is a differential output positive end. The single-ended input signal can be converted into differential output voltage after passing through the circuit, and the circuit is simple in structure, low in fault probability and high in reliability.
Description
Technical Field
The invention belongs to the technical field of electronic circuits, and particularly relates to a single-ended input-to-differential output circuit.
Background
At present, a common circuit for converting single-ended input into differential output generally adopts a relatively complex circuit structure, at least two operational amplifiers are used for forming a two-stage circuit, and the cross-linking between operational amplifiers is relatively complex, or a special single-ended to differential conversion circuit chip is adopted for completing the function.
Disclosure of Invention
In view of the above-mentioned circumstances of the prior art, an object of the present invention is to provide a single-ended input to differential output circuit with simple circuit structure, low failure probability and high reliability.
The above object of the present invention is achieved by the following technical solutions:
a single-ended input-to-differential output circuit is disclosed, wherein a single-ended input voltage is connected with an input negative terminal of a first operational amplifier through a resistor R1, the input negative terminal of the first operational amplifier is simultaneously connected with an output terminal through a resistor R2, and the input positive terminal of the first operational amplifier is grounded through a resistor R3; the single-ended input voltage is simultaneously connected with the input positive terminal of the second operational amplifier through a resistor R6, the input positive terminal of the second operational amplifier is simultaneously grounded through a resistor R7, the input negative terminal of the second operational amplifier is simultaneously grounded through a resistor R4 and is simultaneously connected with the output terminal through a resistor R5; a voltage stabilizing diode is connected between the output end of the first operational amplifier and the output end of the second operational amplifier, the positive end of the voltage stabilizing diode is connected with the negative end of the differential output, the negative end of the voltage stabilizing diode is connected with the positive end of the differential output, the output end of the first operational amplifier is the negative end of the differential output, and the output end of the second operational amplifier is the positive end of the differential output.
Wherein the resistors R2 and R5 may be equal. The resistors R1 and R6 may be equal or unequal.
The voltage stabilizing diode can be selected according to the functional requirements of the circuit. The operational amplifier is a general operational amplifier.
The circuit in the invention has higher basic reliability, can complete functions by using a general operational amplifier, can adjust the circuit performance by adjusting the configuration of the resistor, and is simple and convenient to use.
Drawings
Fig. 1 is a schematic diagram of a single-ended input to differential output circuit of the present invention.
Detailed Description
For a clearer understanding of the objects, technical solutions and advantages of the present invention, the present invention will be described in further detail below with reference to the accompanying drawings and embodiments.
FIG. 1 is a schematic diagram of a single-ended input to differential output circuit of the present invention, as shown in FIG. 1, a (1-9) V single-ended input to (1-9) V differential output circuit is shown. The circuit consists of 2 operational amplifiers, 7 resistors and 1 voltage stabilizing diode, wherein:
the single-ended input voltage Vin is connected with the input negative terminal of an operational amplifier N1 through a resistor R1, the input negative terminal of the operational amplifier N1 is connected with the output terminal through a resistor R2, and the input positive terminal of the operational amplifier N1 is grounded through a resistor R3; the single-ended input voltage Vin is connected with the input positive terminal of an operational amplifier N2 through a resistor R6, the input positive terminal of the operational amplifier N2 is grounded through a resistor R7, the input negative terminal of the operational amplifier N2 is grounded through a resistor R4, and the input negative terminal of the operational amplifier N2 is connected with the output terminal through a resistor R5; a voltage stabilizing diode is connected between the output end of the operational amplifier N1 and the output end of the operational amplifier N2, the positive end of the voltage stabilizing diode is connected with the negative end of the differential output, the negative end of the voltage stabilizing diode is connected with the positive end of the differential output, the output end of the operational amplifier N1 is the negative end of the differential output, and the output end of the operational amplifier N2 is the positive end of the differential output.
The resistor R2 is equal to R5. The resistors R1 and R6 may be equal or unequal. R3, R4 and R7 are not particularly limited
Specifically, in the present embodiment, F1558 is selected as the operational amplifier; the resistance R1 ═ 20k Ω, R2 ═ R3 ═ R4 ═ R5 ═ R7 ═ 10k Ω, and R6 ═ 30k Ω; the zener diode V1 is BWB9V 1.
The single-ended input signal can be converted into differential output voltage after passing through the circuit, and the circuit is simple in structure, low in fault probability and high in reliability.
Claims (4)
1. A single-ended input-to-differential output circuit is disclosed, wherein a single-ended input voltage is connected with an input negative terminal of a first operational amplifier through a resistor R1, the input negative terminal of the first operational amplifier is simultaneously connected with an output terminal through a resistor R2, and the input positive terminal of the first operational amplifier is grounded through a resistor R3; the single-ended input voltage is simultaneously connected with the input positive terminal of the second operational amplifier through a resistor R6, the input positive terminal of the second operational amplifier is simultaneously grounded through a resistor R7, the input negative terminal of the second operational amplifier is simultaneously grounded through a resistor R4 and is simultaneously connected with the output terminal through a resistor R5; a voltage stabilizing diode is connected between the output end of the first operational amplifier and the output end of the second operational amplifier, the positive end of the voltage stabilizing diode is connected with the negative end of the differential output, the negative end of the voltage stabilizing diode is connected with the positive end of the differential output, the output end of the first operational amplifier is the negative end of the differential output, and the output end of the second operational amplifier is the positive end of the differential output.
2. The single-ended input to differential output circuit of claim 1, wherein the resistors R2 and R5 are equal.
3. The single-ended input to differential output circuit of claim 1, wherein the resistors R1 and R6 are equal.
4. The single-ended input to differential output circuit of claim 1, wherein the resistors R1 and R6 are not equal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911323325.2A CN111082764A (en) | 2019-12-19 | 2019-12-19 | Single-ended input-to-differential output circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911323325.2A CN111082764A (en) | 2019-12-19 | 2019-12-19 | Single-ended input-to-differential output circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN111082764A true CN111082764A (en) | 2020-04-28 |
Family
ID=70316149
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN201911323325.2A Pending CN111082764A (en) | 2019-12-19 | 2019-12-19 | Single-ended input-to-differential output circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN111082764A (en) |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201757867U (en) * | 2010-07-30 | 2011-03-09 | 安徽华东光电技术研究所 | High-power circuit with adjustable magnetic saturable transformer |
| CN104393760A (en) * | 2014-11-27 | 2015-03-04 | 中国兵器工业集团第二一四研究所苏州研发中心 | Positive-negative output low dropout adjusting circuit with short-circuit protection function |
| CN107769788A (en) * | 2017-12-07 | 2018-03-06 | 中国兵器装备集团自动化研究所 | A kind of multichannel DAC realizes circuit |
-
2019
- 2019-12-19 CN CN201911323325.2A patent/CN111082764A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN201757867U (en) * | 2010-07-30 | 2011-03-09 | 安徽华东光电技术研究所 | High-power circuit with adjustable magnetic saturable transformer |
| CN104393760A (en) * | 2014-11-27 | 2015-03-04 | 中国兵器工业集团第二一四研究所苏州研发中心 | Positive-negative output low dropout adjusting circuit with short-circuit protection function |
| CN107769788A (en) * | 2017-12-07 | 2018-03-06 | 中国兵器装备集团自动化研究所 | A kind of multichannel DAC realizes circuit |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| WO2021093467A1 (en) | Current detection circuit, chip, and current detection method used for speaker protection | |
| CN102045044B (en) | Comparator and A/D converter | |
| CN113054619A (en) | High-precision high-reliability undervoltage protection circuit for high-voltage gate driving chip | |
| CN109861761A (en) | A CMOS High-speed Optical Receiver Circuit Based on Peak Sampling | |
| CN110086487A (en) | A kind of broadband Larger Dynamic range logarithmic detector | |
| CN107623493A (en) | A high-efficiency high-fidelity envelope modulator | |
| CN115327213A (en) | Adjustable bidirectional overcurrent detection circuit | |
| CN108880484B (en) | Power amplifier bias circuit | |
| CN113110188B (en) | CAN bus receiving circuit | |
| CN111082764A (en) | Single-ended input-to-differential output circuit | |
| CN114697844A (en) | Microphone circuit, microphone module and microphone sound pressure overload point raising method | |
| CN104811181A (en) | Current-to-voltage conversion circuit with input bias and active power filtering effects and current-to-voltage conversion method | |
| CN108270456B (en) | Signal detector | |
| CN221078781U (en) | Voltage acquisition circuit | |
| CN108199700B (en) | A high precision comparator circuit | |
| CN214177282U (en) | Cross coupling comparator control circuit | |
| CN218416350U (en) | Circuit for converting double-end signal into single-end signal | |
| CN110739957B (en) | Single-ended to differential signal driving circuit | |
| CN210075196U (en) | A digital signal isolation transmission circuit based on capacitor and operational amplifier | |
| CN220084961U (en) | Voltage signal amplitude limiting judging device | |
| CN107202917A (en) | A kind of radio frequency power detector of inverse RSSI frameworks | |
| CN101938255B (en) | Low-power consumption true logarithmic amplifier | |
| CN111446946B (en) | A Low Noise Fully Differential Switched Capacitor Filter with Single-Ended Output | |
| CN222954014U (en) | Novel high-precision current-to-current isolation circuit | |
| CN211321322U (en) | An analog isolation circuit |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| PB01 | Publication | ||
| PB01 | Publication | ||
| SE01 | Entry into force of request for substantive examination | ||
| SE01 | Entry into force of request for substantive examination | ||
| RJ01 | Rejection of invention patent application after publication | ||
| RJ01 | Rejection of invention patent application after publication |
Application publication date: 20200428 |