CN111048028B

CN111048028B - Display device

Info

Publication number: CN111048028B
Application number: CN201911349285.9A
Authority: CN
Inventors: 刘方云
Original assignee: TCL Huaxing Photoelectric Technology Co Ltd
Current assignee: TCL Huaxing Photoelectric Technology Co Ltd
Priority date: 2019-12-24
Filing date: 2019-12-24
Publication date: 2022-08-05
Anticipated expiration: 2039-12-24
Also published as: CN111048028A

Abstract

The application provides a display device, comprising a detection circuit, a control circuit, a trigger circuit and a signal circuit, wherein the detection circuit is used for outputting a high-potential second control signal according to a high-potential starting signal and a low-potential first control signal in a first state, and outputting a low-potential second control signal according to the high-potential starting signal and the high-potential first control signal in a second state; the control circuit is used for outputting a high-potential third control signal according to a high-potential second control signal in a first state and stopping working according to a low-potential second control signal in a second state; the trigger circuit is used for outputting a first control signal with high potential under the trigger of a third control signal with high potential in a first state and stopping working in a second state; the signal circuit is used for outputting a driving signal according to a first control signal with high potential. By stopping the control circuit and the trigger circuit in the second state, the quiescent current of the control circuit and the trigger circuit can be cut off, and the temperature can be reduced.

Description

Display device

Technical Field

The application relates to the technical field of display, in particular to a display device.

Background

As shown in fig. 1, a circuit in a power supply IC of a conventional display device includes a control circuit 101, a D flip-flop 102, and a signal circuit 103. Two input ends of the control circuit 101 are respectively connected to a PS _ ON signal and a pulse width modulation signal PWM, an output end of the control circuit 101 is connected with a D end of the D trigger 102, a CP end of the D trigger 102 is used for inputting a clock pulse signal, a CLR end is used for inputting a PS _ ON signal, and a Q end is connected with an input end of the signal circuit 103. After all power parts of the display device are started, the PS _ ON signal changes from low level 0 to high level 1, so that the control circuit 101 starts to operate, the D terminal of the D flip-flop 102 inputs high level 1, when the CP terminal of the D flip-flop 102 is pulsed, the Q terminal is turned high, that is, the Q terminal outputs high level 1, so that the signal circuit 103 starts to operate, the GOA signal is output, and the power supply IC starts to operate normally.

However, after the power IC normally operates, the PS _ ON signal is always at a high level, and the control circuit 101 and the D flip-flop 102 are always in an operating state, so that the quiescent current of the power IC increases, the power consumption increases, the temperature also increases, and the power is easily burned.

Therefore, the existing display device has the technical problem of overhigh working temperature, and needs to be improved.

Disclosure of Invention

The application provides a display device to alleviate the too high technical problem of operating temperature among the current display device.

In order to solve the above problems, the technical solution provided by the present application is as follows:

the application provides a display device, including:

the detection circuit is used for outputting a second control signal with high potential according to a starting signal with high potential and a first control signal with low potential in a first state, and outputting a second control signal with low potential according to the starting signal with high potential and the first control signal with high potential in a second state;

the control circuit is connected with the detection circuit and used for outputting a third control signal with high potential according to the second control signal with high potential in a first state and stopping working according to the second control signal with low potential in a second state;

the trigger circuit is connected with the control circuit and the detection circuit and is used for outputting a first control signal with high potential under the trigger of a third control signal with high potential in a first state and stopping working in a second state;

and the signal circuit is connected with the trigger circuit and is used for outputting a driving signal according to the first control signal of the high potential.

In the display device of this application, the first input of detection circuit with start signal connects, detection circuit's output with control circuit's input is connected, control circuit's output with trigger circuit's first input is connected, trigger circuit's second input and clock pulse signal connection, trigger circuit's output with detection circuit's second input with signal circuit's input is connected, signal circuit's output with drive signal connects.

In the display device of the application, the detection circuit comprises a first module, a second module, a third module and a fourth module, the input end of the first module and the first input end of the second module are connected with the starting signal, the second input end of the second module is connected with the output end of the first module, the output end of the second module is connected with the first input end of the third module, the input end of the fourth module is connected with the first control signal, the output end of the fourth module is connected with the second input end of the third module, and the output end of the third module is connected with the control circuit.

In the display device of the application, the detection circuit further comprises a first anti-shaking module, an input end of the first anti-shaking module is connected with the starting signal, and an output end of the first anti-shaking module is connected with an input end of the first module.

In the display device of the application, the detection circuit further comprises a second anti-shaking module, wherein the input end of the second anti-shaking module is connected with the first control signal, and the output end of the second anti-shaking module is connected with the input end of the fourth module.

In the display device of the present application, the first module is a not gate.

In the display device of the application, the second module is an RS trigger, the first input end of the second module is an R end, the second input end is an S end, and the output end is a Q end.

In the display device of the present application, the third module is an and gate.

In the display device of the present application, the fourth module is a not gate.

In the display device of the application, the trigger circuit is a D-type flip-flop, the first input end of the trigger circuit is a D terminal, the second input end of the trigger circuit is a CP terminal, and the output end of the trigger circuit is a Q terminal.

The beneficial effect of this application: the application provides a display device, comprising a detection circuit, a control circuit, a trigger circuit and a signal circuit, wherein the detection circuit is used for outputting a second control signal of high potential according to a starting signal of high potential and a first control signal of low potential in a first state, and outputting a second control signal of low potential according to the starting signal of high potential and the first control signal of high potential in a second state; the control circuit is connected with the detection circuit and used for outputting a third control signal with high potential according to the second control signal with high potential in the first state and stopping working according to the second control signal with low potential in the second state; the trigger circuit is connected with the control circuit and the detection circuit and is used for outputting a first control signal with high potential under the trigger of a third control signal with high potential in a first state and stopping working in a second state; the signal circuit is connected with the trigger circuit and used for outputting a driving signal according to a first control signal of high potential. This application is through setting up the detection circuit, and when the first state, the second control signal of output high potential makes control circuit and trigger circuit normally work, and when the second state, the second control signal of output low potential makes control circuit and trigger circuit stop work, consequently can turn off control circuit and trigger circuit's quiescent current, has reduced power chip's consumption for its efficiency improves, and the temperature drops.

Drawings

The technical solution and other advantages of the present application will become apparent from the detailed description of the embodiments of the present application with reference to the accompanying drawings.

Fig. 1 is a schematic structural diagram of a display device in the prior art.

Fig. 2 is a schematic view of a first structure of a display device according to an embodiment of the present disclosure.

Fig. 3 is a schematic view of a second structure of a display device according to an embodiment of the present disclosure.

Fig. 4 is a schematic structural diagram of a third display device according to an embodiment of the present application.

Fig. 5 is a truth table for RS flip-flops.

Detailed Description

The technical solutions in the embodiments of the present application will be clearly and completely described below with reference to the drawings in the embodiments of the present application. It is to be understood that the embodiments described are only a few embodiments of the present application and not all embodiments. All other embodiments, which can be derived by a person skilled in the art from the embodiments given herein without making any creative effort, shall fall within the protection scope of the present application.

In the description of the present application, it is to be understood that the terms "center," "longitudinal," "lateral," "length," "width," "thickness," "upper," "lower," "front," "rear," "left," "right," "vertical," "horizontal," "top," "bottom," "inner," "outer," "clockwise," "counterclockwise," and the like are used in the orientations and positional relationships indicated in the drawings for convenience in describing the present application and for simplicity in description, and are not intended to indicate or imply that the referenced devices or elements must have a particular orientation, be constructed in a particular orientation, and be operated in a particular manner, and are not to be construed as limiting the present application. Furthermore, the terms "first", "second" and "first" are used for descriptive purposes only and are not to be construed as indicating or implying relative importance or implicitly indicating the number of technical features indicated. Thus, features defined as "first" and "second" may explicitly or implicitly include one or more of the described features. In the description of the present application, "a plurality" means two or more unless specifically limited otherwise.

In the description of the present application, it is to be noted that, unless otherwise explicitly specified or limited, the terms "mounted," "connected," and "connected" are to be construed broadly, e.g., as meaning either a fixed connection, a removable connection, or an integral connection; may be mechanically connected, may be electrically connected or may be in communication with each other; either directly or indirectly through intervening media, either internally or in any other relationship. The specific meaning of the above terms in the present application can be understood by those of ordinary skill in the art as appropriate.

In this application, unless expressly stated or limited otherwise, the first feature "on" or "under" the second feature may comprise direct contact of the first and second features, or may comprise contact of the first and second features not directly but through another feature in between. Also, the first feature being "on," "above" and "over" the second feature includes the first feature being directly on and obliquely above the second feature, or merely indicating that the first feature is at a higher level than the second feature. A first feature being "under," "below," and "beneath" a second feature includes the first feature being directly under and obliquely below the second feature, or simply meaning that the first feature is at a lesser elevation than the second feature.

The following disclosure provides many different embodiments or examples for implementing different features of the application. To simplify the disclosure of the present application, specific example components and arrangements are described below. Of course, they are merely examples and are not intended to limit the present application. Moreover, the present application may repeat reference numerals and/or letters in the various examples, such repetition is for the purpose of simplicity and clarity and does not in itself dictate a relationship between the various embodiments and/or configurations discussed. In addition, examples of various specific processes and materials are provided herein, but one of ordinary skill in the art may recognize applications of other processes and/or use of other materials.

Fig. 2 is a schematic view of a first structure of a display device according to an embodiment of the present disclosure. The display device includes a detection circuit 201, a control circuit 202, a trigger circuit 203, and a signal circuit 204. The detection circuit 201 is configured to output a high-level second control signal according to the high-level power-ON signal PS _ ON and the low-level first control signal in a first state, and output a low-level second control signal according to the high-level power-ON signal PS _ ON and the high-level first control signal in a second state; the control circuit 202 is connected to the detection circuit 201, and is configured to output a high-level third control signal according to a high-level second control signal in a first state, and stop operating according to a low-level second control signal in a second state; the trigger circuit 203 is connected with the control circuit 202 and the detection circuit 201, and is used for outputting a first control signal with a high potential under the trigger of a third control signal with a high potential in a first state and stopping working in a second state; the signal circuit 204 is connected to the flip-flop circuit 203, and outputs a drive signal in accordance with a first control signal of a high potential.

In this application, the first state refers to a state after all power parts in the display device are completely activated, and the second state refers to a state after the power supply IC starts operating.

Before entering the first state, the control circuit 202 and the trigger circuit 203 are not operated, the trigger circuit 203, the signal circuit 204, and the detection circuit 201 are connected to a node F, the potential of the node F is equal to the potential of the first control signal, and the initial value is a low potential 0. In the first state, the power IC needs to start to operate, so the power-ON signal PS _ ON changes from low potential 0 to high potential 1, at this time, under the control of the high-potential power-ON signal PS _ ON, the control circuit 202 and the trigger circuit 203 finally output the first control signal with high potential, that is, the potential of the node F is high potential 1, the signal circuit 204 outputs the driving signal, that is, the GOA signal, and the power IC is driven to start to operate and enter the second state. In the second state, the power-ON signal PS _ ON keeps at the high potential 1, and the first control signal changes from the low potential to the high potential 1, at this time, the detection circuit 201 outputs the second control signal at the low potential under the combined action of the power-ON signal PS _ ON at the high potential and the first control signal at the high potential, so that the control circuit 202 and the trigger circuit 203 stop operating.

By arranging the detection circuit 201, in the first working state, the power supply IC needs to start working, so the detection circuit 201 outputs a second control signal with a high potential to enable the control circuit 202 and the trigger circuit 203 to work normally, and in the second working state, the power supply IC already works normally and does not need the control circuit 202 and the trigger circuit 203 to work any more, so the detection circuit 201 outputs the second control signal with a low potential to enable the control circuit 202 and the trigger circuit 203 to stop working, so that the quiescent current of the control circuit 202 and the trigger circuit 203 can be turned off, the power consumption of the power supply IC is reduced, the efficiency of the power supply IC is improved, the temperature is reduced, and the risk that the temperature caused by the power supply IC exceeds the standard when the load is large is reduced.

Fig. 2 shows the connection of the circuits, a first input terminal of the detection circuit 201 is connected to the power-ON signal PS _ ON, an output terminal of the detection circuit 201 is connected to an input terminal of the control circuit 202, an output terminal of the control circuit 202 is connected to a first input terminal of the trigger circuit 203, a second input terminal of the trigger circuit 203 is connected to the clock signal, an output terminal of the trigger circuit 203 is connected to a second input terminal of the detection circuit 201 and an input terminal of the signal circuit 204, and an output terminal of the signal circuit 204 is connected to the driving signal.

The detecting circuit 201 outputs a high-level second control signal and a low-level second control signal to the first input terminal of the control circuit 202 in the first state and the second state, respectively, the second input terminal of the control circuit 202 inputs the pulse width modulation signal PWM, and under the combined action of the second control signal and the pulse width modulation signal PWM, the detecting circuit outputs a high-level third control signal in the first state and stops working in the second state.

In one embodiment, the flip-flop circuit 203 is a D-flip-flop, the first input terminal of the flip-flop circuit 203 is a D terminal, the second input terminal of the flip-flop circuit 203 is a CP terminal, and the output terminal of the flip-flop circuit 203 is a Q terminal. The CP terminal of the D flip-flop receives the clock signal, and when the clock signal is at a low potential of 0, the D flip-flop is disabled, the third control signal input to the D terminal by the control circuit 202 does not function, and when the clock signal is at a high potential of 1, the output state of the D flip-flop is determined according to the level of the D input signal. The D flip-flop further includes a third input terminal CLR terminal, which is also connected to the power-ON signal PS _ ON, and is used for clearing residual errors in the trigger circuit 203.

In the first state, the D terminal receives the third control signal with high potential, and when the clock signal is high potential 1, the Q terminal is turned high, so that the Q terminal outputs the first control signal with high potential to the detection circuit 201 and the signal circuit 204, so that the signal circuit 204 outputs the driving signal to drive the power supply IC to operate.

Fig. 3 shows a specific structure of the detection circuit 201. The detecting circuit 201 includes a first module 2011, a second module 2012, a third module 2013 and a fourth module 2014, an input end of the first module 2011 and a first input end of the second module 2012 are connected to the power-ON signal PS _ ON, a second input end of the second module 2012 is connected to an output end of the first module 2011, an output end of the second module 2012 is connected to a first input end of the third module 2013, an input end of the fourth module 2014 is connected to the first control signal, an output end of the fourth module 2014 is connected to a second input end of the third module 2013, and an output end of the third module 2013 is connected to the control circuit 202.

As shown in fig. 4, the first module 2011 is an inverter, the second module is an RS flip-flop, the first input end of the second module is an R end, the second input end of the second module is an S end, the output end of the second module is a Q end, the third module 2013 is an and gate, and the fourth module 2014 is an inverter.

In the initial state, the potential at the point F is low potential 0, in the first state, the power-ON signal PS _ ON is high potential 1, and the output value of the high power-ON signal PS _ ON is low potential 0 after passing through the first module 2011, i.e., after being gated, therefore, in the second module 2012, the R end of the RS flip-flop receives high potential 1, and the S end receives low potential 0.

As shown in fig. 5, is a truth table for RS flip-flops. When S inputs 0 and R inputs 1, the Q end outputs 1, and the RS trigger is reset at the moment; when the S inputs 1 and the R inputs 0, the Q end outputs 0, and the RS trigger is set at the moment; when S inputs 0 and R inputs 0, Q outputs 0; when S is input to 1 and R is input to 1, the circuit state is kept unchanged.

From the truth table, in the first state, the Q terminal outputs a high 1 in the second block 2012. Meanwhile, since the fourth module 2014 is not gate and the point F is low 0, the high 1 is outputted after passing through the not gate, i.e. the point D is high.

Two input ends of the third module 2013 are respectively connected to the Q end and the D point in the second module 2012, a high potential of the Q end in the second module 2012 and a high potential output by the not gate in the fourth module 2014 are both input into the third module 2013, and because the third module 2013 is an and gate, the output end E of the and gate also outputs a second control signal of the high potential.

The second control signal with high potential controls the control circuit 202 to output the third control signal with high potential, the third control signal with high potential controls the trigger circuit 203 to output the first control signal with high potential, the signal circuit 204 outputs the driving signal under the action of the first control signal with high potential, the driving power supply IC is driven to work, meanwhile, the potential of the point F is changed from the initial low potential 0 to the high potential 1, and the display device enters the second state.

In the second state, the power-ON signal PS _ ON remains high 1, so that the signal input to the first input terminal of the and gate in the third module 2013 is still high after passing through the first module 2011 and the second module 2012. The potential at the point F changes to high, and after passing through the not gate of the fourth block 2014, the potential output to the point D is low 0, so the second control signal output by the and gate of the third block 2013 is low. The second control signal with a low voltage level is input to the control circuit 202, so that the control circuit 202 stops operating, and the trigger circuit 203 also stops operating.

In an embodiment, the detecting circuit 201 further includes a first anti-jitter module 2015 and a second anti-jitter module 2016, an input end of the first anti-jitter module 2015 is connected to the power-ON signal PS _ ON, an output end of the first anti-jitter module 2015 is connected to an input end of the first module 2011, an input end of the second anti-jitter module 2016 is connected to the first control signal, and an output end of the second anti-jitter module 2016 is connected to an input end of the fourth module 2014.

By arranging the first anti-jitter module 2015, when a signal PS _ ON with a narrow pulse width is input to the input end of the first anti-jitter module 2015, the output signal is not affected, and only when the pulse width of the PS _ ON is sufficient to complete the process of switching the high level to the low level of the first module 2011, the PS _ ON will affect the output signal, in other words, a signal with a short period, i.e., a higher frequency signal cannot pass through the first anti-jitter module 2015, and only a signal with a lower frequency can pass through the first anti-jitter module 2015, so that the first module 2011 completes the switching of the high level and the low level, thereby achieving the effect of preventing false detection.

Similarly, by providing the second anti-jitter module 2016, when the input end of the second anti-jitter module 2016 inputs a first control signal with a narrow pulse width, the output signal is not affected, and only when the pulse width of the first control signal is sufficient to complete the process of inverting the high level to the low level of the fourth module 2014, the first control signal will affect the output signal, in other words, the signal with a short period, i.e., the signal with a higher frequency cannot pass through the second anti-jitter module 2016, and only the signal with a lower frequency can pass through the second anti-jitter module 2016, so that the fourth module 2014 completes the transition of the high level and the low level, thereby achieving the effect of preventing the misdetection.

According to the above embodiments:

the application provides a display device, comprising a detection circuit, a control circuit, a trigger circuit and a signal circuit, wherein the detection circuit is used for outputting a second control signal of high potential according to a starting signal of high potential and a first control signal of low potential in a first state, and outputting a second control signal of low potential according to the starting signal of high potential and the first control signal of high potential in a second state; the control circuit is connected with the detection circuit and used for outputting a third control signal with high potential according to the second control signal with high potential in the first state and stopping working according to the second control signal with low potential in the second state; the trigger circuit is connected with the control circuit and the detection circuit and is used for outputting a first control signal with high potential under the trigger of a third control signal with high potential in a first state and stopping working in a second state; the signal circuit is connected with the trigger circuit and used for outputting a driving signal according to a first control signal of high potential. This application is through setting up the detection circuit, and when the first state, the second control signal of output high potential makes control circuit and trigger circuit normally work, and when the second state, the second control signal of output low potential makes control circuit and trigger circuit stop work, consequently can turn off control circuit and trigger circuit's quiescent current, has reduced power chip's consumption for its efficiency improves, and the temperature drops.

In summary, although the present application has been described with reference to the preferred embodiments, the above-described preferred embodiments are not intended to limit the present application, and those skilled in the art can make various changes and modifications without departing from the spirit and scope of the present application, so that the scope of the present application shall be determined by the appended claims.

Claims

1. A display device, comprising:

the signal circuit is connected with the trigger circuit and used for outputting a driving signal according to the first control signal of the high potential;

the first input end of the detection circuit is connected with the starting signal, the output end of the detection circuit is connected with the input end of the control circuit, the output end of the control circuit is connected with the first input end of the trigger circuit, the second input end of the trigger circuit is connected with a clock pulse signal, the output end of the trigger circuit is connected with the second input end of the detection circuit and the input end of the signal circuit, and the output end of the signal circuit is connected with the driving signal;

the detection circuit comprises a first module, a second module, a third module and a fourth module, wherein the input end of the first module and the first input end of the second module are connected with the starting signal, the second input end of the second module is connected with the output end of the first module, the output end of the second module is connected with the first input end of the third module, the input end of the fourth module is connected with the first control signal, the output end of the fourth module is connected with the second input end of the third module, and the output end of the third module is connected with the control circuit.

2. The display device of claim 1, wherein the first module is a not gate.

3. The display device as claimed in claim 2, wherein the second module is an RS flip-flop, and the first input terminal of the second module is an R terminal, the second input terminal is an S terminal, and the output terminal is a Q terminal.

4. The display device of claim 3, wherein the third module is an AND gate.

5. The display device of claim 4, wherein the fourth module is a NOT gate.

6. The display device as claimed in claim 1, wherein the detecting circuit further comprises a first anti-shaking module, an input terminal of the first anti-shaking module is connected to the power-on signal, and an output terminal of the first anti-shaking module is connected to the input terminal of the first module.

7. The display device as claimed in claim 1, wherein the detection circuit further comprises a second anti-shaking module, an input terminal of the second anti-shaking module is connected to the first control signal, and an output terminal of the second anti-shaking module is connected to an input terminal of the fourth module.

8. The display device according to claim 1, wherein the flip-flop circuit is a D-flip-flop, the first input terminal of the flip-flop circuit is a D terminal, the second input terminal of the flip-flop circuit is a CP terminal, and the output terminal of the flip-flop circuit is a Q terminal.