CN220896526U - Drive delay opening protection circuit - Google Patents
Drive delay opening protection circuit Download PDFInfo
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- CN220896526U CN220896526U CN202322652693.XU CN202322652693U CN220896526U CN 220896526 U CN220896526 U CN 220896526U CN 202322652693 U CN202322652693 U CN 202322652693U CN 220896526 U CN220896526 U CN 220896526U
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- 239000003990 capacitor Substances 0.000 claims abstract description 29
- 230000002401 inhibitory effect Effects 0.000 claims abstract description 3
- 230000002457 bidirectional effect Effects 0.000 claims description 3
- 238000000034 method Methods 0.000 abstract description 6
- 238000010586 diagram Methods 0.000 description 2
- 238000013073 enabling process Methods 0.000 description 2
- 230000004075 alteration Effects 0.000 description 1
- 230000009286 beneficial effect Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- 230000003111 delayed effect Effects 0.000 description 1
- 230000005764 inhibitory process Effects 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 230000000630 rising effect Effects 0.000 description 1
- 238000006467 substitution reaction Methods 0.000 description 1
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Abstract
The utility model discloses a driving delay starting protection circuit, which comprises a driving circuit for receiving a DSP driving signal, wherein one end of the driving circuit is connected with a delay circuit capable of inhibiting an interference signal, the delay circuit comprises a capacitor C69, a capacitor C61 and a resistor R204, the resistor R204 is connected with the capacitor C69 in parallel, one connecting end of the capacitor C69 and the resistor R204 is connected with a resistor R140, one end of the resistor R140 is connected with one end of the capacitor C61, and the other connecting end of the capacitor C69 and the resistor R204 is connected with the other end of the capacitor C61; according to the utility model, through the cooperation of the driving circuit and the delay circuit, when the initial voltage of the power supply of the equipment is not stabilized, the pull-up voltage of the driving circuit is properly reduced through the capacitor C69 and the resistor R204, so that the pull-up process curve is slow when the voltage is established, and at the moment, the signal generated by the front DSP is not effective, so that the driving circuit forms a delay starting state, and the damage phenomenon of the switching tube at the initial stage of power-on is effectively reduced.
Description
Technical Field
The utility model relates to the technical field of UPS driving circuits, in particular to a driving delay start protection circuit.
Background
UPS power supplies are used to provide power protection and backup power to prevent power interruption or fluctuations from damaging electronic devices, and in existing UPS designs, the drive circuits are almost indistinct, whether AC-DC, DC-AC conversion, the most critical factor, or DSP drive control. Because the signal generated by the DSP is weak and cannot directly drive and control the switching tube, the switching needs to be performed through a driving IC, and most driving ICs usually need to enable the enabling pin to work.
However, at present, the probability of the DSP in the initial power-on stage generates pulse or level signals, and the probability of the power-on enabling process of the driving chip generates level or pulse interference, so that the driving IC generates driving signals to cause the conduction damage of the switching tube, and when the DSP reopens the driving signals, the probability of the DSP generates unclean large pulse width driving signals, and the switching tube in the initial state cannot bear the damage; when the power-off is performed, the interference signals sent out by the DSP pins in a disordered way cannot be suppressed, so that the accuracy of the driving signals is affected, and therefore, a driving delay start-up protection circuit is required to be provided for solving the problems.
Disclosure of utility model
The utility model aims to provide a driving delay starting protection circuit, which effectively reduces the damage phenomenon of a switching tube in the initial stage of power-up through the cooperation of a driving circuit and a delay circuit so as to solve the problems in the background technology.
In order to achieve the above purpose, the present utility model provides the following technical solutions: the utility model provides a protection circuit is opened in drive time delay, includes the drive circuit who receives DSP drive signal, drive circuit's one end is connected with the time delay circuit that can restrain interference signal, time delay circuit includes electric capacity C69, electric capacity C61 and resistance R204, resistance R204 is parallelly connected with electric capacity C69, electric capacity C69 is connected with resistance R140 with one of them link of resistance R204, one end of resistance R140 is connected with one end of electric capacity C61, another link of electric capacity C69 and resistance R204 is connected at the other end of electric capacity C61, one of them link of electric capacity C69 and resistance R204 is connected with drive circuit.
Preferably, the driving circuit comprises a driving chip U7 with the model number FAN3223, the six pins of the driving chip U7 are connected with 12V voltage, the three pins of the driving chip U7 are grounded, one pin of the driving chip U7 is connected with the eight pins, and one pin of the driving chip U7 is connected with the protection circuit.
Preferably, the protection circuit includes a triode Q21, a base electrode of the triode Q21 is connected with a resistor R205 and a resistor R206 respectively, one end of the resistor R206 is connected with an emitter electrode of the triode Q21, one end of the resistor R205 is provided with a DCRLY connection end, and a collector electrode of the triode Q21 is connected with a pin of the driving chip U7.
Preferably, the driving circuit further includes a diode D19 and a diode D26, the diode D19 is connected in parallel with the diode D26, the diode D19 is connected to seven pins of the driving chip U7, and the diode D26 is connected to five pins of the driving chip U7.
Preferably, the driving circuit further comprises a resistor R145 and a resistor R146, the resistor R145 is connected in parallel with the resistor R146, the connection end of the resistor R145 and the resistor R146 is connected with 12V voltage, the other end of the resistor R145 is connected with two pins of the driving chip U7, and the other end of the resistor R146 is connected with four pins of the driving chip U7.
Preferably, the diode D19 and the diode D26 are both bidirectional rectifying diodes, and the other connection terminal of the diode D19 and the diode D26 is grounded.
Compared with the prior art, the utility model has the beneficial effects that:
1. According to the utility model, through the cooperation of the driving circuit and the delay circuit, when the initial voltage of the power supply of the equipment is not stabilized, the pull-up voltage of the driving circuit is properly reduced through the capacitor C69 and the resistor R204, so that the pull-up process curve is slow when the voltage is established, and at the moment, the signal generated by the front DSP is not effective, so that the driving circuit forms a delay starting state, and the damage phenomenon of the switching tube at the initial stage of power-on is effectively reduced.
2. According to the utility model, through the cooperation of the protection circuit and the delay circuit, the interference signals generated by the confusion of the DSP pins during shutdown can be effectively inhibited, the protection of the driving circuit is realized, and the accuracy of the driving signals is improved to a certain extent.
Drawings
FIG. 1 is a circuit diagram of the present utility model;
fig. 2 is a circuit diagram of the protection circuit of the present utility model.
Detailed Description
The following description of the embodiments of the present utility model will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present utility model, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the utility model without making any inventive effort, are intended to be within the scope of the utility model.
Referring to fig. 1-2, the present utility model provides a technical solution: the driving delay starting protection circuit comprises a driving circuit for receiving a DSP driving signal, wherein one end of the driving circuit is connected with a delay circuit capable of inhibiting an interference signal, the delay circuit comprises a capacitor C69, a capacitor C61 and a resistor R204, the resistor R204 is connected with the capacitor C69 in parallel, one connecting end of the capacitor C69 and one connecting end of the resistor R204 are connected with a resistor R140, one end of the resistor R140 is connected with one end of the capacitor C61, the other connecting end of the capacitor C69 and the other connecting end of the resistor R204 are connected with the other end of the capacitor C61, and one connecting end of the capacitor C69 and one connecting end of the resistor R204 are connected with the driving circuit;
Through the cooperation of the driving circuit and the delay circuit, when the initial voltage of the power supply establishment of the equipment is not stable, the pull-up voltage of the driving circuit is properly reduced through the capacitor C69 and the resistor R204, so that the pull-up process curve in voltage establishment is slow, at the moment, the signal generated by the front DSP does not act, the driving circuit forms a delay starting state, and the damage phenomenon of the switching tube in the initial power-on stage is effectively reduced.
The driving circuit comprises a driving chip U7 with the model number FAN3223, six pins of the driving chip U7 are connected with 12V voltage, three pins of the driving chip U7 are grounded, one pin of the driving chip U7 is connected with eight pins, and a pin of the driving chip U7 is connected with a protection circuit.
The driving circuit further comprises a diode D19 and a diode D26, the diode D19 is connected with the diode D26 in parallel, the diode D19 is connected to seven pins of the driving chip U7, and the diode D26 is connected to five pins of the driving chip U7.
The driving circuit further comprises a resistor R145 and a resistor R146, the resistor R145 is connected with the resistor R146 in parallel, the connecting end of the resistor R145 and the resistor R146 is connected with 12V voltage, the other end of the resistor R145 is connected with two pins of the driving chip U7, and the other end of the resistor R146 is connected with four pins of the driving chip U7.
The diode D19 and the diode D26 are both arranged as bidirectional rectifying diodes, and the other connection end of the diode D19 and the diode D26 is grounded.
In the prior art: when the initial voltage of the power supply of the equipment is not stabilized, the DSP generates a last reserved signal, and a pulse signal generated by the unstable enabling process of the driving chip causes the switching tube to be conducted, short-circuited and damaged.
To solve this problem, in the present application, since a sufficient pull-up voltage is required when the driver chip U7 is to operate, it is in a locked state when it is pulled down to GND, and the driver chip U7 is not operated. 2 capacitors C69 and C61 are added in the two enabling pin pull-up circuits, the capacitance values are 1uF and 0.1uF, the capacitors are charged firstly when a power supply is established, a curve is formed in the pull-up process, the driving chip U7 works when the operable voltage of the driving chip U7 is reached, but the 12V voltage is higher, the voltage rising curve is faster and does not meet the ideal requirement, a 10K resistor R204 is connected in parallel to the capacitor C69, the pull-up voltage is properly reduced, the pull-up process curve is slower when the voltage is established, the signal generated by the front-stage DSP does not work at the moment, and the driving chip U7 is a stable starting process, so that a delay starting state is formed.
The protection circuit comprises a triode Q21, wherein a base electrode of the triode Q21 is respectively connected with a resistor R205 and a resistor R206, one end of the resistor R206 is connected with an emitter electrode of the triode Q21, one end of the resistor R205 is provided with a DCRLY connecting end, and a collector electrode of the triode Q21 is connected with one pin of a driving chip U7.
In the prior art, when the DSP restarts the driving signal, the last driving pulse width may be reserved, and when the power is lost, the pins are disordered to generate interference signals, so that the driving chip in normal operation has no delay and inhibition capability.
In order to solve the problem, a triode Q21 is connected to an enabling pin of a driving chip U7, the enabling pin is pulled down to GND when a signal is conducted to the triode, the driving chip U7 does not work, the triode is conducted when the DSP does not use the driving chip U7, the triode is disconnected when the driving is required to be started, the delayed starting is realized again through the actions of C69 and C61, the interference signal can be effectively restrained from being sent out by the confusion of the DSP pin when the power is off, the protection of a driving circuit is realized, and the accuracy of the driving signal is improved to a certain extent.
Although embodiments of the present utility model have been shown and described, it will be understood by those skilled in the art that various changes, modifications, substitutions and alterations can be made therein without departing from the principles and spirit of the utility model, the scope of which is defined in the appended claims and their equivalents.
Claims (6)
1. The utility model provides a drive delay opens protection circuit, includes the drive circuit who receives DSP drive signal, its characterized in that: one end of the driving circuit is connected with a delay circuit capable of inhibiting interference signals, the delay circuit comprises a capacitor C69, a capacitor C61 and a resistor R204, the resistor R204 is connected with the capacitor C69 in parallel, one connecting end of the capacitor C69 and one connecting end of the resistor R204 are connected with a resistor R140, one end of the resistor R140 is connected with one end of the capacitor C61, the other connecting end of the capacitor C69 and the other connecting end of the resistor R204 are connected with the other end of the capacitor C61, and one connecting end of the capacitor C69 and the resistor R204 is connected with the driving circuit.
2. The drive delay-on protection circuit of claim 1, wherein: the driving circuit comprises a driving chip U7 with the model number FAN3223, six pins of the driving chip U7 are connected with 12V voltage, three pins of the driving chip U7 are grounded, one pin of the driving chip U7 is connected with eight pins, and a pin of the driving chip U7 is connected with a protection circuit.
3. The drive delay-on protection circuit of claim 2, wherein: the protection circuit comprises a triode Q21, wherein a base electrode of the triode Q21 is respectively connected with a resistor R205 and a resistor R206, one end of the resistor R206 is connected with an emitter electrode of the triode Q21, one end of the resistor R205 is provided with a DCRLY connecting end, and a collector electrode of the triode Q21 is connected with one pin of a driving chip U7.
4. A drive delay on protection circuit as recited in claim 3, wherein: the driving circuit further comprises a diode D19 and a diode D26, the diode D19 is connected with the diode D26 in parallel, the diode D19 is connected to seven pins of the driving chip U7, and the diode D26 is connected to five pins of the driving chip U7.
5. The drive delay on protection circuit of claim 4, wherein: the driving circuit further comprises a resistor R145 and a resistor R146, the resistor R145 is connected with the resistor R146 in parallel, the connecting end of the resistor R145 and the resistor R146 is connected with 12V voltage, the other end of the resistor R145 is connected with two pins of the driving chip U7, and the other end of the resistor R146 is connected with four pins of the driving chip U7.
6. The drive delay on protection circuit of claim 5, wherein: the diode D19 and the diode D26 are both arranged as bidirectional rectifying diodes, and the other connection end of the diode D19 and the diode D26 is grounded.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322652693.XU CN220896526U (en) | 2023-09-28 | 2023-09-28 | Drive delay opening protection circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202322652693.XU CN220896526U (en) | 2023-09-28 | 2023-09-28 | Drive delay opening protection circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN220896526U true CN220896526U (en) | 2024-05-03 |
Family
ID=90840547
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202322652693.XU Active CN220896526U (en) | 2023-09-28 | 2023-09-28 | Drive delay opening protection circuit |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN220896526U (en) |
-
2023
- 2023-09-28 CN CN202322652693.XU patent/CN220896526U/en active Active
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