CN111010815A - Semiconductor chip embedded circuit board and processing method and processing device thereof - Google Patents
Semiconductor chip embedded circuit board and processing method and processing device thereof Download PDFInfo
- Publication number
- CN111010815A CN111010815A CN201911382066.0A CN201911382066A CN111010815A CN 111010815 A CN111010815 A CN 111010815A CN 201911382066 A CN201911382066 A CN 201911382066A CN 111010815 A CN111010815 A CN 111010815A
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- semiconductor chip
- circuit
- copper foil
- processing
- circuit board
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Classifications
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/30—Assembling printed circuits with electric components, e.g. with resistor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
- H05K1/188—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit manufactured by mounting on or attaching to a structure having a conductive layer, e.g. a metal foil, such that the terminals of the component are connected to or adjacent to the conductive layer before embedding, and by using the conductive layer, which is patterned after embedding, at least partially for connecting the component
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0017—Etching of the substrate by chemical or physical means
- H05K3/0026—Etching of the substrate by chemical or physical means by laser ablation
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/0011—Working of insulating substrates or insulating layers
- H05K3/0044—Mechanical working of the substrate, e.g. drilling or punching
- H05K3/0047—Drilling of holes
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
- H05K3/42—Plated through-holes or plated via connections
Abstract
The invention provides a processing method of a semiconductor chip embedded circuit board, which comprises the following steps: the semiconductor chip is pasted on the copper foil substrate through the conductive adhesive; laminating a dielectric layer and a copper foil on the semiconductor chip, and conducting three poles of the semiconductor chip and the copper foil through drilling and hole copper plating; carrying out graphic circuit manufacturing on the surface of the copper foil to form a circuit board, wherein the graphic circuit is used for short-circuiting three poles of the semiconductor chip; and cutting off the three-pole short circuit of the semiconductor when cutting the circuit board to obtain a molded product. The invention also discloses a processing device and a circuit board manufactured by the processing method or the processing device, and tripolar of the semiconductor chip is subjected to short circuit through the graphic circuit manufacturing, so that the electrostatic breakdown condition in the subsequent graphic circuit manufacturing or ink layer manufacturing process is avoided, and the yield of chip products is greatly improved.
Description
Technical Field
The invention belongs to the technical field of circuit board processing, and particularly relates to a semiconductor chip embedded circuit board, a processing method and a processing device thereof.
Background
With the development of the functionalization and the intellectualization of electronic products, the high integration degree, the thinning and the miniaturization of the electronic products become mainstream trends, and the printed circuit board inevitably develops towards the directions of thinning, high density, three-dimensional structure and the like on the premise of meeting the good electrical and thermal properties of the electronic products, so that the design requirements of the miniaturization and the high integration degree of modern electronic products are met. This means that the circuit board package design must meet the following requirements: reduce the packaging height and improve the packaging density. Therefore, the chip-embedded technology is becoming an important development direction. The chip embedding process is to embed a chip in a dielectric layer in the manufacturing process of a printed circuit board, and then realize the conduction and interconnection of an external pattern and an inner layer chip through a metallized micropore.
Along with the development of embedding technology, more and more products are produced by the technology of embedding the semiconductor chip into the circuit board, but most of the existing chip circuit board embedding technology methods do not consider the problem of static electricity, and most of the traditional materials and equipment of the circuit board are not anti-static, so that when the traditional chip circuit board embedding technology is adopted to carry out semiconductor chip embedded packaging processing, the situation of static breakdown is easy to occur during pattern electroplating and ink layer manufacturing, and the yield of the products is seriously reduced.
Disclosure of Invention
The invention aims to provide a semiconductor chip embedded circuit board, a processing method and a processing device thereof aiming at the defects of the prior art, which can avoid the electrostatic breakdown in the process of manufacturing a graphic circuit or a printing ink layer and greatly improve the yield of chip products.
The technical scheme of the invention is as follows:
a processing method of a semiconductor chip embedded type circuit board comprises the following steps:
s1, pasting the semiconductor chip on the copper foil through the conductive adhesive;
s2, laminating a dielectric layer and a copper foil on the semiconductor chip, and conducting three poles of the semiconductor chip and the copper foil through drilling and hole copper plating;
s3, manufacturing a pattern circuit on the surface of the copper foil to form a circuit board, wherein the pattern circuit short-circuits three poles of the semiconductor chip;
and S4, cutting off the three-pole short circuit of the semiconductor when cutting the circuit board to obtain a molded product.
Further, in the step S3, when the pattern circuit is formed, the three-pole short circuit of the semiconductor chip is set to pass through a predetermined product cutting circuit.
Further, when the wiring board in which the plurality of semiconductor chips are embedded is manufactured by using the processing method, three poles of the plurality of semiconductor chips are connected to the same ground through a pattern line in step S3.
Further, three poles of the plurality of semiconductor chips are connected to a ring-shaped ground line through a pattern line, and the ring-shaped ground line is arranged at the edge of the circuit board.
Further, the step S2 specifically includes:
s21, forming a blind hole between the semiconductor chip and the copper foil by laser drilling or mechanical drilling;
s22, removing drilling dirt of the blind hole;
and S23, carrying out hole copper plating on the blind holes so that three poles of the semiconductor chip are connected to the copper foil.
Further, step S3 further includes:
and manufacturing a solder mask layer and a weldable coating layer on the surface of the copper foil.
Further, the copper plating mode of the hole is electroless copper plating or electrolytic copper plating.
Further, the conductive adhesive is conductive silver paste, anisotropic conductive film or anisotropic conductive liquid material.
The invention also discloses a semiconductor chip embedded type circuit board processing device, which comprises:
the chip mounting equipment is used for mounting the semiconductor chip on the copper foil substrate through the conductive adhesive;
the circuit manufacturing equipment is used for manufacturing a graphic circuit on the surface of the copper foil to form a circuit board, and the graphic circuit is used for short-circuiting three poles of the semiconductor chip;
a laminating apparatus for laminating a dielectric layer and a copper foil on the semiconductor chip;
the hole machining equipment is used for conducting three poles of the semiconductor chip and the copper foil through drilling and hole copper plating;
and the cutting equipment is used for cutting off the three-pole short circuit of the semiconductor when the circuit board is cut, so that a molded product is obtained.
The invention also discloses a semiconductor chip embedded type circuit board which is processed by the embedded type circuit board processing method.
The invention also discloses a semiconductor chip embedded type circuit board which is processed by the embedded type circuit board processing device.
Compared with the prior art, the invention has the following beneficial technical effects:
the invention provides a semiconductor chip embedded circuit board and a processing method and a processing device thereof, wherein three poles of a semiconductor chip are subjected to short circuit through a graphic circuit manufacturing process, so that the electrostatic breakdown condition in the subsequent graphic circuit manufacturing or ink layer manufacturing process is avoided, and the yield of chip products is greatly improved.
Drawings
Fig. 1 is a schematic flow chart of a method for processing an embedded wiring board according to embodiment 1 of the present invention.
Fig. 2 is a schematic diagram of the processing implementation of step S1 in embodiment 1 of the present invention.
Fig. 3 is a schematic diagram of the processing implementation of step S2 in embodiment 1 of the present invention.
Fig. 4 is a schematic diagram of the processing implementation of step S3 in embodiment 1 of the present invention.
Fig. 5 is a schematic structural view of the semiconductor described in embodiment 1 of the present invention.
Fig. 6 is a schematic diagram of a plurality of semiconductor triple-pole shorts according to embodiment 1 of the present invention.
Fig. 7 is a schematic view of a product cutting line described in embodiment 1 of the present invention.
Detailed Description
In order to fully understand the objects, features and effects of the present invention, several preferred embodiments of the present invention will be described below with reference to the accompanying drawings.
Example 1
As shown in fig. 1, the present embodiment discloses a method for processing a semiconductor chip embedded type circuit board, which includes the following steps:
and S1, pasting the semiconductor chip on the copper foil substrate through the conductive adhesive, and conducting the conductive adhesive through heating and pressurizing.
Specifically, referring to fig. 2, step S1 includes:
s11, attaching the conductive adhesive 104 to the surface of the chip 103.
And S12, attaching the first layer of copper foil 101 to the surface of the support plate 102, and then drilling to manufacture a tool hole with the alignment function.
S13, the chip 103 pasted with the conductive adhesive 104 is pasted on the surface target position of the first layer copper foil 101 with the supporting plate 102, and the conductive adhesive 104 between the bonding pad 1031 at the chip end and the copper foil 101 is conducted through heating and pressing.
Specifically, the conductive paste may be a conductive silver paste, an anisotropic conductive film, or an anisotropic conductive liquid material. Specifically, the main component of the conductive adhesive is a mixture of a high molecular polymer and conductive metal particles. The high molecular polymer is thermoplastic resin or thermosetting resin, and the thermoplastic resin is polyethylene, polypropylene, polystyrene, polycarbonate or rubber. The thermosetting resin is epoxy resin or polyimide. The conductive metal particles are metal nickel, gold, silver, tin and tin alloy.
S2, laminating a dielectric layer and a copper foil on the semiconductor chip, and conducting three poles of the semiconductor chip and the copper foil through drilling and hole copper plating.
Specifically, referring to fig. 3, step S2 includes:
s21, laminating a second copper foil 105 and a dielectric layer 106 on the chip 103 pasted with the conductive adhesive 104, so that the chip 103 is embedded in the double-sided copper-clad plate.
S22, obtaining blind holes 107 between the chip 103 and the copper foil 105 and between the copper foils 101 by laser drilling or mechanical drilling, and performing desmearing and electroless copper plating/electrolytic copper plating on the blind holes to lead out three poles of the chip 103 and communicate the three poles to the copper foils 105 and 101.
And S23, removing the supporting plate 102 to obtain the double-sided copper-clad plate with the embedded chip 103.
Specifically, the dielectric layer 106 is a prepreg or ABF, wherein the resin of the prepreg is epoxy resin, polymaleimide triazine resin, polyimide, polyphenylene oxide, or polytetrafluoroethylene. Specifically, the laser drilling is to drill a printed circuit board or an integrated circuit package substrate by using carbon dioxide laser or UV laser. Specifically, the smear removal is to remove the smear on the drilled hole wall by using an alkaline potassium permanganate solution or an alkaline sodium permanganate solution, or to remove the smear in the hole by using plasma. Specifically, the electro-coppering is carried out by using an electro-coppering liquid medicine or a traditional board surface electro-coppering liquid medicine, so that the conduction of the electrical property between the layers of the printed circuit board is realized.
And S3, manufacturing a pattern circuit on the surface of the copper foil to form a circuit board, wherein the pattern circuit short-circuits three poles of the semiconductor chip.
Specifically, the pattern line may be formed by a subtractive method or a semi-additive method, and the subtractive method is described as an example in this embodiment, but it should be noted that the improvement point of the pattern line in this embodiment that the three electrodes of the semiconductor chip are shorted is also applicable to the semi-additive method.
Specifically, referring to fig. 4, step S3 includes:
s31, manufacturing a copper circuit pattern on the copper surface of the double-sided copper-clad plate embedded with the chip 103 by adopting a pattern transfer technology to obtain a first layer of copper circuit pattern 108 and a second layer of copper circuit pattern 109. The pad 1031 of the chip 103 is connected to the pad 1091 of the second copper trace pattern 109 through the conductive paste 104 to form electrical conduction.
S32, solder resist ink layer 110 and solderable coating layer 111 are formed on first copper wiring pattern 108 and second copper wiring pattern 109.
Specifically, in step S3, when the pattern wire is to be formed, the short-circuit wires of three poles of the semiconductor chip are arranged to pass through a predetermined product cutting line. Specifically, the semiconductor chip has a three-pole structure as shown in fig. 5, which includes a gate, a source, and a drain. Specifically, when a wiring board in which a plurality of semiconductor chips are embedded is manufactured by using a processing method, three poles of the plurality of semiconductor chips are connected to the same ground through a pattern circuit in step S3. Specifically, three poles of the plurality of semiconductor chips are connected to a ring-shaped ground line through a pattern line, and the ring-shaped ground line is arranged at the edge of the circuit board. The resulting pattern is shown in fig. 6.
And S4, cutting off the three-pole short circuit of the semiconductor when cutting the circuit board to obtain a molded product.
Specifically, the cutting mode may be mechanical or laser cutting, the cutting circuit refers to fig. 7, and the dotted line in the drawing is a preset product cutting circuit of the circuit board.
The embodiment discloses a method for processing a semiconductor chip embedded circuit board, wherein three poles of a semiconductor chip are subjected to short circuit through a pattern circuit, so that the electrostatic breakdown in the subsequent pattern circuit manufacturing or ink layer manufacturing process is avoided, and the yield of chip products is greatly improved.
Example 2
The present embodiment discloses a semiconductor chip embedded type wiring board processing apparatus corresponding to embodiment 1, including:
and the surface mounting equipment is used for mounting the semiconductor chip on the copper foil substrate through the conductive adhesive.
And the heating and pressurizing device is used for conducting the conductive adhesive through heating and pressurizing.
And the circuit manufacturing equipment is used for manufacturing a pattern circuit on the surface of the copper foil to form a circuit board, and the pattern circuit is used for short-circuiting three poles of the semiconductor chip.
And a laminating apparatus for laminating the dielectric layer and the copper foil on the semiconductor chip.
And the hole machining equipment is used for conducting the tripolar part of the semiconductor chip and the copper foil through drilling and hole copper plating.
And the cutting equipment cuts off the three-pole short circuit of the semiconductor when cutting the circuit board to obtain a molded product.
Specifically, the steps executed by each device correspond to the steps of the method in embodiment 1, and the steps and details specifically included therein also correspond to those in embodiment 1, so that the technical effects thereof are similar, and are not described herein again.
Example 3
This embodiment discloses a semiconductor chip embedded wiring board processed by the method of processing an embedded wiring board as described in embodiment 1. The steps and details specifically included therein also correspond to those in embodiment 1, and the technical effects are similar, which are not described herein again.
Example 4
This embodiment discloses a semiconductor chip embedded wiring board, which is processed by the embedded wiring board processing apparatus described in embodiment 2. The steps and details specifically included therein also correspond to those in embodiment 1, and the technical effects are similar, which are not described herein again.
Those of ordinary skill in the art will appreciate that the various illustrative elements and algorithm steps described in connection with the embodiments disclosed herein may be implemented as electronic hardware or combinations of computer software and electronic hardware. Whether such functionality is implemented as hardware or software depends upon the particular application and design constraints imposed on the implementation. Skilled artisans may implement the described functionality in varying ways for each particular application, but such implementation decisions should not be interpreted as causing a departure from the scope of the present invention.
In the embodiments provided in the present application, it should be understood that the disclosed apparatus and method may be implemented in other ways. For example, the above-described apparatus embodiments are merely illustrative, and for example, the division of the devices is merely a logical division, and the actual implementation may have another division, for example, multiple devices or components may be combined or integrated into another system, or some features may be omitted, or not executed. In addition, the shown or discussed mutual coupling or direct coupling or communication connection may be an indirect coupling or communication connection through some interfaces, devices or units, and may be in an electrical, mechanical or other form.
The devices described as separate parts may or may not be physically separate, and parts displayed as units may or may not be physical units, may be located in one device, or may be distributed on a plurality of devices. Some or all of the units can be selected according to actual needs to achieve the purpose of the solution of the embodiment.
While the preferred embodiments of the present invention have been illustrated and described in detail, it should be understood that modifications and variations can be effected by one skilled in the art in light of the above teachings without undue experimentation. Therefore, any technical solutions that can be obtained by a person skilled in the art through logical analysis, reasoning or limited experiments based on the prior art according to the present inventive concept should be within the scope of protection defined by the present claims.
Claims (10)
1. A method for processing a semiconductor chip embedded circuit board is characterized by comprising the following steps:
s1, pasting the semiconductor chip on the copper foil through the conductive adhesive;
s2, laminating a dielectric layer and a copper foil on the semiconductor chip, and conducting three poles of the semiconductor chip and the copper foil through drilling and hole copper plating;
s3, manufacturing a pattern circuit on the surface of the copper foil to form a circuit board, wherein the pattern circuit short-circuits three poles of the semiconductor chip;
and S4, cutting off the three-pole short circuit of the semiconductor when cutting the circuit board to obtain a molded product.
2. The method for processing a semiconductor chip embedded wiring board of claim 1, wherein in the step S3, when the pattern circuit is fabricated, the short circuit lines of three poles of the semiconductor chip are arranged to pass through a predetermined product cutting circuit.
3. The method for processing a semiconductor chip embedded wiring board according to claim 1, wherein when the processing method is used to fabricate a wiring board embedded with a plurality of semiconductor chips, three poles of the plurality of semiconductor chips are connected to the same ground through pattern wiring in the step S3.
4. The method of processing a semiconductor chip embedded type wiring board of claim 3, wherein three poles of the plurality of semiconductor chips are connected to a ring ground via a pattern line, the ring ground being disposed at an edge of the wiring board.
5. The method for processing the semiconductor chip embedded wiring board of claim 4, wherein the step S2 specifically includes:
s21, forming a blind hole between the semiconductor chip and the copper foil by laser drilling or mechanical drilling;
s22, removing drilling dirt of the blind hole;
and S23, carrying out hole copper plating on the blind holes so that three poles of the semiconductor chip are connected to the copper foil.
6. The method for processing a semiconductor chip embedded wiring board of claim 5, wherein the step S3 further comprises:
and manufacturing a solder mask layer and a weldable coating layer on the surface of the copper foil.
7. The method for processing the semiconductor chip embedded type wiring board according to claim 1 or 5, wherein the copper plating of the hole is performed by electroless copper plating or electrolytic copper plating.
8. The method of processing a semiconductor chip embedded circuit board of claim 1, wherein the conductive paste is a conductive silver paste, an anisotropic conductive film, or an anisotropic conductive liquid material.
9. A semiconductor chip embedded type circuit board processing device is characterized by comprising:
the chip mounting equipment is used for mounting the semiconductor chip on the copper foil through the conductive adhesive;
the circuit manufacturing equipment is used for manufacturing a graphic circuit on the surface of the copper foil to form a circuit board, and the graphic circuit is used for short-circuiting three poles of the semiconductor chip;
a laminating apparatus for laminating a dielectric layer and a copper foil on the semiconductor chip;
the hole machining equipment is used for conducting three poles of the semiconductor chip and the copper foil through drilling and hole copper plating;
and the cutting equipment is used for cutting off the three-pole short circuit of the semiconductor when the circuit board is cut, so that a molded product is obtained.
10. A semiconductor chip embedded wiring board processed by the method for processing an embedded wiring board according to any one of claims 1 to 8, or processed by the apparatus for processing an embedded wiring board according to claim 9.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN201911382066.0A CN111010815B (en) | 2019-12-27 | 2019-12-27 | Semiconductor chip embedded circuit board and processing method and processing device thereof |
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| Application Number | Priority Date | Filing Date | Title |
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| CN201911382066.0A CN111010815B (en) | 2019-12-27 | 2019-12-27 | Semiconductor chip embedded circuit board and processing method and processing device thereof |
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| CN111010815A true CN111010815A (en) | 2020-04-14 |
| CN111010815B CN111010815B (en) | 2021-11-09 |
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Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112967932A (en) * | 2021-02-03 | 2021-06-15 | 复旦大学 | Plate-level GaN half-bridge power device and preparation method thereof |
| CN113140538A (en) * | 2021-04-21 | 2021-07-20 | 上海闻泰信息技术有限公司 | Adapter plate, packaging structure and manufacturing method of adapter plate |
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| CN112967932A (en) * | 2021-02-03 | 2021-06-15 | 复旦大学 | Plate-level GaN half-bridge power device and preparation method thereof |
| CN113140538A (en) * | 2021-04-21 | 2021-07-20 | 上海闻泰信息技术有限公司 | Adapter plate, packaging structure and manufacturing method of adapter plate |
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| Publication number | Publication date |
|---|---|
| CN111010815B (en) | 2021-11-09 |
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