CN110993756B - LED chip and manufacturing method thereof - Google Patents

LED chip and manufacturing method thereof Download PDF

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Publication number
CN110993756B
CN110993756B CN201911311574.XA CN201911311574A CN110993756B CN 110993756 B CN110993756 B CN 110993756B CN 201911311574 A CN201911311574 A CN 201911311574A CN 110993756 B CN110993756 B CN 110993756B
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layer
light
led chip
type
semiconductor layer
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CN110993756A (en
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刘权锋
庄文荣
付小朝
卢敬权
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Dongguan Sino Crystal Semiconductor Co ltd
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Dongguan Sino Crystal Semiconductor Co ltd
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/44—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the coatings, e.g. passivation layer or anti-reflective coating
    • H01L33/46—Reflective coating, e.g. dielectric Bragg reflector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/04—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction
    • H01L33/06—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a quantum effect structure or superlattice, e.g. tunnel junction within the light emitting region, e.g. quantum confinement structure or tunnel barrier
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/14—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure
    • H01L33/145—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a carrier transport control structure, e.g. highly-doped semiconductor layer or current-blocking structure with a current-blocking structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/36—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes
    • H01L33/38—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape
    • H01L33/382—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the electrodes with a particular shape the electrode extending partially in or entirely through the semiconductor body

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  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Led Devices (AREA)

Abstract

The invention provides an LED chip and a manufacturing method thereof, wherein the LED chip comprises: a substrate; the light limiting layer is positioned on the back surface of the substrate and is provided with a light outlet window; the light-emitting epitaxial structure is positioned on the front surface of the substrate and at least comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer, and the light-emitting epitaxial structure is provided with an electrode step penetrating to the surface of the N-type semiconductor layer; the current expansion layer is positioned on the P-type semiconductor layer; the reflecting layer covers the electrode steps and the front and the side of the light-emitting epitaxial structure; the N electrode passes through the reflecting layer at the electrode step and is in contact with the N-type semiconductor layer; and a P electrode contacting the current spreading layer through the reflective layer. The invention can effectively reduce the light-emitting angle of the LED chip, and greatly reduce the problems of color cast and color crosstalk among pixels of an LED display screen made of the LED chip under a large deflection angle viewing angle.

Description

LED chip and manufacturing method thereof
Technical Field
The invention belongs to the technical field of LED manufacturing, and particularly relates to an LED chip and a manufacturing method thereof.
Background
With the increasing indoor Display application technology, the currently used Display application products such as projection, DLP (Digital Light Processing), LCD (Liquid Crystal Display), PDP (Plasma Display Panel), etc. cannot completely meet the market application requirements. There are also some drawbacks in various aspects that make it impossible to break through the technological development. And the LED (Light Emitting Diode) full-color display screen overcomes the defects of the products, and becomes the first choice for indoor and outdoor large-screen display, such as occasions of command centers, outdoor advertising screens, conference centers and the like.
Generally, the LED display screen is seamlessly spliced into a large-sized display screen by a certain number of small-sized display screen modules. The manufacturing method of the small-spacing display screen module comprises the following steps: 1. discrete devices (SMDs); 2. the IMD is used for packaging the Mini LED in four-in-one mode; 3. chip On Board (COB for short). The Mini LED is also called a sub-millimeter LED, and the size of the Mini LED is usually 80 to 200 micrometers. At present, the minimum point distance of the LED display screen is 0.9375mm, but the market has wide requirements on the LED display screen with the smaller point distance. The picture can be clearer due to the small dot spacing. However, when the dot pitch is smaller than 0.7mm, the SMD and IMD methods cannot meet the requirements, and only the COB method can manufacture an LED display screen with a smaller dot pitch.
In the current process of manufacturing the small-spacing LED display screen module by using a COB method, the used chip is an inverted Mini LED chip. Three types of Mini LED chips, red, green, and blue, are required to realize full color display. Due to the inconsistency of the three chip materials and the light-emitting wavelength, the light-emitting angles of the three chips are inconsistent, for example, the light-emitting angle of red light is 120 degrees, the light-emitting angles of green light and blue light are 140 degrees, so that the LED display screen has an obvious color cast phenomenon under the condition of viewing at a large deflection angle. In addition, due to the limitation of the packaging structure, the existence of the side light of the chip is difficult to avoid, so that the color crosstalk problem of different degrees exists among the pixels of the LED display screen, and the problem is more serious when the distance is smaller.
Therefore, how to provide an LED chip with less side light to alleviate the color shift and color crosstalk between pixels of an LED display screen made of such a chip under a large off-angle viewing angle is an important technical problem to be solved urgently by those skilled in the art.
Disclosure of Invention
In view of the above-mentioned shortcomings of the prior art, an object of the present invention is to provide an LED chip and a method for manufacturing the same, which are used to solve the problems of color cast and color crosstalk between pixels of an LED display screen under a large off-angle viewing angle in the prior art.
To achieve the above and other related objects, the present invention provides an LED chip, comprising: a substrate; the light limiting layer is positioned on the back surface of the substrate and is provided with a light outlet window; the light-emitting epitaxial structure is positioned on the front surface of the substrate and at least comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer, and the light-emitting epitaxial structure is provided with an electrode step penetrating to the surface of the N-type semiconductor layer; the current expansion layer is positioned on the P-type semiconductor layer; the reflecting layer covers the electrode steps and the front and the side faces of the light-emitting epitaxial structure; an N electrode which passes through the reflective layer at the electrode step and contacts the N-type semiconductor layer; a P electrode contacting the current spreading layer through the reflective layer.
Optionally, the LED chip comprises a Mini LED chip.
Optionally, the material of the substrate includes one of sapphire, silicon carbide, and silicon.
Optionally, the light emitting epitaxial structure further includes a buffer layer, an intrinsic semiconductor layer, and an electron blocking layer, the electron blocking layer is located between the light emitting layer and the P-type semiconductor layer, the buffer layer includes one of an aluminum nitride buffer layer and a gallium nitride buffer layer, and the intrinsic semiconductor layer includes a non-doped gallium nitride layer.
Optionally, the N-type semiconductor layer includes an N-type gallium nitride layer, the P-type semiconductor layer includes a P-type gallium nitride layer, and the light emitting layer includes a quantum well superlattice layer.
Optionally, the N electrode includes an N-type bottom electrode and an N-type external electrode, the N-type bottom electrode is located on the surface of the N-type semiconductor layer at the electrode step, and the N-type external electrode passes through the reflective layer and is connected to the N-type bottom electrode; the P-type bottom electrode is positioned on the surface of the current expansion layer, and the P-type external electrode penetrates through the reflecting layer and is connected with the P-type bottom electrode.
Optionally, the N-type bottom electrode is flush with a top surface of the P-type bottom electrode, and the N-type external electrode is flush with a top surface of the P-type external electrode.
Optionally, the LED chip further includes a peripheral step, the peripheral step is annular and penetrates through the P-type semiconductor layer, the light emitting layer and the N-type semiconductor layer, and exposes a part of the surface of the substrate, and the reflective layer covers the electrode step and the front surface of the light emitting epitaxial structure, and covers the side surface of the light emitting epitaxial structure with the peripheral step.
Optionally, the light-limiting layer includes a metal layer, and a material of the metal layer includes a lamination of one or more of chromium, silver, gold, and copper.
Optionally, the shape of the light exit window comprises one of a rectangle, a circle and an ellipse.
The invention also provides an LED display screen which comprises the LED pixel array made of the LED chip.
The invention also provides a manufacturing method of the LED chip, which comprises the following steps: 1) Providing a substrate, and forming a light-emitting epitaxial structure on the substrate, wherein the light-emitting epitaxial structure at least comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer; 2) Etching an electrode step penetrating to the N-type semiconductor layer in the light-emitting epitaxial structure; 3) Forming a current spreading layer on the P-type semiconductor layer; 4) Forming an N-type bottom electrode and a P-type bottom electrode on the electrode step and the current spreading layer respectively; 5) Forming a reflecting layer on the electrode step and the front surface and the side surface of the light-emitting epitaxial structure; 6) Forming the second through hole and the first through hole in the reflective layer, wherein the second through hole Kong Xianlou is the N-type bottom electrode, and the first through hole exposes the P-type bottom electrode; 7) Manufacturing an N-type external electrode and a P-type external electrode based on the second through hole and the first through hole; 8) Thinning the back of the substrate; 9) And manufacturing a light limiting layer on the back of the substrate, and forming a light outlet window in the light limiting layer.
Optionally, steps 2) to 3) further include: etching a peripheral step in the light-emitting epitaxial structure, wherein the peripheral step is annular and penetrates through the P-type semiconductor layer, the light-emitting layer and the N-type semiconductor layer and exposes partial surface of the substrate, and 5) the reflecting layer covers the side face of the light-emitting epitaxial structure through the peripheral step.
Optionally, the LED chip comprises a Mini LED chip.
Optionally, the light emitting epitaxial structure further includes a buffer layer, an intrinsic semiconductor layer, and an electron blocking layer, the electron blocking layer is located between the light emitting layer and the P-type semiconductor layer, the buffer layer includes one of an aluminum nitride buffer layer and a gallium nitride buffer layer, and the intrinsic semiconductor layer includes an undoped gallium nitride layer.
Optionally, the N-type semiconductor layer includes an N-type gallium nitride layer, the P-type semiconductor layer includes a P-type gallium nitride layer, and the light emitting layer includes a quantum well superlattice layer.
Optionally, the N-type bottom electrode is flush with a top surface of the P-type bottom electrode, and the N-type external electrode is flush with a top surface of the P-type external electrode.
Optionally, the light limiting layer includes a metal layer, and a material of the metal layer includes a lamination of one or more of chromium, silver, gold, and copper.
Optionally, the shape of the light exit window comprises one of a rectangle, a circle and an ellipse.
Optionally, step 8) comprises: bonding the front side of the LED chip to a temporary substrate, and then thinning the back side of the substrate by adopting a grinding and polishing machine; the step 9) is followed by a step of removing the temporary substrate.
Optionally, the front surface of the LED chip is bonded to the temporary substrate by using a temporary bonding adhesive, and the composition of the temporary bonding adhesive includes acrylic acid.
As described above, the LED chip and the manufacturing method thereof of the present invention have the following advantages:
according to the LED chip, the light limiting layer is formed on the light emitting surface of the LED chip to limit the light emitting angle of the LED chip, and meanwhile, the Bragg reflecting layer covers the side wall of the LED chip, so that crosstalk between light on the side surface of the LED chip can be effectively avoided. The invention can effectively reduce the light-emitting angle of the LED chip, and greatly reduce the problems of color cast and color crosstalk among pixels of an LED display screen made of the LED chip under a large deflection angle viewing angle.
Drawings
Fig. 1 to 13 are schematic structural diagrams of steps of a method for manufacturing an LED chip according to the present invention, wherein fig. 13 is a schematic structural diagram of an LED chip according to the present invention.
Description of the element reference numerals
101. Substrate
102. Buffer layer
103. Intrinsic semiconductor layer
104 N-type semiconductor layer
105. Luminescent layer
106. Electron blocking layer
107 P-type semiconductor layer
108. Current spreading layer
109 N-type bottom electrode
110 P-type bottom electrode
111. Reflective layer
112a first via hole
112b second through hole
113 P-type external electrode
114 N-type external electrode
115. Light limiting layer
115a electrode step
115b peripheral step
116. Temporary substrate
117. Light-emitting window
Detailed Description
The following embodiments of the present invention are provided by way of specific examples, and other advantages and effects of the present invention will be readily apparent to those skilled in the art from the disclosure herein. The invention is capable of other and different embodiments and of being practiced or of being carried out in various ways, and its several details are capable of modification in various respects, all without departing from the spirit and scope of the present invention.
As in the detailed description of the embodiments of the present invention, the cross-sectional views illustrating the device structures are not partially enlarged in general scale for convenience of illustration, and the schematic views are only examples, which should not limit the scope of the present invention. In addition, the three-dimensional dimensions of length, width and depth should be included in the actual fabrication.
For convenience in description, spatial relational terms such as "below," "beneath," "below," "under," "over," "upper," and the like may be used herein to describe one element or feature's relationship to another element or feature as illustrated in the figures. It will be understood that these terms of spatial relationship are intended to encompass other orientations of the device in use or operation in addition to the orientation depicted in the figures. Further, when a layer is referred to as being "between" two layers, it can be the only layer between the two layers, or one or more intervening layers may also be present.
In the context of this application, a structure described as having a first feature "on" a second feature may include embodiments in which the first and second features are formed in direct contact, and may also include embodiments in which additional features are formed in between the first and second features, such that the first and second features may not be in direct contact.
It should be noted that the drawings provided in the present embodiment are only for illustrating the basic idea of the present invention, and the drawings only show the components related to the present invention rather than being drawn according to the number, shape and size of the components in actual implementation, and the type, quantity and proportion of each component in actual implementation may be changed arbitrarily, and the layout of the components may be more complicated.
As shown in fig. 13, the present embodiment provides an LED chip, for example, the LED chip may be a Mini LED chip (sub-millimeter light emitting diode), the size of the Mini LED chip may be between 80 micrometers and 200 micrometers, and the LED chip includes a substrate 101, a light emitting epitaxial structure, a current spreading layer 108, a reflective layer 111, an N electrode, and a P electrode.
The material of the substrate 101 includes one of sapphire, silicon carbide, and silicon. For example, in the present embodiment, the material of the substrate 101 is selected to be sapphire.
The light limiting layer 115 is located on the back surface of the substrate 101, and the light limiting layer 115 is provided with a light outlet window 117. The light-limiting layer 115 is an opaque material, and may be a metal layer, for example, the material of the metal layer includes one or more than two stacked layers of chromium, silver, gold, and copper. As shown in fig. 12, the shape of the light exit window 117 includes one of a rectangle, a circle and an ellipse. Of course, the light-restriction layer 115 may also be made of other opaque materials, and is not limited to the examples listed herein, and the shape of the light-exit window 117 may also be a rounded rectangle or any other desired shape, and is not limited to the examples listed herein. The light-limiting layer 115 can reduce the light-emitting angle of the LED chip, and greatly reduce the color cast and color crosstalk between pixels of an LED display screen made of the LED chip at a large deflection angle viewing angle.
The light-emitting epitaxial structure is located on the front surface of the substrate 101, and comprises a buffer layer 102, an intrinsic semiconductor layer 103, an N-type semiconductor layer 104, a light-emitting layer 105, an electron blocking layer 106 and a P-type semiconductor layer 107, and the light-emitting epitaxial structure has an electrode step 115a penetrating to the surface of the N-type semiconductor layer 104. The buffer layer 102 includes one of an aluminum nitride buffer layer and a gallium nitride buffer layer, the thickness of the buffer layer is 10-30 nm, for example, 15 nm, 20 nm, etc., the intrinsic semiconductor layer 103 includes an undoped gallium nitride layer, the N-type semiconductor layer 104 includes an N-type gallium nitride layer, the P-type semiconductor layer 107 includes a P-type gallium nitride layer, and the light emitting layer 105 includes a quantum well superlattice layer.
The LED chip further includes an annular peripheral step 115b, wherein the peripheral step 115b penetrates through the P-type semiconductor layer 107, the light emitting layer 105 and the N-type semiconductor layer 104, and exposes a portion of the surface of the substrate 101.
The current spreading layer 108 is positioned on the P-type semiconductor layer 107; the current spreading layer 108 may be a transparent conductive layer made of, but not limited to, indium Tin Oxide (ITO) with a thickness ranging from 10 nm to 100 nm, for example, 30 nm. The current spreading layer 108 can effectively improve the uniformity of the injected current and improve the utilization efficiency of the current.
The reflective layer 111 covers the electrode step 115a and the front and side surfaces of the light emitting epitaxial structure. In this embodiment, the reflective layer 111 covers the electrode step 115a and the front surface of the light emitting epitaxial structure, and covers the side surface of the light emitting epitaxial structure by the peripheral step 115 b. Through the peripheral step 115b, potential leakage channels can be effectively reduced, and the antistatic performance of the chip is improved.
The reflective layer may be a bragg reflective layer, and the bragg reflective layer 111 is formed by multiple layers of SiO 2 /Ti 3 O 5 And stacking to obtain the finished product. In this embodiment, a thin silicon dioxide layer is further disposed on the lower surface of the bragg reflector 111 to provide better insulation performance and improve the adhesion of the bragg reflector 111.
The N-electrode contacts the N-type semiconductor layer 104 through the reflective layer 111 at the electrode step 115a, and the P-electrode contacts the current spreading layer 108 through the reflective layer 111. The N-type electrode comprises an N-type bottom electrode 109 and an N-type external electrode 114, the N-type bottom electrode 109 is located on the surface of the N-type semiconductor layer 104 at the electrode step 115a, and the N-type external electrode 114 passes through the reflective layer 111 and is connected with the N-type bottom electrode 109; the P-type electrode includes a P-type bottom electrode 110 and a P-type external electrode 113, the P-type bottom electrode 110 is located on the surface of the current spreading layer 108, and the P-type external electrode 113 passes through the reflective layer 111 and is connected to the P-type bottom electrode 110. The N-type bottom electrode 109 is flush with the top surface of the P-type bottom electrode 110, and the N-type external electrode 114 is flush with the top surface of the P-type external electrode 113.
The embodiment also provides an LED display screen, which includes an LED pixel array made of the LED chip as described above.
As shown in fig. 1 to fig. 13, this embodiment further provides a method for manufacturing an LED chip, where the LED chip may be a Mini LED chip, and the size of the Mini LED chip may be between 80 micrometers and 200 micrometers, and the method includes the steps of:
as shown in fig. 1, step 1) is first performed, a substrate 101 is provided, and a light emitting epitaxial structure including a buffer layer 102, an intrinsic semiconductor layer 103, an N-type semiconductor layer 104, a light emitting layer 105, an electron blocking layer 106, and a P-type semiconductor layer 107 is formed on the substrate 101.
Specifically, the sapphire substrate 101 or the silicon carbide substrate 101 may be fed into a magnetron sputtering station, and an AlN buffer layer may be deposited on the sapphire substrate 101 or the silicon carbide substrate 101, and the thickness of the AlN buffer layer may be 10 to 20 nanometers, such as 15 nanometers. The sapphire substrate 101 or the silicon carbide substrate 101 may also be fed into an MOCVD (metal oxide chemical vapor deposition) reaction chamber, and a low temperature gallium nitride buffer layer may be deposited on the sapphire substrate 101 or the silicon carbide substrate 101, and may have a thickness of 10 to 30 nm, such as 20 nm.
Then, the substrate 101 on which the buffer layer 102 is grown may be fed into an MOCVD reaction chamber, and the intrinsic semiconductor layer 103, the N-type semiconductor layer 104, the light emitting layer 105, the electron blocking layer 106, and the P-type semiconductor layer 107 may be sequentially grown thereon to form a wafer.
As shown in fig. 2 to 3, step 2) is then performed, and an electrode step 115a penetrating to the N-type semiconductor layer 104 is etched in the light emitting epitaxial structure.
Specifically, the electrode step 115a may be etched by using an inductively coupled plasma etching (ICP) process, so that a portion of the N-type semiconductor layer 104 is exposed.
In this embodiment, as shown in fig. 3, the method further includes the steps of: and etching a peripheral step 115b in the light-emitting epitaxial structure by using an Inductively Coupled Plasma (ICP) etching process, wherein the peripheral step 115b is annular and penetrates through the P-type semiconductor layer 107, the light-emitting layer 105 and the N-type semiconductor layer 104, and a part of the surface of the substrate 101 is exposed.
As shown in fig. 4, step 3) is then performed to form a current spreading layer 108 on the P-type semiconductor layer 107.
For example, the current spreading layer 108 may be formed on the P-type semiconductor layer 107 by sputtering, and the current spreading layer 108 may be a transparent conductive layer made of a material including, but not limited to, indium Tin Oxide (ITO), and the thickness of the transparent conductive layer is in a range of 10 to 100 nm, for example, 30 nm. The current spreading layer 108 can effectively improve the uniformity of the injected current and improve the utilization efficiency of the current.
As shown in fig. 5 to 6, step 4) is performed to form an N-type bottom electrode 109 and a P-type bottom electrode 110 on the electrode step 115a and the current spreading layer 108, respectively.
Specifically, the N-type bottom electrode 109 may be fabricated on the exposed N-type semiconductor layer 104 of the electrode step 115a by thermal evaporation or electron beam evaporation, and has a thickness of 1.4 μm and a composition of Cr/Al/Pt/Cr/Pt/Au/Ti stack; the P-type bottom electrode 110 is then formed on the current spreading layer 108 by thermal evaporation or electron beam evaporation, and has a thickness of about 0.3 μm, and may be a Cr/Al/Ti/Pt/Au/Ti stack. Finally, the top surfaces of the N-type bottom electrode 109 and the P-type bottom electrode 110 are flush by adjusting the thickness, so that the subsequent etching for forming the first through hole and the second through hole 112b can be stopped on the same plane at the same time, the etching difficulty of the first through hole and the second through hole 112b is greatly reduced, and the process cost is saved.
As shown in fig. 7, step 5) is then performed to form a reflective layer 111 on the electrode step 115a and the front and side surfaces of the light emitting epitaxial structure.
Specifically, the reflective layer 111 may be formed by e.g. electron beam evaporation equal to the electrode step 115a and the front and side surfaces of the light emitting epitaxial structure, and may be a bragg reflective layer, and the bragg reflective layer 111 may be formed by a plurality of SiO layers 2 /Ti 3 O 5 And stacking the materials. In this embodiment, a thin silicon dioxide layer may be deposited on the bottom surface of the bragg reflector 111 by PECVD (plasma enhanced chemical vapor deposition), for example, to provide better insulating property and improve adhesion of the bragg reflector 111.
In the present embodiment, the reflective layer 111 covers the side surface of the light emitting epitaxial structure by the peripheral step 115 b.
As shown in fig. 8, step 6) is then performed to form the second via 112b and the first via 112a in the reflective layer 111, wherein the second via 112b exposes the N-type bottom electrode 109, and the first via 112a exposes the P-type bottom electrode 110.
Specifically, the second via 112b and the first via 112a may be formed in the reflective layer 111 by an inductively coupled plasma etching (ICP) process, and since the top surfaces of the second via 112b and the first via 112a are flush, the ICP process may be stopped at the top surfaces of the second via 112b and the first via 112a at the same time, which greatly reduces the process difficulty.
As shown in fig. 9, step 7) is then performed to fabricate an N-type external electrode 114 and a P-type external electrode 113 based on the second via 112b and the first via 112 a.
Specifically, the N-type external electrode 114 and the P-type external electrode 113 are both divided into two parts, including a transition part and an external part. The outer part is layered Sn/In/Au, the thicknesses of all layers are respectively 1.3 micrometers, 0.4 micrometers, 0.1 micrometers or 0.05 micrometers, wherein the outer Sn layer and the In layer are prepared through a thermal evaporation method, and the Au layer is prepared through an electron beam evaporation method. The transition part can be formed by combining Cr, al, cu, ti and Pt multilayer metals.
In this embodiment, the N-type external electrode 114 is flush with the top surface of the P-type external electrode 113, which can facilitate the package connection of the LED chip and other circuits.
As shown in fig. 10, step 8) is then performed to perform backside thinning on the substrate 101.
Specifically, step 8) includes: the front side of the LED chip is bonded to the temporary substrate 116, alternatively, the temporary substrate 116 may be one of a quartz flat sheet, a sapphire flat sheet or a silicon wafer, and the front side of the LED chip may be bonded to the temporary substrate 116 by using a temporary bonding adhesive, and the composition of the temporary bonding adhesive includes acrylic acid. The substrate 101 may then be back-thinned using a grinder-polisher station to a thickness of between 50-150 microns for the substrate 101.
As shown in fig. 11 to 13, step 9) is performed next, in which a light-limiting layer 115 is formed on the back surface of the substrate 101 by thermal evaporation or electron beam evaporation, and a light-exit window 117 is formed in the light-limiting layer 115. After that, the temporary substrate 116 is removed, and scribing and breaking are performed to obtain individual LED chips.
The light-limiting layer 115 is an opaque material, and may be a metal layer, for example, the material of the metal layer includes one or more than two stacked layers of chromium, silver, gold, and copper. As shown in fig. 12, the shape of the light exit window 117 includes one of a rectangle, a circle and an ellipse. Of course, the light-limiting layer 115 may also be other opaque materials, and is not limited to the examples listed herein, and the shape of the light-exiting window 117 may also be a rounded rectangle or any other desired shape, and is not limited to the examples listed herein. The light-limiting layer 115 can reduce the light-emitting angle of the LED chip, and greatly reduce the color cast and color crosstalk between pixels of an LED display screen made of the LED chip at a large deflection angle viewing angle.
As described above, the LED chip and the manufacturing method thereof of the present invention have the following advantages:
according to the LED chip, the light limiting layer is formed on the light emitting surface of the LED chip to limit the light emitting angle of the LED chip, and meanwhile, the Bragg reflecting layer covers the side wall of the LED chip, so that crosstalk between light on the side surface of the LED chip can be effectively avoided. The invention can effectively reduce the light-emitting angle of the LED chip and greatly reduce the problems of color cast and color crosstalk among pixels of an LED display screen manufactured by the LED chip under a large deflection angle viewing angle.
Therefore, the invention effectively overcomes various defects in the prior art and has high industrial utilization value.
The foregoing embodiments are merely illustrative of the principles and utilities of the present invention and are not intended to limit the invention. Those skilled in the art can modify or change the above-described embodiments without departing from the spirit and scope of the present invention. Accordingly, it is intended that all equivalent modifications or changes which can be made by those skilled in the art without departing from the spirit and technical spirit of the present invention be covered by the claims of the present invention.

Claims (18)

1. An LED chip, comprising:
a substrate;
the light limiting layer is arranged on the back of the substrate and is arranged on the periphery of the light emitting surface of the LED chip to limit a light window;
the light-emitting epitaxial structure is positioned on the front surface of the substrate and at least comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer, and the light-emitting epitaxial structure is provided with an electrode step penetrating to the surface of the N-type semiconductor layer;
the current expansion layer is positioned on the P-type semiconductor layer;
the reflecting layer covers the electrode steps and the front and the side faces of the light-emitting epitaxial structure; an N electrode which passes through the reflective layer at the electrode step and contacts the N-type semiconductor layer;
a P electrode contacting the current spreading layer through the reflective layer,
and the peripheral step is annular, penetrates through the P-type semiconductor layer, the light-emitting layer and the N-type semiconductor layer and exposes part of the surface of the substrate, and the reflecting layer covers the side face of the light-emitting epitaxial structure through the peripheral step.
2. The LED chip of claim 1, wherein: the LED chip comprises a Mini LED chip.
3. The LED chip of claim 1, wherein: the substrate is made of one of sapphire, silicon carbide and silicon.
4. The LED chip of claim 1, wherein: the light-emitting epitaxial structure further comprises a buffer layer, an intrinsic semiconductor layer and an electron blocking layer, wherein the electron blocking layer is located between the light-emitting layer and the P-type semiconductor layer, the buffer layer comprises one of an aluminum nitride buffer layer and a gallium nitride buffer layer, and the intrinsic semiconductor layer comprises a non-doped gallium nitride layer.
5. The LED chip of claim 1, wherein: the N-type semiconductor layer comprises an N-type gallium nitride layer, the P-type semiconductor layer comprises a P-type gallium nitride layer, and the light emitting layer comprises a quantum well superlattice layer.
6. The LED chip of claim 1, wherein: the N electrode comprises an N-type bottom electrode and an N-type external electrode, the N-type bottom electrode is positioned on the surface of the N-type semiconductor layer at the electrode step, and the N-type external electrode penetrates through the reflecting layer and is connected with the N-type bottom electrode; the P-type bottom electrode is positioned on the surface of the current expansion layer, and the P-type external electrode penetrates through the reflecting layer and is connected with the P-type bottom electrode.
7. The LED chip of claim 6, wherein: the N-type bottom electrode is flush with the top surface of the P-type bottom electrode, and the N-type external electrode is flush with the top surface of the P-type external electrode.
8. The LED chip of claim 1, wherein: the light limiting layer comprises a metal layer, and the material of the metal layer comprises one or more than two laminated layers of chromium, silver, gold and copper.
9. The LED chip of claim 1, wherein: the shape of the light-emitting window comprises one of a rectangle, a circle and an ellipse.
10. An LED display screen, characterized in that the LED display screen comprises an LED pixel array made of the LED chip according to any one of claims 1 to 9.
11. A manufacturing method of an LED chip is characterized by comprising the following steps:
1) Providing a substrate, and forming a light-emitting epitaxial structure on the substrate, wherein the light-emitting epitaxial structure at least comprises an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer;
2) Etching an electrode step penetrating to the N-type semiconductor layer in the light-emitting epitaxial structure; etching a peripheral step in the light-emitting epitaxial structure, wherein the peripheral step is annular and penetrates through the P-type semiconductor layer, the light-emitting layer and the N-type semiconductor layer, and part of the surface of the substrate is exposed;
3) Forming a current spreading layer on the P-type semiconductor layer;
4) Forming an N-type bottom electrode and a P-type bottom electrode on the electrode step and the current spreading layer respectively;
5) Forming a reflecting layer on the electrode step and the front surface and the side surface of the light-emitting epitaxial structure, wherein the reflecting layer covers the side surface of the light-emitting epitaxial structure through the peripheral step;
6) Forming a second through hole and a first through hole in the reflecting layer, wherein the second through hole Kong Xianlou is used for the N-type bottom electrode, and the first through hole exposes the P-type bottom electrode;
7) Manufacturing an N-type external electrode and a P-type external electrode based on the second through hole and the first through hole;
8) Thinning the back of the substrate;
9) And manufacturing a light limiting layer on the back of the substrate, wherein the light limiting layer is formed on the periphery of the light emitting surface of the LED chip to limit a light window.
12. The method of manufacturing an LED chip according to claim 11, wherein: the light-emitting epitaxial structure further comprises a buffer layer, an intrinsic semiconductor layer and an electron blocking layer, wherein the electron blocking layer is located between the light-emitting layer and the P-type semiconductor layer, the buffer layer comprises one of an aluminum nitride buffer layer and a gallium nitride buffer layer, and the intrinsic semiconductor layer comprises a non-doped gallium nitride layer.
13. The method of manufacturing an LED chip according to claim 11, wherein: the N-type semiconductor layer comprises an N-type gallium nitride layer, the P-type semiconductor layer comprises a P-type gallium nitride layer, and the light emitting layer comprises a quantum well superlattice layer.
14. The method of manufacturing an LED chip according to claim 11, wherein: the N-type bottom electrode is flush with the top surface of the P-type bottom electrode, and the N-type external electrode is flush with the top surface of the P-type external electrode.
15. The method of manufacturing an LED chip according to claim 11, wherein: the light limiting layer comprises a metal layer, and the material of the metal layer comprises one or more than two laminated layers of chromium, silver, gold and copper.
16. The method of manufacturing an LED chip according to claim 11, wherein: the shape of the light-emitting window comprises one of a rectangle, a circle and an ellipse.
17. The method of manufacturing an LED chip according to claim 11, wherein: step 8) comprises the following steps: bonding the front surface of the LED chip to the temporary substrate, and then thinning the back surface of the substrate by adopting a grinding and polishing machine; the step 9) is followed by a step of removing the temporary substrate.
18. The method of manufacturing an LED chip according to claim 17, wherein: and adopting a temporary bonding glue to bond the front surface of the LED chip to the temporary substrate, wherein the component of the temporary bonding glue comprises acrylic acid.
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