TWI455665B - Flip-chip light emitting diode on board module and method of fabricating the same - Google Patents

Flip-chip light emitting diode on board module and method of fabricating the same Download PDF

Info

Publication number
TWI455665B
TWI455665B TW101140953A TW101140953A TWI455665B TW I455665 B TWI455665 B TW I455665B TW 101140953 A TW101140953 A TW 101140953A TW 101140953 A TW101140953 A TW 101140953A TW I455665 B TWI455665 B TW I455665B
Authority
TW
Taiwan
Prior art keywords
layer
flip
semiconductor epitaxial
chip
emitting diode
Prior art date
Application number
TW101140953A
Other languages
Chinese (zh)
Other versions
TW201419958A (en
Inventor
Ming Chi Kan
Shih Yao Huang
Chien Min Sung
Original Assignee
Ritedia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ritedia Corp filed Critical Ritedia Corp
Priority to TW101140953A priority Critical patent/TWI455665B/en
Priority to CN201210586740.9A priority patent/CN103811631A/en
Publication of TW201419958A publication Critical patent/TW201419958A/en
Application granted granted Critical
Publication of TWI455665B publication Critical patent/TWI455665B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L2224/14Structure, shape, material or disposition of the bump connectors prior to the connecting process of a plurality of bump connectors

Description

覆晶式發光二極體封裝模組及其製法Flip-chip LED package module and its preparation method

本發明係關於一種覆晶式發光二極體封裝模組及其製法,尤指一種結合特定焊料合金層及金屬焊接層之覆晶式發光二極體封裝模組之製造方法。The invention relates to a flip-chip LED package module and a method for manufacturing the same, in particular to a method for manufacturing a flip-chip LED package module combining a specific solder alloy layer and a metal solder layer.

西元1962年,通用電氣公司的尼克.何倫亞克(Nick Holonyak Jr.)開發出第一種實際應用的可見光發光二極體(Light Emitting Diode,LED),而隨著科技日益更新,各種色彩發光二極體開發也應蘊而生。而對於現今人類所追求永續發展為前提的情形下,發光二極體的低耗電量以及長效性的發光等優勢下,已逐漸取代日常生活中用來照明或各種電器設備的指示燈或光源等用途。更有甚者,發光二極體朝向多色彩及高亮度的發展,已應用在大型戶外顯示看板或交通號誌。In 1962, Nick of General Electric Company. Nick Holonyak Jr. developed the first practical application of Light Emitting Diode (LED), and with the ever-increasing technology, various color LEDs should also be developed. . Under the premise of the pursuit of sustainable development by human beings today, the low power consumption of LEDs and the long-lasting illumination have gradually replaced the indicators used in daily life for lighting or various electrical equipment. Or use of light sources. What's more, the development of light-emitting diodes towards multi-color and high brightness has been applied to large outdoor display billboards or traffic signs.

21世紀起,電子產業的蓬勃發展,電子產品在生活上已經成為不可或缺的一部分,因此企業對於電子產品開發方向以多功能及高效能發展等為主,也開始將發光二極體晶片應用於各種電子產品。其中尤其是可攜式電子產品種類日漸眾多,電子產品的體積與重量越來越小,所需的電路載板體積亦隨之變小,因此,電路載板的散熱效果成為值得重視的問題之一。Since the beginning of the 21st century, the electronic industry has flourished, and electronic products have become an indispensable part of life. Therefore, enterprises are mainly engaged in the development of electronic products with versatility and high-efficiency development. For a variety of electronic products. In particular, the variety of portable electronic products is increasing, the volume and weight of electronic products are getting smaller and smaller, and the required circuit carrier board volume is also becoming smaller. Therefore, the heat dissipation effect of the circuit carrier board becomes a problem worthy of attention. One.

以現今經常使用之發光二極體晶片而言,由於發光亮度夠高,因此可廣泛應用於顯示器背光源、小型投影機以及照明等各種電子裝置中。然而,目前LED的輸入功率中,將近80%的能量會轉換成熱能,倘若承載LED元件之載板無法有效地散熱時,便會使得發光二極體晶片界面溫度升高,除了影響發光強度之外,亦可能因熱度在發光二極體晶片中累積而造成各層材料受熱膨脹,促使結構中受到損傷而對產品壽命產生不良影響此外,由於發光二極體內所激發的光線係以一放射方式擴散,並非所有光線都會經由發光二極體表面而散射出,故造成出光率不佳,且無法達到最有效之出光率。In the case of a light-emitting diode wafer which is frequently used today, since the light-emitting luminance is high enough, it can be widely used in various electronic devices such as a display backlight, a small projector, and illumination. However, at present, nearly 80% of the input power of the LED is converted into thermal energy. If the carrier carrying the LED component cannot effectively dissipate heat, the temperature of the interface of the LED array is increased, in addition to affecting the luminous intensity. In addition, the heat may be accumulated in the LED chip to cause thermal expansion of the layers, which may cause damage to the structure and adversely affect the life of the product. In addition, the light excited by the LED is diffused by radiation. Not all light is scattered through the surface of the light-emitting diode, resulting in poor light output and the most effective light output rate.

據此,若能進一步改善發光二極體的散熱效率以及緩和或去除發光二極體受熱膨脹的不良影響,且尋求一結構整體上的設計來提升出光率,將更可促使整體電子產業的發展。Accordingly, if the heat dissipation efficiency of the light-emitting diode can be further improved and the adverse effect of the thermal expansion of the light-emitting diode is alleviated or removed, and a structural overall design is sought to enhance the light-emitting rate, the development of the overall electronics industry can be promoted. .

本發明之主要目的係在提供一種覆晶式發光二極體封裝模組(Flip chip on board LED,FCOB LED)之製造方法,其使用成本較低之金屬作為焊接材料以達到降低製造成本之目的,而所使用之覆晶式發光二極體封裝模組具有緩衝熱膨脹係數差異及提升輸出光率的結構設計,可在發光二極體運作產生熱量的過程中持續使熱量散失。即使有部分熱量沒有自發光二極體中散失而促使整體結構產生熱膨 脹,其中設置的類鑽碳/導電材料多層複合結構亦可緩衝對應的熱應力,而保護不受損傷,並且能藉由絕緣保護層匯聚光束而提升輸出光率。The main object of the present invention is to provide a method for manufacturing a flip chip on board LED (FCOB LED), which uses a metal having a lower cost as a solder material to reduce manufacturing cost. The flip-chip LED package module used has a structural design that buffers the difference in thermal expansion coefficient and enhances the output light rate, and can continuously dissipate heat during the operation of the light-emitting diode to generate heat. Even if some of the heat is not lost in the self-luminous diode, the whole structure is thermally expanded. The expansion, in which the diamond-like carbon/conductive material multilayer composite structure is disposed, can also buffer the corresponding thermal stress without protection from damage, and can increase the output light rate by concentrating the light beam by the insulating protective layer.

為達成上述目的,本發明之一態樣係提供一種覆晶式發光二極體封裝模組之製造方法,包括:提供一電路載板,係包括至少一電性連接墊;將一焊料合金層設置於該電性連接墊上,其中,該焊料合金層可至少一選自由錫(Sn)、銀(Ag)、銅(Cu)、鉍(Bi),或其合金所組成;提供一覆晶式發光二極體,其可包括一第一金屬焊接層以及一第二金屬焊接層,且該第一金屬焊接層以及該第二金屬焊接層係由金(Au)、錫(Sn)、銀(Ag),銅(Cu)所組成;以及將該覆晶式發光二極體經由該第一金屬焊接層以及該第二金屬焊接層焊接於該焊料合金層及該電性連接墊,進而封裝於該電路載板。具體來說,於本發明之一態樣中,該焊料合金層可為至少一選自錫銀合金(Sn-Ag)、錫銅合金(Sn-Cu)、錫鉍合金(Sn-Bi)、銀銅合金(Ag-Cu)、銀鉍合金(Ag-Bi)、錫銀銅合金(Sn-Ag-Cu)、錫銀鉍合金(Sn-Ag-Bi)、錫銅鉍合金(Sn-Cu-Bi)、銀銅鉍合金(Ag-Cu-Bi),或錫銀銅鉍合金(Sn-Ag-Cu-Bi)。In order to achieve the above object, an aspect of the present invention provides a method for fabricating a flip-chip LED package module, comprising: providing a circuit carrier, comprising at least one electrical connection pad; and a solder alloy layer Provided on the electrical connection pad, wherein the solder alloy layer may be at least one selected from the group consisting of tin (Sn), silver (Ag), copper (Cu), bismuth (Bi), or an alloy thereof; The light emitting diode may include a first metal solder layer and a second metal solder layer, and the first metal solder layer and the second metal solder layer are made of gold (Au), tin (Sn), and silver ( Ag), composed of copper (Cu); and the flip-chip light-emitting diode is soldered to the solder alloy layer and the electrical connection pad via the first metal solder layer and the second metal solder layer, and then packaged The circuit carrier. Specifically, in one aspect of the present invention, the solder alloy layer may be at least one selected from the group consisting of tin-silver alloy (Sn-Ag), tin-copper alloy (Sn-Cu), and tin-bismuth alloy (Sn-Bi). Ag-Cu, Ag-Bi, Sn-Ag-Cu, Sn-Ag-Bi, Sn-Ag-Sn-Cu -Bi), silver-copper-bismuth alloy (Ag-Cu-Bi), or tin-silver-copper-bismuth alloy (Sn-Ag-Cu-Bi).

本發明上述覆晶式發光二極體封裝模組之製造方法中,該電路載板可以包含一絕緣層、以及一電路基板,其中,該絕緣層之材質可為絕緣性類鑽碳、氧化鋁、陶瓷、含鑽石之環氧樹脂、或其組成物,或者為表面覆有上述絕緣層之金屬材料,而該電路基板可為一金屬板、一陶瓷板 或一矽基板。此外,該電路載板表面也可以選擇性更包含一類鑽碳層,以增加散熱效果。In the manufacturing method of the flip-chip LED package module of the present invention, the circuit carrier may include an insulating layer and a circuit substrate, wherein the insulating layer may be made of insulating diamond-like carbon or aluminum oxide. , ceramic, diamond-containing epoxy resin, or a composition thereof, or a metal material having a surface covered with the above insulating layer, and the circuit substrate can be a metal plate or a ceramic plate Or a stack of substrates. In addition, the surface of the circuit carrier can also optionally include a type of drilled carbon layer to increase the heat dissipation effect.

於本發明覆晶式發光二極體封裝模組之製造方法中,所提供之覆晶式發光二極體,包括:一基板,具有一第一表面以及一相對於該第一表面之第二表面;一半導體磊晶多層複合結構,其位於該基板之該第二表面上方且包含一第一半導體磊晶層、一第二半導體磊晶層以及一盲孔,其中,該第一半導體磊晶層與該第二半導體磊晶層係層疊設置,且該盲孔貫穿該第二半導體磊晶層;一第一電極,位於該半導體磊晶多層複合結構之該第一半導體磊晶層上方;一第一類鑽碳/導電材料多層複合結構,係填充於該半導體磊晶多層複合結構之該盲孔中,並覆蓋於該第一電極上方,且電性連接該半導體磊晶多層複合結構之該第一半導體磊晶層;一第二電極,位於該半導體磊晶多層複合結構之該第二半導體磊晶層上方;一第二類鑽碳/導電材料多層複合結構,位於該半導體磊晶多層複合結構之該第二電極上方,並電性連接該半導體磊晶多層複合結構之該第二半導體磊晶層;以及一絕緣保護層,覆蓋該半導體磊晶多層複合結構之該第一半導體磊晶層之側壁以及該第二半導體磊晶層之側壁,以及該盲孔之內壁表面,以隔絕該第一類鑽碳/導電材料多層複合結構與該第二半導體磊晶層之間的接觸。In the manufacturing method of the flip-chip LED package module of the present invention, the flip-chip LED includes: a substrate having a first surface and a second surface opposite to the first surface a semiconductor epitaxial multilayer composite structure over the second surface of the substrate and including a first semiconductor epitaxial layer, a second semiconductor epitaxial layer, and a blind via, wherein the first semiconductor epitaxial layer The layer is stacked on the second semiconductor epitaxial layer, and the blind via extends through the second semiconductor epitaxial layer; a first electrode is disposed above the first semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure; The first type of carbon/conductive material multilayer composite structure is filled in the blind hole of the semiconductor epitaxial multilayer composite structure and covers the first electrode, and is electrically connected to the semiconductor epitaxial multilayer composite structure. a second semiconductor epitaxial layer; a second electrode over the second semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure; a second type of carbon/conductive material multilayer composite structure located in the half a second semiconductor epitaxial layer over the second electrode of the bulk epitaxial multilayer structure and electrically connected to the semiconductor epitaxial multilayer composite structure; and an insulating protective layer covering the semiconductor epitaxial multilayer composite structure a sidewall of the semiconductor epitaxial layer and a sidewall of the second semiconductor epitaxial layer, and an inner wall surface of the blind via to isolate the first diamond-like carbon/conductive material multilayer composite structure and the second semiconductor epitaxial layer Contact between.

本發明上述覆晶式發光二極體封裝模組之製造方法中,將電性連接至半導體磊晶多層複合結構中N型半導體磊 晶層與P型半導體磊晶層之對應電極,並且在其對應電極上皆設計成濺鍍成類鑽碳/導電材料多層複合結構。換言之,設置於N型半導體磊晶層表面之對應N型電極,可先行沉積一般作為N型電極之金屬,再沉積類鑽碳,並且可以選擇性重複沉積適用的導電材料層與類鑽碳層,據此形成類鑽碳/導電材料多層複合結構,以做為對應N型電極的N型之複合結構。同樣,對於P型半導體磊晶層,亦可先行沉積一般作為P型電極之金屬,再沉積類鑽碳,並且可以選擇性重複沉積適用的導電材料層與類鑽碳層,據此形成類鑽碳/導電材料多層複合結構,以做為對應P型電極的P型之複合結構。In the manufacturing method of the above-mentioned flip chip type LED package module, the method is electrically connected to the N-type semiconductor bar in the semiconductor epitaxial multilayer structure. The corresponding layer of the crystal layer and the P-type semiconductor epitaxial layer, and on its corresponding electrode are designed to be sputtered into a diamond-like carbon/conductive material multilayer composite structure. In other words, the corresponding N-type electrode disposed on the surface of the epitaxial layer of the N-type semiconductor can deposit a metal generally as an N-type electrode, deposit a diamond-like carbon, and selectively deposit a suitable conductive material layer and a diamond-like carbon layer. According to this, a multi-layer composite structure of a diamond-like carbon/conductive material is formed to serve as an N-type composite structure corresponding to the N-type electrode. Similarly, for the P-type semiconductor epitaxial layer, the metal generally used as the P-type electrode can be deposited first, and then the diamond-like carbon can be deposited, and the applicable conductive material layer and the diamond-like carbon layer can be selectively deposited repeatedly, thereby forming a diamond-like drill. A carbon/conductive material multilayer composite structure is used as a P-type composite structure corresponding to a P-type electrode.

上述絕緣保護層係為一具有不同折射率材料之堆疊結構,當發光二極體通入電流後,可使電子激發形成光線,並使光線向發光二極體之表面及側面進行擴散,此時,即可藉由絕緣保護層將擴散至側面光線反射至覆晶式發光二極體之出光面,進而提升出光率。The insulating protective layer is a stacked structure having different refractive index materials. When the light emitting diode is supplied with current, the electrons can be excited to form light, and the light is diffused toward the surface and the side surface of the light emitting diode. The light diffusing can be enhanced by reflecting the diffused side light to the light-emitting surface of the flip-chip light-emitting diode by an insulating protective layer.

上述類鑽碳/導電材料多層複合結構可以讓本發明之覆晶式發光二極體,對於熱膨脹係數差異所造成應力,具有緩衝能力。換言之,上述類鑽碳/導電材料多層複合結構,可在發光二極體運作產生熱量的過程中加速熱量散失,即使部分熱量沒有自發光二極體中散失而累積造成整體結構發生熱膨脹,類鑽碳/導電材料多層複合結構亦可緩衝對應的熱應力,而可保護覆晶式發光二極體中其餘構件不受損傷。The above-mentioned diamond-like carbon/conductive material multilayer composite structure can make the flip-chip light-emitting diode of the present invention have a buffering capacity for stress caused by a difference in thermal expansion coefficient. In other words, the above-mentioned diamond-like carbon/conductive material multi-layer composite structure can accelerate the heat loss in the process of generating heat of the light-emitting diode, even if part of the heat is not lost in the self-luminous diode, and the thermal expansion of the whole structure occurs, the diamond-like drilling The carbon/conductive material multilayer composite structure can also buffer the corresponding thermal stress, and can protect the remaining components of the flip-chip light-emitting diode from damage.

綜上所述,本發明所使用之覆晶式發光二極體封裝模組之製造方法可提升覆晶式發光二極體整體輸出光率,並避免元件光電特性變差,進而提高其可靠度與壽命。In summary, the manufacturing method of the flip-chip light-emitting diode package module used in the present invention can improve the overall output light rate of the flip-chip light-emitting diode and avoid the deterioration of the photoelectric characteristics of the component, thereby improving the reliability thereof. With life.

本發明上述覆晶式發光二極體封裝模組之製造方法中,該絕緣保護層係由兩種或以上之不同折射率材料堆疊設置;其中,上述該不同折射率材料可至少一選自由類鑽碳(DLC)、氧化鈦(Tix Oy )、二氧化矽(SiO2 )、氮化矽(SiN)、砷化鎵(GaAs)、砷化鋁(AlAs)所組成之群組,其中,氧化鈦(Tix Oy )可使用如氧化鈦(TiO)、二氧化鈦(TiO2 )或三氧化二鈦(Ti2 O3 )等;在本發明中,絕緣保護層內的不同折射率材料可以依序週期性堆疊設置而具有布拉格反射鏡(Distribute Bragg Reflector,DBR)之特性,且使得發光二極體中發射至側面之光線可藉由絕緣保護層反射至覆晶式發光二極體之出光面,進而提升輸出光率;此外,在本發明中,更可以在絕緣保護層之外側設置一金屬保護層,該金屬保護層可至少一選自由鋁(Al)、鈦(Ti)、鉬(Mo)、鎳(Ni)、銀(Ag)、金(Au)、鉑(Pt)、或其合金所組成之群組,因此,藉由該金屬保護層,更能增加發光二極體發射至側面之光線反射至覆晶式發光二極體之出光面之反射率,進而更加提升輸出光率。In the manufacturing method of the flip-chip LED package module of the present invention, the insulating protective layer is provided by stacking two or more different refractive index materials; wherein the different refractive index materials may be at least one selected from the group consisting of Drilling carbon (DLC), titanium oxide (Ti x O y ), cerium oxide (SiO 2 ), tantalum nitride (SiN), gallium arsenide (GaAs), aluminum arsenide (AlAs), among which As the titanium oxide (Ti x O y ), for example, titanium oxide (TiO), titanium oxide (TiO 2 ) or titanium oxide (Ti 2 O 3 ) or the like can be used; in the present invention, different refractive index materials in the insulating protective layer It can be periodically stacked and arranged to have the characteristics of a Bragg Reflector (DBR), and the light emitted to the side of the light-emitting diode can be reflected by the insulating protective layer to the flip-chip light-emitting diode. In addition, in the present invention, a metal protective layer may be disposed on the outer side of the insulating protective layer, and the metal protective layer may be at least one selected from the group consisting of aluminum (Al), titanium (Ti), and molybdenum. a group consisting of (Mo), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), or alloys thereof Therefore, the metal protective layer can further increase the reflectance of the light emitted from the light-emitting diode to the side surface to the light-emitting surface of the flip-chip light-emitting diode, thereby further improving the output light rate.

較佳而言,在第二表面可藉由蝕刻或顯影處理,使第二表面形成一圖形化表面,並可有效提升發光二極體的出光率,且可以控制其偏極以及光場分佈。Preferably, the second surface can be formed into a patterned surface by etching or development treatment, and the light-emitting diode can be effectively improved in light-emitting rate, and the polarization and the light field distribution can be controlled.

此外,在第一表面可藉由蝕刻或顯影處理,使第一表面形成一圖形化表面或一粗糙化表面,並可有效提升發光二極體的出光率。In addition, the first surface may be formed into a patterned surface or a roughened surface by etching or development treatment, and the light extraction rate of the light emitting diode may be effectively improved.

本發明上述覆晶式發光二極體封裝模組之製造方法中,該半導體磊晶多層複合結構更可以包括一無摻雜半導體磊晶層,該無摻雜半導體磊晶層係夾置於該第一半導體磊晶層與該基板之該第二表面之間;因此,該無摻雜半導體磊晶層當作該第一半導體磊晶層與該基板之間的一緩衝層,避免該第一半導體磊晶層與該基板之間晶格不匹配程度過大,並防止成長該第一半導體磊晶層時,其磊晶缺陷密度過高之情形出現,並且可避免上述覆晶式發光二極體有靜電放電及電流漏電之情形。In the method for fabricating the flip-chip LED package of the present invention, the semiconductor epitaxial multilayer structure may further comprise an undoped semiconductor epitaxial layer, the undoped semiconductor epitaxial layer being sandwiched between Between the first semiconductor epitaxial layer and the second surface of the substrate; therefore, the undoped semiconductor epitaxial layer acts as a buffer layer between the first semiconductor epitaxial layer and the substrate, avoiding the first The degree of lattice mismatch between the epitaxial layer of the semiconductor and the substrate is excessively large, and the epitaxial defect density is excessively increased when the first semiconductor epitaxial layer is grown, and the flip-chip light-emitting diode can be avoided. There are cases of electrostatic discharge and current leakage.

本發明上述覆晶式發光二極體封裝模組之製造方法中,該半導體磊晶多層複合結構可以選擇性更包括一活性中間層,該活性中間層係夾置於該第一半導體磊晶層與該第二半導體磊晶層之間。除此之外,本發明上述覆晶式發光二極體結構中設有該盲孔,而該盲孔貫穿該活性中間層。於本發明中,該活性中間層可為多量子井層(multiple quantum well layer),用以提升發光二極體中電能轉換成光能的效率。In the method for fabricating the flip-chip light-emitting diode package module of the present invention, the semiconductor epitaxial multilayer composite structure may optionally further comprise an active intermediate layer, the active intermediate layer being sandwiched between the first semiconductor epitaxial layer Between the second semiconductor epitaxial layer and the second semiconductor. In addition, the blind via hole is disposed in the flip-chip light emitting diode structure of the present invention, and the blind via penetrates through the active intermediate layer. In the present invention, the active intermediate layer may be a multiple quantum well layer for improving the efficiency of converting electrical energy into light energy in the light-emitting diode.

較佳而言,該第一半導體磊晶層、該第一電極以及該第一類鑽碳/導電材料多層複合結構係N型,該第二半導體磊晶層、該第二電極以及該第二類鑽碳/導電材料多層複合結構係P型。其中,該第一類鑽碳/導電材料多層複合結構、 以及該第二類鑽碳/導電材料多層複合結構可選自由導電材料層與導電類碳鑽層堆疊結構、導電材料與類鑽碳混合物多層結構、以及導電材料與導電性類鑽碳混合物多層結構所組群組之至少一者。Preferably, the first semiconductor epitaxial layer, the first electrode, and the first diamond-like carbon/conductive material multilayer composite structure are N-type, the second semiconductor epitaxial layer, the second electrode, and the second The diamond-like carbon/conductive material multilayer composite structure is P type. Wherein, the first type of carbon/conductive material multilayer composite structure, And the second type of carbon/conductive material multi-layer composite structure can select a free conductive material layer and a conductive carbon drill layer stack structure, a conductive material and a diamond-like carbon mixture multilayer structure, and a conductive material and a conductive diamond-like carbon mixture multilayer structure At least one of the grouped groups.

上述該導電材料層或該導電材料之材質可以選自由銦錫氧化物(indium tin oxide,ITO)、氧化鋁鋅(aluminum zinc oxide,AZO)、氧化鋅(ZnO)、石墨烯(graphene)、鈦(Ti)、鋁(Al)、鉻(Cr)、鎳(Ni)、鉑(Pt)、鉬(Mo)、鎢(W)、銀(Ag)、鉑(Pt)、以及金(Au)所組群組之至少一者。換言之,該導電材料層或該金屬可使用上述材質之合金或金屬混合物構成。由於類鑽碳具有較佳的熱膨脹係數(coefficient of thermal expansion,CTE),因此做為電極之類鑽碳/導電材料多層複合結構便可以在整體發光二極體受熱膨脹時,緩衝熱膨脹所產生的應力,因此發光二極體整體結構則不易受影響,同時亦可以加速發光二極體運作時熱量散失,降低發光二極體整體結構因熱受損的可能性。舉例而言,可以使用鋁(Al)、鈦(Ti)、鎳(Ni)、鉑(Pt)、以及金(Au)做為導電材料層,並與導電性類鑽碳層相互層疊,即可構成本發明所述之類鑽碳/導電材料多層複合結構。The conductive material layer or the conductive material may be selected from the group consisting of indium tin oxide (ITO), aluminum zinc oxide (AZO), zinc oxide (ZnO), graphene, titanium. (Ti), aluminum (Al), chromium (Cr), nickel (Ni), platinum (Pt), molybdenum (Mo), tungsten (W), silver (Ag), platinum (Pt), and gold (Au) At least one of the group groups. In other words, the conductive material layer or the metal may be composed of an alloy or a metal mixture of the above materials. Since the diamond-like carbon has a better coefficient of thermal expansion (CTE), the multi-layer composite structure of the drilled carbon/conductive material as an electrode can be used to buffer thermal expansion when the overall light-emitting diode is thermally expanded. The stress, so the overall structure of the light-emitting diode is not easily affected, and at the same time, the heat loss of the light-emitting diode during operation can be accelerated, and the possibility that the overall structure of the light-emitting diode is damaged by heat is reduced. For example, aluminum (Al), titanium (Ti), nickel (Ni), platinum (Pt), and gold (Au) may be used as the conductive material layer and laminated with the conductive diamond-like carbon layer. A multi-layer composite structure of a carbon/conductive material of the type described in the present invention is constructed.

本發明覆晶式發光二極體封裝模組之製造方法中,該第一類鑽碳/導電材料多層複合結構之表面與該第二類鑽碳/導電材料多層複合結構之表面可形成一共平面;或者,該第一類鑽碳/導電材料多層複合結構之導電類鑽碳層表 面與該第二類鑽碳/導電材料多層複合結構之導電類鑽碳層表面可形成一共平面;亦或,該第一類鑽碳/導電材料多層複合結構之表面與該第二類鑽碳/導電材料多層複合結構之表面可形成一共平面。In the manufacturing method of the flip-chip LED package module of the present invention, the surface of the first type of carbon/conductive material multilayer composite structure and the surface of the second type of carbon/conductive material multilayer composite structure may form a coplanar Or, the first type of conductive carbon-coated carbon layer table of multi-layer composite structure of carbon/conductive material The surface of the conductive diamond-like carbon layer of the second type of carbon/conductive material multilayer composite structure may form a coplanar surface; or the surface of the first type of carbon/conductive material multilayer composite structure and the second type of drill carbon / The surface of the multilayer composite structure of conductive material can form a coplanar plane.

本發明覆晶式發光二極體封裝模組之製造方法中,更可選擇性包括:一第一金屬焊接層,位於該第一類鑽碳/導電材料多層複合結構上;以及一第二金屬焊接層,位於該第二類鑽碳/導電材料多層複合結構上,其中,該第二金屬焊接層之表面與該第一金屬焊接層之表面係形成一共平面。上述本發明覆晶式發光二極體,顧名思義即以覆晶方式與另一電路載板接合(bonding),因此最後發光二極體之P型電極與N型電極表面上用於接合金屬焊接層通常會相互形成共平面。In the manufacturing method of the flip-chip LED package module of the present invention, the method further includes: a first metal solder layer on the first type of carbon/conductive material multilayer composite structure; and a second metal The soldering layer is disposed on the second type of carbon/conductive material multilayer composite structure, wherein a surface of the second metal soldering layer forms a coplanar with a surface of the first metal soldering layer. The above-mentioned flip-chip light-emitting diode of the present invention, as the name implies, is flip-chip bonded to another circuit carrier, so that the surface of the P-type electrode and the N-type electrode of the final LED is used for bonding the metal solder layer. They usually form a coplanar plane with each other.

本發明上述覆晶式發光二極體封裝模組之製造方法中可以選擇性更包含一反射層,夾置於該半導體磊晶多層複合結構與該第二電極之間,該反射層之材質可為銦錫氧化物(indium tin oxide,ITO)、氧化鋁鋅(aluminum zinc oxide,AZO)、氧化鋅(ZnO)、石墨烯(graphene)、鋁、銀、鎳(Ni)、鈷(Co)、鈀(Pd)、鉑(Pt)、金(Au)、鋅(Zn)、錫(Sn)、銻(Sb)、鉛(Pb)、銅(Cu)、銅銀(CuAg)、鎳銀(NiAg)、其合金、或其金屬混合物。上述銅銀(CuAg)與鎳銀(NiAg)等係指共晶金屬(eutectic metal)。換言之其亦可為多層金屬結構,除了用於達到反 射效果之外,也可以達到形成歐姆接觸(ohmic contact)的效用。The method for manufacturing the flip-chip LED package module of the present invention may further include a reflective layer interposed between the semiconductor epitaxial multilayer composite structure and the second electrode, and the material of the reflective layer may be Indium tin oxide (ITO), aluminum zinc oxide (AZO), zinc oxide (ZnO), graphene, aluminum, silver, nickel (Ni), cobalt (Co), Pd, Pt, Pb, Au, Zinc, Sn, Sb, Pb, Cu, Cu, Cu ), its alloy, or a mixture of metals thereof. The above copper silver (CuAg) and nickel silver (NiAg) refer to a eutectic metal. In other words, it can also be a multi-layer metal structure, in addition to reaching the opposite In addition to the effect of the shot, the effect of forming an ohmic contact can also be achieved.

再者,於製造該覆晶式發光二極體封裝模組時,為了避免於焊接該覆晶式發光二極體時,因該覆晶式發光二極體偏移而發生封裝缺陷之結果,本發明上述之覆晶式發光二極體封裝模組之製造方法,其中,於提供覆晶式發光二極體之前,更包括:設置一助焊劑於該焊料合金層上。於本發明之一態樣中,該助焊劑可為一有機化合物助焊劑,促進所使用之焊料合金對該第一金屬焊接層及第二金屬焊接層之潤濕效果;而於另一態樣中,該助焊劑可為黏著性較高的樹脂助焊劑,以暫時性的將覆晶式發光二極體固著在焊料合金層上。Furthermore, in order to avoid soldering the flip-chip light-emitting diode when manufacturing the flip-chip light-emitting diode package, the package defect occurs due to the offset of the flip-chip light-emitting diode. The method for fabricating the flip-chip LED package of the present invention, further comprising: providing a flux on the solder alloy layer before providing the flip-chip LED. In one aspect of the invention, the flux may be an organic compound flux to promote the wetting effect of the solder alloy used on the first metal solder layer and the second metal solder layer; and in another aspect The flux may be a highly adhesive resin flux to temporarily fix the flip-chip light-emitting diode on the solder alloy layer.

於本發明覆晶式發光二極體封裝模組之製造方法中,電性連接的方法並無特別限制,只要其可穩固地將覆晶式發光二極體電性連接至電路載板即可。於本發明之一具體態樣中,覆晶式發光二極體可藉由使該第一金屬焊接層以及該第二金屬焊接層各自獨立與該焊料合金層經一迴焊處理而融熔形成一連接合金層,從而使覆晶式發光二極體穩固地電性連接至電路載板。In the manufacturing method of the flip-chip light-emitting diode package module of the present invention, the method of electrically connecting is not particularly limited as long as it can firmly connect the flip-chip light-emitting diode to the circuit carrier. . In one embodiment of the present invention, the flip-chip light-emitting diode can be formed by fusing the first metal solder layer and the second metal solder layer independently of the solder alloy layer by a reflow process. A layer of the alloy is connected such that the flip-chip light-emitting diode is firmly and electrically connected to the circuit carrier.

此外,本發明之另一態樣更提供一種覆晶式發光二極體封裝模組之製造方法所製造之覆晶式發光二極體封裝模組,包括:一電路載板,其係包括至少一電性連接墊;一覆晶式發光二極體,其係包括一第一金屬焊接層及一第二金屬焊接層,且該覆晶式發光二極體係藉由一焊料合金層 及一助焊劑電性連接於該電性連接墊上,而封裝於該電路載板,其中,該第一金屬焊接層以及該第二金屬焊接層可各自獨立與該焊料合金層融熔形成一連接合金層。In addition, another aspect of the present invention further provides a flip-chip LED package module manufactured by the method for manufacturing a flip-chip LED package module, comprising: a circuit carrier board, which includes at least An electrical connection pad; a flip-chip light-emitting diode comprising a first metal solder layer and a second metal solder layer, and the flip-chip light-emitting diode system comprises a solder alloy layer And a flux is electrically connected to the electrical connection pad and encapsulated on the circuit carrier, wherein the first metal solder layer and the second metal solder layer are each independently melted with the solder alloy layer to form a joint alloy Floor.

據此,以本發明所述之覆晶式發光二極體封裝模組及其製造方法,其使用成本較低之金屬製造金屬焊接層以達到降低製造成本之目的,且所使用之覆晶式發光二極體具有緩衝熱膨脹係數差異及提升輸出光率的結構設計,可在發光二極體運作產生熱量的過程中持續使熱量散失。即使有部分熱量沒有自發光二極體中散失而促使整體結構產生熱膨脹,其中設置的類鑽碳/導電材料多層複合結構亦可緩衝對應的熱應力,而保護不受損傷,並且能藉由絕緣保護層匯聚光束而提升輸出光率。According to the present invention, the flip-chip light-emitting diode package module and the method of manufacturing the same according to the present invention use a metal with a lower cost to manufacture a metal solder layer for the purpose of reducing manufacturing cost, and the flip chip type used. The light-emitting diode has a structural design that buffers the difference in thermal expansion coefficient and increases the output light rate, and can continuously dissipate heat during the operation of the light-emitting diode to generate heat. Even if some of the heat is not dissipated in the self-luminous diode to promote thermal expansion of the overall structure, the multi-layer composite structure of the diamond-like carbon/conductive material disposed therein can also buffer the corresponding thermal stress, and the protection is not damaged, and can be insulated by The protective layer concentrates the beam to increase the output light rate.

以下係藉由特定的具體實施例說明本發明之實施方式,熟習此技藝之人士可由本說明書所揭示之內容輕易地了解本發明之其他優點與功效。本發明亦可藉由其他不同的具體實施例加以施行或應用,本說明書中的各項細節亦可基於不同觀點與應用,在不悖離本發明之精神下進行各種修飾與變更。The embodiments of the present invention are described by way of specific examples, and those skilled in the art can readily appreciate the other advantages and advantages of the present invention. The present invention may be embodied or applied in various other specific embodiments, and various modifications and changes can be made without departing from the spirit and scope of the invention.

本發明之實施例中該等圖式均為簡化之示意圖。惟該等圖示僅顯示與本發明有關之元件,其所顯示之元件非為實際實施時之態樣,其實際實施時之元件數目、形狀等比例為一選擇性之設計,且其元件佈局型態可能更複雜。The drawings in the embodiments of the present invention are simplified schematic diagrams. However, the drawings show only the components related to the present invention, and the components shown therein are not in actual implementation, and the number of components, the shape, and the like in actual implementation are a selective design, and the component layout thereof. The pattern may be more complicated.

實施例一Embodiment 1

首先,請參考圖1A至圖1H係本發明實施例一之覆晶式發光二極體之製備方法的流程結構示意圖。首先,如圖1A所示,提供一基板20,具有一第一表面201以及一相對於該第一表面201之第二表面202。接著,如圖1B所示,於該基板20之該第二表面202上方形成一半導體磊晶多層複合結構21,其中,該半導體磊晶多層複合結構21包含一無摻雜半導體磊晶層211、一第一半導體磊晶層212、一活性中間層213、以及一第二半導體磊晶層214,其中,該無摻雜半導體磊晶層211、該第一半導體磊晶層212、該活性中間層213與該第二半導體磊晶層214係層疊設置,該無摻雜半導體磊晶層211係夾置於該第一半導體磊晶層212與該基板20之間,而該活性中間層213係夾置於該第一半導體磊晶層212與該第二半導體磊晶層214之間。於本實施例中,該半導體磊晶多層複合結構21之材質為氮化鎵(GaN),且該第一半導體磊晶層212係N型,該第二半導體磊晶層214係P型,而該無摻雜半導體磊晶層211則當作該第一半導體磊晶層212與該基板20之間的一緩衝層,避免該第一半導體磊晶層212與該基板20之間晶格不匹配程度過大,並防止成長該第一半導體磊晶層212時,其磊晶缺陷密度過高之情形出現,並且可避免本實施例之覆晶式發光二極體有靜電放電及電流漏電之情形。不過,本發明半導體磊晶多層複合結構適用的材質不限於此,亦可以使用選用其他本領域中常用材質。此外,可以依需求選擇是否設置該活性中間層, 而於本實施例中,該活性中間層213為多量子井層,用以提升發光二極體中電能轉換成光能的效率。First, please refer to FIG. 1A to FIG. 1H , which are schematic structural diagrams of a method for preparing a flip-chip light-emitting diode according to Embodiment 1 of the present invention. First, as shown in FIG. 1A, a substrate 20 is provided having a first surface 201 and a second surface 202 opposite to the first surface 201. Next, as shown in FIG. 1B, a semiconductor epitaxial multilayer composite structure 21 is formed over the second surface 202 of the substrate 20, wherein the semiconductor epitaxial multilayer composite structure 21 comprises an undoped semiconductor epitaxial layer 211, a first semiconductor epitaxial layer 212, an active intermediate layer 213, and a second semiconductor epitaxial layer 214, wherein the undoped semiconductor epitaxial layer 211, the first semiconductor epitaxial layer 212, and the active intermediate layer 213 is stacked on the second semiconductor epitaxial layer 214. The undoped semiconductor epitaxial layer 211 is interposed between the first semiconductor epitaxial layer 212 and the substrate 20, and the active intermediate layer 213 is sandwiched. The first semiconductor epitaxial layer 212 is disposed between the first semiconductor epitaxial layer 212 and the second semiconductor epitaxial layer 214. In this embodiment, the material of the semiconductor epitaxial multilayer composite structure 21 is gallium nitride (GaN), and the first semiconductor epitaxial layer 212 is N-type, and the second semiconductor epitaxial layer 214 is P-type. The undoped semiconductor epitaxial layer 211 serves as a buffer layer between the first semiconductor epitaxial layer 212 and the substrate 20 to avoid lattice mismatch between the first semiconductor epitaxial layer 212 and the substrate 20. The degree is too large, and when the first semiconductor epitaxial layer 212 is grown, the epitaxial defect density is excessively high, and the situation that the flip-chip emitting diode of the embodiment has electrostatic discharge and current leakage can be avoided. However, the material suitable for the semiconductor epitaxial multilayer composite structure of the present invention is not limited thereto, and other materials commonly used in the art may also be used. In addition, the active intermediate layer can be selected according to requirements. In this embodiment, the active intermediate layer 213 is a multi-quantum well layer for improving the efficiency of converting electrical energy into light energy in the light-emitting diode.

請繼續參閱圖1B,於該半導體磊晶多層複合結構21之該第二半導體磊晶層214表面上,形成一反射層22。於本實施例中,該反射層22可以選用銦錫氧化物(indium tin oxide,ITO)、氧化鋁鋅(aluminum zinc oxide,AZO)、氧化鋅(ZnO)、石墨烯(graphene)、鋁、銀、鎳(Ni)、鈷(Co)、鈀(Pd)、鉑(Pt)、金(Au)、鋅(Zn)、錫(Sn)、銻(Sb)、鉛(Pb)、銅(Cu)、銅銀(CuAg)、及鎳銀(NiAg)所組群組之至少一者,換言之其亦可為多層金屬結構,除了用於達到反射效果之外,也可以達到形成歐姆接觸(ohmic contact)的效用。此形成反射層的步驟,本發明所屬技術領域之通常知識者可依需要選擇性執行,換言之若不打算設置反射層,則可跳過形成反射層22之步驟而無需進行。Referring to FIG. 1B, a reflective layer 22 is formed on the surface of the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer composite structure 21. In this embodiment, the reflective layer 22 may be selected from indium tin oxide (ITO), aluminum zinc oxide (AZO), zinc oxide (ZnO), graphene, aluminum, and silver. , nickel (Ni), cobalt (Co), palladium (Pd), platinum (Pt), gold (Au), zinc (Zn), tin (Sn), antimony (Sb), lead (Pb), copper (Cu) At least one of the group of copper-silver (CuAg) and nickel-silver (NiAg), in other words, it may be a multi-layer metal structure, in addition to achieving a reflection effect, an ohmic contact may also be formed. The utility. This step of forming a reflective layer can be selectively performed as desired by those skilled in the art to which the present invention pertains. In other words, if a reflective layer is not intended to be provided, the step of forming the reflective layer 22 can be skipped without being performed.

然後,請參閱圖1C,於該半導體磊晶多層複合結構21開設一盲孔23,其中,該盲孔23貫穿該第二半導體磊晶層214,且該盲孔23抵止於該第一半導體磊晶層212上。接著,請參閱1D,於該第二半導體磊晶層214上方形成一第二電極241。再來,請參閱圖1E,該盲孔23中形成一第一電極251,且該一第一電極251位於該半導體磊晶多層複合結構21之該第一半導體磊晶層212上。於本實施例中,該第二電極241及該第一電極251之材料係為鉻/金/鉑合金,而該第二電極241係為P型,以及該第一電極251係為N型。Then, referring to FIG. 1C, a blind via 23 is formed in the semiconductor epitaxial multilayer composite structure 21, wherein the blind via 23 penetrates the second semiconductor epitaxial layer 214, and the blind via 23 abuts the first semiconductor On the epitaxial layer 212. Next, referring to FIG. 1 , a second electrode 241 is formed over the second semiconductor epitaxial layer 214 . Referring to FIG. 1E , a first electrode 251 is formed in the blind via 23 , and the first electrode 251 is located on the first semiconductor epitaxial layer 212 of the semiconductor epitaxial multilayer composite structure 21 . In this embodiment, the material of the second electrode 241 and the first electrode 251 is a chromium/gold/platinum alloy, and the second electrode 241 is a P-type, and the first electrode 251 is an N-type.

接著,請參閱圖1F,形成一絕緣保護層26,其覆蓋該反射層22之側壁,該第二電極241之側壁並暴露部分該第二電極241表面,以及覆蓋該半導體磊晶多層複合結構21之該第一半導體磊晶層212之側壁、該活性中間層213之側壁、該第二半導體磊晶層214之側壁,以及該盲孔23之內壁表面並顯露由該盲孔23暴露的該第一電極251表面。該絕緣保護層26係為具有不同反射性材料之堆疊結構(於圖2A說明),係用於保護其所覆蓋的該第一半導體磊晶層212、該第二半導體磊晶層214、以及該活性中間層213之側壁,並隔絕該第一電極251、該第二半導體磊晶層214、以及該活性中間層213直接與另一後續形成的構件接觸。Next, referring to FIG. 1F, an insulating protective layer 26 is formed covering the sidewall of the reflective layer 22, the sidewall of the second electrode 241 is exposed to a portion of the surface of the second electrode 241, and the semiconductor epitaxial multilayer composite structure 21 is covered. a sidewall of the first semiconductor epitaxial layer 212, a sidewall of the active intermediate layer 213, a sidewall of the second semiconductor epitaxial layer 214, and an inner wall surface of the blind via 23 and exposed by the blind via 23 The surface of the first electrode 251. The insulating protective layer 26 is a stacked structure having different reflective materials (described in FIG. 2A) for protecting the first semiconductor epitaxial layer 212, the second semiconductor epitaxial layer 214, and the The sidewall of the active intermediate layer 213 is insulated and the first electrode 251, the second semiconductor epitaxial layer 214, and the active intermediate layer 213 are directly in contact with another subsequently formed member.

再者,如圖1G所示,於該第一電極251以及該第二電極241上,分別形成一第一類鑽碳/導電材料多層複合結構252以及一第二類鑽碳/導電材料多層複合結構242,且該第一類鑽碳/導電材料多層複合結構252填充於內壁表面覆蓋有該絕緣保護層26之該盲孔23中,並接觸該第一電極251,使得該第一類鑽碳/導電材料多層複合結構252與該第二類鑽碳/導電材料多層複合結構242形成一共平面。該第一類鑽碳/導電材料多層複合結構252與該第二類鑽碳/導電材料多層複合結構242可選自由導電材料層與導電類碳鑽層堆疊結構、導電材料與類鑽碳混合物、以及導電材料與導電性類鑽碳混合物所組群組之至少一者,其中,該導電材料層或該導電材料之材質係選自由銦錫氧化物(indium tin oxide,ITO)、氧化鋁鋅(aluminum zinc oxide,AZO)、 氧化鋅(ZnO)、石墨烯(graphene)、鈦(Ti)、鋁(Al)、鉻(Cr)、鎳(Ni)、鉑(Pt)、鉬(Mo)、鎢(W)、銀(Ag)、鉑(Pt)、以及金(Au)所組群組之至少一者。於本實施例中,該第一類鑽碳/導電材料多層複合結構252係鈦導電材料層、鋁導電材料層與類鑽碳層重複層疊結構,該第二類鑽碳/導電材料多層複合結構242係鈦導電材料層與類鑽碳層重複層疊結構。Furthermore, as shown in FIG. 1G, a first type of carbon/conductive material multilayer composite structure 252 and a second type of carbon/conductive material multilayer composite are formed on the first electrode 251 and the second electrode 241, respectively. a structure 242, and the first type of drilled carbon/conductive material multilayer composite structure 252 is filled in the blind hole 23 of the inner wall surface covered with the insulating protective layer 26, and contacts the first electrode 251, so that the first type of drill The carbon/conductive material multilayer composite structure 252 forms a coplanar with the second type of carbon/conductive material multilayer composite structure 242. The first type of carbon/conductive material multilayer composite structure 252 and the second type of carbon/conductive material multilayer composite structure 242 may be selected from a conductive material layer and a conductive carbon drill layer stack structure, a conductive material and a diamond-like carbon mixture, And at least one of the group of the conductive material and the conductive diamond-like carbon mixture, wherein the conductive material layer or the conductive material is selected from the group consisting of indium tin oxide (ITO), aluminum oxide zinc ( Aluminum zinc oxide, AZO), Zinc oxide (ZnO), graphene, titanium (Ti), aluminum (Al), chromium (Cr), nickel (Ni), platinum (Pt), molybdenum (Mo), tungsten (W), silver (Ag At least one of the group of platinum, (Pt), and gold (Au). In this embodiment, the first type of carbon/conductive material multilayer composite structure 252 is a titanium conductive material layer, an aluminum conductive material layer and a diamond-like carbon layer repeatedly laminated structure, and the second type of carbon/conductive material multilayer composite structure The 242 series titanium conductive material layer and the diamond-like carbon layer are repeatedly laminated.

最後,如圖1H所示,於該第一類鑽碳/導電材料多層複合結構252表面與該第二類鑽碳/導電材料多層複合結構242表面上,分別形成一第一金屬焊接層29以及第二金屬焊接層28,其中,該第一金屬焊接層29之表面與該第二金屬焊接層28之表面係形成一共平面。於本實施例中,該第一金屬焊接層29與該第二金屬焊接層28係由金(Au)所構成。Finally, as shown in FIG. 1H, a first metal solder layer 29 is formed on the surface of the first type of carbon/conductive material multilayer composite structure 252 and the second type of carbon/conductive material multilayer composite structure 242, respectively. The second metal solder layer 28, wherein the surface of the first metal solder layer 29 and the surface of the second metal solder layer 28 form a coplanar plane. In the embodiment, the first metal solder layer 29 and the second metal solder layer 28 are made of gold (Au).

據此,如圖1A至圖1H所示,上述製得覆晶式發光二極體,其包括:一基板20,具有一第一表面201以及一相對於該第一表面201之第二表面202;一半導體磊晶多層複合結構21,其位於該基板20之第二表面202上且該半導體磊晶多層複合結構21包含一無摻雜半導體磊晶層211、一第一半導體磊晶層212、一活性中間層213、以及一第二半導體磊晶層214,其中,該無摻雜半導體磊晶層211、該第一半導體磊晶層212、該活性中間層213、以及該第二半導體磊晶層214係為層疊設置,而該無摻雜半導體磊晶層211係夾置於該第一半導體磊晶層212與該基板20之間,且該活性中間層213係夾置於該第一半導體磊晶層212與該第二半導體磊晶 層214之間;一反射層22,位於該半導體磊晶多層複合結構21之該第二半導體磊晶層214表面;一盲孔23,設於該半導體磊晶多層複合結構21中,並貫穿該反射層22、該第二半導體磊晶層214以及該活性中間層213,而該盲孔23抵止於該第一半導體磊晶層212上;一第一電極251,該第一電極251係設置於該半導體磊晶多層複合結構21之該盲孔23上,且其位於該半導體磊晶多層複合結構21之該第一半導體磊晶層212上方;一第一類鑽碳/導電材料多層複合結構252,係填充於該半導體磊晶多層複合結構21之該盲孔23中,並覆蓋於該第一電極251上方,且電性連接該半導體磊晶多層複合結構21之該第一半導體磊晶層212;一第一金屬焊接層29,位於該第一類鑽碳/導電材料多層複合結構252上;一第二電極241,位於該半導體磊晶多層複合結構21之該第二半導體磊晶層214上方,並經由該反射層22電性連接該半導體磊晶多層複合結構21之該第二半導體磊晶層214;一第二類鑽碳/導電材料多層複合結構242,係位於該半導體磊晶多層複合結構21之該第二電極241上方,並電性連接該半導體磊晶多層複合結構21之該第二半導體磊晶層214;一第二金屬焊接層28,位於該第二類鑽碳/導電材料多層複合結構242上;其中,該第二類鑽碳/導電材料多層複合結構242之表面與第一類鑽碳/導電材料多層複合結構252之表面係形成一共平面,且該第二金屬焊接層28之表面與該第一金屬焊接層29之表面亦形成一共平面;以及一絕緣保護層26,其隔絕所覆蓋之該第一電極251、該第二電極 241、該反射層22、該第一半導體磊晶層212以及該第二半導體磊晶層214之側壁,以及該盲孔23之內壁表面,並隔絕該第一類鑽碳/導電材料多層複合結構252與該第二半導體磊晶層214之間的直接接觸。Accordingly, as shown in FIG. 1A to FIG. 1H, the above-mentioned flip-chip light-emitting diode comprises a substrate 20 having a first surface 201 and a second surface 202 opposite to the first surface 201. a semiconductor epitaxial multilayer composite structure 21 is disposed on the second surface 202 of the substrate 20, and the semiconductor epitaxial multilayer composite structure 21 includes an undoped semiconductor epitaxial layer 211, a first semiconductor epitaxial layer 212, An active intermediate layer 213 and a second semiconductor epitaxial layer 214, wherein the undoped semiconductor epitaxial layer 211, the first semiconductor epitaxial layer 212, the active intermediate layer 213, and the second semiconductor epitaxial layer The layer 214 is stacked, and the undoped semiconductor epitaxial layer 211 is sandwiched between the first semiconductor epitaxial layer 212 and the substrate 20, and the active intermediate layer 213 is sandwiched between the first semiconductor. Epitaxial layer 212 and the second semiconductor epitaxial Between the layers 214; a reflective layer 22 on the surface of the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer composite structure 21; a blind via 23 disposed in the semiconductor epitaxial multilayer composite structure 21 and extending through the a reflective layer 22, the second semiconductor epitaxial layer 214 and the active intermediate layer 213, and the blind via 23 is resisted on the first semiconductor epitaxial layer 212; a first electrode 251, the first electrode 251 is disposed On the blind via 23 of the semiconductor epitaxial multilayer composite structure 21, and above the first semiconductor epitaxial layer 212 of the semiconductor epitaxial multilayer composite structure 21; a first type of carbon/conductive material multilayer composite structure 252 is filled in the blind via 23 of the semiconductor epitaxial multilayer composite structure 21 and over the first electrode 251, and electrically connected to the first semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure 21 212; a first metal solder layer 29 on the first type of carbon/conductive material multilayer composite structure 252; a second electrode 241 located in the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer structure 21 Above and through the reflection 22 is electrically connected to the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer composite structure 21; a second type of carbon/conductive material multilayer composite structure 242 is located in the second of the semiconductor epitaxial multilayer composite structure 21 An electrode 241 is electrically connected to the second semiconductor epitaxial layer 214 of the semiconductor epitaxial multilayer composite structure 21; a second metal solder layer 28 is disposed on the second diamond-like carbon/conductive material multilayer composite structure 242; The surface of the second type of carbon/conductive material multilayer composite structure 242 forms a coplanar surface with the surface of the first type of carbon/conductive material multilayer composite structure 252, and the surface of the second metal solder layer 28 and the surface a surface of a metal solder layer 29 also forms a coplanar surface; and an insulating protective layer 26 that isolates the first electrode 251 and the second electrode covered by the insulating layer 241, the reflective layer 22, the first semiconductor epitaxial layer 212 and the sidewall of the second semiconductor epitaxial layer 214, and the inner wall surface of the blind via 23, and isolating the first diamond-like carbon/conductive material multilayer composite Direct contact between structure 252 and the second semiconductor epitaxial layer 214.

圖2A及圖2B係本發明實施例一之覆晶式發光二極體之側面結構示意圖。請參閱圖2A係本實施例之側面結構示意圖,其擷取於圖1H虛線所圈取之A部分,該絕緣保護層26係設置於該半導體磊晶多層複合結構21之外側,其包含一第一絕緣層261及一第二絕緣層262,該第一絕緣層261與該第二絕緣層262係堆疊設置;其中,上述該第一絕緣層261及該第二絕緣層262之材質分別為具有不同之折射率之材料所製成,而不同折射率材料可至少一選自由類鑽碳(DLC)、氧化鈦(Tix Oy )、二氧化矽(SiO2 )、氮化矽(SiN)、砷化鎵(GaAs)、砷化鋁(AlAs)所組成之群組;該第一絕緣層261與該第二絕緣層262依序週期性堆疊設置而具有布拉格反射鏡(Distribute Bragg reflector)之特性,且使得本實施例之覆晶發光二極體中發射至側面之光線可藉由絕緣保護層26反射至覆晶式發光二極體之出光面,進而提升輸出光率。在本實施例中,該第一絕緣層261之材料為二氧化矽(SiO2,折射率:1.55)、該第二絕緣層262之材料為二氧化鈦(TiO2 ,折射率:2.51),且該第一絕緣層261及該第二絕緣層262為交替形成14層堆疊結構。2A and 2B are schematic diagrams showing the side structure of a flip-chip type light emitting diode according to Embodiment 1 of the present invention. 2A is a side view of the embodiment of the present invention, which is taken from the portion A taken by the dotted line in FIG. 1H, and the insulating protective layer 26 is disposed on the outer side of the semiconductor epitaxial multilayer composite structure 21, which includes a first An insulating layer 261 and a second insulating layer 262, the first insulating layer 261 and the second insulating layer 262 are stacked; wherein the materials of the first insulating layer 261 and the second insulating layer 262 are respectively Different refractive index materials may be made, and at least one of different refractive index materials may be selected from the group consisting of diamond-like carbon (DLC), titanium oxide (Ti x O y ), cerium oxide (SiO 2 ), and tantalum nitride (SiN). a group of gallium arsenide (GaAs) and aluminum arsenide (AlAs); the first insulating layer 261 and the second insulating layer 262 are periodically stacked periodically to have a Bragg reflector The light emitted from the surface of the flip-chip light-emitting diode of the present embodiment can be reflected by the insulating protective layer 26 to the light-emitting surface of the flip-chip light-emitting diode, thereby improving the output light rate. In this embodiment, the material of the first insulating layer 261 is cerium oxide (SiO2, refractive index: 1.55), and the material of the second insulating layer 262 is titanium dioxide (TiO 2 , refractive index: 2.51), and the first An insulating layer 261 and the second insulating layer 262 are alternately formed into a 14-layer stacked structure.

再者,請參閱圖2B係本實施例另一側面結構示意圖,除了該絕緣保護層26係設置於該半導體磊晶多層複合結構 21之外側,且包含一第一絕緣層261及一第二絕緣層262之外,於該絕緣保護層26之最外側設置一金屬保護層27,該金屬保護層27可至少一選自由鋁(Al)、鈦(Ti)、鉬(Mo)、鎳(Ni)、銀(Ag)、金(Au)、鉑(Pt)、或其合金所組成之群組,因此,藉由該金屬保護層27,更能增加本實施例之覆晶式發光二極體發射至側面之光線反射至覆晶式發光二極體之出光面之反射率,進而更加提升輸出光率。在本實施例中,該金屬保護層27由銀(Ag,折射率:0.329)所構成。2B is another schematic structural view of the present embodiment, except that the insulating protective layer 26 is disposed on the semiconductor epitaxial multilayer composite structure. A metal protective layer 27 is disposed on the outer side of the insulating protective layer 26, and the metal protective layer 27 can be at least one selected from the group consisting of aluminum (the outer side of the second insulating layer 261 and the second insulating layer 262). a group of Al), titanium (Ti), molybdenum (Mo), nickel (Ni), silver (Ag), gold (Au), platinum (Pt), or an alloy thereof, and thus, by the metal protective layer 27, the reflectance of the light emitted from the side of the flip-chip light-emitting diode of the embodiment to the light-emitting surface of the flip-chip light-emitting diode is further increased, thereby further improving the output light rate. In the present embodiment, the metal protective layer 27 is composed of silver (Ag, refractive index: 0.329).

實施例二Embodiment 2

請參考圖3,其本發明實施例二之覆晶式發光二極體之結構示意圖。如圖3所示,本實施例與前述實施例一之覆晶式發光二極體之結構大致相同,其包括:一基板40,具有一第一表面401以及一相對於該第一表面401之第二表面402;一半導體磊晶多層複合結構41,其位於該基板40之第二表面402上且該半導體磊晶多層複合結構41包含一無摻雜半導體磊晶層411、一第一半導體磊晶層412、一活性中間層413、以及一第二半導體磊晶層414,其中,該無摻雜半導體磊晶層411、該第一半導體磊晶層412、該活性中間層413、以及該第二半導體磊晶層414係為層疊設置,而該無摻雜半導體磊晶層411係夾置於該第一半導體磊晶層412與該基板40之間,且該活性中間層413係夾置於該第一半導體磊晶層412與該第二半導體磊晶層414之間;一反射層42,位於該半導體磊晶多層複合結構41之該第二半導體磊晶層414表面;一盲孔43,設於該半導體磊晶多層複合結構 41中,並貫穿該反射層42、該第二半導體磊晶層414以及該活性中間層413,而該盲孔43抵止於該第一半導體磊晶層412上;一第一電極451,該第一電極451係設置於該半導體磊晶多層複合結構41之該盲孔43上,且其位於該半導體磊晶多層複合結構41之該第一半導體磊晶層412上方;一第一類鑽碳/導電材料多層複合結構452,係填充於該半導體磊晶多層複合結構41之該盲孔43中,並覆蓋於該第一電極451上方,且電性連接該半導體磊晶多層複合結構41之該第一半導體磊晶層412;一第一金屬焊接層49,位於該第一類鑽碳/導電材料多層複合結構452上;一第二電極441,位於該半導體磊晶多層複合結構41之該第二半導體磊晶層414上方,並經由該反射層42電性連接該半導體磊晶多層複合結構41之該第二半導體磊晶層414;一第二類鑽碳/導電材料多層複合結構442,係位於該半導體磊晶多層複合結構41之該第二電極441上方,並電性連接該半導體磊晶多層複合結構41之該第二半導體磊晶層414;一第二金屬焊接層48,位於該第二類鑽碳/導電材料多層複合結構442上;其中,該第二類鑽碳/導電材料多層複合結構442之表面與第一類鑽碳/導電材料多層複合結構452之表面係形成一共平面,且該第二金屬焊接層48之表面與該第一金屬焊接層49之表面亦形成一共平面;以及一絕緣保護層46,其隔絕所覆蓋之該第一電極451、該第二電極441、該反射層42、該第一半導體磊晶層412以及該第二半導體磊晶層414之側壁,以及該盲孔43之內壁表面,並隔絕該第一類鑽碳/導電材料多層 複合結構452與該第二半導體磊晶層414之間的直接接觸;然而,不同於前述實施例一之結構,在本實施例中,該基板40之第一表面401可藉由一蝕刻處理而形成一粗糙化表面,另一方面,該基板40之第二表面402可藉由一微影處裡而形成一圖形化表面,進而有效提升本發明覆晶式發光二極體之出光率,並且可以控制本實施例之覆晶式發光二極體偏極以及光場分佈。Please refer to FIG. 3 , which is a schematic structural diagram of a flip-chip light-emitting diode according to Embodiment 2 of the present invention. As shown in FIG. 3 , the present embodiment is substantially the same as the flip-chip LED of the first embodiment, and includes a substrate 40 having a first surface 401 and a first surface 401 opposite to the first surface 401 . a second surface 402; a semiconductor epitaxial multilayer composite structure 41 on the second surface 402 of the substrate 40 and the semiconductor epitaxial multilayer composite structure 41 includes an undoped semiconductor epitaxial layer 411, a first semiconductor a seed layer 412, an active intermediate layer 413, and a second semiconductor epitaxial layer 414, wherein the undoped semiconductor epitaxial layer 411, the first semiconductor epitaxial layer 412, the active intermediate layer 413, and the first The two semiconductor epitaxial layers 414 are stacked, and the undoped semiconductor epitaxial layer 411 is interposed between the first semiconductor epitaxial layer 412 and the substrate 40, and the active intermediate layer 413 is interposed. Between the first semiconductor epitaxial layer 412 and the second semiconductor epitaxial layer 414; a reflective layer 42 on the surface of the second semiconductor epitaxial layer 414 of the semiconductor epitaxial multilayer composite structure 41; a blind via 43 The semiconductor epitaxial multilayer composite structure 41, and penetrate the reflective layer 42, the second semiconductor epitaxial layer 414 and the active intermediate layer 413, and the blind via 43 is resisted on the first semiconductor epitaxial layer 412; a first electrode 451, the The first electrode 451 is disposed on the blind via 43 of the semiconductor epitaxial multilayer composite structure 41, and is disposed above the first semiconductor epitaxial layer 412 of the semiconductor epitaxial multilayer composite structure 41; The electrically conductive material multilayer composite structure 452 is filled in the blind via 43 of the semiconductor epitaxial multilayer composite structure 41 and covers the first electrode 451 and electrically connected to the semiconductor epitaxial multilayer composite structure 41. a first semiconductor epitaxial layer 412; a first metal solder layer 49 on the first diamond-like carbon/conductive material multilayer composite structure 452; a second electrode 441 located in the semiconductor epitaxial multilayer composite structure 41 The second semiconductor epitaxial layer 414 is electrically connected to the semiconductor epitaxial multilayer structure 41 via the reflective layer 42; a second type of carbon/conductive material multilayer composite structure 442 is used. Located in the semiconductor epitaxial Above the second electrode 441 of the layer composite structure 41, and electrically connected to the second semiconductor epitaxial layer 414 of the semiconductor epitaxial multilayer composite structure 41; a second metal solder layer 48 located in the second diamond-like carbon/ a conductive material multilayer composite structure 442; wherein a surface of the second diamond-like carbon/conductive material multilayer composite structure 442 forms a coplanar surface with a surface of the first diamond-like carbon/conductive material multilayer composite structure 452, and the second metal The surface of the solder layer 48 and the surface of the first metal solder layer 49 also form a coplanar surface; and an insulating protective layer 46 that isolates the first electrode 451, the second electrode 441, the reflective layer 42, and the a sidewall of the first semiconductor epitaxial layer 412 and the second semiconductor epitaxial layer 414, and an inner wall surface of the blind via 43 and isolating the first diamond-like carbon/conductive material multilayer The direct contact between the composite structure 452 and the second semiconductor epitaxial layer 414; however, unlike the structure of the first embodiment, in the embodiment, the first surface 401 of the substrate 40 can be processed by an etching process. Forming a roughened surface, on the other hand, the second surface 402 of the substrate 40 can form a patterned surface by a lithography, thereby effectively improving the light-emitting rate of the flip-chip light-emitting diode of the present invention, and The flip-flop and the light field distribution of the flip-chip light-emitting diode of the present embodiment can be controlled.

實施例三Embodiment 3

參考圖4,其係本發明實施例三之覆晶式發光二極體封裝模組之結構示意圖。如圖4所示,覆晶式發光二極體封裝模組包括:一電路載板6;以及上述實施例一所製得之覆晶式發光二極體2,其係經由該第一金屬焊接層29以及該第二金屬焊接層28電性連接該電路載板6,其中,電路載板6包含一絕緣層61、一電路基板60、以及電性連接墊63,該絕緣層61之材質可選自由類鑽碳、氧化鋁、陶瓷、含鑽石之環氧樹脂、或者上述材質的混合物,該電路基板60係一金屬板、一陶瓷板或一矽基板。Referring to FIG. 4, it is a schematic structural diagram of a flip-chip LED package module according to Embodiment 3 of the present invention. As shown in FIG. 4, the flip-chip LED package module includes: a circuit carrier 6; and the flip-chip LED 2 obtained in the first embodiment, which is soldered through the first metal. The layer 29 and the second metal solder layer 28 are electrically connected to the circuit carrier 6. The circuit carrier 6 includes an insulating layer 61, a circuit substrate 60, and an electrical connection pad 63. The material of the insulating layer 61 can be The diamond-like carbon, alumina, ceramic, diamond-containing epoxy resin, or a mixture of the above materials is selected, and the circuit substrate 60 is a metal plate, a ceramic plate or a substrate.

於該覆晶式發光二極體封裝模組中,可利用設置於電性連接墊63表面作為焊料合金層62之錫銀合金(Sn-Ag),透過覆晶方式,經由迴焊爐處理,使該第一金屬焊接層29以及該第二金屬焊接層28各自獨立與焊料合金層62之錫銀合金(Sn-Ag)融熔形成一形成一連接合金層(圖未顯示),以提高其熔點,進而使該覆晶式發光二極體穩固地電性連接至該電路載板6之電性連接墊63。於本實施例中,該覆晶式發 光二極體2於覆晶方式處理前,更包括於該焊料合金層62上設置一作為樹脂助焊劑(圖未顯示)之松香助焊劑,以使該覆晶式發光二極體2可固著於電性連接墊63上而不致於滑動脫落。In the flip-chip type LED package module, a tin-silver alloy (Sn-Ag) provided on the surface of the electrical connection pad 63 as a solder alloy layer 62 can be processed by a flip-chip furnace through a flip chip method. The first metal solder layer 29 and the second metal solder layer 28 are each independently melted with a tin-silver alloy (Sn-Ag) of the solder alloy layer 62 to form a joint alloy layer (not shown) to enhance The melting point further enables the flip-chip light-emitting diode to be electrically connected to the electrical connection pad 63 of the circuit carrier 6 . In this embodiment, the flip chip type Before the flip-chip process, the photodiode 2 further includes a rosin flux as a resin flux (not shown) on the solder alloy layer 62, so that the flip-chip LED 2 can be fixed. On the electrical connection pad 63, it does not slip off.

實施例四Embodiment 4

參考圖5,其係本發明實施例四之覆晶式發光二極體封裝模組之結構示意圖。如圖5所示,覆晶式發光二極體封裝模組包括:一電路載板6;以及上述實施例二所製得之覆晶式發光二極體4,其係經由該第一金屬焊接層49以及該第二金屬焊接層48電性連接該電路載板6,其中,電路載板6包含一絕緣層61、一電路基板60、以及電性連接墊63,該絕緣層61之材質可選自由類鑽碳、氧化鋁、陶瓷、含鑽石之環氧樹脂、或者上述材質的混合物,該電路基板60係一金屬板、一陶瓷板或一矽基板。FIG. 5 is a schematic structural diagram of a flip-chip LED package module according to Embodiment 4 of the present invention. As shown in FIG. 5, the flip-chip LED package module includes: a circuit carrier 6; and the flip-chip LED 4 obtained in the second embodiment, which is soldered through the first metal. The layer 49 and the second metal solder layer 48 are electrically connected to the circuit carrier 6. The circuit carrier 6 includes an insulating layer 61, a circuit substrate 60, and an electrical connection pad 63. The material of the insulating layer 61 can be The diamond-like carbon, alumina, ceramic, diamond-containing epoxy resin, or a mixture of the above materials is selected, and the circuit substrate 60 is a metal plate, a ceramic plate or a substrate.

於該覆晶式發光二極體封裝模組中,可利用設置於電性連接墊63表面作為焊料合金層62之錫銀銅合金(Sn-Ag-Cu),透過覆晶方式,經由迴焊爐處理,使該第一金屬焊接層49以及該第二金屬焊接層48各自獨立與焊料合金層62之錫銀銅合金(Sn-Ag-Cu)融熔形成一形成一連接合金層(圖未顯示),以提高其熔點,進而使該覆晶式發光二極體穩固地電性連接至與該電路載板6之電性連接墊63。於本實施例中,該覆晶式發光二極體4於覆晶方式處理前,更包括於該焊料和金層62上設置一作為有機化合物助焊劑(圖未顯示)之K-103(選購自台灣固品公司),促進所使用之錫銀 銅合金對該第一金屬焊接層及第二金屬焊階層之潤濕效果。In the flip-chip type LED package module, a tin-silver-copper alloy (Sn-Ag-Cu) provided on the surface of the electrical connection pad 63 as a solder alloy layer 62 can be used for reflow soldering through a flip chip method. Furnace treatment, the first metal solder layer 49 and the second metal solder layer 48 are each independently melted with a tin-silver-copper alloy (Sn-Ag-Cu) of the solder alloy layer 62 to form a joint alloy layer (Fig. In order to increase the melting point thereof, the flip-chip light-emitting diode is stably electrically connected to the electrical connection pad 63 of the circuit carrier 6. In the present embodiment, the flip-chip LED 4 is further provided with a K-103 as an organic compound flux (not shown) on the solder and gold layer 62 before the flip chip process. Purchased from Taiwan Solid Products Co., Ltd. to promote the use of tin silver The wetting effect of the copper alloy on the first metal weld layer and the second metal weld layer.

綜上所述,本發明之覆晶式發光二極體封裝模組之製造方法,其透過成本較低於金錫合金之金作為金屬焊接層,搭配由錫、銀、銅中之至少二者所組成之合金,使本發明之覆晶式發光二極體可穩固地與電性連接墊電性連接,並封裝於電路載板。此外,本發明之覆晶式發光二極體,其具有緩衝熱膨脹係數差異(coefficient thermal expansion mismatch)及集中出光的結構設計,可在發光二極體運作產生熱量的過程中持續使熱量散失。即使有部分熱量沒有自發光二極體中散失而促使整體結構產生熱膨脹,其中設置的類鑽碳/導電材料多層複合結構亦可緩衝對應的熱應力,而保護不受損傷,並且能匯聚光束於出光面而提升出光率。In summary, the method for manufacturing a flip-chip LED package of the present invention has a lower transmission cost than a gold-tin alloy as a metal solder layer, and is matched with at least two of tin, silver, and copper. The alloy is composed of the flip-chip light-emitting diode of the present invention to be electrically connected to the electrical connection pad and packaged on the circuit carrier. In addition, the flip-chip light-emitting diode of the present invention has a structural design of a coefficient thermal expansion mismatch and a concentrated light output, and can continuously dissipate heat during the operation of the light-emitting diode to generate heat. Even if some of the heat is not dissipated in the self-luminous diode to promote thermal expansion of the overall structure, the multi-layer composite structure of the diamond-like carbon/conductive material disposed therein can buffer the corresponding thermal stress, and the protection is not damaged, and the beam can be concentrated. Glow out the light and increase the light rate.

據此,以本發明之覆晶式發光二極體封裝模組之製造方法所製造之覆晶式發光二極體封裝模組,不僅成本低廉,且具有上述散熱效果極佳之覆晶式發光二極體。Accordingly, the flip-chip light-emitting diode package module manufactured by the method for manufacturing the flip-chip light-emitting diode package module of the present invention is not only low in cost, but also has the above-mentioned super-heat-dissipating effect. Diode.

上述實施例僅係為了方便說明而舉例而已,本發明所主張之權利範圍自應以申請專利範圍所述為準,而非僅限於上述實施例。The above-mentioned embodiments are merely examples for convenience of description, and the scope of the claims is intended to be limited to the above embodiments.

2、4‧‧‧覆晶式發光二極體2, 4‧‧‧ flip-chip light-emitting diode

20、40‧‧‧基板20, 40‧‧‧ substrate

201、401‧‧‧第一表面201, 401‧‧‧ first surface

202、402‧‧‧第二表面202, 402‧‧‧ second surface

21、41‧‧‧半導體磊晶多層複合結構21, 41‧‧‧Semiconductor epitaxial multilayer composite structure

211、411‧‧‧無摻雜半導體磊晶層211, 411‧‧‧ undoped semiconductor epitaxial layer

212、412‧‧‧第一半導體磊晶層212, 412‧‧‧ first semiconductor epitaxial layer

213、413‧‧‧活性中間層213, 413‧‧‧ active intermediate layer

214、414‧‧‧第二半導體磊晶層214, 414‧‧‧Second semiconductor epitaxial layer

22、42‧‧‧反射層22, 42‧‧‧reflective layer

23、43‧‧‧盲孔23, 43‧‧ ‧ blind holes

241、441‧‧‧第二電極2411, 441‧‧‧ second electrode

242、442‧‧‧第二類鑽碳/導電材料多層複合結構242, 442‧‧‧Second type of carbon/conductive material multilayer composite structure

251、451‧‧‧第一電極251, ‧‧‧‧first electrode

251、451‧‧‧第一電極251, ‧‧‧‧first electrode

252、452‧‧‧第一類鑽碳/導電材料多層複合結構252, 452‧‧‧First class of carbon/conductive material multilayer composite structures

26、46‧‧‧絕緣保護層26, 46‧‧‧Insulating protective layer

261‧‧‧第一絕緣層261‧‧‧First insulation

262‧‧‧第二絕緣層262‧‧‧Second insulation

27‧‧‧金屬保護層27‧‧‧Metal protective layer

28、48‧‧‧第二金屬焊接層28, 48‧‧‧Second metal welding layer

29、49‧‧‧第一金屬焊接層29, 49‧‧‧First metal welding layer

6‧‧‧電路載板6‧‧‧Circuit carrier board

60‧‧‧電路基板60‧‧‧ circuit board

61‧‧‧絕緣層61‧‧‧Insulation

62‧‧‧焊料合金層62‧‧‧ solder alloy layer

63‧‧‧電性連接墊63‧‧‧Electrical connection pads

圖1A至圖1H係本發明實施例一之覆晶式發光二極體之製備方法的流程結構示意圖。1A to FIG. 1H are schematic structural diagrams showing a method for preparing a flip-chip light-emitting diode according to Embodiment 1 of the present invention.

圖2A及圖2B係本發明實施例一之覆晶式發光二極體之側面結構示意圖。2A and 2B are schematic diagrams showing the side structure of a flip-chip type light emitting diode according to Embodiment 1 of the present invention.

圖3係本發明實施例二之覆晶式發光二極體之結構示意圖。3 is a schematic structural view of a flip-chip type light emitting diode according to Embodiment 2 of the present invention.

圖4係本發明實施例三之覆晶式發光二極體封裝模組之結構示意圖。4 is a schematic structural view of a flip-chip type light emitting diode package module according to Embodiment 3 of the present invention.

圖5係本發明實施例四之覆晶式發光二極體封裝模組之結構示意圖。FIG. 5 is a schematic structural view of a flip-chip LED package module according to Embodiment 4 of the present invention.

2‧‧‧覆晶式發光二極體2‧‧‧Flip-chip light-emitting diode

28‧‧‧第二金屬焊接層28‧‧‧Second metal soldering layer

29‧‧‧第一金屬焊接層29‧‧‧First metal soldering layer

6‧‧‧電路載板6‧‧‧Circuit carrier board

60‧‧‧電路基板60‧‧‧ circuit board

61‧‧‧絕緣層61‧‧‧Insulation

62‧‧‧焊料合金層62‧‧‧ solder alloy layer

63‧‧‧電性連接墊63‧‧‧Electrical connection pads

Claims (23)

一種覆晶式發光二極體封裝模組之製造方法,包括:提供一電路載板,係包括至少一電性連接墊;將一焊料合金層設置於該電性連接墊上,其中,該焊料合金層係至少一選自由錫(Sn)、銀(Ag)、銅(Cu)、鉍(Bi),或其合金所組成;提供一覆晶式發光二極體,其係包括一第一金屬焊接層以及一第二金屬焊接層;以及將該覆晶式發光二極體經由該第一金屬焊接層以及該第二金屬焊接層焊接於該電性連接墊,進而封裝於該電路載板;其中,該第一金屬焊接層以及該第二金屬焊接層係由金(Au)、錫(Sn)、銀(Ag)、或銅(Cu)所組成;其中,於提供一覆晶式發光二極體之前,更包括:設置一助焊劑於該焊料合金層上。 A method for manufacturing a flip-chip light-emitting diode package module, comprising: providing a circuit carrier board comprising at least one electrical connection pad; and disposing a solder alloy layer on the electrical connection pad, wherein the solder alloy At least one layer selected from the group consisting of tin (Sn), silver (Ag), copper (Cu), bismuth (Bi), or an alloy thereof; providing a flip-chip light-emitting diode comprising a first metal solder a layer and a second metal soldering layer; and soldering the flip-chip light emitting diode to the electrical connection pad via the first metal solder layer and the second metal solder layer, and then packaged on the circuit carrier board; The first metal solder layer and the second metal solder layer are composed of gold (Au), tin (Sn), silver (Ag), or copper (Cu); wherein, a flip-chip light emitting diode is provided Before the body, the method further comprises: providing a flux on the solder alloy layer. 如申請專利範圍第1項所述之覆晶式發光二極體封裝模組之製造方法,其中,該電路載板包含一絕緣層、以及一電路基板,該絕緣層之材質係至少一選自由類鑽碳、氧化鋁、陶瓷、以及含鑽石之環氧樹脂所組群組。 The method for manufacturing a flip-chip type LED package module according to claim 1, wherein the circuit carrier comprises an insulating layer and a circuit substrate, wherein the insulating layer is made of at least one selected from the group consisting of Groups of diamond-like carbon, alumina, ceramic, and diamond-containing epoxy resins. 如申請專利範圍第2項所述之覆晶式發光二極體封裝模組之製造方法,其中,該電路基板係一金屬板、一陶瓷板或一矽基板。 The method of manufacturing a flip-chip type LED package module according to claim 2, wherein the circuit substrate is a metal plate, a ceramic plate or a substrate. 如申請專利範圍第1項所述之覆晶式發光二極體封裝模組之製造方法,其中,該焊料合金係至少一選自錫銀合金(Sn-Ag)、錫銅合金(Sn-Cu)、錫鉍合金(Sn-Bi)、銀銅合金(Ag-Cu)、銀鉍合金(Ag-Bi)、錫銀銅合金(Sn-Ag-Cu)、錫銀鉍合金(Sn-Ag-Bi)、錫銅鉍合金(Sn-Cu-Bi)、銀銅鉍合金(Ag-Cu-Bi),或錫銀銅鉍合金(Sn-Ag-Cu-Bi)。 The method for manufacturing a flip-chip type light emitting diode package module according to claim 1, wherein the solder alloy is at least one selected from the group consisting of tin-silver alloy (Sn-Ag) and tin-copper alloy (Sn-Cu). ), tin-bismuth alloy (Sn-Bi), silver-copper alloy (Ag-Cu), silver-antimony alloy (Ag-Bi), tin-silver-copper alloy (Sn-Ag-Cu), tin-silver-bismuth alloy (Sn-Ag- Bi), tin-copper-bismuth alloy (Sn-Cu-Bi), silver-copper-bismuth alloy (Ag-Cu-Bi), or tin-silver-copper-bismuth alloy (Sn-Ag-Cu-Bi). 如申請專利範圍第1項所述之覆晶式發光二極體封裝模組之製造方法,其中,該覆晶式發光二極體,包括:一基板,具有一第一表面以及一相對於該第一表面之第二表面;一半導體磊晶多層複合結構,其位於該基板之該第二表面上方且包含一第一半導體磊晶層、一第二半導體磊晶層以及一盲孔,其中,該第一半導體磊晶層與該第二半導體磊晶層係層疊設置,且該盲孔貫穿該第二半導體磊晶層;一第一電極,位於該半導體磊晶多層複合結構之該第一半導體磊晶層上方;一第一類鑽碳/導電材料多層複合結構,係填充於該半導體磊晶多層複合結構之該盲孔中,並覆蓋於該第一電極上方,且電性連接該半導體磊晶多層複合結構之該第一半導體磊晶層;一第二電極,位於該半導體磊晶多層複合結構之該第二半導體磊晶層上方;以及一第二類鑽碳/導電材料多層複合結構,位於該半導體磊晶多層複合結構之該第二電極上方,並電性連接該半導體磊晶多層複合結構之該第二半導體磊晶層。 The method for manufacturing a flip-chip type light emitting diode package according to the first aspect of the invention, wherein the flip chip type light emitting diode comprises: a substrate having a first surface and a relative a second surface of the first surface; a semiconductor epitaxial multilayer composite structure over the second surface of the substrate and comprising a first semiconductor epitaxial layer, a second semiconductor epitaxial layer, and a blind via, wherein The first semiconductor epitaxial layer and the second semiconductor epitaxial layer are stacked, and the blind via extends through the second semiconductor epitaxial layer; a first electrode is located in the first semiconductor of the semiconductor epitaxial multilayer composite structure Above the epitaxial layer; a first type of carbon/conductive material multilayer composite structure is filled in the blind hole of the semiconductor epitaxial multilayer composite structure, and covers the first electrode, and is electrically connected to the semiconductor beam a first semiconductor epitaxial layer of a crystalline multilayer composite structure; a second electrode over the second semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure; and a second type of carbon/conductive material multilayer Laminated structure located above the second electrode of the semiconductor epitaxial multilayer composite structures, and electrically connected to the second semiconductor epitaxial layer of the epitaxial semiconductor multilayer composite structure. 如申請專利範圍第5項所述之覆晶式發光二極體封裝模組之製造方法,其中,該覆晶式發光二極體更包括一 絕緣保護層,覆蓋該半導體磊晶多層複合結構之該第一半導體磊晶層之側壁以及該第二半導體磊晶層之側壁,以及該盲孔之內壁表面,以隔絕及該第一類鑽碳/導電材料多層複合結構與該第二半導體磊晶層之間的接觸。 The method for manufacturing a flip-chip type light emitting diode package according to claim 5, wherein the flip chip type light emitting diode further comprises a An insulating protective layer covering sidewalls of the first semiconductor epitaxial layer of the semiconductor epitaxial multilayer composite structure and sidewalls of the second semiconductor epitaxial layer, and an inner wall surface of the blind via to isolate the first type of drill Contact between the carbon/conductive material multilayer composite structure and the second semiconductor epitaxial layer. 如申請專利範圍第6項所述之覆晶式發光二極體封裝模組之製造方法,其中,該絕緣保護層係由兩種或以上之不同折射率材料堆疊設置。 The method for manufacturing a flip-chip type LED package module according to claim 6, wherein the insulating protective layer is provided by stacking two or more different refractive index materials. 如申請專利範圍第7項所述之覆晶式發光二極體封裝模組之製造方法,其中,該不同折射率材料係至少一選自由絕緣類鑽碳(Isolated DLC)、氧化鈦(Tix Oy )、二氧化矽(SiO2)、砷化鎵(GaAs)、以及砷化鋁(AlAs)所組成之群組。The method for manufacturing a flip-chip LED package according to claim 7, wherein the different refractive index materials are at least one selected from the group consisting of insulated carbon (Isolated DLC) and titanium oxide (Ti x ). O y ), a group consisting of SiO2, GaAs, and AlAs. 如申請專利範圍第6項所述之覆晶式發光二極體封裝模組之製造方法,其中,該覆晶式發光二極體更包括在該絕緣保護層之外側設置一金屬保護層。 The method for manufacturing a flip-chip type light emitting diode package according to claim 6, wherein the flip chip type light emitting diode further comprises a metal protective layer disposed on an outer side of the insulating protective layer. 如申請專利範圍第9項所述之覆晶式發光二極體封裝模組之製造方法,其中,該金屬保護層係至少一選自由鋁(Al)、鈦(Ti)、鉬(Mo)、鎳(Ni)、銀(Ag)、金(Au)、鉑(Pt)、或其合金所組成之群組。 The method for manufacturing a flip-chip type light emitting diode package according to claim 9, wherein the metal protective layer is at least one selected from the group consisting of aluminum (Al), titanium (Ti), and molybdenum (Mo). A group consisting of nickel (Ni), silver (Ag), gold (Au), platinum (Pt), or alloys thereof. 如申請專利範圍第5項所述之覆晶式發光二極體封裝模組之製造方法,其中,該第二表面係為一圖形化表面。 The method of manufacturing a flip-chip LED package according to claim 5, wherein the second surface is a patterned surface. 如申請專利範圍第5項所述之覆晶式發光二極體封裝模組之製造方法,其中,該第一表面係為一圖形化表面或一粗糙化表面。 The method of manufacturing a flip-chip LED package according to claim 5, wherein the first surface is a patterned surface or a roughened surface. 如申請專利範圍第5項所述之覆晶式發光二極體封裝模組之製造方法,其中,該半導體磊晶多層複合結構更包括一無摻雜半導體磊晶層,該無摻雜半導體磊晶層係夾置於該第一半導體磊晶層與該基板之該第二表面之間。 The method for manufacturing a flip-chip LED package according to claim 5, wherein the semiconductor epitaxial multilayer structure further comprises an undoped semiconductor epitaxial layer, the undoped semiconductor A seed layer is interposed between the first semiconductor epitaxial layer and the second surface of the substrate. 如申請專利範圍第5項所述之覆晶式發光二極體封裝模組之製造方法,該半導體磊晶多層複合結構更包括一活性中間層,該活性中間層係夾置於該第一半導體磊晶層與該第二半導體磊晶層之間。 The method for manufacturing a flip-chip light-emitting diode package according to claim 5, wherein the semiconductor epitaxial multilayer structure further comprises an active intermediate layer, the active intermediate layer being sandwiched between the first semiconductor Between the epitaxial layer and the second semiconductor epitaxial layer. 如申請專利範圍第5項所述之覆晶式發光二極體封裝模組之製造方法,其中,該第一類鑽碳/導電材料多層複合結構、以及該第二類鑽碳/導電材料多層複合結構係選自由導電材料層與導電類碳鑽層堆疊結構、導電材料與類鑽碳混合物多層結構、以及導電材料與導電性類鑽碳混合物多層結構所組群組之至少一者。 The method for manufacturing a flip-chip LED package according to claim 5, wherein the first type of carbon/conductive material multilayer composite structure and the second type of carbon/conductive material multilayer The composite structure is selected from at least one of the group consisting of a conductive material layer and a conductive carbon-drilled layer stack structure, a conductive material and a diamond-like carbon mixture multilayer structure, and a conductive material and a conductive diamond-like carbon mixture multilayer structure. 如申請專利範圍第15項所述之覆晶式發光二極體封裝模組之製造方法,其中,該導電材料層或該導電材料之材質係選自由銦錫氧化物(indium tin oxide,ITO)、氧化鋁鋅(aluminum zinc oxide,AZO)、氧化鋅(ZnO)、石墨烯(graphene)、鈦(Ti)、鋁(Al)、鉻(Cr)、鎳(Ni)、鉑(Pt)、鉬(Mo)、鎢(W)、銀(Ag)、鉑(Pt)、以及金(Au)所組群組之至少一者。 The method for manufacturing a flip-chip type light emitting diode package according to claim 15, wherein the conductive material layer or the conductive material is selected from the group consisting of indium tin oxide (ITO). , aluminum zinc oxide (AZO), zinc oxide (ZnO), graphene, titanium (Ti), aluminum (Al), chromium (Cr), nickel (Ni), platinum (Pt), molybdenum At least one of the group consisting of (Mo), tungsten (W), silver (Ag), platinum (Pt), and gold (Au). 如申請專利範圍第5項所述之覆晶式發光二極體封裝模組之製造方法,其中,該第一類鑽碳/導電材料多層 複合結構之表面與該第二類鑽碳/導電材料多層複合結構之表面係形成一共平面。 The method for manufacturing a flip-chip LED package according to claim 5, wherein the first type of carbon/conductive material is multi-layered The surface of the composite structure forms a coplanar surface with the surface of the second type of carbon/conductive material multilayer composite structure. 如申請專利範圍第1項所述之覆晶式發光二極體封裝模組之製造方法,其中,該第一金屬焊接層係設置於該第一類鑽碳/導電材料多層複合結構上;以及該第二金屬焊接層係設置於該第二類鑽碳/導電材料多層複合結構上,且該第二金屬焊接層之表面與該第一金屬焊接層之表面係形成一共平面。 The method of manufacturing a flip-chip LED package according to claim 1, wherein the first metal solder layer is disposed on the first type of carbon/conductive material multilayer composite structure; The second metal soldering layer is disposed on the second diamond-like carbon/conductive material multilayer composite structure, and a surface of the second metal soldering layer and the surface of the first metal soldering layer form a coplanar plane. 如申請專利範圍第5項所述之覆晶式發光二極體封裝模組之製造方法,更包含一反射層,夾置於該半導體磊晶多層複合結構與該第二電極之間。 The method for manufacturing a flip-chip type LED package module according to claim 5, further comprising a reflective layer sandwiched between the semiconductor epitaxial multilayer composite structure and the second electrode. 如申請專利範圍第5項所述之覆晶式發光二極體封裝模組之製造方法,其中,該第一半導體磊晶層、該第一電極以及該第一類鑽碳/導電材料多層複合結構係N型,該第二半導體磊晶層、該第二電極以及該第二類鑽碳/導電材料多層複合結構係P型。 The method for manufacturing a flip-chip LED package according to claim 5, wherein the first semiconductor epitaxial layer, the first electrode, and the first diamond-like carbon/conductive material multilayer composite The structure is N-type, the second semiconductor epitaxial layer, the second electrode, and the second diamond-like carbon/conductive material multilayer composite structure are P-type. 如申請專利範圍第1項所述之覆晶式發光二極體封裝模組之製造方法,其中,該助焊劑係為一有機化合物助焊劑或一樹脂助焊劑。 The method for manufacturing a flip-chip type light emitting diode package according to claim 1, wherein the flux is an organic compound flux or a resin flux. 如申請專利範圍第1項所述之覆晶式發光二極體封裝模組之製造方法,其中,該第一金屬焊接層以及該第二金屬焊接層係各自獨立與該焊料合金層經一迴焊處理而融熔形成一連接合金層。 The method for manufacturing a flip-chip type light emitting diode package according to claim 1, wherein the first metal solder layer and the second metal solder layer are independently connected to the solder alloy layer. The welding process melts to form a joint alloy layer. 一種如申請專利範圍第1至22項所述之覆晶式發光二極體封裝模組之製造方法所製造之覆晶式發光二極體封裝模組,包括:一電路載板,其係包括至少一電性連接墊;一覆晶式發光二極體,其係包括一第一金屬焊接層及一第二金屬焊接層,且該覆晶式發光二極體係藉由一焊料合金層及一助焊劑電性連接於該電性連接墊上,而封裝於該電路載板,其中,該第一金屬焊接層以及該第二金屬焊接層係各自獨立與該焊料合金層融熔形成一連接合金層。 A flip-chip LED package module manufactured by the method for manufacturing a flip-chip type LED package module according to any one of claims 1 to 22, comprising: a circuit carrier board, including At least one electrical connection pad; a flip-chip light-emitting diode comprising a first metal solder layer and a second metal solder layer, and the flip-chip light-emitting diode system is provided by a solder alloy layer and a helper The solder is electrically connected to the electrical connection pad and encapsulated on the circuit carrier, wherein the first metal solder layer and the second metal solder layer are each independently melted with the solder alloy layer to form a joint alloy layer.
TW101140953A 2012-11-05 2012-11-05 Flip-chip light emitting diode on board module and method of fabricating the same TWI455665B (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
TW101140953A TWI455665B (en) 2012-11-05 2012-11-05 Flip-chip light emitting diode on board module and method of fabricating the same
CN201210586740.9A CN103811631A (en) 2012-11-05 2012-12-28 Chip flip type light emitting diode packaging module and manufacturing method thereof

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW101140953A TWI455665B (en) 2012-11-05 2012-11-05 Flip-chip light emitting diode on board module and method of fabricating the same

Publications (2)

Publication Number Publication Date
TW201419958A TW201419958A (en) 2014-05-16
TWI455665B true TWI455665B (en) 2014-10-01

Family

ID=50708106

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101140953A TWI455665B (en) 2012-11-05 2012-11-05 Flip-chip light emitting diode on board module and method of fabricating the same

Country Status (2)

Country Link
CN (1) CN103811631A (en)
TW (1) TWI455665B (en)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20160064630A1 (en) * 2014-08-26 2016-03-03 Texas Instruments Incorporated Flip chip led package
CN105428510B (en) * 2014-09-03 2018-01-30 展晶科技(深圳)有限公司 Crystal coated sealing structure of light-emitting diodes
KR101719628B1 (en) * 2014-10-27 2017-03-24 엘지이노텍 주식회사 Light emitting device package
CN105047788B (en) * 2015-07-23 2017-12-01 北京大学 A kind of membrane structure LED chip based on silver-base metal bonding and preparation method thereof
JPWO2019031183A1 (en) * 2017-08-10 2020-08-20 シャープ株式会社 Semiconductor module, display device, and method for manufacturing semiconductor module
TWI678003B (en) * 2018-01-25 2019-11-21 致伸科技股份有限公司 Light source module
DE102018120491A1 (en) * 2018-08-22 2020-02-27 Osram Opto Semiconductors Gmbh OPTOELECTRONIC COMPONENT AND METHOD FOR PRODUCING AN OPTOELECTRONIC COMPONENT
CN108933188A (en) * 2018-09-06 2018-12-04 武汉华星光电技术有限公司 Light emitting diode and the backlight module for using the light emitting diode
CN109638124A (en) * 2018-12-11 2019-04-16 合肥彩虹蓝光科技有限公司 Flip-over type light-emitting diode chip for backlight unit and preparation method thereof
CN111916550B (en) * 2019-05-09 2023-02-03 群创光电股份有限公司 Electronic device
CN110993756B (en) * 2019-12-18 2022-12-06 东莞市中晶半导体科技有限公司 LED chip and manufacturing method thereof
TWI782840B (en) * 2021-12-30 2022-11-01 友達光電股份有限公司 Light-emitting element, light-emitting assembly and display device including the same and manufacturing method of display device

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200802960A (en) * 2005-09-13 2008-01-01 Philips Lumileds Lighting Co Interconnects for semiconductor light emitting devices
TW201013973A (en) * 2008-09-22 2010-04-01 Ind Tech Res Inst Light emitting diode, and package structure and manufacturing method therefor
TW201242088A (en) * 2011-04-15 2012-10-16 Epistar Corp Light-emitting device

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP4123828B2 (en) * 2002-05-27 2008-07-23 豊田合成株式会社 Semiconductor light emitting device
KR101025844B1 (en) * 2003-10-01 2011-03-30 삼성전자주식회사 SnAgAu solder bump, method of manufacturing the same and method of bonding light emitting device using method of manufacturing solder bump
JP2008263126A (en) * 2007-04-13 2008-10-30 Oki Data Corp Semiconductor apparatus, method of manufacturing the same, led head, and image formation apparatus
US9070851B2 (en) * 2010-09-24 2015-06-30 Seoul Semiconductor Co., Ltd. Wafer-level light emitting diode package and method of fabricating the same

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW200802960A (en) * 2005-09-13 2008-01-01 Philips Lumileds Lighting Co Interconnects for semiconductor light emitting devices
TW201013973A (en) * 2008-09-22 2010-04-01 Ind Tech Res Inst Light emitting diode, and package structure and manufacturing method therefor
TW201242088A (en) * 2011-04-15 2012-10-16 Epistar Corp Light-emitting device

Also Published As

Publication number Publication date
CN103811631A (en) 2014-05-21
TW201419958A (en) 2014-05-16

Similar Documents

Publication Publication Date Title
TWI455665B (en) Flip-chip light emitting diode on board module and method of fabricating the same
TWI466328B (en) Flip-chip light emitting diode and manufacturing method and application thereof
TWI520378B (en) Flip-chip light emitting diode and application thereof
US10608144B2 (en) Electrode pad structure of a light emitting diode
TW554549B (en) Highly reflective ohmic contacts to AlGaInN flip-chip LEDs
JP5702711B2 (en) Method for producing group III-nitride LED with increased luminous capacity
TWI813171B (en) Light-emitting device
US7429750B2 (en) Solid-state element and solid-state element device
US20070262341A1 (en) Vertical led with eutectic layer
JP2011129920A (en) Light emitting element and method of manufacturing the same
US20140203318A1 (en) Light emitting element and light emitting element package
KR20110107869A (en) Light-emitting diode, light-emitting diode lamp, and method for producing light-emitting diode
TWI495160B (en) Flip-chip light emitting diode and manufacturing method and application thereof
TWI473299B (en) Flip-chip light emitting diode and manufacturing method and application thereof
US20110261847A1 (en) Light emitting devices
KR20150066405A (en) Light emitting diode having multilayer bonding pad
JP6776347B2 (en) Light emitting element, manufacturing method of light emitting element and light emitting module
JP6257203B2 (en) Light emitting element
TWI483428B (en) Vertical light emitting diode and manufacturing method and application thereof
TW201424057A (en) Chip on board and associated methods
JP2018037690A (en) Light-emitting element
US20230011141A1 (en) Semiconductor light emitting device package
TWI478371B (en) Light-emitting device
TWI830100B (en) Semiconductor optoelectronic device
TWI447933B (en) Vertical led with eutectic layer