CN110993618A - 一种tft阵列基板及其制备方法、显示面板 - Google Patents

一种tft阵列基板及其制备方法、显示面板 Download PDF

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CN110993618A
CN110993618A CN201911225344.1A CN201911225344A CN110993618A CN 110993618 A CN110993618 A CN 110993618A CN 201911225344 A CN201911225344 A CN 201911225344A CN 110993618 A CN110993618 A CN 110993618A
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polycrystalline silicon
tft array
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array substrate
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余晶晶
王威
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Wuhan China Star Optoelectronics Semiconductor Display Technology Co Ltd
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Abstract

本发明涉及一种TFT阵列基板及其制备方法、显示面板，本发明通过对所述多晶硅层进行离子掺杂，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种，且离子掺杂的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值可以设置于所述多晶硅层内，也可以设置于所述缓冲层和所述多晶硅层的接触面，还可以设置于所述缓冲层内，以此保持Vth稳定，增大S.S.或data range，改善画面均一性，提高显示面板温度场中的工作稳定性。

Description

一种TFT阵列基板及其制备方法、显示面板
技术领域
本发明涉及显示技术领域，具体涉及一种TFT阵列基板及其制备方法、显示面板。
背景技术
显示装置可以把计算机的数据变换成各种文字、数字、符号或直观的图像显示出来，并且可以利用键盘等输入工具把命令或数据输入计算机，借助系统的硬件和软件随时增添、删改、变换显示内容。显示装置根据所用之显示器件分为等离子、液晶、发光二极管和阴极射线管等类型。
有机发光显示装置(英文全称：Organic Light-Emitting Diode，简称OLED)又称为有机电激光显示装置、有机发光半导体。OLED的工作原理是：当电力供应至适当电压时，正极空穴与阴极电荷就会在发光层中结合，在库伦力的作用下以一定几率复合形成处于激发态的激子(电子-空穴对)，而此激发态在通常的环境中是不稳定的，激发态的激子复合并将能量传递给发光材料，使其从基态能级跃迁为激发态，激发态能量通过辐射驰豫过程产生光子，释放出光能，产生光亮，依其配方不同产生红、绿和蓝RGB三基色，构成基本色彩。
OLED具有电压需求低、省电效率高、反应快、重量轻、厚度薄，构造简单，成本低、广视角、几乎无穷高的对比度、较低耗电、极高反应速度等优点，已经成为当今最重要的显示技术之一。
目前OLED在中小尺寸屏幕的应用中，主要采用LTPS(英文全称：Low TemperaturePoly-silicon，低温多晶硅)背板技术。相较于LTPS-LCD使用电压驱动，LTPS-AMOLED使用电流驱动。LTPS工艺中，需要使用激光退火工艺进行多晶化，由于激光退火工艺机台的工艺以及其他相关工艺的影响，能较好适用于电压驱动LTPS-LCD的LTPS技术，在适用于电流驱动的LTPS-AMOLED中，需要设计相应的补偿电路来弥补Vth等电性均一性。为了保持Vth(阈值)稳定，增大S.S.(亚阈值摆幅)或data range(工作电压)，改善画面均一性，提高显示立面板温度场中的工作稳定性，需要寻求一种新型的TFT阵列基板。
发明内容
本发明的一个目的是提供一种TFT阵列基板及其制备方法、显示面板，其能够保持Vth稳定，增大S.S.或data range，改善画面均一性，提高显示面板温度场中的工作稳定性。
为了解决上述问题，本发明的一个实施方式提供了一种TFT阵列基板，其包括：基板、缓冲层、多晶硅层、源极、漏极、栅极绝缘层以及栅极层。其中所述缓冲层设置于所述基板上；所述多晶硅层设置于所述缓冲层上；所述源极设置于所述多晶硅层的一侧的所述缓冲层上；所述漏极设置于所述多晶硅层的另一侧的所述缓冲层上；所述栅极绝缘层设置于所述多晶硅层、源极、漏极上；所述栅极层设置于所述栅极绝缘层上；其中所述多晶硅层经过了离子掺杂处理，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种，其中掺杂离子的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值位置设置在所述多晶硅层内。
进一步的，其中所述高斯分布的峰值位置还设置在所述缓冲层和所述多晶硅层的接触面。
进一步的，其中所述高斯分布的峰值位置还设置在所述缓冲层内。
进一步的，其中所述多晶硅层的厚度范围为300-600埃。
本发明的另一个实施方式还提供了一种本发明所涉及的TFT阵列基板的制备方法，其包括：提供一基板；在所述基板上制备缓冲层；在所述缓冲层上制备多晶硅层以及位于所述多晶硅层两侧的源极和漏极；在所述多晶硅层、源极和漏极上制备栅极绝缘层；在所述栅极绝缘层上制备栅极层；对所述多晶硅层进行离子掺杂处理，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种，其中掺杂离子的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值位置设置在所述多晶硅层内。
进一步的，其中所述高斯分布的峰值位置还设置在所述缓冲层和所述多晶硅层的接触面。
进一步的，其中所述高斯分布的峰值位置还设置在所述缓冲层内。
进一步的，其中所述离子的掺杂能量范围为10-100keV。
进一步的，其中所述离子通过离子注入机对所述多晶硅层进行离子掺杂。
本发明的另一个实施方式还提供了一种显示面板，其包括本发明涉及的TFT阵列基板。
本发明的优点是：本发明涉及一种TFT阵列基板及其制备方法、显示面板，本发明通过对所述多晶硅层进行离子掺杂，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种，且离子掺杂的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值可以设置于所述多晶硅层内，也可以设置于所述缓冲层和所述多晶硅层的接触面，还可以设置于所述缓冲层内，以此保持Vth稳定，增大S.S.或data range，改善画面均一性，提高显示面板温度场中的工作稳定性。
附图说明
为了更清楚地说明本发明实施例中的技术方案，下面将对实施例描述中所需要使用的附图作简单地介绍，显而易见地，下面描述中的附图仅仅是本发明的一些实施例，对于本领域技术人员来讲，在不付出创造性劳动的前提下，还可以根据这些附图获得其他的附图。
图1是本发明TFT阵列基板的结构示意图。
图2是本发明实施例2的TFT阵列基板的制备结构示意图。
图3是本发明实施例3的TFT阵列基板的制备结构示意图。
图4是本发明实施例4的TFT阵列基板的制备结构示意图。
图中部件标识如下：
100、TFT阵列基板
1、基板 2、缓冲层
3、多晶硅层 4、源极
5、漏极 6、栅极绝缘层
7、栅极层
具体实施方式
以下结合说明书附图详细说明本发明的优选实施例，以向本领域中的技术人员完整介绍本发明的技术内容，以举例证明本发明可以实施，使得本发明公开的技术内容更加清楚，使得本领域的技术人员更容易理解如何实施本发明。然而本发明可以通过许多不同形式的实施例来得以体现，本发明的保护范围并非仅限于文中提到的实施例，下文实施例的说明并非用来限制本发明的范围。
本发明所提到的方向用语，例如「上」、「下」、「前」、「后」、「左」、「右」、「内」、「外」、「侧面」等，仅是附图中的方向，本文所使用的方向用语是用来解释和说明本发明，而不是用来限定本发明的保护范围。
在附图中，结构相同的部件以相同数字标号表示，各处结构或功能相似的组件以相似数字标号表示。此外，为了便于理解和描述，附图所示的每一组件的尺寸和厚度是任意示出的，本发明并没有限定每个组件的尺寸和厚度。
当某些组件，被描述为“在”另一组件“上”时，所述组件可以直接置于所述另一组件上；也可以存在一中间组件，所述组件置于所述中间组件上，且所述中间组件置于另一组件上。当一个组件被描述为“安装至”或“连接至”另一组件时，二者可以理解为直接“安装”或“连接”，或者一个组件通过一中间组件“安装至”或“连接至”另一个组件。
实施例1
如图1所示，一种TFT阵列基板100，其包括：基板1、缓冲层2、多晶硅层3、源极4、漏极4、栅极绝缘层5、栅极层6。其中所述缓冲层2设置于所述基板1上；所述多晶硅层3设置于所述缓冲层2上，所述源极4、漏极5分别设置于所述多晶硅层3两侧的缓冲层2上；所述栅极绝缘层6设置于所述多晶硅层3、源极4以及漏极5上；所述栅极7设置于所述栅极绝缘层6上。
其中所述多晶硅层3经过了离子掺杂处理，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种。例如：当所述离子为Ar+时，将增大S.S.或data range，同时Vth绝对值相应增大，且植入能量越大，增大越明显，可以通过调整剂量、能量获得Vth，S.S.或data range增大。当所述离子为B+，将增大S.S.或datarange，同时Vth绝对值相应减小，Vth主要由B+剂量来相应的减小，剂量越大，减小越明显，S.S.或data range可以通过剂量、植入能量获得增大；且植入能量越大，增大越明显。当所述离子为PHx+，将增大S.S.或data range，同时Vth绝对值相应减大。Vth主要由PHx+剂量来相应的增大，剂量越大，减大越明显，S.S.或data range可以通过剂量、植入能量获得增大；且植入能量越大，增大越明显。当离子混合掺杂时，将通过调整Ar+、B+、PHx+之间的比例，以获得Vth的调整稳定、s.s.或data range的增大，从而改善画面均一性，提高显示面板温度场中的工作稳定性。
其中掺杂离子的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值位置可以设置在所述多晶硅层3内，也可以设置于所述缓冲层2和所述多晶硅层3的接触面，还可以设置于所述缓冲层2内。换句话讲，所述高斯分布在所述基板的延伸方向的坐标代表掺杂离子的掺杂浓度，所述高斯分布在所述基板至所述栅极层的堆叠方向上的坐标代表位置，调节掺杂离子的浓度以及能量可以调节高斯分布的峰值位置。
由于离子掺杂是通过穿越所述多晶硅层3实现的，为了便于离子掺杂的进行，所述多晶硅层3的厚度可以为300-600埃，具体的，所述多晶硅层3的厚度可以选择450埃。
实施例2
如图2所示，一种TFT阵列基板100的制备方法，其中包括：提供一基板1；在所述基板1上制备缓冲层2；在所述缓冲层2上制备多晶硅层3以及位于所述多晶硅层3两侧的源极4和漏极5；在所述多晶硅层3、源极4和漏极5上制备栅极绝缘层6；在所述栅极绝缘层6上制备栅极层7；通过离子注入机对所述多晶硅层3进行离子掺杂，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种，且掺杂离子的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值设置于所述多晶硅层3内。
其中所述TFT阵列基板100的制备方法还可以对所述源极4和漏极5进行离子掺杂，且掺杂离子的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值设置于所述多晶硅层3内。
为了使高斯分布的峰值设置于所述多晶硅层3内，本实施例中的所述离子的掺杂能量范围为10-100keV。具体的可以选择20keV、40keV、60keV或者80keV。
其中所述TFT阵列基板100的制备方法中可以在所述非晶硅经过激光退火转换为所述多晶硅层3之后进行离子掺杂，可以在所述多晶硅层进行图案化处理之后进行离子掺杂，还可以在所述栅极绝缘层制备形成之后进行离子掺杂。具体的，可以根据实际情况决定。
经过上述方法制备形成的TFT阵列基板100通过所述多晶硅层3进行离子掺杂，且离子掺杂的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值设置于所述多晶硅层3内，通过调整Ar+、B+、PHx+之间的比例，以此保持Vth稳定，增大S.S.或data range，改善画面均一性，提高显示面板温度场中的工作稳定性。
实施例3
如图3所示，一种TFT阵列基板100的制备方法，其中包括：提供一基板1；在所述基板1上制备缓冲层2；在所述缓冲层2上制备多晶硅层3以及位于所述多晶硅层3两侧的源极4和漏极5；在所述多晶硅层3、源极4和漏极5上制备栅极绝缘层6；在所述栅极绝缘层6上制备栅极层7；通过离子注入机对所述多晶硅层3进行离子掺杂，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种，且掺杂离子的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值设置于所述缓冲层2和所述多晶硅层3的接触面上。
其中所述TFT阵列基板100的制备方法还可以对所述源极4和漏极5进行离子掺杂，且离子掺杂的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值设置于所述缓冲层2和所述多晶硅层3的接触面上。
为了使高斯分布的峰值设置于所述缓冲层2和所述多晶硅层3的接触面上，本实施例中的所述离子的掺杂能量范围为10-100keV。具体的可以选择20keV、40keV、60keV或者80keV。
其中所述TFT阵列基板100的制备方法中可以在所述非晶硅经过激光退火转换为所述多晶硅层3之后进行离子掺杂，可以在所述多晶硅层进行图案化处理之后进行离子掺杂，还可以在所述栅极绝缘层制备形成之后进行离子掺杂。具体的，可以根据实际情况决定。
经过上述方法制备形成的TFT阵列基板100通过所述多晶硅层3进行离子掺杂，且离子掺杂的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值设置于所述缓冲层2和所述多晶硅层3的接触面上，通过调整Ar+、B+、PHx+之间的比例，以此保持Vth稳定，增大S.S.或data range，改善画面均一性，提高显示面板温度场中的工作稳定性。
实施例4
如图4所示，一种TFT阵列基板100的制备方法，其中包括：提供一基板1；在所述基板1上制备缓冲层2；在所述缓冲层2上制备多晶硅层3以及位于所述多晶硅层3两侧的源极4和漏极5；在所述多晶硅层3、源极4和漏极5上制备栅极绝缘层6；在所述栅极绝缘层6上制备栅极层7；通过离子注入机对所述多晶硅层3进行离子掺杂，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种，且掺杂离子的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值设置于所述缓冲层2内。
其中所述TFT阵列基板100的制备方法还可以对所述源极4和漏极5进行离子掺杂，且离子掺杂的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值设置于所述缓冲层2内。
为了使高斯分布的峰值设置于所述缓冲层2内，本实施例中的所述离子的掺杂能量范围为10-100keV。具体的可以选择20keV、40keV、60keV或者80keV。
其中所述TFT阵列基板100的制备方法中可以在所述非晶硅经过激光退火转换为所述多晶硅层3之后进行离子掺杂，可以在所述多晶硅层进行图案化处理之后进行离子掺杂，还可以在所述栅极绝缘层制备形成之后进行离子掺杂。具体的，可以根据实际情况决定。
经过上述方法制备形成的TFT阵列基板100通过所述多晶硅层3进行离子掺杂，且离子掺杂的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值设置于所述缓冲层2内，通过调整Ar+、B+、PHx+之间的比例，以此保持Vth稳定，增大S.S.或data range，改善画面均一性，提高显示面板温度场中的工作稳定性。
本发明还提供了一种显示面板，其包括本发明所涉及的TFT阵列基板100。
以上对本发明所提供的TFT阵列基板及其制备方法、显示面板进行了详细介绍。应理解，本文所述的示例性实施方式应仅被认为是描述性的，用于帮助理解本发明的方法及其核心思想，而并不用于限制本发明。在每个示例性实施方式中对特征或方面的描述通常应被视作适用于其他示例性实施例中的类似特征或方面。尽管参考示例性实施例描述了本发明，但可建议所属领域的技术人员进行各种变化和更改。本发明意图涵盖所附权利要求书的范围内的这些变化和更改，凡在本发明的精神和原则之内所作的任何修改、等同替换和改进等，均应包含在本发明的保护范围之内。

Claims (10)

1.一种TFT阵列基板，其特征在于，包括：
基板；
缓冲层，所述缓冲层设置于所述基板上；
多晶硅层，所述多晶硅层设置于所述缓冲层上；
源极，所述源极设置于所述多晶硅层的一侧的所述缓冲层上；
漏极，所述漏极设置于所述多晶硅层的另一侧的所述缓冲层上；
栅极绝缘层，所述栅极绝缘层设置于所述多晶硅层、源极、漏极上；
栅极层，所述栅极层设置于所述栅极绝缘层上；
其中所述多晶硅层经过了离子掺杂处理，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种，其中掺杂离子的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值位置设置在所述多晶硅层内。
2.根据权利要求1所述的TFT阵列基板，其特征在于，所述高斯分布的峰值位置还设置在所述缓冲层和所述多晶硅层的接触面。
3.根据权利要求1所述的TFT阵列基板，其特征在于，所述高斯分布的峰值位置还设置在所述缓冲层内。
4.根据权利要求1所述的TFT阵列基板，其特征在于，所述多晶硅层的厚度范围为300-600埃。
5.一种制备权利要求1所述的TFT阵列基板的制备方法，其特征在于，包括：
提供一基板；
在所述基板上制备缓冲层；
在所述缓冲层上制备多晶硅层以及位于所述多晶硅层两侧的源极和漏极；
在所述多晶硅层、源极和漏极上制备栅极绝缘层；
在所述栅极绝缘层上制备栅极层；
对所述多晶硅层进行离子掺杂处理，其内掺杂的离子包括Ar+、B+、PHx+中的至少一种，其中掺杂离子的浓度在所述基板至所述栅极层的堆叠方向上呈高斯分布，所述高斯分布的峰值位置设置在所述多晶硅层内。
6.根据权利要求5所述的TFT阵列基板的制备方法，其特征在于，所述高斯分布的峰值位置还设置在所述缓冲层和所述多晶硅层的接触面。
7.根据权利要求5所述的TFT阵列基板的制备方法，其特征在于，所述高斯分布的峰值位置还设置在所述缓冲层内。
8.根据权利要求5所述的TFT阵列基板的制备方法，其特征在于，所述离子的掺杂能量范围为10-100keV。
9.根据权利要求5所述的TFT阵列基板的制备方法，其特征在于，所述离子通过离子注入机对所述多晶硅层进行离子掺杂。
10.一种显示面板，其特征在于，包括权利要求1-4中任意一项所述的TFT阵列基板。
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Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104576399A (zh) * 2014-12-29 2015-04-29 昆山国显光电有限公司 一种薄膜晶体管及其制造方法
CN104599973A (zh) * 2014-12-30 2015-05-06 深圳市华星光电技术有限公司 低温多晶硅薄膜晶体管的制备方法
CN106783563A (zh) * 2016-12-21 2017-05-31 武汉华星光电技术有限公司 一种准分子激光退火后对多晶硅薄膜表面粗糙度进行改善的方法及装置
CN106887386A (zh) * 2016-12-27 2017-06-23 北京理工大学 准分子激光退火制备桥式沟道多晶硅薄膜的方法
CN109659235A (zh) * 2018-12-14 2019-04-19 武汉华星光电半导体显示技术有限公司 Tft的制备方法、tft、阵列基板及显示装置

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104576399A (zh) * 2014-12-29 2015-04-29 昆山国显光电有限公司 一种薄膜晶体管及其制造方法
CN104599973A (zh) * 2014-12-30 2015-05-06 深圳市华星光电技术有限公司 低温多晶硅薄膜晶体管的制备方法
CN106783563A (zh) * 2016-12-21 2017-05-31 武汉华星光电技术有限公司 一种准分子激光退火后对多晶硅薄膜表面粗糙度进行改善的方法及装置
CN106887386A (zh) * 2016-12-27 2017-06-23 北京理工大学 准分子激光退火制备桥式沟道多晶硅薄膜的方法
CN109659235A (zh) * 2018-12-14 2019-04-19 武汉华星光电半导体显示技术有限公司 Tft的制备方法、tft、阵列基板及显示装置

Non-Patent Citations (2)

* Cited by examiner, † Cited by third party
Title
何利民: "《高温防护涂层技术》", 29 February 2012 *
刘永、张福海: "《晶体管原理》", 31 December 2002 *

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