CN110911477B - 半导体装置 - Google Patents

半导体装置 Download PDF

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Publication number
CN110911477B
CN110911477B CN201910120874.3A CN201910120874A CN110911477B CN 110911477 B CN110911477 B CN 110911477B CN 201910120874 A CN201910120874 A CN 201910120874A CN 110911477 B CN110911477 B CN 110911477B
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semiconductor region
region
semiconductor device
semiconductor
insulating
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CN110911477A (zh
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下村纱矢
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Toshiba Corp
Toshiba Electronic Devices and Storage Corp
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Abstract

半导体装置具有第1电极、第1导电型的第1半导体区域、第2导电型的第2半导体区域、第1导电型的第3半导体区域、导电部、栅极电极以及第2电极。导电部隔着第1绝缘部设置在第1半导体区域中。栅极电极在从第1电极朝向第1半导体区域的第1方向上与导电部相分离。栅极电极具有第1部分以及第2部分。第1部分隔着第2绝缘部设置在导电部之上。第1部分的下表面比第2半导体区域与第3半导体区域的界面的下端靠上方。第2部分在与第1方向垂直的第2方向上隔着栅极绝缘膜而与第1半导体区域、第2半导体区域以及第3半导体区域对置。第2部分的第2方向上的位置处于第1部分的第2方向上的位置与第2半导体区域的第2方向上的位置之间。

Description

半导体装置
关联申请
本申请享受以日本专利申请2018－172380号(申请日：2018年9月14日)为基础申请的优先权。本申请通过参照该基础申请而包含基础申请的全部内容。
技术领域
本发明的实施方式通常涉及半导体装置。
背景技术
MOSFET(Metal Oxide Semiconductor Field Effect Transistor)、IGBT(Insulated Gate Bipolar Transistor)等半导体装置被用于电力变换等。希望半导体装置的导通状态下的电阻(导通电阻)较小。
发明内容
实施方式提供能够降低导通电阻的半导体装置。
实施方式的半导体装置具有第1电极、第1导电型的第1半导体区域、第2导电型的第2半导体区域、第1导电型的第3半导体区域、导电部、栅极电极和第2电极。上述第1半导体区域设置在上述第1电极之上，与上述第1电极电连接。上述第2半导体区域设置在上述第1半导体区域之上。上述第3半导体区域选择性地设置在上述第2半导体区域之上。上述导电部隔着第1绝缘部设置在上述第1半导体区域中。上述栅极电极在从上述第1电极朝向上述第1半导体区域的第1方向上与上述导电部分离。上述栅极电极具有第1部分以及第2部分。上述第1部分隔着第2绝缘部而设置在上述导电部之上。上述第1部分的下表面位于比上述第2半导体区域与上述第3半导体区域的界面的下端靠上方的位置。上述第2部分在与上述第1方向垂直的第2方向上隔着栅极绝缘部而与上述第1半导体区域、上述第2半导体区域以及上述第3半导体区域对置。上述第2部分的上述第2方向上的位置处于上述第1部分的上述第2方向上的位置与上述第2半导体区域的上述第2方向上的位置之间。上述第2电极设置在上述第2半导体区域以及上述第3半导体区域之上，与上述导电部、上述第2半导体区域以及上述第3半导体区域电连接。
附图说明
图1是表示第1实施方式的半导体装置的立体剖面图。
图2是表示第1实施方式的半导体装置的一部分的剖面图。
图3中(a)及(b)是表示第1实施方式的半导体装置的制造方法的工序剖面图。
图4中(a)及(b)是表示第1实施方式的半导体装置的制造方法的工序剖面图。
图5中(a)及(b)是表示第1实施方式的半导体装置的制造方法的工序剖面图。
图6中(a)及(b)是表示第1实施方式的半导体装置的制造方法的工序剖面图。
图7中(a)及(b)是表示第1实施方式以及参考例的半导体装置的一部分的剖面图。
图8中(a)及(b)是表示第1实施方式的半导体装置的一部分的剖面图。
图9中(a)及(b)是表示第1实施方式的半导体装置的一部分的剖面图。
图10是表示第1实施方式的变形例的半导体装置的一部分的剖面图。
图11中(a)及(b)是表示第1实施方式的变形例的半导体装置的制造方法的工序剖面图。
图12中(a)及(b)是表示第1实施方式的变形例的半导体装置的制造方法的工序剖面图。
图13是表示第2实施方式的半导体装置的立体剖面图。
具体实施方式
以下，参照附图说明本发明的各实施方式。
附图是示意性或概念性的，各部分的厚度与宽度的关系、部分间的大小的比率等不一定与实际情况相同。即使在表示相同部分的情况下，也有通过附图将各自的尺寸、比率不同地表示的情况。
在本申请说明书和各图中，对于和已经说明过的要素相同的要素附加同一符号而适当省略详细说明。
以下的说明中，n+、n、n－以及p+、p的标记表示各导电型的杂质浓度的相对高低。即，附加「+」的标记表示与没有附加「+」及「－」的任一个的标记相比杂质浓度相对高，附加「－」的标记表示与什么都没有附加的标记相比杂质浓度相对低。这些标记在各自的区域中含有p型杂质和n型杂质双方的情况下表示补偿了这些杂质后的净杂质浓度的相对高低。
关于以下说明的各实施方式，也可以使各半导体区域的p型和n型反型来实施各实施方式。
图1是表示第1实施方式的半导体装置的立体剖面图。
图1所示的第1实施方式的半导体装置100是MOSFET。第1实施方式的半导体装置100具有n－型(第1导电型)漂移区域1(第1半导体区域)、p型(第2导电型)基底区域2(第2半导体区域)、n+型源极区域3(第3半导体区域)、p+型接触区域4、n+型漏极区域5、绝缘部10(第1绝缘部)、绝缘部20(第2绝缘部)、导电部30、栅极电极40、栅极绝缘部50、绝缘部51、漏极电极61(第1电极)以及源极电极62(第2电极)。
在实施方式的说明中，使用XYZ正交坐标系。将从漏极电极61朝向n－型漂移区域1的方向设为Z方向(第1方向)。将与Z方向垂直且相互正交的2个方向设为X方向(第2方向)以及Y方向。
漏极电极61设置在半导体装置100的下表面。n+型漏极区域5设置在漏极电极61之上，与漏极电极61电连接。n－型漂移区域1设置在n+型漏极区域5之上。n－型漂移区域1经由n+型漏极区域5而与漏极电极61电连接。p型基底区域2设置在n－型漂移区域1之上。n+型源极区域3以及p+型接触区域4选择性地设置在p型基底区域2之上。
导电部30隔着绝缘部10而设置在n－型漂移区域1中。栅极电极40设置在导电部30之上，与导电部30分离。栅极电极40的具体构造后述。
源极电极62设置在n+型源极区域3以及p+型接触区域4之上，与导电部30、n+型源极区域3以及p+型接触区域4电连接。在栅极电极40和源极电极62之间设有绝缘部51，这些电极被电分离。
例如，p型基底区域2、n+型源极区域3、p+型接触区域4、导电部30以及栅极电极40在X方向上设有多个，分别在Y方向上延伸。
参照图2具体说明栅极电极40的构造。
图2是表示第1实施方式的半导体装置的一部分的剖面图。
如图2所示，栅极电极40具有第1部分41、第2部分42以及第3部分43。
第1部分41隔着绝缘部20而设置在导电部30之上。第1部分41的下表面位于比p型基底区域2与n+型源极区域3之间的界面靠上方的位置。当p型基底区域2与n+型源极区域3之间的界面在Z方向上的位置根据部位而不同的情况下，第1部分41的下表面位于比该界面的最深的部分(下端)靠上方的位置。
第2部分42在X方向上隔着栅极绝缘部50而与n－型漂移区域1、p型基底区域2以及n+型源极区域3对置。即，第2部分42的下表面位于比n－型漂移区域1与p型基底区域2之间的界面靠下方的位置。当n－型漂移区域1与p型基底区域2之间的界面在Z方向上的位置根据部位而不同的情况下，第2部分42的下表面位于比该界面的与栅极绝缘部50相接的部分靠下方的位置即可。第2部分42的X方向上的位置处于第1部分41的X方向上的位置与p型基底区域2的X方向上的位置之间。
第3部分43的X方向上的位置处于第1部分41的X方向上的位置与第2部分42的X方向上的位置之间。第3部分43的下表面位于比n－型漂移区域1与p型基底区域2之间的界面靠上方的位置，并位于比p型基底区域2与n+型源极区域3之间的界面的下端靠下方的位置。
对半导体装置100的动作进行说明。
在相对于源极电极62而言向漏极电极61施加了正电压的状态下，对栅极电极40施加阈值以上的电压。由此，在p型基底区域2的栅极绝缘部50附近的区域形成沟道(反型层)，半导体装置100成为导通状态。电子经过该沟道从源极电极62流向漏极电极61。然后，当施加于栅极电极40的电压低于阈值，则p型基底区域2中的沟道消失，半导体装置100成为截止状态。
当半导体装置100切换为截止状态，则相对于源极电极62而言向漏极电极61施加的正电压增大。耗尽层从绝缘部10与n－型漂移区域1的界面起朝向n－型漂移区域1扩展。通过该耗尽层的扩展，能够提高半导体装置100的耐压。或者，维持半导体装置100的耐压不变地提高n－型漂移区域1中的n型杂质浓度，能够降低半导体装置100的导通电阻。
说明半导体装置100的各构成要素的材料的一例。
n－型漂移区域1、p型基底区域2、n+型源极区域3、p+型接触区域4以及n+型漏极区域5包含硅、碳化硅、氮化镓或砷化镓作为半导体材料。使用硅作为半导体材料的情况下，作为n型杂质，能够使用砷、磷或锑。作为p型杂质，能够使用硼。
导电部30以及栅极电极40包含多晶硅等导电材料。导电材料中可以添加有杂质。
绝缘部10、绝缘部20、栅极绝缘部50以及绝缘部51包含氧化硅等绝缘材料。绝缘部20可以含有磷或硼等杂质。绝缘部10可以含有杂质也可以不含有。例如，绝缘部20中的硼的浓度高于绝缘部10中的硼的浓度，并且高于栅极绝缘部50中的硼的浓度。
漏极电极61以及源极电极62含有铝等金属。
参照图3～图6，说明第1实施方式的半导体装置100的制造方法的一例。
图3～图6是表示第1实施方式的半导体装置的制造方法的工序剖面图。
准备半导体基板Sub。半导体基板Sub具有n+型半导体区域5a和设置在n+型半导体区域5a之上的n－型半导体区域1a。在n－型半导体区域1a的上表面形成沿Y方向延伸的多个沟槽T。如图3(a)所示，沿着n－型半导体区域1a的上表面以及沟槽T的内表面，形成绝缘层10a。绝缘层10a通过将半导体基板Sub热氧化而形成。或者，也可以通过CVD(ChemicalVapor Deposition)沿着n－型半导体区域1a的上表面以及沟槽T的内表面使绝缘材料(例如氧化硅)堆积从而形成绝缘层10a。
在绝缘层10a之上，形成埋入沟槽T的导电层。该导电层通过多晶硅等导电材料的CVD而形成。将导电层的一部分利用CDE(Chemical Dry Etching，化学干法蚀刻)等除去，使导电层的上表面后退。由此，如图3(b)所示，形成在多个沟槽T内分别分隔设置的多个导电层30a。
如图4(a)所示，在绝缘层10a以及多个导电层30a之上，形成绝缘层20a。绝缘层20a在将BPSG(Boro-phospho silicate glass，硼磷硅玻璃)膜利用CVD形成之后，通过将BPSG膜退火而形成。因此，绝缘层20a中的杂质的浓度高于绝缘层10a中的杂质的浓度。
将绝缘层10a的一部分以及绝缘层20a的一部分利用湿法蚀刻而除去。如图4(b)所示，形成了在多个沟槽T内分别分隔设置的多个绝缘层10b以及多个绝缘层20b。
选择湿法蚀刻的药液，以使绝缘层10a的蚀刻速率大于绝缘层20a的蚀刻速率。例如，绝缘层10a以及绝缘层20a含有氧化硅，绝缘层10a通过热氧化形成，绝缘层20a中的硼的浓度高于绝缘层10a中的硼的浓度。该情况下，作为药液，使用氟化氢铵(NH4HF2)和乙酸(CH3COOH)的混合液。或者，绝缘层10a以及绝缘层20a含有氧化硅，绝缘层10a通过CVD形成，绝缘层20a中的硼的浓度高于绝缘层10a中的硼的浓度。该情况下，作为药液，使用氢氟酸(HF)和氟化铵(NH4F)的混合液。结果，如图4(b)所示，形成上表面相对于X方向以及Z方向倾斜的绝缘层10b以及绝缘层20b。
通过将绝缘层10a的一部分以及绝缘层20a的一部分除去，n－型半导体区域1a的表面的一部分以及沟槽T的侧壁的一部分露出。通过将半导体基板Sub热氧化，在露出的n－型半导体区域1a的表面形成绝缘层50a。绝缘层50a的厚度小于绝缘层10b的厚度。
在该绝缘层50a之上，形成导电层40a。如图5(a)所示，在导电层40a之上形成多个掩模M。多个掩模M分别位于多个导电层30a以及多个绝缘层20b之上。掩模M通过在导电层40a之上形成光抗蚀剂并将该光抗蚀剂图案化而形成。
利用掩模M，将导电层40a的一部分通过CDE或湿法蚀刻而除去。在多个导电层30a之上形成分别分隔设置的多个导电层40b。在将掩模M除去后，如图5(b)所示，在沟槽T彼此之间的n－型半导体区域1a的上部，将p型杂质以及n型杂质依次离子注入，形成p型半导体区域2a以及n+型半导体区域3a。
形成将多个导电层40b覆盖的绝缘层51a。将绝缘层50a的一部分以及绝缘层51a的一部分除去。由此，形成开口OP。该例中，为了形成开口OP，将各个n+型半导体区域3a的一部分以及各个p型半导体区域2a的一部分除去。开口OP分别经过n+型半导体区域3而到达p型半导体区域2a。经过开口OP将p型杂质向p型半导体区域2a离子注入，如图6(a)所示，形成p+型半导体区域4a。
在绝缘层51a之上，形成埋入开口OP的金属层62a。对半导体基板Sub的下表面进行磨削直到n+型半导体区域5a成为规定的厚度。如图6(b)所示，在磨削后的下表面形成金属层61a。通过以上的工序，制造出图1所示的半导体装置100
参照图7(a)以及图7(b)，说明第1实施方式的效果。
图7(a)是表示参考例的半导体装置的一部分的剖面图。图7(b)是表示第1实施方式的半导体装置的一部分的剖面图。
参考例的半导体装置100r中，栅极电极40的下表面平行于X方向以及Y方向。栅极电极40的Z方向上的长度在X方向以及Y方向上是一样的。关于参考例的半导体装置100r的其他构成要素，与半导体装置100相同。
电流流过n－型漂移区域1时，在绝缘部10彼此之间，与其他部分(绝缘部10的下部)相比，电阻更高。这是因为，在绝缘部10彼此之间，与其他部分相比，电流路径更窄。为了降低半导体装置100的导通电阻，希望使绝缘部10的下端位于更上方。
第1实施方式的半导体装置100中，栅极电极40具有第1部分41以及第2部分42。第1部分41位于导电部30之上。第1部分41的下表面位于比p型基底区域2与n+型源极区域3的界面的下端靠上方的位置。第2部分42的下表面位于比n－型漂移区域1与p型基底区域2之间的界面靠下方的位置。
能够与第1部分41的下表面相对于第2部分42的下表面位于上方的量相应地，将导电部30设置在更上方。结果，根据图7(a)以及图7(b)的比较可知，与参考例的半导体装置100r相比，能够使绝缘部10的下端位于更上方的位置。因而，能够使绝缘部10的下端位于更上方的位置。
进而，根据第1实施方式，能够使导电部30的上端与栅极电极40的下端(第2部分42的下端)之间的Z方向上的距离更短。换言之，该距离是从X方向观察导电部30以及栅极电极40的情况下的、导电部30与栅极电极40的间隙的Z方向上的尺寸。例如，根据第1实施方式，导电部30的上端和栅极电极40的下端隔着第1绝缘部10而在X方向上排列，能够使上述间隙消失。
通常，在半导体装置100的耐压时，在n－型漂移区域1与p型基底区域2之间的界面，产生比第1绝缘部10的下端附近大的电场。通过使上述间隙减小，在耐压时的半导体装置100内部的电位分布中，能够使导电部30与栅极电极40之间的压降(日语：電位の低下)较小。若它们之间的压降变小，则相应地，第1绝缘部10下端附近的电位上升而电场强度变大。若第1绝缘部10下端附近的电场强度变大，则施加于n－型漂移区域1与p型基底区域2之间的界面的电场强度变小。由此，能够提高半导体装置100的耐压。
即，根据第1实施方式，提高半导体装置100的耐压并且能够降低半导体装置100的导通电阻。
具体说明半导体装置100的优选构造。
图8(a)、图8(b)、图9(a)以及图9(b)是表示第1实施方式的半导体装置的一部分的剖面图。
例如如图8(a)所示，导电部30的上表面可以位于比n－型漂移区域1与p型基底区域2之间的界面靠上方的位置。根据该构造，能够使导电部30以及绝缘部10的下端位于更上方的位置。结果，能够进一步降低半导体装置100的导通电阻。
或者，如图8(b)所示，导电部30的上表面可以位于比n－型漂移区域1与p型基底区域2之间的界面靠下方的位置。根据该构造，能够增长导电部30与栅极电极40之间的距离。因此，降低对栅极电极40施加了电压时的导电部30与栅极电极40之间的电场强度，能够抑制绝缘部20的绝缘击穿的发生。
绝缘部20含有磷或硼等杂质。绝缘部20中的杂质浓度高于绝缘部10中的杂质浓度，并且高于栅极绝缘部50中的杂质浓度。
栅极电极40的上表面例如如图8(a)以及图8(b)所示，朝向上方设为凸状。即，第1部分41的上表面位于比第2部分42的上表面靠上方的位置。优选的是，第1部分41的上表面如图8(b)所示，位于比n+型源极区域3的上表面更靠上方的位置。根据该构造，能够使第1部分41的Z方向上的长度更长。第1部分41的Z方向上的长度越长，越能够使栅极电极40的电阻变小。由此，在使栅极电极40的电位变化时，能够抑制产生变化的迟延。
第2部分42的下表面如图9(a)所示那样可以与X方向以及Y方向平行，也可以如图9(b)所示那样从第2部分42朝向第1部分41向上方倾斜。
如图9(b)所示那样第2部分42的下表面向上方倾斜的情况与图9(a)所示的构造相比，能够使第2部分42的下表面的各点与n－型漂移区域1之间的距离(例如距离d1、距离d2)更长。由此，能够减小n－型漂移区域1(漏极电极61)与栅极电极40之间的电容CGD。结果，缩短半导体装置100的开关时间，能够降低半导体装置100的开关损耗。
如图2所示，优选的是，第2部分42的X方向上的长度L2比第1部分41的X方向上的长度L1短，并且比第3部分43的X方向上的长度L3短。根据该构造，减少栅极电极40的Z方向上的长度较长的部分，能够减小栅极电极40的体积。由此，在形成栅极电极40时，埋入沟槽T所需要的导电材料变少，能够容易地埋入沟槽T。结果，例如，不再需要用于将沟槽T埋入的2级的导电材料的成膜、或将导电材料成膜后的表面磨削等，能够削减半导体装置100的制造所需的工序数。
(变形例)
图10是表示第1实施方式的变形例的半导体装置的剖面图。
图10所示的半导体装置110，其栅极电极40的第2部分42的形状不同于图1以及图2所示的半导体装置100。
在图1以及图2所示的半导体装置100中，第2部分42的下表面从第2部分42朝向第1部分41向上方均匀地倾斜。在半导体装置110中，第2部分42的下表面的一部分从第2部分42朝向第1部分41向下方倾斜。第2部分42的下表面的另一部分，与第2部分42的下表面的上述一部分相比，在第1部分41侧从第2部分42朝向第1部分41向上方倾斜。
例如，在图1以及图2所示的半导体装置100中，第2部分42的Z方向上的长度在与栅极绝缘部50相接的位置处最大。在半导体装置110中，第2部分42的Z方向上的长度在从栅极绝缘部50离开的位置处最大。
在没有对栅极电极40施加电压并且对漏极电极61施加了电压的状态下，在n－型漂移区域1与栅极电极40之间产生电位差。如半导体装置100那样，在第2部分42的下表面均匀地向上方倾斜的情况下，第2部分42的侧面与下表面之间的角度变小，侧面与下表面之间的部分的曲率变大。由此，在该部分附近发生电场集中，有可能发生绝缘击穿。
在半导体装置110中，第2部分42的下表面的一部分在从第2部分42朝向第1部分41的方向上向下方倾斜。第2部分42的下表面的另一部分在从第2部分42朝向第1部分41的方向上向上方倾斜。根据该结构，能够减小第2部分42的侧面与下表面之间的部分的曲率。由此，缓和该部分附近的电场集中，能够抑制发生绝缘击穿。
在半导体装置110中，绝缘部10具有第1区域11以及第2区域12。第1区域11设置在导电部30的周围，与导电部30相接。第2区域12设置在n－型漂移区域1与第1区域11之间，与n－型漂移区域1相接。
第2区域12含有硼。第1区域11可以含有硼也可以不含有硼。第2区域12中的硼的浓度高于第1区域11中的硼的浓度。在制造半导体装置110时，若在第2区域12中含有硼，则热处理时硼从第2区域12向n－型漂移区域1扩散。由此，n－型漂移区域1的第2区域12附近的有效n型杂质浓度下降。由此，n－型漂移区域1的第2区域12附近的耗尽化的速度加速，能够减小n－型漂移区域1(漏极电极61)与导电部30(源极电极62)之间的电容CDS。
图11以及图12是表示第1实施方式的变形例的半导体装置的制造方法的工序剖面图。
首先，与已经说明过的半导体装置的制造方法同样，在基板Sub的上表面形成多个沟槽T。沿着n－型半导体区域1a的上表面以及沟槽T的内面，形成绝缘层10a1。如图11(a)所示，沿着绝缘层10a1的表面，形成绝缘层10a2。绝缘层10a1例如比绝缘层10a2薄。
绝缘层10a1利用CVD使BSG(Boron silicate glass)堆积而形成。绝缘层10a2使氧化硅不添加杂质而通过CVD进行堆积来形成。
进行与图3(b)以及图4(a)所示的工序相同的工序，如图11(b)所示，形成多个导电层30a以及绝缘层20a。然后，将绝缘层10a1、绝缘层10a2以及绝缘层20a各自的一部分利用湿法蚀刻而除去。由此，如图12(a)所示，形成了分别分隔地设置在多个沟槽T内的多个绝缘层10b1、多个绝缘层10b2以及多个绝缘层20b。
选择湿法蚀刻的药液，以使得绝缘层10a2的蚀刻速率大于绝缘层10a1的蚀刻速率，并且大于绝缘层20a的蚀刻速率。作为湿法蚀刻的药液，与图4(b)所示的工序同样地，能够使用氟化氢铵(NH4HF2)与乙酸(CH3COOH)的混合液、氢氟酸(HF)与氟化铵(NH4F)的混合液等。
结果，绝缘层10b1、绝缘层10b2以及绝缘层20b的上表面从绝缘层20b朝向绝缘层10b2向下方倾斜，并且从绝缘层10b1朝向绝缘层10b2向下方倾斜。
进行与图5(a)、图5(b)以及图6(a)所示的工序相同的工序，得到图12(b)所示的构造。然后，通过进行与图6(b)所示的工序相同的工序，制造出具有图10所示的栅极电极40的构造的半导体装置110。
以上说明的形态不仅适用于MOSFET，还能够适用于IGBT。
(第2实施方式)
图13是表示第2实施方式的半导体装置的立体剖面图。
图13所示的第2实施方式的半导体装置200是IGBT。半导体装置200取代n+型漏极区域5而具有p+型集电极区域6以及n型缓冲区域7。半导体装置200中，漏极电极61以及源极电极62分别作为集电极电极以及发射极电极发挥功能。
p+型集电极区域6设置在集电极电极61之上，与集电极电极61电连接。n型缓冲区域7设置在p+型集电极区域6之上。n－型漂移区域1设置在n型缓冲区域7之上。
根据第2实施方式，与第1实施方式同样地，栅极电极40具有第1部分41，从而能够使绝缘部10的下端位于更上方的位置。因此，能够提高半导体装置200的耐压并降低导通电阻。关于第1实施方式中说明过的其他特征，也能够适用于第2实施方式的半导体装置200。
关于以上说明的各实施方式中的、各半导体区域之间的杂质浓度的相对高低，例如，能够利用SCM(扫描型静电容显微镜)确认。各半导体区域中的载流子浓度能够视为与各半导体区域中活性化了的杂质浓度相等。因而，关于各半导体区域之间的载流子浓度的相对高低，也能够利用SCM确认。
关于各半导体区域的杂质浓度，例如能够通过SIMS(二次离子质量分析法)测定。
以上，例示了本发明的几个实施方式，这些实施方式是作为例子提示的，并不意欲限定发明的范围。这些新的实施方式能够以其他各种各样的形态实施，在不脱离发明主旨的范围内，能够进行各种省略、替换、变更。这些实施方式及其变形包含在发明的范围及主旨中，并且包含在权利要求所记载的发明及其等同范围中。上述的各实施方式能够相互组合来实施。

Claims (7)

1.一种半导体装置，其中，具备：
第1电极；
第1导电型的第1半导体区域，设置在上述第1电极之上，与上述第1电极电连接；
第2导电型的第2半导体区域，设置在上述第1半导体区域之上；
第1导电型的第3半导体区域，选择性地设置在上述第2半导体区域之上；
导电部，隔着第1绝缘部设置在上述第1半导体区域中；
栅极电极，在从上述第1电极朝向上述第1半导体区域的第1方向上与上述导电部相分离，具有第1部分和第2部分，上述第1部分隔着第2绝缘部设置在上述导电部之上，上述第1部分的下表面位于比上述第2半导体区域与上述第3半导体区域的界面的下端靠上方的位置，上述第2部分在与上述第1方向垂直的第2方向上隔着栅极绝缘部而与上述第1半导体区域、上述第2半导体区域以及上述第3半导体区域相对置，上述第2部分的上述第2方向上的位置处于上述第1部分的上述第2方向上的位置与上述第2半导体区域的上述第2方向上的位置之间；以及
第2电极，设置在上述第2半导体区域以及上述第3半导体区域之上，与上述导电部、上述第2半导体区域以及上述第3半导体区域电连接。
2.如权利要求1所述的半导体装置，其中，
上述导电部的上表面位于比上述第1半导体区域与上述第2半导体区域之间的界面靠上方的位置。
3.如权利要求1所述的半导体装置，其中，
上述栅极电极的上表面朝向上述第1方向设置为凸状。
4.如权利要求1所述的半导体装置，其中，
上述第1部分的上表面位于比上述第3半导体区域的上表面靠上方的位置。
5.如权利要求1所述的半导体装置，其中，
上述第2部分的下表面从上述第2部分朝向上述第1部分向上方进行了倾斜。
6.如权利要求1所述的半导体装置，其中，
上述栅极电极还具有第3部分，
上述第3部分的上述第2方向上的位置处于上述第1部分的上述第2方向上的位置与上述第2部分的上述第2方向上的位置之间，
上述第3部分的下表面位于比上述第1半导体区域与上述第2半导体区域之间的界面靠上方的位置，并且位于比上述第2半导体区域与上述第3半导体区域之间的界面的下端靠下方的位置，
上述第2部分的上述第2方向上的长度比上述第1部分的上述第2方向上的长度短，并且比上述第3部分的上述第2方向上的长度短。
7.如权利要求1所述的半导体装置，其中，
上述第2部分的下表面的一部分从上述第2部分朝向上述第1部分向下方进行了倾斜，
上述第2部分的下表面的另一部分位于比上述第2部分的下表面的上述一部分靠上述第1部分侧的位置，并且从上述第2部分朝向上述第1部分向上方进行了倾斜。
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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001085688A (ja) * 1999-09-14 2001-03-30 Toshiba Corp 半導体装置及びその製造方法
CN103022094A (zh) * 2011-09-21 2013-04-03 株式会社东芝 半导体器件及其制造方法
JP2015222817A (ja) * 2015-06-30 2015-12-10 ルネサスエレクトロニクス株式会社 Ｐチャネル型パワーｍｏｓｆｅｔの製造方法
CN107833919A (zh) * 2016-09-16 2018-03-23 株式会社东芝 半导体装置及其制造方法

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI400757B (zh) 2005-06-29 2013-07-01 Fairchild Semiconductor 形成遮蔽閘極場效應電晶體之方法
US7385248B2 (en) 2005-08-09 2008-06-10 Fairchild Semiconductor Corporation Shielded gate field effect transistor with improved inter-poly dielectric
US7674678B2 (en) * 2008-05-05 2010-03-09 Infineon Technologies Austria Ag Method for producing a transistor component having a field plate
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JP5774921B2 (ja) 2011-06-28 2015-09-09 ルネサスエレクトロニクス株式会社 半導体装置、半導体装置の製造方法、及び電子装置
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Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001085688A (ja) * 1999-09-14 2001-03-30 Toshiba Corp 半導体装置及びその製造方法
CN103022094A (zh) * 2011-09-21 2013-04-03 株式会社东芝 半导体器件及其制造方法
JP2015222817A (ja) * 2015-06-30 2015-12-10 ルネサスエレクトロニクス株式会社 Ｐチャネル型パワーｍｏｓｆｅｔの製造方法
CN107833919A (zh) * 2016-09-16 2018-03-23 株式会社东芝 半导体装置及其制造方法

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