CN110911472A - 绝缘栅双极型晶体管 - Google Patents

绝缘栅双极型晶体管 Download PDF

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CN110911472A
CN110911472A CN201910862120.5A CN201910862120A CN110911472A CN 110911472 A CN110911472 A CN 110911472A CN 201910862120 A CN201910862120 A CN 201910862120A CN 110911472 A CN110911472 A CN 110911472A
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emitter
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细川博司
岩崎真也
利田祐麻
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Toyota Motor Corp
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Abstract

本发明提供一种绝缘栅双极型晶体管，在具有矩形沟槽的IGBT中抑制接触电阻的上升同时抑制闩锁。一种绝缘栅双极型晶体管，其中，具备配置于矩形沟槽内的栅电极。发射极区域与构成矩形沟槽的一边的直线沟槽接触。表层体区域在与发射极区域相邻的范围中与直线沟槽接触。体接触区域从直线沟槽的相反侧与发射极区域接触。体接触区域具有第一部分和相比第一部分向发射极区域侧突出的第二部分。第二部分与直线沟槽之间的发射极区域的宽度比第一部分与直线沟槽之间的发射极区域的宽度窄。

Description

绝缘栅双极型晶体管
技术领域
本说明书公开的技术涉及绝缘栅双极型晶体管。
背景技术
在专利文献1中公开了一种绝缘栅双极型晶体管(以下，称作IGBT(insulatedgate bipolar transistor))。图14、15示出了专利文献1的IGBT。如图14、15所示，专利文献1的IGBT具有矩形沟槽。在矩形沟槽内配置有栅极绝缘膜182和栅电极180。栅电极180的上表面由层间绝缘膜178覆盖。通过层间绝缘膜178，栅电极180从发射极150绝缘。在由矩形沟槽包围的矩形区域112内配置有n型的发射极区域122、高浓度p型的体接触区域124、p型的表层体区域126、p型的分离体区域127及n型的柱区域128。分离体区域127相对于发射极区域122、体接触区域124及表层体区域126从下侧接触，并与矩形沟槽接触。在分离体区域127的下侧配置有n型的漂移区域134。发射极区域122与构成矩形沟槽的一边的直线沟槽191接触。表层体区域126在与发射极区域122相邻的范围中与直线沟槽191接触。体接触区域124从直线沟槽191的相反侧与发射极区域122接触。当向栅电极180施加栅极阈值以上的电位时，在表层体区域126和分离体区域127形成沟道。通过沟道，发射极区域122与漂移区域134连接，电子从发射极区域122向漂移区域134流动。即，IGBT接通。由于不仅在发射极区域122的下部的分离体区域127，也在相对于发射极区域122在横向上相邻的表层体区域126形成沟道，所以该IGBT的沟道密度高。因而，该IGBT的饱和电流高，在该IGBT中难以产生稳态损失。
现有技术文献
专利文献
专利文献1：日本特开2017-107948号公报
发明内容
发明所要解决的课题
当IGBT接通时，不仅是电子，也会流动空穴。空穴从漂移区域134经由分离体区域127和体接触区域124而向发射极150流动。如图15的箭头200所示那样流入到发射极区域122的正下方的分离体区域127的空穴如图15的箭头202所示那样在发射极区域122的下部在横向上流动并向体接触区域124流入。在专利文献1的IGBT中，由于发射极区域122的宽度W122大，所以在发射极区域122的下部空穴在横向上流动的距离长，该部分的电阻高。其结果，发射极区域122的正下方的分离体区域127的电位容易变高，空穴容易从分离体区域127向发射极区域122流入。因而，存在容易产生闩锁这一问题。
通过缩窄发射极区域的宽度W122而缩短箭头202所示的空穴的路径，能够抑制闩锁。然而，由于发射极区域122的表面的一部由层间绝缘膜178覆盖，所以发射极区域122相对于发射极150的接触面积小。若使发射极区域122的宽度W122比图15窄，则发射极区域122相对于发射极150的接触面积会变得极小，接触电阻会变得极高。
因此，在本说明书中，提供一种在具有矩形沟槽的IGBT中抑制接触电阻的上升同时抑制闩锁的技术。
用于解决课题的方案
本说明书公开的IGBT具备半导体基板、配置于所述半导体基板的上表面的发射极、配置于所述半导体基板的下表面的集电极、在所述上表面处呈矩形状延伸的矩形沟槽、配置于所述矩形沟槽内的栅极绝缘膜、栅电极及层间绝缘膜。所述栅电极配置于所述矩形沟槽内，沿着所述矩形沟槽呈矩形状延伸，通过所述栅极绝缘膜而从所述半导体基板绝缘。所述层间绝缘膜将所述栅电极从所述发射极绝缘。所述半导体基板具有发射极区域、体接触区域、表层体区域、分离体区域、漂移区域及集电极区域。所述发射极区域是配置于由所述矩形沟槽包围的矩形区域内且与所述发射极接触的n型区域。所述体接触区域是配置于所述矩形区域内且与所述发射极接触的p型区域。所述表层体区域是配置于所述矩形区域内且与所述发射极接触且p型杂质浓度比所述体接触区域低的p型区域。所述分离体区域是相对于所述发射极区域、所述体接触区域及所述表层体区域从下侧接触且与所述矩形沟槽接触且p型杂质浓度比所述体接触区域低的p型区域。所述漂移区域是配置于所述分离体区域的下侧且通过所述分离体区域而从所述发射极区域分离且与所述矩形沟槽的下端接触的n型区域。所述集电极区域是配置于所述漂移区域的下侧且通过所述漂移区域而从所述分离体区域分离且与所述集电极接触的p型区域。所述矩形沟槽具备构成所述矩形沟槽的一边的直线沟槽。所述发射极区域与所述直线沟槽接触。所述表层体区域在与所述发射极区域相邻的范围中与所述直线沟槽接触。所述体接触区域从所述直线沟槽的相反侧与所述发射极区域接触。所述体接触区域具有第一部分和相比所述第一部分向所述发射极区域侧突出的第二部分。所述第二部分与所述直线沟槽之间的所述发射极区域的宽度比所述第一部分与所述直线沟槽之间的所述发射极区域的宽度窄。
在该IGBT中，体接触区域具有相比第一部分向发射极区域侧突出的第二部分，第二部分与直线沟槽之间的发射极区域的宽度窄。因而，流入到发射极区域的正下方的分离体区域的空穴容易向体接触区域的第二部分流入。因而，空穴在分离体区域内流动的路径短，发射极区域的正下方的分离体区域的电位难以上升。因此，空穴难以向发射极区域流入，难以产生闩锁。另外，由于第一部分与直线沟槽之间的发射极区域的宽度宽，所以能够在该部分处全部发射极区域与发射极的接触面积。因此，能够抑制接触电阻的上升。这样，根据该IGBT，能够抑制接触电阻的上升同时抑制闩锁。
附图说明
图1是示出半导体基板的上表面的俯视图。
图2是图1的II-II线处的纵剖视图。
图3是图1的III-III线处的纵剖视图。
图4是图1的IV-IV线处的纵剖视图。
图5是图1的V-V线处的纵剖视图。
图6是矩形区域的放大俯视图。
图7是发射极区域及其周边的放大俯视图。
图8是图2的发射极区域及其周边的放大剖视图。
图9是图3的发射极区域及其周边的放大剖视图。
图10是发射极区域及其周边的放大俯视图。
图11是第一变形例的IGBT的与图6对应的放大俯视图。
图12是第一变形例的IGBT的与图2对应的纵剖视图。
图13是第二变形例的IGBT的与图7对应的放大俯视图。
图14是专利文献1的半导体装置的放大俯视图。
图15是专利文献1的半导体装置的纵剖视图。
具体实施方式
图1～5示出了实施方式的IGBT10。如图2～5所示，IGBT10具有半导体基板20、发射极50及集电极60。发射极50配置于半导体基板20的上表面20a。集电极60配置于半导体基板20的下表面20b。需要说明的是，在图1中，省略了发射极50等比半导体基板20的上表面20a靠上侧的构造的图示。另外，在以下的说明中，将与上表面20a平行的一方向称作x方向，将与上表面20a平行并且与x方向正交的方向称作y方向，将半导体基板20的厚度方向(即，与x方向及y方向正交的方向)称作z方向。
如图1所示，在半导体基板20的上表面20a形成有多个沟槽91和多个沟槽92。如图2～5所示，各沟槽91、92相对于半导体基板20的上表面20a大致垂直地(即，在z方向上)延伸。如图1所示，各沟槽92在俯视半导体基板20的上表面20a时在x方向上呈直线状延伸。多个沟槽92在y方向上隔开间隔而并列。各沟槽91在俯视半导体基板20的上表面20a时在y方向上呈直线状延伸。在夹在2个沟槽92之间的各范围95配置有多个沟槽91。各沟槽91的两端连接于其两侧的沟槽92。各沟槽91相对于在y方向上相邻的其他沟槽91以在x方向上位置错开的方式配置。沟槽91在其各端部处与各沟槽92呈三岔路状交叉。通过沟槽91及92，半导体基板20的上表面20a被分隔成矩形的区域。以下，将由沟槽91、92分隔出的矩形的半导体区域称作矩形区域12。另外，以下，将包围1个矩形区域12的周围的沟槽91、92的组称作矩形沟槽。
如图1～5所示，矩形沟槽的内表面(即，底面和侧面)由栅极绝缘膜82覆盖。在矩形沟槽内配置有栅电极80。栅电极80隔着栅极绝缘膜82而与半导体基板20对向。栅电极80通过栅极绝缘膜82而从半导体基板20绝缘。栅电极80跨越配置于沟槽91的内部和沟槽92的内部。因此，栅电极80沿着矩形沟槽呈矩形状延伸。因而，在如图1所示那样从上侧俯视时，各矩形区域12的周围由栅电极80包围。另外，如图2～5所示，栅电极80的上表面由层间绝缘膜78覆盖。沟槽91、92附近的半导体基板20的上表面20a也由层间绝缘膜78覆盖。以覆盖层间绝缘膜78的方式配置有发射极50。通过层间绝缘膜78，栅电极80从发射极50绝缘。发射极50在未设置层间绝缘膜78的开口部79内与半导体基板20的上表面20a接触。
接着，对各矩形区域12的构造进行说明。需要说明的是，各矩形区域12的构造互相相等，因此，以下对1个矩形区域12的构造进行说明。图6示出了将1个矩形区域12放大的俯视图。如图6所示，矩形沟槽由2个沟槽91(沟槽91-1及91-2)和2个沟槽92(沟槽92-1及92-2)构成。换言之，矩形区域12由沟槽91-1、91-2、92-1及92-2包围。以下，将矩形区域12中的与沟槽91-1与沟槽92-1的连接部相邻的部分称作角落部71，将与沟槽92-1与沟槽91-2的连接部相邻的部分称作角落部72，将与沟槽91-2与沟槽92-2的连接部相邻的部分称作角落部73，将与沟槽92-2与沟槽91-1的连接部相邻的部分称作角落部74。另外，在沟槽92-1上连接有构成相邻的矩形沟槽的沟槽91-3。另外，在沟槽92-2上连接有构成相邻的矩形沟槽的沟槽91-4。另外，图6通过虚线而示出了开口部79的位置。如图6所示，开口部79配置于矩形区域12内。在开口部79内，发射极50与半导体基板20的上表面20a接触。
如图2～6所示，在矩形区域12的内部配置有发射极区域22、体接触区域24、表层体区域26、分离体区域27、柱区域28、势垒区域30、下部体区域32。
柱区域28由n型杂质浓度低的n型半导体构成。如图2、3所示，柱区域28配置于向半导体基板20的上表面20a露出的范围。如图2、3、6所示，柱区域28在开口部79内与发射极50进行肖特基接触。柱区域28配置于矩形区域12的中央部。
体接触区域24由p型杂质浓度高的p型半导体构成。如图2、3、5所示，体接触区域24配置于向半导体基板20的上表面20a露出的范围。如图6所示，体接触区域24在上表面20a上包围柱区域28的周围。如图2、3、5、6所示，体接触区域24在开口部79内与发射极50进行欧姆接触。体接触区域24与沟槽92-1、92-2内的栅极绝缘膜82接触。需要说明的是，以下，有时将与沟槽内的栅极绝缘膜接触称作“与沟槽接触”。体接触区域24与沟槽92-1及92-2接触，另一方面，与沟槽91-1及91-2不接触。
发射极区域22由n型杂质浓度高的n型半导体构成。如图6所示，在1个矩形区域12中配置有2个发射极区域22a、22b。如图2、3、4所示，各发射极区域22配置于向半导体基板20的上表面20a露出的范围。如图6所示，各发射极区域22的一部分配置于开口部79内，各发射极区域22的其他部分配置于开口部70外(即，由层间绝缘膜78覆盖的范围)。如图2、3、4、6所示，各发射极区域22在开口部79内与发射极50进行欧姆接触。如图6所示，一方的发射极区域22a与沟槽91-1接触。发射极区域22a在矩形区域12的一边的中央部的位置处与沟槽91-1接触。另一方的发射极区域22b与沟槽91-2接触。发射极区域22b在矩形区域12的一边的中央部的位置处与沟槽91-2接触。
表层体区域26由p型杂质浓度比体接触区域24低的半导体构成。如图4、5所示，表层体区域26配置于向半导体基板20的上表面20a露出的范围。如图6所示，表层体区域26通过体接触区域24而分离成6个区域26a～26f。表层体区域26a在角落部71处与沟槽91-1及92-1接触。表层体区域26a在从角落部71到发射极区域22a的整个范围中与沟槽91-1接触。表层体区域26b在角落部72处与沟槽91-2及92-1接触。表层体区域26b在从角落部72到发射极区域22b的整个范围中与沟槽91-2接触。表层体区域26c在角落部73处与沟槽91-2及92-2接触。表层体区域26c在从角落部73到发射极区域22b的整个范围中与沟槽91-2接触。表层体区域26d在角落部74处与沟槽91-1及92-2接触。表层体区域26d在从角落部74到发射极区域22a的整个范围中与沟槽91-1接触。表层体区域26e与沟槽92-1接触。在表层体区域26e的两侧，体接触区域24与沟槽92-1接触。表层体区域26f与沟槽92-2接触。在表层体区域26f的两侧，体接触区域24与沟槽92-2接触。表层体区域26a～26f在开口部79内与发射极50接触。
如图6所示，体接触区域24从沟槽91-1的相反侧与发射极区域22a接触。图7是发射极区域22a及其周围的放大图。如图7所示，与发射极区域22a接触的范围的体接触区域24具有第一部分24x和相比第一部分24x向发射极区域22a侧突出的第二部分24y。因此，第一部分24x与沟槽91-1之间的发射极区域22a成为了具有宽的宽度W1的宽幅部22x，第二部分24y与沟槽91-1之间的发射极区域22a成为了具有窄的宽度W2的窄幅部22y。另外，体接触区域24从沟槽91-1的相反侧与表层体区域26a、26d接触。以下，将与表层体区域26a、26d接触的部分的体接触区域24称作第三部分24z。第三部分24z与沟槽91-1之间的表层体区域26a、26d具有宽度W3。如图7所示，宽度W3比宽度W2宽，且比宽度W1窄(即，W1>W3>W2)。另外，在图7中，将位于开口部79的外侧的半导体层(即，由层间绝缘膜78覆盖的半导体层)通过斜线影线而示出。如图7所示，矩形沟槽的附近的半导体层位于开口部79的外侧，由层间绝缘膜78覆盖。由于窄幅部22y的宽度W2窄，所以窄幅部22y的大部分由层间绝缘膜78覆盖。另一方面，由于宽幅部22x的宽度W1宽，所以宽幅部22x的大部分位于开口部79内，宽幅部22x以大面积与发射极50进行欧姆接触。由此，发射极区域22a相对于发射极50的接触电阻减小。发射极区域22b也与图7大致同样地构成，在宽幅部22x处相对于发射极50以大面积接触。
分离体区域27由p型杂质浓度比体接触区域24低的p型半导体构成。表层体区域26和分离体区域27的p型杂质浓度大致相等。如图2～5所示，分离体区域27配置于发射极区域22、体接触区域24及表层体区域26的下侧。分离体区域27相对于发射极区域22、体接触区域24及表层体区域26从下侧接触。分离体区域27除了柱区域28的下部之外，扩展到矩形区域12的横向(x方向及y方向)的全域。柱区域28从上表面20a向下方向延伸而贯通分离体区域27。分离体区域27在发射极区域22、体接触区域24及表层体区域26的下侧与沟槽91-1、91-2、92-1及92-2接触。
势垒区域30由n型杂质比发射极区域22低的n型半导体构成。如图2～5所示，势垒区域30配置于分离体区域27及柱区域28的下侧。势垒区域30相对于分离体区域27及柱区域28从下侧接触。势垒区域30扩展到矩形区域12的横向(x方向及y方向)的全域。势垒区域30在分离体区域27的下侧与沟槽91-1、91-2、92-1及92-2接触。势垒区域30通过分离体区域27而从发射极区域22分离。
下部体区域32由p型杂质浓度比体接触区域24低的p型半导体构成。如图2～5所示，下部体区域32配置于势垒区域30的下侧。下部体区域32相对于势垒区域30从下侧接触。下部体区域32扩展到矩形区域12的横向(x方向及y方向)的全域。下部体区域32在势垒区域30的下侧与沟槽91-1、91-2、92-1及92-2接触。下部体区域32通过势垒区域30而从分离体区域27分离。
半导体基板20具有漂移区域34和集电极区域36。在多个矩形区域12的下侧配置有漂移区域34和集电极区域36。
漂移区域34由n型杂质浓度比势垒区域30及柱区域28低的n型半导体构成。如图2～5所示，漂移区域34配置于下部体区域32的下侧。漂移区域34相对于下部体区域32从下侧接触。漂移区域34跨越多个矩形区域12的下侧的范围而在横向上延伸。漂移区域34扩展到半导体基板20的横向(x方向及y方向)的全域。漂移区域34与各沟槽91、92的下端部接触。漂移区域34通过下部体区域32而从势垒区域30分离。
集电极区域36由p型杂质浓度比分离体区域27及下部体区域32高的p型半导体构成。如图2～5所示，集电极区域36配置于漂移区域34的下侧。集电极区域36相对于漂移区域34从下侧接触。集电极区域36通过漂移区域34而从下部体区域32分离。集电极区域36配置于向半导体基板20的下表面20b露出的范围。集电极区域36与集电极60进行欧姆接触。
接着，对IGBT10的动作进行说明。在IGBT10的使用时，向集电极60与发射极50之间施加集电极60成为正的电压。当向栅电极80施加栅极阈值以上的电压时，与栅极绝缘膜82接触的范围的表层体区域26、分离体区域27及下部体区域32反转为n型，形成沟道。例如，在图2、3所示的截面中，在与沟槽91的栅极绝缘膜82接触的范围的分离体区域27和下部体区域32形成沟道。当形成沟道时，电子从发射极50通过发射极区域22和沟道而向漂移区域34流入。与此同时，空穴从集电极60通过集电极区域36而向漂移区域34流入。于是，漂移区域34的电阻通过传导度调制现象而降低。流入到漂移区域34的电子通过漂移区域34和集电极区域36而向集电极60流动。这样，通过电子从发射极50向集电极60流动，在IGBT10中流动电流。
另外，如图2、3的箭头100所示，流入到漂移区域34的空穴通过下部体区域32和势垒区域30而向分离体区域27流动，之后从体接触区域24向发射极50流动。此时，势垒区域30成为隔断空穴的流动的障壁。因此，能够抑制空穴向分离体区域27流动。由此，漂移区域34内的空穴的浓度上升，因此漂移区域34的电阻进一步减小。因而，IGBT10的接通电压减小。
另外，如图2、3的箭头102所示，沟槽91的下方的漂移区域34内的空穴以避开沟槽91的方式流动。同样，沟槽92的下方的漂移区域34内的空穴以避开沟槽92的方式流动。因而，在位于矩形区域12的角落部71～74的漂移区域34内，避开沟槽91而流动的空穴和避开沟槽92而流动的空穴集中，空穴的浓度变得极高。因而，在角落部71～74处，漂移区域34的电阻变得极低。如图4、6所示，由于在发射极区域22与角落部71～74之间的范围全域中表层体区域26与沟槽91接触，所以在从发射极区域22到角落部71～74的范围全域形成沟道。因此，如图4的箭头110所示，电子能够从发射极区域22向角落部71～74的漂移区域34流动。因此，电子能够通过电阻极低的区域而流动。由此，IGBT10的接通电压进一步减小。
图8示出了图2的发射极区域22a附近的放大图。另外，图9示出了图3的发射极区域22a附近的放大图。需要说明的是，在发射极区域22a侧和发射极区域22b侧，IGBT10的动作相同，因此，以下主要说明发射极区域22a侧的动作。如图8、9所示，空穴如箭头84a、84b所示那样向发射极区域22a的正下方的分离体区域27流入。流入到分离体区域27的空穴向体接触区域24流动。如图8所示，由于窄幅部22y的宽度W2窄，所以从窄幅部22y的正下方的分离体区域27到体接触区域24的第二部分24y的路径(即，箭头86a所示的路径)短，该路径的电阻低。因此，流入到窄幅部22y的正下方的分离体区域27的空穴的大部分如箭头86a所示那样向第二部分24y流动。另一方面，如图9所示，由于宽幅部22x的宽度W1宽，所以从宽幅部22x的正下方的分离体区域27到体接触区域24的第一部分24x的路径(即，箭头86b所示的路径)长，该路径的电阻高。因此，流入到宽幅部22x的正下方的分离体区域27的空穴在箭头86b的路径中难以流动。如图10的箭头88所示，流入到宽幅部22x的正下方的分离体区域27的空穴的大部分在分离体区域27内朝向第二部分24y而斜着流动。这样，由于体接触区域24具有朝向发射极区域22a侧突出的第二部分24y，所以流入到发射极区域22a的正下方的分离体区域27的空穴能够通过电阻低的路径而向第二部分24y流动。这样，由于很多空穴通过电阻低的路径而向第二部分24y流动，所以发射极区域22a的正下方的分离体区域27的电位难以变高。因而，在IGBT10中，空穴难以从分离体区域27向发射极区域22a流入，难以产生闩锁。
另外，如上所述，在实施方式的IGBT10中，由于在宽幅部22x处发射极区域22a相对于发射极150以大面积接触，所以发射极区域22a相对于发射极150的接触电阻低。这样，根据实施方式的IGBT10，能够降低发射极区域22相对于发射极150的接触电阻同时抑制闩锁。
另外，如图7所示，在IGBT10中，体接触区域24的第三部分24z与沟槽91-1之间的表层体区域26的宽度W3比体接触区域24的第二部分24y与沟槽91-1之间的发射极区域22a的宽度W2宽。即，体接触区域24与沟道部(表层体区域26与栅极绝缘膜82的交界)之间的间隔大。因而，表层体区域26的沟道部难以受到体接触区域24的p型杂质的影响，容易在表层体区域26形成沟道。因而，形成于表层体区域26的沟道的电阻小。因此，在IGBT10中，难以产生稳态损失。
另外，在IGBT10中，由于体接触区域24不与沟槽91-1、91-2接触，所以能够在与沟槽91-1、91-2接触的范围广泛地设置表层体区域26。根据该结构，电子容易通过角落部71～74而流动。由此，能够进一步减少稳态损失。
需要说明的是，在上述的实施方式中，IGBT10具有势垒区域30和柱区域28，但如图11、12所示，IGBT也可以不具有势垒区域30和柱区域28。在该情况下，分离体区域27直接与漂移区域34接触。即使是这样的结构，IGBT也能够动作。另外，也可以采用具有势垒区域30但不具有柱区域28的结构。
另外，在上述的实施方式中，发射极区域22a的宽度狭部22y的一部分配置于开口部79内。然而，如图13所示，也可以是，体接触区域24的第二部分24y延伸至开口部79的外侧，窄幅部22y的整体配置于开口部79的外侧(即，由层间绝缘膜78覆盖的范围)。即使是这样的结构，也能够在宽幅部22x处使发射极区域22a与发射极50接触，因此不会特别产生问题。
以下对上述的实施方式的各构成要素与权利要求书的各构成要素的关系进行说明。实施方式的沟槽91-1是权利要求书的直线沟槽的一例。实施方式的宽度W1是权利要求书的“第一部分与直线沟槽之间的发射极区域的宽度”的一例。实施方式的宽度W2是权利要求书的“第二部分与直线沟槽之间的发射极区域的宽度”的一例。实施方式的宽度W3是权利要求书的“第三部分与直线沟槽之间的表层体区域的宽度”的一例。
以下列举本说明书公开的技术要素。需要说明的是，以下的各技术要素分别独立而有用。
在本说明书公开的一例的IGBT中，体接触区域也可以具有从直线沟槽的相反侧与表层体区域接触的第三部分。第三部分与直线沟槽之间的表层体区域的宽度也可以比第二部分与直线沟槽之间的发射极区域的宽度宽。
当在分离体区域的沟道部(与直线沟槽接触的区域)的附近存在p型杂质浓度高的体接触区域时，通过来自体接触区域的影响而沟道部的空穴的浓度变高。因而，沟道的电阻变高。相对于此，如上所述，通过加宽第三部分与直线沟槽之间的表层体区域的宽度，能够抑制从体接触区域向沟道部的影响，抑制沟道电阻的上升。
在本说明书公开的一例的IGBT中，体接触区域也可以不与直线沟槽接触。
根据该结构，能够将沟道部(即，表层体区域与直线沟槽的接触部)设置得宽。
以上，虽然对实施方式进行了详细说明，但这些只不过是例示，不对权利要求书进行限定。权利要求书所记载的技术包括对以上例示的具体例进行各种变形、变更而得到的技术。本说明书或附图中说明的技术要素以单独或各种组合的方式发挥技术有用性，不限定于申请时权利要求记载的组合。另外，本说明书或附图中例示的技术同时达成多个目的，达成其中1个目的自身就具有技术有用性。
标号说明
10：IGBT
12：矩形区域
20：半导体基板
22：发射极区域
22x：宽幅部
22y：窄幅部
24：体接触区域
24x：第一部分
24y：第二部分
24z：第三部分
26：表层体区域
27：分离体区域
28：柱区域
30：势垒区域
32：下部体区域
34：漂移区域
36：集电极区域
50：发射极
60：集电极
78：层间绝缘膜
79：开口部
80：栅电极
82：栅极绝缘膜
91：沟槽。

Claims (3)

1.一种绝缘栅双极型晶体管，其中，具备：
半导体基板；
发射极，配置于所述半导体基板的上表面；
集电极，配置于所述半导体基板的下表面；
矩形沟槽，在所述上表面处呈矩形状延伸；
栅极绝缘膜，配置于所述矩形沟槽内；
栅电极，配置于所述矩形沟槽内，沿着所述矩形沟槽而呈矩形状延伸，通过所述栅极绝缘膜而从所述半导体基板绝缘；及
层间绝缘膜，将所述栅电极从所述发射极绝缘，
所述半导体基板具备：
n型的发射极区域，配置于由所述矩形沟槽包围的矩形区域内，与所述发射极接触；
p型的体接触区域，配置于所述矩形区域内，与所述发射极接触；
p型的表层体区域，配置于所述矩形区域内，与所述发射极接触，p型杂质浓度比所述体接触区域低；
p型的分离体区域，相对于所述发射极区域、所述体接触区域及所述表层体区域从下侧接触，与所述矩形沟槽接触，p型杂质浓度比所述体接触区域低；
n型的漂移区域，配置于所述分离体区域的下侧，通过所述分离体区域而从所述发射极区域分离，与所述矩形沟槽的下端接触；及
p型的集电极区域，配置于所述漂移区域的下侧，通过所述漂移区域而从所述分离体区域分离，与所述集电极接触，
所述矩形沟槽具备构成所述矩形沟槽的一边的直线沟槽，
所述发射极区域与所述直线沟槽接触，
所述表层体区域在与所述发射极区域相邻的范围中与所述直线沟槽接触，
所述体接触区域从所述直线沟槽的相反侧与所述发射极区域接触，
所述体接触区域具有第一部分和相比所述第一部分向所述发射极区域侧突出的第二部分，
所述第二部分与所述直线沟槽之间的所述发射极区域的宽度比所述第一部分与所述直线沟槽之间的所述发射极区域的宽度窄。
2.根据权利要求1所述的绝缘栅双极型晶体管，
所述体接触区域具有从所述直线沟槽的相反侧与所述表层体区域接触的第三部分，
所述第三部分与所述直线沟槽之间的所述表层体区域的宽度比所述第二部分与所述直线沟槽之间的所述发射极区域的宽度宽。
3.根据权利要求1或2所述的绝缘栅双极型晶体管，
所述体接触区域不与所述直线沟槽接触。
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