CN110875219A - 衬底接合设备和衬底接合方法 - Google Patents

衬底接合设备和衬底接合方法 Download PDF

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Publication number
CN110875219A
CN110875219A CN201910807004.3A CN201910807004A CN110875219A CN 110875219 A CN110875219 A CN 110875219A CN 201910807004 A CN201910807004 A CN 201910807004A CN 110875219 A CN110875219 A CN 110875219A
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China
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substrate
holding
fingers
bonding apparatus
edge
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CN201910807004.3A
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金俊亨
金圣协
金兑泳
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Samsung Electronics Co Ltd
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Samsung Electronics Co Ltd
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Publication of CN110875219A publication Critical patent/CN110875219A/zh
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Abstract

提供了衬底接合设备和衬底接合方法。衬底接合设备包括：衬底基座，支撑第一衬底；位于衬底基座上方的衬底保持器，保持第二衬底；衬底保持器包括多个可独立移动的保持指状物；以及腔室壳体，容纳衬底基座和衬底保持器。

Description

衬底接合设备和衬底接合方法
相关专利申请的交叉引用
2018年8月30日在韩国知识产权局提交的题为“衬底接合设备和衬底接合方法”的韩国专利申请No.10-2018-0103029的全部公开通过引用合并于此。
技术领域
实施例涉及衬底接合设备和衬底接合方法，更具体地，涉及以低成本和提高的精度来制造半导体器件的衬底接合设备和衬底接合方法。
背景技术
为了开发具有三维(3D)连接结构的半导体器件，需要将两个半导体晶片彼此精确地接合。当两个半导体晶片非常精确地接合在一起时，能够以低成本和高可靠性来制造提供高性能同时具有小尺寸的半导体器件。尽管在开发将两个半导体晶片接合在一起的各种方法，但是需要进一步的接合精度。
发明内容
根据一个方面，提供了一种衬底接合设备，包括：衬底基座，被配置为支撑第一衬底；衬底保持器，位于所述衬底基座上方，并且被配置为保持第二衬底；和腔室壳体，被配置为容纳所述衬底基座和所述衬底保持器，其中，所述衬底保持器包括多个保持指状物，所述多个保持指状物能够独立地操作。
根据另一方面，提供了一种衬底接合设备，包括：衬底基座，被配置为朝下支撑第一衬底；衬底保持器，位于所述衬底基座上方，并且被配置为保持第二衬底；和按压指状物，布置在与所述第二衬底的中心对应的位置处，并且被配置为将所述第二衬底朝向所述第一衬底按压，其中，所述衬底保持器被配置为在所述第一衬底与所述第二衬底之间的自发接合传播充分实施并且所述第二衬底的边缘接近所述第一衬底的边缘之后，释放对所述第二衬底的保持。
根据又一方面，提供了一种衬底接合方法，包括：将保持第二衬底放置在其上的衬底保持器布置在将第一衬底放置在其上的衬底基座上，使得所述第一衬底和所述第二衬底彼此对齐；使所述第二衬底的中心与所述第一衬底接触；允许所述第一衬底与所述第二衬底之间的自发接合传播充分实施；在维持对所述第二衬底的保持的同时，使所述第二衬底靠近所述第一衬底；和释放对所述第二衬底的保持。
附图说明
通过参考附图详细描述示例性实施例，特征对于本领域技术人员将变得清楚，在附图中：
图1示出了根据实施例的衬底接合设备的侧视图；
图2示出了包括在图1的衬底接合设备中的衬底保持器的仰视图；
图3A至图3E示出了根据实施例的将第一衬底和第二衬底接合在一起的方法中的各阶段的概念图；
图4A和图4B示出了根据另一实施例的将第一衬底和第二衬底接合在一起的方法中的各阶段的概念图；
图5A至图5E示出了根据另一实施例的将第一衬底和第二衬底接合在一起的方法中的各阶段的概念图；
图6A至图6E示出了根据又一实施例的将第一衬底和第二衬底接合在一起的方法中的各阶段的概念图；
图7示出了当释放对第二衬底的保持而未使用保持指状物使第二衬底的边缘靠近第一衬底时衬底上的变形的概念图；
图8示出了根据实施例的将第一衬底与第二衬底对齐的方法的示意图；
图9示出了根据实施例的保持指状物的侧视图；
图10示出了根据另一实施例的保持指状物的侧视图；
图11示出了根据另一实施例的保持指状物的侧视图；
图12示出了根据另一实施例的衬底接合设备的侧视图；
图13示出了根据实施例的彼此接合的第一衬底和第二衬底的示意图；以及
图14示出了图13的XII部分的放大截面图。
具体实施方式
下面将参照附图更全面地描述实施例，在附图中示出了示例性实施例。
图1是根据实施例的衬底接合设备100的侧视图。
参照图1，衬底接合设备100可以包括衬底基座120、位于衬底基座120上方的衬底保持器110、以及容纳衬底基座120和衬底保持器110的腔室壳体130。
腔室壳体130可以围绕衬底基座120和衬底保持器110。根据一些实施例，可以在腔室壳体130内形成真空压力或大气压力。分别由衬底基座120和衬底保持器110支撑或保持的第一衬底W1和第二衬底W2可以由腔室壳体130保护。
腔室壳体130可以具有壁132和开口134，例如，开口134可以延伸穿过壁132。第一衬底W1和第二衬底W2可以经由开口134被带到腔室壳体130中或从腔室壳体130中带出。必要时，可以密封开口134，以保护腔室壳体130的内部免受外部环境的影响。
衬底基座120可以支撑位于其上的第一衬底W1。根据一些实施例，第一衬底W1可以是单晶衬底。根据一些实施例，第一衬底W1可以是硅晶片。
衬底基座120可以包括基座本体122和第一衬底固定单元124。例如，如图1所示，第一衬底固定单元124可以在基座本体122内，例如，第一衬底固定单元124的顶表面可以通过基座本体122的顶表面暴露并且基本上与基座本体122的顶表面齐平。衬底基座120可以被配置为通过使用例如真空或静电力来固定第一衬底W1。当衬底基座120通过使用真空固定第一衬底W1时，第一衬底固定单元124可以被配置为在第一衬底W1的底表面处形成比环境压力低的压力。当衬底基座120通过使用静电力固定第一衬底W1时，第一衬底固定单元124可以被配置为产生允许第一衬底W1被固定的静电力。
衬底保持器110可以被设置为面对衬底基座120，例如，第一衬底W1可以在衬底基座120和衬底保持器110之间。衬底保持器110可以保持第二衬底W2。衬底保持器110可以从第二衬底W2的顶部保持第二衬底W2，例如，第二衬底W2可以在第一衬底W1和衬底保持器110之间。换句话说，衬底保持器110可以接触第二衬底W2的上表面并保持第二衬底W2。根据一些实施例，第二衬底W2可以是单晶衬底。根据一些实施例，第二衬底W2可以是硅晶片。
图2是衬底保持器110的仰视图。
参考图1和图2，衬底保持器本体112的外周通常可以是圆形。多个保持指状物114可以沿着衬底保持器本体112的外周基本上以规则间隔布置。从衬底保持器110的底部的中心在每两个相邻的保持指状物114之间形成的角度θ可以是基本均匀的。
衬底保持器110可以具有多于四个的保持指状物114。根据一些实施例，衬底保持器110可以具有八个保持指状物114。根据一些实施例，衬底保持器110可以具有奇数个保持指状物114，例如，五个、七个、九个、十一个、十三个或十五个保持指状物114。根据一些实施例，保持指状物114的数量可以是三十或更少。
保持指状物114可以延伸并被配置为在与第二衬底W2基本垂直的方向上(即，在z方向上)往复运动(例如，移动)。可以通过保持指状物致动器114a来实现保持指状物114的往复运动(例如，移动)。保持指状物致动器114a的操作可以由控制器140控制。
如图2所示，保持指状物致动器114a可以独立地电连接到控制器140，并且可以由控制器140独立控制，例如，控制器140可以独立于其他指状物致动器114a来控制每个指状物致动器114a。换句话说，根据相应的保持指状物致动器114a的运动，例如，每个保持指状物114的相应运动可以彼此独立。稍后将对此进行更详细地描述。例如，多层压电致动器、音圈马达(VCM)或与马达耦合的齿轮齿条可以用作保持指状物致动器114a，但是实施例不限于此。
用于按压第二衬底W2的按压指状物116可以设置在衬底保持器110的中心，例如，保持指状物114可以围绕按压指状物116。按压指状物116可以被配置为在与第二衬底W2基本垂直的方向上(即，在z方向上)往复运动(例如，移动)。按压指状物116的往复运动可以通过按压指状物致动器116a来实现。按压指状物致动器116a的操作可以由控制器140控制。例如，多层压电致动器、VCM或与马达耦合的齿轮齿条可以用作按压指状致动器116a，但是实施例不限于此。
第一衬底W1和第二衬底W2之间的相对距离(例如，沿z方向)可以由距离传感器150感测，例如，距离传感器150可以定位在腔室壳体130内以面对衬底保持器110和衬底基座120之间的空间。根据一些实施例，距离传感器150可以通过感知第一衬底W1和第二衬底W2的图像来测量第一衬底W1和第二衬底W2之间的距离。根据一些实施例，通过向第一衬底W1和第二衬底W2辐射电磁波，然后分析从第一衬底W1和第一衬底W1反射的电磁波，距离传感器150可以测量第一衬底W1和第二衬底W2之间的距离。距离传感器150根据各种方法识别第衬底W1和第二衬底W2之间的相对距离，并且实施例不限于上述方法。
根据一些实施例，每个保持指状物致动器114a可以具有臂形状。当保持指状物致动器114a为臂的形状时，每个保持指状物114耦合到臂的一侧。当臂操作时，保持指状物114可以在z方向上移动。
图3A至图3E是根据实施例的将第一衬底W1和第二衬底W2接合在一起的方法中的各阶段的概念图。
参照图3A，可以将其上保持有第二衬底W2的衬底保持器110布置在其上放置有第一衬底W1的衬底基座120上，使得第一衬底W1和第二衬底W2彼此对齐。例如，如图3A所示，第一衬底W1和第二衬底W2可以定位成沿z方向在第一衬底W1和第二衬底W2之间以预定距离(例如，第一距离d1)彼此面对。例如，如图3A中进一步所示，距离传感器150可以在衬底保持器110和衬底基座120的周边，并在衬底保持器110和衬底基座120之间，并且可以面对第一衬底W1和第二衬底W2之间的距离。
衬底保持器110可以在x-y平面上移动以实现对齐，例如，控制器140可以使衬底保持器110在x方向和/或y方向上移动，直到第一衬底W1和第二衬底W2对齐。根据一些实施例，可以在第一衬底W1和/或第二衬底W2上标记对齐标记，以便实现对齐，例如，实现第一衬底W1和第二衬底W2的相应边缘的对齐。
此外，衬底保持器110可以在z方向上移动以实现对齐，例如，控制器140可以使衬底保持器110在z方向上移动，直到第一衬底W1和第二衬底W2对齐并且以第一距离d1平行。第一衬底W1和第二衬底W2之间的第一距离d1可以为约30μm至约100μm。在该对齐步骤中，当第一距离d1大于约100μm时，接合传播(稍后将描述)可能不充分。另一方面，当第一距离d1小于约30μm时，接合传播可能过度，因此可能在第一衬底W1和第二衬底W2的接合传播部分中产生空隙。
衬底保持器110和衬底基座120之间的对齐可以是反馈控制的，例如，通过包括距离传感器150和控制器140在内的传感器系统。在另一示例中，可以使用附加控制器(而非控制器140)来控制衬底保持器110在x方向、y方向和z方向上的移动。
参照图3B，即第一阶段，可以通过使用按压指状物116将第二衬底W2朝向第一衬底W1按压，例如只有按压指状物116可以朝向第一衬底W1移动(沿着图3B中的箭头))。此时，衬底保持器110的保持指状物114可以继续保持第二衬底W2，例如，保持指状物114可以继续将第二衬底W2的边缘维持在静止状态，同时按压指状物116推动第二衬底W2的中心。当按压指状物116按压第二衬底W2时，第二衬底W2的中心可以接触第一衬底W1。
参考图3C，即第二阶段，可以允许第一衬底W1和第二衬底W2之间的充分的自发接合传播。例如，参考图3C，自发接合传播可以从接触的第一衬底W1的中心和第二衬底W2的中心(即，从与按压指状物116重叠的第一衬底W1和第二衬底W2之间的接触点(图3C中的点O))朝向第一衬底W1和第二衬底W2的边缘(例如，沿径向方向上的第二距离d2)扩展。
详细地，根据一些实施例，第一衬底W1和第二衬底W2的彼此面对的相应表面可以是(例如在接合处理开始之前)已经等离子体处理的。在这种情况下，例如，当第一衬底W1和第二衬底W2之间的距离充分小时，在第一衬底W1和第二衬底W2的面对表面之间发生静电引力。因此，可以发生接合传播，从而第一衬底W1和第二衬底W2可以由于它们之间的静电引力沿第二距离d2逐渐接合在一起，例如从图3C中的中心O到接合前沿BF。也就是说，由于接合传播，即使没有特别地(例如，进一步)施加外力，两个第一衬底W1和第二衬底W2的相应表面也可以从其初始接触部分开始逐渐地接合在一起。
在这种情况下，可以在第一衬底W1和第二衬底W2的接合部分和未接合部分之间限定边界。也就是说，边界(即，接合前沿BF)可以限定在第一部分(图3C的点O和点BF之间的部分)和第二部分(图3C的点BF右侧的部分)之间，第一部分中两个第一衬底W1和第二衬底W2的相应表面彼此接合，第二部分中两个第一衬底W1和第二衬底W2的相应表面彼此未接合。
如果保持指状物114停止保持第二衬底W2，并且第二衬底W2的边缘自由下落并接触第一衬底W1的边缘，则接合前沿BF将传播直到第一衬底W1(或第二衬底W2)的边缘，例如太快且不均匀，从而在第一衬底W1和第二衬底W2之间的接合界面中产生空隙。相反，参照图3C，根据实施例，由于保持指状物114保持第二衬底W2，因此接合前沿BF可以不传播直到第一衬底W1(或第二衬底W2)的边缘。也就是说，可以控制接合前沿BF的传播，例如，仅传播直到两个第一衬底W1和第二衬底W2的相应表面之间存在静电引力的位置。这样，第一衬底W1和第二衬底W2之间的接合可以更均匀，例如，没有第一衬底W1和第二衬底W2之间的不均匀接触所导致的空隙，并且可以平衡第二衬底W2的弹性恢复力。
如果第二衬底W2的边缘与第一衬底W1的边缘之间的第一距离d1增大，则中心O与接合前沿BF之间的第二距离d2可以减小。如果第二衬底W2的边缘与第一衬底W1的边缘之间的第一距离d1减小，则中心O与接合前沿BF之间的第二距离d2可以增大。
参照图3D，即第三阶段，保持指状物114可以朝向第一衬底W1下降，使得第二衬底W2的边缘与第一衬底W1的边缘接合。因此，第一衬底W1和第二衬底W2可以彼此完全接合。
此时，并非所有的保持指状物114都可以以相同速度移动。而且，并非所有的保持指状物114都可以移动(例如，移位)相同的量。换句话说，保持指状物114可以被独立地控制并且独立地操作，例如，可以独立地控制每个保持指状物114沿z方向以预定速度移动预定距离，以实现第一衬底W1和第二衬底W2之间的适当接合。
详细地，多个距离传感器150可以布置在第一衬底W1和第二衬底W2周围。多个距离传感器150分别测量在其位置处第一衬底W1和第二衬底W2之间的距离，并将测量的距离发送给图1的控制器140。
通过使用距离传感器150分别测量的与第一衬底W1和第二衬底W2之间的距离对应的距离信息，控制器140可以计算在每个保持指状物114的位置处的第一衬底W1和第二衬底W2之间的距离。可以根据在每个距离传感器150的位置处第一衬底W1和第二衬底W2之间的距离，通过插值，计算在每个保持指状物114的位置处在第一衬底W1和第二衬底W2之间的距离。然而，实施例不限于此。
例如，基于在保持指状物114的位置处计算的第一衬底W1和第二衬底W2之间的距离，控制器140可以针对下一时刻计算每个保持指状物114的目标位置，例如保持指状物114需要在z方向上移动的距离和速度。接下来，控制器140可以向图1的每个保持指状物致动器114a发送用于允许每个保持指状物114移动到计算的目标位置的信号。换句话说，控制器140可以被配置为实时计算每个保持指状物114的位置处第一衬底W1和第二衬底W2之间的距离，并且基于计算的距离来实时控制保持指状物114的目标位置和操作速度。
根据一些实施例，保持指状物114可以以不同的速度朝向第一衬底W1下降。例如，八个保持指状物114之中位于两个交叉方向上的四个保持指状物114可以以恒定速度下降，并且其余四个保持指状物114可以以比之前的保持指状物114的下降速度低的速度下降。
根据一些实施例，保持指状物114可以朝向第一衬底W1下降到不同的高度。例如，八个保持指状物114之中位于两个交叉方向上的四个保持指状物114可以在这四个保持指状物114下降时的任意时刻具有距第一衬底W1的距离H，并且其余四个保持指状物114可以具有距第一衬底W1的距离(H+δH)。换句话说，当八个保持指状物114正下降时，四个保持指状物114的高度与其余四个保持指状物114的高度之间的高度差δH可以保持恒定。
参照图3E，即第四阶段，可以由保持指状物114释放对第二衬底W2的保持。释放第二衬底W2的保持的方法可以根据保持第二衬底W2的方法而变化。如果抽吸单元设置到保持指状物114并且第二衬底W2由抽吸单元保持，则可以通过使抽吸单元的内部压力与外部压力相等来释放该保持。如果供应到保持指状物114的电力产生静电力并且第二衬底W2由静电力保持，则可以通过中断对保持指状物114的电力供应来释放保持。保持释放的保持指状物114可以在远离第一衬底W1的方向上移动。
图4A和图4B是根据另一实施例的将第一衬底W1和第二衬底W2接合在一起的方法中的各阶段的概念图。在图3A至图3C的操作方面，根据本实施例的接合方法与上面参考图3A至图3E描述的实施例有共同之处。因此，图4A和图4B涉及在参考图3C描述的操作之后执行的操作。
参照图4A，保持指状物114可以朝向第一衬底W1移动，直到第一衬底W2和第二衬底W1的相应边缘之间的第三距离d3为约1μm至约50μm。保持指状物114朝向第一衬底W1的移动可以通过距离传感器150、控制器140和保持指状物致动器114a之间的协作来实现，如上面参考图3D所述。在此过程中，接合前沿BF可以比图3C的接合前沿BF更靠近第一衬底W1的边缘。中心O和接合前沿BF之间的第四距离d4也可以大于图3C的第二距离d2。
参照图4B，即使当第二衬底W2的边缘与第一衬底W1的边缘间隔开时，也可以通过保持指状物114释放对第二衬底W2的保持。上面已经参考图3E描述了释放第二衬底W2的保持的方法，因此将省略其描述。
当释放保持指状物114对第二衬底W2的保持时，接合前沿BF在径向方向上(即，在朝向第一衬底W1的边缘的方向上)扩展，直到第二衬底W2的边缘接合到第一衬底W1的边缘。如果在第二衬底W2的中心被按压指状物116按压以接触第一衬底W1之后，释放对第二衬底W2的保持而不使用保持指状物114使第二衬底W2的边缘靠近第一衬底W1，则第一衬底W1和第二衬底W2之间的接合将会不充分，例如由于第一衬底W1和第二衬底W2之间的空隙而未充分接合。
图5A至图5E是根据另一实施例的将第一衬底W1和第二衬底W2接合在一起的方法中的各阶段的概念图。
参照图5A，其上保持有第二衬底W2的衬底保持器110a可以布置在其上保持有第一衬底W1的衬底基座120a上，以与衬底基座120a对齐。
衬底基座120a可以具有基座保持指状物114s以保持第一衬底W1。衬底基座120a可以包括基座按压指状物116s以按压第一衬底W1。基座保持指状物114s和基座按压指状物116s可以分别布置在面对衬底保持器110a的保持指状物114和按压指状物116的位置处。换句话说，基座保持指状物114s的数量可以等于保持指状物114的数量。
衬底保持器110a和衬底基座120a可以在x-y平面上相对于彼此移动，以使第一衬底W1与第二衬底W2对齐和/或使基座保持指状物114s与保持指状物114对齐。
衬底保持器110a和衬底基座120a可以在z方向上相对于彼此移动，以调节第一衬底W1和第二衬底W2之间的第五距离d5。第一衬底W1和第二衬底W2之间的第五距离d5可以为约30μm至约100μm。当第五距离d5太大时，接合传播可能不充分。另一方面，当第五距离d5太小时，接合传播可能过度，因此可能在第一衬底W1和第二衬底W2的接合传播部分中产生空隙。
衬底保持器110a和衬底基座120a之间的对齐以及它们之间距离的调节可以由与包括距离传感器150在内的传感器系统连接的控制器140反馈控制。
参照图5B，衬底保持器110a的按压指状物116和衬底基座120a的按压指状物116s可以彼此接近以将第一衬底W1和第二衬底W2朝向彼此按压。换句话说，可以通过使用衬底保持器110a的按压指状物116将第二衬底W2朝向第一衬底W1按压。可以通过使用衬底基座120a的基座按压指状物116s将第一衬底W1朝向第二衬底W2按压。由于按压，第一衬底W1和第二衬底W2的相应中心可以彼此接触。
根据一些实施例，按压指状物116和116s中的每一个移动的距离可以是两个第一衬底W1和第二衬底W2之间的第五距离d5的一半。然而，实施例不限于此，并且按压指状物116向下移动的距离可以大于基座按压指状物116s向上移动的距离。根据另一实施例，按压指状物116向下移动的距离可以小于基座按压指状物116s向上移动的距离。
参考图5C，可以允许第一衬底W1和第二衬底W2之间的充分的自发接合传播。例如，可以实施接合传播，直到第衬底W1和第二衬底W2的中心与接合前沿BF之间的距离变为第六距离d6。以上已经参考图3C对此进行了描述，因此将省略其冗余描述。
参照图5D，保持指状物114和基座保持指状物114s可以彼此接近，使得第二衬底W2的边缘和第一衬底W1的边缘接合在一起。此时，保持指状物114和基座保持指状物114s的移动可以由控制器140控制。上面已经参考图3D描述了控制器140的控制方案，因此将不重复其描述。
保持指状物114和基座保持指状物114s可以分别维持对第二衬底W2和第一衬底W1的保持，直到第二衬底W2的边缘和第一衬底W1的边缘接合在一起。
参照图5E，在完成第二衬底W2和第一衬底W1之间的接合之后，保持指状物114可以释放对第二衬底W2的保持。以上已经参考图3E对此进行了描述，因此将不重复其描述。保持释放的保持指状物114可以在远离第一衬底W1的方向上移动。
根据图5A至图5E的实施例，由于第一衬底W1和第二衬底W2被按压指状物116和116s变形(即，沿z方向被推动)的量较小，因此可以更精确地接合。此外，因为保持第二衬底W2的保持指状物114和保持第一衬底W1的基座保持指状物114s两者被主动控制，所以第一衬底W1和第二衬底W2可以更精确地彼此接合。
图6A至图6E是根据另一实施例的将第一衬底W1和第二衬底W2接合在一起的方法中的各阶段的概念图。
参照图6A，其上保持有第二衬底W2的衬底保持器110a可以布置在其上保持有第一衬底W1的衬底基座120b上，例如以便与衬底基座120b对齐，第二衬底W2和第二衬底W2之间具有第七距离d7。该结构与上面参照图5A描述的实施例相同，因此将不再重复其描述。
参照图6B，衬底基座120b的基座按压指状物116s可以接触第一衬底W1而实质上不向上按压第一衬底W1。这是为了支持第二衬底W2的向下按压，稍后将描述。
衬底保持器110a的按压指状物116可以向下按压第二衬底W2。可以通过按压指状物116向下按压第二衬底W2，直到第二衬底W2接触第一衬底W1。因为第一衬底W1由基座按压指状物116s支撑，所以即使当按压指状物116的压力施加到第一衬底W1时，第一衬底W1也可以基本上不变形。
参考图6C，可以允许第一衬底W1和第二衬底W2之间的充分的自发接合传播。例如，可以实施接合传播，直到第一衬底W1和第二衬底W2的中心与接合前沿BF之间的距离变为第八距离d8。以上已经参考图3C描述了这一点，因此将不再重复其描述。
参照图6D，可以使保持指状物114靠近基座保持指状物114s，使得第一衬底W1和第二衬底W2的相应边缘彼此接合。保持指状物114的移动可以由控制器140控制。上面已经参考图3D描述了控制器140的控制方案，因此将不重复其描述。保持指状物114可以继续保持第二衬底W2，直到第一衬底W1和第二衬底W2的相应边缘彼此接合。
参照图6E，在完成第二衬底W2和第一衬底W1之间的接合之后，保持指状物114可以释放对第二衬底W2的保持。以上已经参考图3E对此进行了描述，因此将不重复其描述。保持释放的保持指状物114可以在远离第一衬底W1的方向上移动。
图7是示出在形成接合前沿之后、释放对第二衬底W2的保持而不使用保持指状物114使第二衬底W2的边缘靠近第一衬底W1时，衬底上发生的变形的概念图。
如图7所示，整个衬底变形，特别是以特定的方向性和(+)字符形状变形。这种变形可能由于衬底的晶体结构而发生，并且可能在使用单晶衬底(例如，硅衬底)时发生。详细地，[100]或[010]晶向(即，结晶方向)可以是从[110]晶向的45°方向。[110]晶向的应力可以小于[100]晶向和[010]晶向中的每一个的应力。因此，[110]晶向的变形可能小于[100]晶向和[010]晶向中的每一个的变形。
另一方面，根据实施例，当在形成接合前沿之后通过保持指状物114使第二衬底W2的边缘靠近第一衬底W1，然后释放对第二衬底W2的保持时，(+)字符形状的变形可以显著减少。
当保持指状物114的数量大于4时，可以减小根据晶向的影响，因此可以减少(+)字符形状的变形。根据一些实施例，当保持指状物114的数量是4的倍数(例如8、12或16)时，可以减小方位角方向的偏差。因此，这些实施例可以是有利的。根据一些实施例，当保持指状物114的数量是奇数(例如5、7或9)时，可以减小发生关于衬底中心对称的变形的趋势。因此，这些实施例可以是有利的。
图8是示出根据实施例的将第一衬底W1与第二衬底W2对齐的方法的示意图。
参照图8，第二衬底W2可以放置在第一衬底W1上方，而第一衬底W1和第二衬底W2不彼此平行。在这种情况下，为了将第一衬底W1和第二衬底W2接合在一起，可以首先需要将第一衬底W1和第二衬底W2彼此平行地布置。换句话说，在第一衬底W1和第二衬底W2彼此接触以接合在一起之前，可以根据现在将描述的方法将第一衬底W1和第二衬底W2彼此平行地布置。
多个距离传感器150可以布置在第一衬底W1周围。尽管在图8中设置了三个距离传感器150，但是可以设置四个或更多个距离传感器150。
如上参考图3D所述，每个距离传感器150可以测量其位置处第一衬底W1和第二衬底W2之间的距离。因为第一衬底W1和第二衬底W2彼此不平行，所以由距离传感器150分别测量的第一衬底W1和第二衬底W2之间的距离可以彼此不同。根据距离传感器150分别测量的第一衬底W1和第二衬底W2之间的距离，控制器140可以估计每个保持指状物114的位置处第一衬底W1和第二衬底W2之间的距离。
通过使用第一衬底W1和第二衬底W2之间的估计距离，控制器140可以计算每个保持指状物114将在z方向上移动多少以将第一衬底W1和第二衬底W2彼此平行地布置。控制器140将计算出的值分别发送到保持指状物114的保持指状物致动器114a，并且保持指状物致动器114a根据接收到的计算值进行操作，从而可以将第一衬底W1和第二衬底W2彼此平行地布置。
在图8中，在每个保持指状物114旁边示出的箭头表示每个保持指状物114需要移动以便将第一衬底W1和第二衬底W2彼此平行地布置的示例性距离和方向。所示箭头之中的箭头越大表示保持指状物114需要移动的距离越长。尽管在图8中调节第二衬底W2的取向，但是本领域普通技术人员可以理解，通过调节第一衬底W1的取向、或第一衬底W1和第二衬底W2的取向，可以获得相同的结果。
当使用对比的衬底接合设备(即，没有保持指状物114)并且第一衬底和第二衬底彼此不平行时，需要用于使第一衬底和第二衬底彼此平行的特殊(例如，单独的)单元。相反，当使用根据实施例的衬底接合设备并且第一衬底W1和第二衬底W2彼此不平行时，(例如，在衬底接合设备内的)多个保持指状物114可以调节第一衬底W1和第二衬底W2的位置以使第一衬底W1和第二衬底W2彼此平行。因此，不需要在对比衬底接合设备中采用的上述特殊单元，并且根据实施例的衬底接合设备可以具有简化的结构。
图9是根据实施例的保持指状物114v的侧视图。保持指状物114v可以基本上类似于图1至图8中的保持指状物114。
参照图9，保持指状物114v可以具有与端部114t连通的流体通道114h。当端部114t接触第二衬底W2时，流体通道114h可以与保持指状物114v的外部隔离。当流体通道114h的内部压力低于保持指状物114v的外部压力时，可以与两个压力之间的差成比例的强度将第二衬底W2附着到保持指状物114v。
当意图释放对第二衬底W2的保持时，可以通过使流体通道114h的内部压力等于或几乎等于保持指状物114v的外部压力来释放该保持。为此，可以通过特殊通道将流体供应到流体通道114h。
端部114t可以由弹性材料形成，使得保持指状物114v和第二衬底W2可以更平滑地彼此粘附，因此可以更紧密地彼此附着。例如，端部114t可以由具有弹性的任何合适的聚合物材料形成。当端部114t由弹性材料形成时，可以减少第二衬底W2的损坏。
图10是根据另一实施例的保持指状物114e的侧视图。图1至图8中的任何实施例可以采用指状物114e代替指状物114或114v。
参照图10，保持指状物114e可以包括能够在保持指状物114e的端部114t周围产生静电力的静电装置114es。静电装置114es可以通过施加电力产生静电力，并且第二衬底W2可以通过静电力附着到保持指状物114v。因此，当中断向静电装置114es供电时，可以立即释放对第二衬底W2的保持。
图11是根据另一实施例的保持指状物114f的侧视图。图1至图8中的任何实施例可以采用指状物114f代替指状物114、114v或114e。
参照图11，保持指状物114f可以包括在与第二衬底W2的主表面垂直的方向上延伸的第一部分1141、以及在与第二衬底W2的主表面平行的方向上延伸的第二部分1142。第二部分1142可以包括保持指状物114f的端部114t。换句话说，第二部分1142可以直接接触第二衬底W2。
根据一些实施例，上面参照图9描述的流体通道114h可以设置在保持指状物114f内。在这种情况下，多个通孔可以设置在第二部分1142的底表面上，并且可以与流体通道114h连通。
根据一些实施例，以上参照图10描述的静电装置114es可以设置在保持指状物114f内。在这种情况下，静电装置114es可以设置在第二部分1142内。
因为保持指状物114f的第二部分1142在水平方向(即，与第二衬底W2的主表面平行的方向)上延伸，所以保持指状物114f和第二衬底W2之间的接触面积可以增大，并且可以更均匀的压力保持第二衬底W2。
图12是根据另一实施例的衬底接合设备100h的侧视图。除了按压指状物116h与保持指状物114相同之外，图12的衬底接合设备100h与图1的衬底接合设备100相同。因此，这里将不再重复与上面参考图1给出描述的相同的图12的描述，现在将主要描述它们之间的差异。
参照图12，按压指状物116h可以配置为保持第二衬底W2。按压指状物116h保持第二衬底W2的原理可以与保持指状物114相同。
随着衬底近来变得越来越大和越来越薄，当仅保持衬底的边缘时，衬底的中心部分可能由于衬底的负载而向下下垂。这可能导致在处理第二衬底W2时例如第二衬底W2受到损坏。因此，当位于第二衬底W2的中心处的按压指状物116h保持第二衬底W2的中心部分时，可以大大减少衬底处理期间衬底的下垂。
在根据实施例的衬底接合设备和衬底接合方法中，可以提供将衬底接合在一起的精度，因此可以以更高的精度制造半导体器件。而且，由于更高的精度，产品的产量得到改善，因此降低了其制造成本。
图13是示出根据实施例的彼此接合的第一衬底W1和第二衬底W2的示意图。图14是图13的XII部分的放大截面图。
参照图13，第一衬底W1可以在其表面上包括第一半导体器件20，并且第二衬底W2可以在其表面上包括第二半导体器件30。第一半导体器件20和第二半导体器件30可以彼此接合以构成集成半导体器件(例如，CMOS图像传感器(CIS))。
参照图14，第一半导体器件20可以包括晶体管Tr，晶体管Tr具有栅电极255以及半导体衬底201(例如，单晶硅)上的源区和漏区251。栅电极255可以经由第一掩埋线259电连接到栅电极255上方的层。每一条第一掩埋线259可以包括第一阻挡金属层259a和第一金属层259b，并且可以通过第一层间绝缘层257彼此绝缘。
其他中间布线层可以包括掩埋线265和268(掩埋线265和268中的每一个包括阻挡金属层和金属层)、以及围绕掩埋线265和268以使掩埋线265和268彼此绝缘的层间绝缘层263和266。除了每个布线层中彼此接触的掩埋线的部分之外，布线层可以通过防扩散层261、281和269彼此分离。
第二半导体器件30可以包括晶体管Tr，晶体管Tr具有半导体衬底301(例如，单晶硅)上的栅电极327以及源和漏区323。栅电极327可以经由第二掩埋线331电连接到栅电极327下方的层。每一条第二掩埋线331可以包括第二阻挡金属层331a和第二金属层331b，并且可以通过第二层间绝缘层329彼此绝缘。
其他中间布线层可以包括掩埋线338(掩埋线338中的每一个包括阻挡金属层和金属层)、以及围绕掩埋线338以使掩埋线338彼此绝缘的层间绝缘层335。光电转换单元321可以设置在半导体衬底301内。
如图14所示，第一衬底W1和第二衬底W2可以接合在一起，使得第一半导体器件20和第二半导体器件30彼此连接，第一半导体器件20的掩埋线268和第二半导体器件30的掩埋线338彼此面对。
由于近来半导体器件小型化的趋势，掩埋线的线宽变得非常细。为了将半导体器件接合在一起以具有适当的电特性，需要几十纳米或更小(例如，约40nm或更小)的精度。因此，当使用上面参照图1至图4B、图8和图12描述的衬底接合设备和衬底接合方法时，可以以更高的精度制造半导体器件。
本文描述的方法和过程可以由要由计算机、处理器、管理器或控制器执行的代码或指令来执行。因为详细描述了形成方法(或计算机、处理器或控制器的操作)的基础的算法，所以用于实现方法实施例的操作的代码或指令可以将计算机、处理器或控制器转换为用于执行本文所描述的方法的专用处理器。
而且，另一实施例可以包括用于存储上述代码或指令的计算机可读介质，例如非暂时计算机可读介质。计算机可读介质可以是易失性或非易失性存储器或其他存储器件，可移除地或固定地耦合到用于执行本文描述的方法实施例的代码或指令的计算机、处理器或控制器。
通过总结和回顾，实施例提供了一种能够以低成本和改进的精度制造半导体器件的衬底接合设备和衬底接合方法。也就是说，实施例提供了独立控制的保持指状物作为用于保持衬底的衬底保持器的一部分。保持指状物朝着下衬底移动，直到上衬底的边缘接触下衬底，并且在上衬底和下衬底接合在一起之后，该保持被释放，例如，与对比设备相反，在对比设备中，当衬底的边缘彼此远离时，由于对保持的释放而引起衬底的边缘自由下落。此外，在保持指状物被独立控制的同时，实时确定衬底的接合前沿情况(衬底之间的距离)，并且通过反映接合前沿情况来控制保持指状物的移动速度、位移等。
本文已经公开了示例实施例，并且尽管采用了特定术语，但是它们仅用于且将被解释为一般的描述性意义，而不是为了限制的目的。在一些情况下，如提交本申请的本领域普通技术人员应认识到，除非另有明确说明，否则接合特定实施例描述的特征、特性和/或元件可以单独使用或与其他实施例描述的特征、特性和/或元件相接合使用。因此，本领域技术人员将理解，在不脱离如所附权利要求中阐述的本发明的精神和范围的前提下，可以进行形式和细节上的各种改变。

Claims (25)

1.一种衬底接合设备，包括：
衬底基座，支撑第一衬底；
在所述衬底基座上方的衬底保持器，保持第二衬底，所述衬底保持器包括多个保持指状物，并且所述多个保持指状物能够独立地移动；和
腔室壳体，容纳所述衬底基座和所述衬底保持器。
2.根据权利要求1所述的衬底接合设备，其中，所述衬底保持器包括至少八个保持指状物，并且所述第一衬底和所述第二衬底是硅晶片。
3.根据权利要求2所述的衬底接合设备，其中，所述多个保持指状物被独立地控制，以在与所述第二衬底的主表面垂直的方向上操作。
4.根据权利要求3所述的衬底接合设备，还包括：
距离传感器，测量所述第一衬底的边缘与所述第二衬底的边缘之间的距离；
控制器，基于由所述距离传感器感测的距离来控制所述多个保持指状物；和
多个保持指状物致动器，基于所述控制器的控制，分别定位所述多个保持指状物。
5.根据权利要求4所述的衬底接合设备，其中，所述控制器接收由所述距离传感器感测的距离，基于所接收的距离来计算所述多个保持指状物中的每一个的目标位置，并且向所述多个保持指状物致动器发送用于将所述多个保持指状物中的每一个移动至所述目标位置的信号。
6.根据权利要求2所述的衬底接合设备，其中，通过形成在所述多个保持指状物的相应端部上的引力，所述多个保持指状物将所述第二衬底保持在所述多个保持指状物的所述相应端部上。
7.根据权利要求6所述的衬底接合设备，其中，所述多个保持指状物中的每一个具有与所述多个保持指状物的每个端部连通的流体通道，通过维持所述流体通道的内部压力低于环境压力来形成所述引力。
8.根据权利要求6所述的衬底接合设备，其中，
所述多个保持指状物通过静电引力将所述第二衬底保持在所述多个保持指状物的相应端部上，并且
所述多个保持指状物向所述第二衬底施加静电力，并从所述第二衬底释放所述静电力，以控制所述静电引力的施加。
9.根据权利要求2所述的衬底接合设备，其中，所述衬底保持器还包括位于与所述第二衬底的中心对应的位置处的按压指状物，所述按压指状物将所述第二衬底朝向所述第一衬底按压。
10.根据权利要求9所述的衬底接合设备，其中：
所述至少八个保持指状物沿着所述衬底保持器的边缘，所述至少八个保持指状物围绕所述按压指状物，并且
所述按压指状物和所述至少八个保持指状物能够被独立地控制和移动，所述按压指状物仅将所述第二衬底的中心朝向所述第一衬底按压，并且所述多个保持指状物在第一阶段期间保持所述第二衬底的边缘静止。
11.根据权利要求10所述的衬底接合设备，其中，所述衬底保持器允许在所述第一阶段之后的第二阶段期间，充分地实施所述第一衬底与所述第二衬底之间的自发接合传播。
12.根据权利要求11所述的衬底接合设备，其中，在所述第二阶段之后的第三阶段期间，所述多个保持指状物能够朝向所述第一衬底移动，以使所述第二衬底的边缘与所述第一衬底的边缘接合。
13.根据权利要求12所述的衬底接合设备，其中，在所述第三阶段之后的第四阶段期间，所述多个保持指状物释放对所述第二衬底的保持。
14.根据权利要求9所述的衬底接合设备，其中，所述衬底基座包括：
多个基座保持指状物，布置在与所述多个保持指状物对应的位置处，所述多个基座保持指状物能够单独且独立地移动；和
基座按压指状物，在与所述第一衬底的中心对应的位置处，所述基座按压指状物将所述第一衬底朝向所述第二衬底按压。
15.根据权利要求14所述的衬底接合设备，其中，在第一阶段期间，在所述多个基座保持指状物保持所述第一衬底的同时，所述基座按压指状物按压所述第一衬底，使得所述第一衬底接触所述第二衬底。
16.根据权利要求1所述的衬底接合设备，其中，所述多个保持指状物中的每一个包括端部处的弹性构件，所述弹性构件接触所述第二衬底。
17.根据权利要求1所述的衬底接合设备，其中，
所述多个保持指状物中的每一个包括在与所述第二衬底的主表面垂直的方向上延伸的第一部分、以及在与所述第二衬底的主表面平行的方向上延伸的第二部分，并且
所述第二部分包括所述多个保持指状物中的每一个的端部。
18.一种衬底接合设备，包括：
衬底基座，支撑第一衬底；
在所述衬底基座上方的衬底保持器，保持第二衬底；和
在所述衬底保持器的中心处的按压指状物，所述按压指状物能够朝向所述衬底基座移动，以将所述第二衬底朝向所述第一衬底按压，
其中，在所述第一衬底与所述第二衬底之间的自发接合传播充分实施并且所述第二衬底的边缘接近所述第一衬底的边缘之后，所述衬底保持器释放对所述第二衬底的保持。
19.根据权利要求18所述的衬底接合设备，其中：
所述衬底保持器包括沿所述衬底保持器的边缘的至少八个保持指状物，所述至少八个保持指状物和所述按压指状物能够被独立地控制，以及
在所述多个保持指状物维持所述第二衬底的边缘静止的同时，所述按压指状物将所述第二衬底的中心朝向所述第一衬底按压以接触所述第一衬底，以便实施所述自发接合传播。
20.根据权利要求19所述的衬底接合设备，其中，所述多个保持指状物能够被独立地控制为能够在与所述衬底保持器的主表面垂直的方向上移动。
21.根据权利要求18所述的衬底接合设备，其中，在朝向所述第一衬底移动直到所述第二衬底的边缘与所述第一衬底的边缘之间的距离为1μm至50μm时，所述衬底保持器释放对所述第二衬底的保持。
22.根据权利要求18所述的衬底接合设备，其中，在所述第二衬底的边缘接合到所述第一衬底的边缘之后，所述衬底保持器释放对所述第二衬底的保持。
23.一种衬底接合方法，包括：
布置衬底基座以将第一衬底保持在所述衬底基座上；
布置衬底保持器以将第二衬底保持在所述衬底保持器上，使得所述第一衬底和所述第二衬底彼此对齐；
使所述第二衬底的中心与所述第一衬底接触；
允许在所述第一衬底与所述第二衬底之间的自发接合传播发生；
在保持所述第二衬底的边缘的同时，使所述第二衬底靠近所述第衬底；和
释放对所述第二衬底的边缘的保持。
24.根据权利要求23所述的衬底接合方法，其中，
所述第二衬底由至少八个保持指状物保持在所述衬底保持器上，和
使所述第二衬底靠近所述第一衬底包括：独立地控制所述至少八个保持指状物朝向所述第一衬底移动。
25.根据权利要求24所述的衬底接合方法，其中，使所述第二衬底靠近所述第一衬底包括：将所述第二衬底的边缘接合到所述第一衬底的边缘。
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Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR20210039661A (ko) 2019-10-02 2021-04-12 삼성전자주식회사 기판 본딩 장치
KR102396431B1 (ko) 2020-08-14 2022-05-10 피에스케이 주식회사 기판 처리 장치 및 기판 반송 방법
EP4299230A1 (en) * 2021-02-26 2024-01-03 Bondtech Co., Ltd. Bonding method, substrate bonding device, and substrate bonding system

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150140689A1 (en) * 2013-11-18 2015-05-21 Kabushiki Kaisha Toshiba Substrate bonding method and substrate bonding apparatus
CN107611071A (zh) * 2016-07-12 2018-01-19 东京毅力科创株式会社 接合系统
WO2018059699A1 (de) * 2016-09-29 2018-04-05 Ev Group E. Thallner Gmbh Vorrichtung und verfahren zum bonden zweier substrate
US20180158796A1 (en) * 2016-12-01 2018-06-07 Tokyo Electron Limited Bonding apparatus, bonding system, bonding method and storage medium

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100204171B1 (ko) * 1997-02-17 1999-06-15 윤종용 자동 적층 및 솔더링 장치 및 3차원 적층형 패키지 소자 제조 방법
TWI266104B (en) 2002-03-14 2006-11-11 Sharp Kk Manufacturing method of liquid crystal display apparatus and substrate assembling apparatus
JP3693972B2 (ja) 2002-03-19 2005-09-14 富士通株式会社 貼合せ基板製造装置及び基板貼合せ方法
JP4671841B2 (ja) 2005-11-09 2011-04-20 パナソニック株式会社 対象物間の脱ガス方法および脱ガス装置
US7948034B2 (en) * 2006-06-22 2011-05-24 Suss Microtec Lithography, Gmbh Apparatus and method for semiconductor bonding
JP4661808B2 (ja) 2007-03-14 2011-03-30 パナソニック株式会社 部品実装装置及び基板搬送方法
US7682933B1 (en) * 2007-09-26 2010-03-23 The United States Of America As Represented By The Secretary Of The Air Force Wafer alignment and bonding
JP5180557B2 (ja) 2007-10-31 2013-04-10 株式会社ディスコ 加工装置
KR101313262B1 (ko) * 2010-07-12 2013-09-30 삼성전자주식회사 화학 기상 증착 장치 및 이를 이용한 반도체 에피 박막의 제조 방법
FR2965974B1 (fr) 2010-10-12 2013-11-29 Soitec Silicon On Insulator Procédé de collage moléculaire de substrats en silicium et en verre
JP2013008921A (ja) * 2011-06-27 2013-01-10 Toshiba Corp 半導体製造装置及び製造方法
US9355882B2 (en) 2013-12-04 2016-05-31 Taiwan Semiconductor Manufacturing Co., Ltd. Transfer module for bowed wafers
KR101521971B1 (ko) 2013-12-11 2015-05-20 주식회사 휴템 플라즈마 활성화 처리를 이용한 웨이퍼 본더, 웨이퍼 접합 장치, 및 웨이퍼 접합 방법
KR101580206B1 (ko) * 2014-05-28 2015-12-24 주식회사 엘트린 기판 접합 장치
JP6271404B2 (ja) * 2014-11-27 2018-01-31 東京エレクトロン株式会社 接合方法、プログラム、コンピュータ記憶媒体、接合装置及び接合システム
JP2018010925A (ja) 2016-07-12 2018-01-18 東京エレクトロン株式会社 接合装置
JP6643197B2 (ja) 2016-07-13 2020-02-12 ファスフォードテクノロジ株式会社 半導体製造装置および半導体装置の製造方法
KR20180049481A (ko) 2016-11-02 2018-05-11 삼성전자주식회사 기판 본딩 장치 및 그를 이용한 반도체 소자의 제조 방법
KR102395194B1 (ko) * 2017-06-21 2022-05-06 삼성전자주식회사 웨이퍼 본딩 장치 및 그 장치를 포함한 웨이퍼 본딩 시스템

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US20150140689A1 (en) * 2013-11-18 2015-05-21 Kabushiki Kaisha Toshiba Substrate bonding method and substrate bonding apparatus
CN107611071A (zh) * 2016-07-12 2018-01-19 东京毅力科创株式会社 接合系统
WO2018059699A1 (de) * 2016-09-29 2018-04-05 Ev Group E. Thallner Gmbh Vorrichtung und verfahren zum bonden zweier substrate
US20180158796A1 (en) * 2016-12-01 2018-06-07 Tokyo Electron Limited Bonding apparatus, bonding system, bonding method and storage medium

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