CN110858610A - 电力用半导体装置 - Google Patents

电力用半导体装置 Download PDF

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CN110858610A
CN110858610A CN201910759483.6A CN201910759483A CN110858610A CN 110858610 A CN110858610 A CN 110858610A CN 201910759483 A CN201910759483 A CN 201910759483A CN 110858610 A CN110858610 A CN 110858610A
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北野大
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Abstract

提供能够抑制元件破坏,能够提高可靠性的电力用半导体装置。电力用半导体装置具备半导体衬底、第1主电极以及多个单元区域。多个单元区域配置于半导体衬底的第1主面之上。第1主电极配置于多个单元区域之上。第1主电极具备第1金属膜、中间膜以及第2金属膜。第1金属膜以及第2金属膜由具有大于或等于95重量%的Al浓度的金属构成。中间膜包含由金属化合物构成的主要成分相以及由铁族元素构成的次要成分相。构成主要成分相的金属化合物是长周期型的周期表中的从由4A、5A以及6A族元素构成的组选择的至少1种元素和从由C以及N构成的组选择的至少1种元素的金属化合物。中间膜具有比第2金属膜的硬度高的硬度。

Description

电力用半导体装置
技术领域
本发明涉及电力用半导体装置。
背景技术
纵向型的电力用半导体装置具备半导体衬底、主电极以及多个单元区域。多个单元区域配置于半导体衬底的主面之上。主电极配置于多个单元区域之上。
有时导线被超声波连接至主电极,有时外引线被直接地压接或者焊料连接至主电极。但是,就以往的纵向型的电力用半导体装置而言,在连接导线、外引线等时,有时由于在单元区域存在台阶而导致元件被破坏。例如,在对导线进行超声波连接时,有时主电极变形,层间绝缘膜等单元区域的要素等被破坏。另外,在对外引线进行压接或者焊料连接时,有时由于热应力而导致元件被破坏。
就专利文献1所记载的纵向型的电力用半导体装置而言,在多个单元区域之上形成发射极电极(第0012段以及第0020段)。发射极电极具有阻挡金属、第1金属膜、高强度金属膜以及第2金属膜(第0013段)。第1金属膜以及第2金属膜由具有大于或等于95%的Al的金属构成(第0013段)。阻挡金属以及高强度金属膜由Ti、W、Mo、V等高熔点金属或者高熔点金属的导电性化合物构成(第0013段)。高强度金属膜与第2金属膜相比强度高(第0013段)。根据专利文献1所记载的纵向型的电力用半导体装置,由于存在与第2金属膜相比强度高的高强度金属膜,因此即使在导线被超声波连接至发射极电极之际第2金属膜发生了变形时,也能够抑制第1金属膜的变形,能够缓和对层间绝缘膜等单元区域的要素的损伤(第0015段)。因此,能够防止导线被超声波连接至发射极电极时的元件破坏(第0015段)。另外,还能够防止外引线被直接地压接或者焊料连接至发射极电极时的元件破坏(第0015段)。
专利文献1:日本特开2011-249491号公报
根据专利文献1所记载的纵向型的电力用半导体装置,在导线被超声波连接至发射极电极的情况下,能够一定程度抑制外引线被直接地压接或者焊料连接时等的元件破坏。但是,高强度金属膜的硬度低,因此在导线被超声波连接至发射极电极,第2金属膜发生了变形的情况下,不能够充分地抑制高强度金属膜的变形,无法充分地抑制第1金属膜的变形。因此,无法充分地抑制导线被超声波连接至发射极电极时的元件破坏。另外,也无法防止外引线被直接地压接或者焊料连接至发射极电极时的元件破坏。
发明内容
本发明就是鉴于该问题而提出的。本发明要解决的课题为提供能够抑制元件破坏,能够提高可靠性的电力用半导体装置。
本发明涉及电力用半导体装置。
电力用半导体装置具备半导体衬底、第1主电极、第2主电极以及多个单元区域。
半导体衬底具有第1主面以及第2主面。第2主面配置于与第1主面的配置侧相反侧。
多个单元区域配置于第1主面之上。
第1主电极配置于多个单元区域之上。
第2主电极配置于第2主面之上。
多个单元区域各自具备半导体层、控制电极以及层间绝缘膜。
半导体层与第1主电极连接。
层间绝缘膜覆盖控制电极,使控制电极相对于第1主电极电绝缘。
在半导体层与层间绝缘膜之间形成台阶。
第1主电极具备第1金属膜、中间膜以及第2金属膜。
第1金属膜配置于多个单元区域之上。中间膜配置于第1金属膜之上。第2金属膜配置于中间膜之上。
第1金属膜以及第2金属膜由具有大于或等于95重量%的Al浓度的金属构成。
中间膜包含由金属化合物构成的主要成分相以及由铁族元素构成的次要成分相。次要成分相将主要成分相彼此结合。构成主要成分相的金属化合物是长周期型的周期表中的从由4A、5A以及6A族元素构成的组选择的至少1种元素和从由C以及N构成的组选择的至少1种元素的金属化合物。
中间膜具有比第2金属膜的硬度高的硬度。
发明的效果
根据本发明,能够提供一种电力用半导体装置,该电力用半导体装置能够抑制元件破坏,能够提高可靠性。
本发明的目的、特征、方案以及优点通过以下的详细说明和附图变得更清楚。
附图说明
图1是示意性地图示实施方式1的电力用半导体装置的剖面的剖面图。
图2是示意性地图示对比例的电力用半导体装置的剖面的剖面图。
图3是示意性地图示实施方式2的电力用半导体装置的剖面的剖面图。
图4是示意性地图示实施方式2的电力用半导体装置的由图3的切断线A-A所示的位置的剖面的局部剖面图。
图5是示意性地图示实施方式3的电力用半导体装置的剖面的剖面图。
标号的说明
100电力用半导体装置,110半导体衬底,112半导体层,114半导体层,116控制电极,118绝缘膜,120层间绝缘膜,160阻挡金属,162第1金属膜,164中间膜,166第2金属膜。
具体实施方式
1实施方式1
1.1电力用半导体装置
图1是示意性地图示实施方式1的电力用半导体装置的剖面的剖面图。
图1所图示的实施方式1的电力用半导体装置100是沟槽绝缘栅型双极晶体管(IGBT)。
电力用半导体装置100具备半导体衬底110。在实施方式1中,半导体衬底110是n型半导体衬底,由Si构成。半导体衬底110具有第1主面140以及第2主面142。第2主面142配置于与第1主面140的配置侧相反侧。
电力用半导体装置100具备半导体层112以及半导体层114。在实施方式1中,半导体层112是p型半导体层,半导体层114是n+半导体层。半导体层112配置于第1主面140之上。半导体层114配置于占据半导体层112的上表面144的一部分的区域之上。
电力用半导体装置100具备控制电极116以及绝缘膜118。在实施方式1中,控制电极116是栅极电极,绝缘膜118是栅极绝缘膜。在电力用半导体装置100形成贯通半导体层112以及半导体层114并到达半导体衬底110的沟槽146。控制电极116埋设于沟槽146,通过绝缘膜118而与半导体层112、半导体层114以及半导体衬底110隔开。
电力用半导体装置100具备层间绝缘膜120。层间绝缘膜120覆盖控制电极116,使控制电极116相对于下述的第1主电极122电绝缘。
电力用半导体装置100具备多个单元区域148。多个单元区域148配置于第1主面140之上。多个单元区域148各自即各单元区域包含半导体层112、半导体层114、控制电极116、绝缘膜118、层间绝缘膜120以及沟槽146。在各单元区域148,在半导体层112、半导体层114与层间绝缘膜120之间形成台阶。
电力用半导体装置100具备第1主电极122。在实施方式1中,第1主电极122是发射极电极。第1主电极122配置于多个单元区域148之上。半导体层112以及半导体层114与第1主电极122连接。
第1主电极122具备阻挡金属160、第1金属膜162、中间膜164以及第2金属膜166。阻挡金属160、第1金属膜162、中间膜164以及第2金属膜166以所记载的顺序形成于多个单元区域148之上。因此,第1金属膜162配置于多个单元区域148之上。中间膜164配置于第1金属膜162之上。第2金属膜166配置于中间膜164之上。阻挡金属160配置于第1金属膜162与多个单元区域148之间。
第1金属膜162以及第2金属膜166由具有大于或等于95重量%的Al浓度的金属构成。由此,第1金属膜162以及第2金属膜166的加工性以及导线向第2金属膜166的连接的容易性提高。这里所说的“金属”可以是纯金属以及合金的任意者。
阻挡金属160以及中间膜164包含由金属化合物构成的主要成分相以及由铁族元素构成的次要成分相。次要成分相将主要成分相彼此结合。
构成主要成分相的金属化合物是长周期型的周期表中的从由4A、5A以及6A族元素构成的组选择的至少1种元素和从由C以及N构成的组选择的至少1种元素的金属化合物。因此,构成主要成分相的金属化合物是从由4A、5A以及6A族元素构成的组选择的至少1种元素的金属化合物,是从由碳化物、碳氮化物以及氮化物构成的组选择的至少1种。从由4A、5A以及6A族元素构成的组选择的至少1种元素例如是从由W、Ti以及Ta构成的组选择的至少1种元素。
构成次要成分相的铁族元素是从由Fe、Co以及Ni构成的组选择的至少1种元素。
因此,中间膜164由WC-Co类合金、WC-TiC-Co类合金、WC-TaC-Co类合金、WC-TiC-TaC-Co类合金、WC-Ni-Cr类合金以及TiC-TaN-Ni-Mo类合金等构成。
由金属化合物构成的主要成分相具有高的硬度。因此,将主要成分相彼此结合而形成的中间膜164具有高的硬度,具有比第2金属膜166的硬度高的硬度。
另外,中间膜164还具有导电性。
电力用半导体装置100具备半导体层124以及半导体层126。在实施方式1中,半导体层124是n+半导体层,半导体层126是p型集电极层。半导体层124以及半导体层126配置于第2主面142之上。
电力用半导体装置100具备第2主电极128。在实施方式1中,第2主电极128是集电极(collector)电极(electrode)。第2主电极128与半导体层124以及半导体层126重叠地配置于第2主面142之上。
1.2对比例与实施方式1的对比
图2是示意性地图示对比例的电力用半导体装置的剖面的剖面图。
图2所图示的对比例的电力用半导体装置900与图1所图示的实施方式1的电力用半导体装置100在下面的点上不同:就实施方式1的电力用半导体装置100而言,第1主电极122除了阻挡金属160以外还具备第1金属膜162、中间膜164以及第2金属膜166。与此相对,就对比例的电力用半导体装置900而言,第1主电极122除了阻挡金属160以外仅具备金属膜168,金属膜168由具有大于或等于95重量%的Al浓度的金属构成。
就对比例的电力用半导体装置900而言,在导线被超声波连接至第1主电极122的情况下,有时第1主电极122变形,元件被破坏。例如,有时层间绝缘膜120等单元区域148的要素等被破坏。
与此相对,就实施方式1的电力用半导体装置100而言,在导线被超声波连接至第1主电极122的情况下,由于存在具有比第2金属膜166的硬度高的硬度的中间膜164,因此尽管第2金属膜166变形,但第1金属膜162的变形得到抑制。因此,能够缓和由于导线向第1主电极122的连接而对层间绝缘膜120等单元区域148的要素等造成的损伤。因此,能够充分地抑制导线被超声波连接至第1主电极122时的元件破坏。另外,还能够抑制由外引线被直接地压接或者焊料连接至第1主电极122时的热应力导致的元件破坏。即,根据实施方式1,能够抑制元件破坏,能够提高可靠性。
另外,通过使在多个单元区域148与第1金属膜162之间配置的阻挡金属160由上述材料构成,从而能够抑制由第1主电极122导致的Si侵蚀,能够抑制由Si侵蚀导致的元件破坏。该效果在电力用半导体装置100具有细微图案的情况下特别显著。
2实施方式2
图3是示意性地图示实施方式2的电力用半导体装置的剖面的剖面图。图4是示意性地图示实施方式2的电力用半导体装置的由图3的切断线A-A所示的位置的剖面的局部剖面图。
图3以及图4所图示的实施方式2的电力用半导体装置200在中间膜164具有网状的平面形状这一点上,与图1所图示的实施方式1的电力用半导体装置100不同。
就实施方式2的电力用半导体装置200而言,也与实施方式1的电力用半导体装置100同样地,由于存在具有比第2金属膜166的硬度高的硬度的中间膜164,因此能够抑制元件破坏,能够提高可靠性。
在此基础上,就实施方式2的电力用半导体装置200而言,第1金属膜162与第2金属膜166经由中间膜164的开口部而彼此接触,因此能够提高通电能力。
3实施方式3
图5是示意性地图示实施方式3的电力用半导体装置的剖面的剖面图。
图5所图示的实施方式3的电力用半导体装置300在第1金属膜162所具有的在中间膜164的配置侧配置的主面150是平坦的这一点上,与实施方式1的电力用半导体装置100不同。该第1金属膜162能够通过以下方式形成,即,对Al进行高温溅射,进行Al回填(Alreflow)等,由此将半导体层112、半导体层114与层间绝缘膜120之间的台阶填埋。
实施方式3的电力用半导体装置300所具备的第1金属膜162能够置换为实施方式1或者2的电力用半导体装置所具备的第1金属膜162。
就实施方式3的电力用半导体装置300而言,也与实施方式1的电力用半导体装置100同样地,由于存在具有比第2金属膜166的硬度高的硬度的中间膜164,因此能够抑制元件破坏,能够提高可靠性。
在此基础上,就实施方式3的电力用半导体装置300而言,能够使在导线被连接至第1主电极122时施加至第1主电极122的应力由中间膜164的整体均等地承受,因而能够进一步缓和由于导线向第1主电极122的连接而对层间绝缘膜120等单元区域148的要素等造成的损伤。因此,能够进一步抑制导线被超声波连接至第1主电极122时的元件破坏。另外,还能够进一步抑制由外引线被直接地压接或者焊料连接至第1主电极122时的热应力导致的元件破坏。
4变形例
实施方式1、2以及3的电力用半导体装置100、200以及300是沟槽IGBT。但是,上述技术在除了沟槽IGBT以外的具备多个单元区域148的纵向型的电力用半导体装置中也可以采用。例如,上述技术在金属氧化物半导体场效应晶体管(MOSFET)中也可以采用。在上述技术被用于MOSFET的情况下,第1主电极是源极电极,第2主电极是漏极电极。
此外,本发明能够在本发明的范围内对实施方式适当进行变形、省略。
对于本发明进行了详细说明,但上述说明在所有方面均为例示,本发明不限定于此。可以理解为在不脱离该发明的范围的情况下能够想到未例示出的无数的变形例。

Claims (4)

1.一种电力用半导体装置,其具备:
半导体衬底,其具有第1主面以及配置于与所述第1主面的配置侧相反侧的第2主面;
多个单元区域,其配置于所述第1主面之上;
第1主电极,其配置于所述多个单元区域之上;以及
第2主电极,其配置于所述第2主面之上,
所述多个单元区域各自具备:
半导体层,其与所述第1主电极连接;
控制电极;以及
层间绝缘膜,其覆盖所述控制电极,使所述控制电极相对于所述第1主电极电绝缘,在所述层间绝缘膜与所述半导体层之间形成台阶,
所述第1主电极具备:
第1金属膜,其配置于所述多个单元区域之上,由具有大于或等于95重量%的Al浓度的金属构成;
中间膜,其配置于所述第1金属膜之上,该中间膜包含主要成分相以及次要成分相,该主要成分相由长周期型的周期表中的从由4A、5A以及6A族元素构成的组选择的至少1种元素和从由C以及N构成的组选择的至少1种元素的金属化合物构成,该次要成分相由铁族元素构成,该次要成分相将所述主要成分相彼此结合;以及
第2金属膜,其配置于所述中间膜之上,由具有大于或等于95重量%的Al浓度的金属构成,
所述中间膜具有比所述第2金属膜的硬度高的硬度。
2.根据权利要求1所述的电力用半导体装置,其中,
所述第1主电极还具备阻挡金属,该阻挡金属配置于所述第1金属膜与所述多个单元区域之间,该阻挡金属包含主要成分相以及次要成分相,该阻挡金属的主要成分相由长周期型的周期表中的从由4A、5A以及6A族元素构成的组选择的至少1种元素和从由C以及N构成的组选择的至少1种元素的金属化合物构成,该阻挡金属的次要成分相由铁族元素构成,该阻挡金属的次要成分相将该阻挡金属的所述主要成分相彼此结合。
3.根据权利要求1或2所述的电力用半导体装置,其中,
所述中间膜具有网状的平面形状。
4.根据权利要求1至3中任一项所述的电力用半导体装置,其中,
所述第1金属膜具有在所述中间膜的配置侧配置的主面,
所述主面是平坦的。
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Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN87107402A (zh) * 1986-12-12 1988-06-22 株式会社东芝 半导体器件
US6380622B1 (en) * 1998-11-09 2002-04-30 Denso Corporation Electric apparatus having a contact intermediary member and method for manufacturing the same
US20100193835A1 (en) * 2009-02-05 2010-08-05 Force-Mos Technology Corporation Trench insulated gate bipolar transistor (GBT) with improved emitter-base contacts and metal schemes
JP2011249491A (ja) * 2010-05-26 2011-12-08 Mitsubishi Electric Corp 電力用半導体装置
CN103296037A (zh) * 2012-07-12 2013-09-11 上海天马微电子有限公司 接触垫、平板图像探测器及其制作方法
US20150048383A1 (en) * 2012-03-30 2015-02-19 Fuji Electric Co., Ltd. Silicon carbide semiconductor element and fabrication method thereof
US20170186847A1 (en) * 2015-12-25 2017-06-29 Rohm Co., Ltd. Semiconductor device and method for manufacturing semiconductor device

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6960836B2 (en) * 2003-09-30 2005-11-01 Agere Systems, Inc. Reinforced bond pad
US9318624B2 (en) * 2012-11-27 2016-04-19 Cree, Inc. Schottky structure employing central implants between junction barrier elements
CN108346700B (zh) 2017-01-24 2021-10-12 株式会社电装 半导体装置及其制造方法
JP6897141B2 (ja) * 2017-02-15 2021-06-30 株式会社デンソー 半導体装置とその製造方法
KR102434174B1 (ko) * 2017-11-22 2022-08-19 에스케이하이닉스 주식회사 홀 내에 국한된 선택 소자 패턴를 갖는 반도체 메모리 장치
DE102018114591B4 (de) * 2018-06-18 2021-09-02 Infineon Technologies Ag Transistorbauelement

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN87107402A (zh) * 1986-12-12 1988-06-22 株式会社东芝 半导体器件
US6380622B1 (en) * 1998-11-09 2002-04-30 Denso Corporation Electric apparatus having a contact intermediary member and method for manufacturing the same
US20100193835A1 (en) * 2009-02-05 2010-08-05 Force-Mos Technology Corporation Trench insulated gate bipolar transistor (GBT) with improved emitter-base contacts and metal schemes
JP2011249491A (ja) * 2010-05-26 2011-12-08 Mitsubishi Electric Corp 電力用半導体装置
US20150048383A1 (en) * 2012-03-30 2015-02-19 Fuji Electric Co., Ltd. Silicon carbide semiconductor element and fabrication method thereof
CN103296037A (zh) * 2012-07-12 2013-09-11 上海天马微电子有限公司 接触垫、平板图像探测器及其制作方法
US20170186847A1 (en) * 2015-12-25 2017-06-29 Rohm Co., Ltd. Semiconductor device and method for manufacturing semiconductor device

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