CN110827761B - Electro-optical device and electronic apparatus - Google Patents
Electro-optical device and electronic apparatus Download PDFInfo
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- CN110827761B CN110827761B CN201910738971.9A CN201910738971A CN110827761B CN 110827761 B CN110827761 B CN 110827761B CN 201910738971 A CN201910738971 A CN 201910738971A CN 110827761 B CN110827761 B CN 110827761B
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- 230000007547 defect Effects 0.000 description 26
- 238000010586 diagram Methods 0.000 description 26
- 239000003990 capacitor Substances 0.000 description 11
- 238000006243 chemical reaction Methods 0.000 description 6
- 230000003287 optical effect Effects 0.000 description 5
- 230000002950 deficient Effects 0.000 description 3
- 239000004973 liquid crystal related substance Substances 0.000 description 3
- 238000000034 method Methods 0.000 description 2
- 239000004065 semiconductor Substances 0.000 description 2
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 1
- 230000002159 abnormal effect Effects 0.000 description 1
- 239000003086 colorant Substances 0.000 description 1
- 230000007423 decrease Effects 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005684 electric field Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000001771 impaired effect Effects 0.000 description 1
- 239000011159 matrix material Substances 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229910052710 silicon Inorganic materials 0.000 description 1
- 239000010703 silicon Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
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-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3225—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix
- G09G3/3233—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED] using an active matrix with pixel circuitry controlling the current through the light-emitting element
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3266—Details of drivers for scan electrodes
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G3/00—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes
- G09G3/20—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters
- G09G3/22—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources
- G09G3/30—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels
- G09G3/32—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED]
- G09G3/3208—Control arrangements or circuits, of interest only in connection with visual indicators other than cathode-ray tubes for presentation of an assembly of a number of characters, e.g. a page, by composing the assembly by combination of individual elements arranged in a matrix no fixed position being assigned to or needed to be assigned to the individual characters or partial characters using controlled light sources using electroluminescent panels semiconductive, e.g. using light-emitting diodes [LED] organic, e.g. using organic light-emitting diodes [OLED]
- G09G3/3275—Details of drivers for data electrodes
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/10—OLED displays
- H10K59/12—Active-matrix OLED [AMOLED] displays
- H10K59/131—Interconnections, e.g. wiring lines or terminals
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
- H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
- H10K59/30—Devices specially adapted for multicolour light emission
- H10K59/35—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels
- H10K59/353—Devices specially adapted for multicolour light emission comprising red-green-blue [RGB] subpixels characterised by the geometrical arrangement of the RGB subpixels
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B27/00—Optical systems or apparatus not provided for by any of the groups G02B1/00 - G02B26/00, G02B30/00
- G02B27/01—Head-up displays
- G02B27/0101—Head-up displays characterised by optical features
- G02B2027/0112—Head-up displays characterised by optical features comprising device for genereting colour display
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B27/00—Optical systems or apparatus not provided for by any of the groups G02B1/00 - G02B26/00, G02B30/00
- G02B27/01—Head-up displays
- G02B27/0101—Head-up displays characterised by optical features
- G02B2027/0147—Head-up displays characterised by optical features comprising a device modifying the resolution of the displayed image
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B27/00—Optical systems or apparatus not provided for by any of the groups G02B1/00 - G02B26/00, G02B30/00
- G02B27/01—Head-up displays
- G02B27/017—Head mounted
- G02B2027/0178—Eyeglass type
-
- G—PHYSICS
- G02—OPTICS
- G02B—OPTICAL ELEMENTS, SYSTEMS OR APPARATUS
- G02B27/00—Optical systems or apparatus not provided for by any of the groups G02B1/00 - G02B26/00, G02B30/00
- G02B27/01—Head-up displays
- G02B27/017—Head mounted
- G02B27/0172—Head mounted characterised by optical features
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2300/00—Aspects of the constitution of display devices
- G09G2300/04—Structural and physical details of display devices
- G09G2300/0439—Pixel structures
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2310/00—Command of the display device
- G09G2310/02—Addressing, scanning or driving the display screen or processing steps related thereto
- G09G2310/0202—Addressing of scan or signal lines
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/08—Fault-tolerant or redundant circuits, or circuits in which repair of defects is prepared
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2330/00—Aspects of power supply; Aspects of display protection and defect management
- G09G2330/12—Test circuits or failure detection circuits included in a display system, as permanent part thereof
-
- G—PHYSICS
- G09—EDUCATION; CRYPTOGRAPHY; DISPLAY; ADVERTISING; SEALS
- G09G—ARRANGEMENTS OR CIRCUITS FOR CONTROL OF INDICATING DEVICES USING STATIC MEANS TO PRESENT VARIABLE INFORMATION
- G09G2340/00—Aspects of display data processing
- G09G2340/04—Changes in size, position or resolution of an image
- G09G2340/0407—Resolution change, inclusive of the use of different resolutions for different screen areas
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- General Physics & Mathematics (AREA)
- Theoretical Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Control Of Indicators Other Than Cathode Ray Tubes (AREA)
- Electroluminescent Light Sources (AREA)
- Control Of El Displays (AREA)
Abstract
An electro-optical device and an electronic apparatus. The electro-optical device includes: one unit circuit provided corresponding to an intersection of one scan line and one data line; other unit circuits provided corresponding to intersections of one scanning line and other data lines, intersections of other scanning lines and the one data line, or intersections of other scanning lines and other data lines; and an electro-optical element driven by one unit circuit or another unit circuit.
Description
Technical Field
The present invention relates to an electro-optical device and an electronic apparatus.
Background
In recent years, various electro-optical devices using electro-optical elements such as Organic Light Emitting diodes (hereinafter referred to as "OLEDs") and liquid crystal elements have been proposed. In general, the electro-optical device is configured such that a unit circuit is provided at a position corresponding to an intersection of a scanning line and a data line. The unit circuit includes 1 or more transistors, capacitors, and the like, and holds the voltage of the data signal supplied to the data line when the scan line is selected, and continuously flows a current corresponding to the held voltage to the OLED or continuously applies a voltage corresponding to the held voltage to the liquid crystal element even when the scan line is not selected.
In such a configuration, when a defect, or the like occurs in a certain unit circuit, the electro-optical element driven by the unit circuit is in a constantly lit state (bright spot) or a constantly unlit state (dark spot), and therefore, the display quality is impaired.
Therefore, the following techniques are proposed: in the case where a defect or the like occurs in the unit circuit, the connection to the electro-optical element is switched from the unit circuit to the spare circuit, and the defect or the like is repaired (for example, see patent document 1).
Patent document 1: japanese patent laid-open publication No. 2009-3009
However, an abnormal current or the like flows through a scanning line or a data line corresponding to a unit circuit related to a defect or the like, and thus, a disconnection or the like may occur in the scanning line or the data line. In this case, the above-described technique has the following problems: even if the unit circuits of 1 row sharing the scanning line or the unit circuits of 1 column sharing the data line are switched to the spare circuits, the defect or the like cannot be repaired.
Disclosure of Invention
In order to solve one of the above problems, an electro-optical device according to an embodiment of the present invention includes: the 1 st scanning line and the 2 nd scanning line; a 1 st data line and a 2 nd data line; a 1 st unit circuit provided corresponding to an intersection of the 1 st scan line and the 1 st data line; a 2 nd unit circuit provided corresponding to any one of an intersection of the 1 st scan line and the 2 nd data line, an intersection of the 2 nd scan line and the 1 st data line, or an intersection of the 2 nd scan line and the 2 nd data line; an electro-optical element electrically connected to the 1 st unit circuit and the 2 nd unit circuit; and a drive circuit. The driving circuit supplies a scanning signal for driving the unit circuit to one of the 1 st scanning line and the 2 nd scanning line and supplies a signal for not driving the unit circuit to the other, the driving circuit supplies a data signal for driving the unit circuit to one of the 1 st data line and the 2 nd data line and supplies a signal for not driving the unit circuit to the other, and the electro-optical element is configured to be driven by either the 1 st unit circuit or the 2 nd unit circuit.
An electro-optical device according to another aspect of the present invention includes: a plurality of scanning lines including a 1 st scanning line and a 2 nd scanning line; a plurality of data lines including a 1 st data line and a 2 nd data line; a plurality of unit circuits including a 1 st unit circuit and a 2 nd unit circuit provided corresponding to intersections of the plurality of scanning lines and the plurality of data lines; a plurality of electro-optical elements including the 1 st electro-optical element; and a drive circuit. The 1 st unit circuit is provided corresponding to an intersection of the 1 st scanning line and the 1 st data line, the 2 nd unit circuit is provided corresponding to any one of an intersection of the 1 st scanning line and the 2 nd data line, an intersection of the 2 nd scanning line and the 1 st data line, or an intersection of the 2 nd scanning line and the 2 nd data line, the 1 st electro-optical element is electrically connected to the 1 st unit circuit and the 2 nd unit circuit, the driving circuit supplies a scanning signal for driving the unit circuit to one of the 1 st scanning line and the 2 nd scanning line and supplies a signal for not driving the unit circuit to the other, the driving circuit supplies a data signal for driving the unit circuit to one of the 1 st data line and the 2 nd data line and supplies a signal for not driving the unit circuit to the other, the 1 st electro-optical element is configured to be driven by either the 1 st unit circuit or the 2 nd unit circuit.
An electro-optical device according to still another aspect of the present invention includes: the 1 st scanning line and the 2 nd scanning line; a 1 st data line and a 2 nd data line; a 1 st unit circuit provided corresponding to an intersection of the 1 st scan line and the 1 st data line; a 2 nd unit circuit provided corresponding to any one of an intersection of the 1 st scan line and the 2 nd data line, an intersection of the 2 nd scan line and the 1 st data line, or an intersection of the 2 nd scan line and the 2 nd data line; an electro-optical element electrically connected to the 1 st unit circuit and the 2 nd unit circuit; and a drive circuit. The driving circuit supplies a scanning signal for driving the unit circuit to one of the 1 st scanning line and the 2 nd scanning line and supplies a signal for not driving the unit circuit to the other, the driving circuit supplies a data signal for driving the unit circuit to one of the 1 st data line and the 2 nd data line and supplies a signal for not driving the unit circuit to the other, and the electro-optical element is driven by either the 1 st unit circuit or the 2 nd unit circuit.
An electronic apparatus of the present invention includes the electro-optical device described above.
Drawings
Fig. 1 is a perspective view showing the structure of an electro-optical device according to embodiment 1.
Fig. 2 is a diagram showing an electrical structure of the electro-optical device.
Fig. 3 is a diagram showing the configuration of a unit circuit in the electro-optical device.
Fig. 4 is a diagram showing the configuration of a unit circuit and an equivalent circuit of an OLED.
Fig. 5 is a timing chart showing the operation of the electro-optical device.
Fig. 6 is a timing chart showing the operation of the electro-optical device.
Fig. 7 is a timing chart showing the operation of the electro-optical device.
Fig. 8 is a diagram showing the configuration of another unit circuit and the like of the electro-optical device according to embodiment 1.
Fig. 9 is a diagram showing a display portion of the electro-optical device according to embodiment 2.
Fig. 10 is a diagram showing the configuration of the unit circuit and the OLED of the electro-optical device.
Fig. 11 is a diagram showing the configuration of a unit circuit and an equivalent circuit of an OLED.
Fig. 12 is a diagram showing a display portion of the electro-optical device according to embodiment 3.
Fig. 13 is a diagram showing the configuration of the unit circuit and the OLED of the electro-optical device.
Fig. 14 is a diagram showing a display portion of the electro-optical device according to embodiment 4.
Fig. 15 is a diagram showing the configuration of the unit circuit and the OLED of the electro-optical device.
Fig. 16 is a perspective view showing an HMD using the electro-optical device of the embodiment and the like.
Fig. 17 is a diagram showing an optical structure of the HMD.
Description of the reference symbols
10: an electro-optical device; 12: scanning a line; 14: a data line; 20: a scanning line driving circuit; 22: a Y selector; 40: a data line drive circuit; 42: an X selector; 100: a display unit; 121. 122, 123: a transistor; 150: an OLED; 1000: a unit circuit.
Detailed Description
Hereinafter, embodiments for carrying out the present invention will be described with reference to the drawings.
< embodiment 1 >
Fig. 1 is a perspective view showing the structure of an electro-optical device 10 according to embodiment 1.
The electro-optical device 10 is a micro-display that displays a color image in a head-mounted display (HMD) or the like, for example. The details of the electro-optical device 10 will be described later, in which a plurality of unit circuits, electro-optical elements driven by the unit circuits, and the like are formed on a semiconductor silicon substrate, for example, and OLEDs are used as the electro-optical elements.
The display unit 100 of the electro-optical device 10 is housed in a frame-shaped case 72 that is open in the image display area. One end of an FPC (flexible Printed circuits) board 74 is connected to a board housed in the case 72, and the other end of the FPC board 74 is provided with a plurality of terminals 76 and connected to an upper circuit not shown. The control circuit 5 of the semiconductor chip is mounted On the FPC board 74 by cof (chip On film) technology, and image data is supplied from the host circuit in synchronization with a synchronization signal via a plurality of terminals 76. The synchronization signal includes a vertical synchronization signal and a horizontal synchronization signal. The image data specifies, for example, 8 bits for each RGB, the gradation of a pixel of an image to be displayed. Specifically, in the present embodiment, the gradation of a pixel is specified in stages for each RGB in a range from the darkest 0-level, i.e., the level at which black display is performed, to the brightest 255-level.
The control circuit 5 generates various control signals for performing vertical scanning and horizontal scanning on the display unit 100 in accordance with the synchronization signal supplied from the host circuit, divides the gradation into sub-pixels of RGB, and outputs the sub-pixels in accordance with the vertical scanning and the horizontal scanning of the display unit 100 or after processing. The control circuit 5 also functions as a power supply circuit of the electro-optical device 10, and generates each potential (voltage).
Fig. 2 is a diagram showing an electrical configuration of the electro-optical device 10 of the embodiment. As shown in the figure, the electro-optical device 10 is roughly divided into a control circuit 5, a scanning line driving circuit 20, a plurality of Y selectors 22, a data line driving circuit 40, a plurality of X selectors 42, and a display section 100.
The display unit 100 includes subpixels 130 arranged in a matrix. In detail, in the present embodiment, in the display unit 100, (3M) scan lines 12 grouped into 3 lines extend in the horizontal direction in the drawing, and (3N) data lines 14 grouped into 3 lines extend in the vertical direction in the drawing, and the sub-pixels 130 are arranged corresponding to intersections of the 3 scan lines and the 3 data lines after the grouping.
M, N are each an integer of 2 or more. For convenience, when the direction in which the scanning lines 12 extend is a row (row) and the direction in which the data lines 14 extend is a column (column), the subpixels 130 are arranged in M rows and N columns.
In the present embodiment, the sub-pixels 130 correspond to any one of red (R), green (G), and blue (B), and are arranged in a long line in the display unit 100, for example. Specifically, the subpixels 130 of the same color are arranged linearly in the column direction and arranged in the RGB order in the row direction.
In addition, 1 subpixel 130 includes 1 OLED, which emits light in a color corresponding to the subpixel 130, representing 1 of the 3 primary colors. That is, the sub-pixels 130 are represented by light emission of the OLED, and 1 pixel of a color image to be displayed is represented by 3 sub-pixels 130 of RGB. Note that 3 subpixels 130 of RGB constitute 1 pixel, but other subpixels may be included, and 1 pixel may be constituted by 4 or more subpixels 130.
In the present embodiment, 1 OLED is driven by 1 unit circuit out of 9 unit circuits, and the relationship between the OLED and the unit circuit will be described later.
The control circuit 5 outputs various signals based on the image data and the synchronization signal supplied from the host circuit. The control circuit 5 outputs a control signal Ctry for controlling the scanning line driving circuit 20, a control signal Ctrx for controlling the data line driving circuit 40, and a gray level Vd for designating the gray level of the subpixel 130, which will be described as main signals. Although not shown in fig. 2 to avoid complication, the control circuit 5 supplies information on which scanning line 12 is enabled and which scanning line 12 is disabled to the Y selector 22, and supplies information on which data line 14 is enabled and disabled to the X selector 42.
The scanning line driving circuit 20 generates a scanning signal for sequentially scanning the subpixels 130 arranged in M rows and N columns over a period of 1 frame in accordance with the control signal Ctry. Here, the scanning signals for scanning the sub-pixels 130 in the 1 st, 2 nd, 3 rd, … … th, (M-1) th and M th rows are denoted as G (1), G (2), G (3), … … th, G (M-1) th and G (M), respectively.
In order to generally describe the rows of the subpixels 130 arranged in M rows and N columns and the rows of the scanning lines 12 grouped for each 3, i satisfying an integer of 1. ltoreq. i.ltoreq.M is used and is referred to as an i-th row, and a scanning signal for scanning the subpixels 130 in the i-th row is referred to as G (i).
The 1-frame period represents a period required for the electro-optical device 10 to display a 1-cut (frame) image, and for example, if the frequency of the vertical synchronization signal included in the synchronization signal is 60Hz and the image is displayed at an equal rate of the vertical synchronization signal, the 1-frame period is 16.7 milliseconds, which is a 1 cycle of the signal.
The Y selector 22 is provided corresponding to the grouped 3 scanning lines 12. Therefore, in the present embodiment, M Y selectors 22 are provided.
The M Y selectors 22 enable 1 of the 3 scanning lines 12 and disable the other 2 scanning lines, respectively, as instructed by the control circuit 5. Specifically, the Y selector 22 directly supplies the scanning signal from the scanning line driving circuit 20 to 1 enabled scanning line 12, and supplies the non-selection signal to each of 2 disabled scanning lines 12.
The enable for the scan line 12 represents the following state: in the vertical scanning, when a scanning target is to be obtained, a selection signal for turning on a transistor described later, which has a gate node connected to the scanning line 12, is supplied to the unit circuit, and when the scanning target is not obtained, a non-selection signal for turning off the transistor is supplied. Further, the disabling for the scanning line 12 represents the following state: in the vertical scanning, the non-selection signal is fixed regardless of whether the scanning target is to be scanned.
In the initial state, each Y selector 22 enables, for example, the uppermost 1 of the 3 scan lines 12 in the figure.
The data line driving circuit 40 supplies a data signal to each of the sub-pixels 130 in 1 row selected by the scanning line driving circuit 20. To generally describe the columns of the subpixels 130 arranged in M rows and N columns and the columns of the data lines 14 grouped every 3, j satisfying an integer of 1 ≦ j ≦ N is used. Here, when the i-th row is selected, the data line driving circuit 40 outputs the data signal S (1) to the subpixel 130 in the i-row 1-column, outputs the data signal S (2) to the subpixel 130 in the i-row 2-column, outputs the data signal S (3) to the subpixel 130 in the i-row 3-column, and outputs the data signal S (j) to the subpixel 130 in the i-row j-column.
In the data line driving circuit 40, a group of the latch circuit 402, the D/a conversion circuit 404, and the amplifier circuit 406 is provided for each group, that is, for each 3 data lines 14.
Here, the latch circuit 402, the D/a conversion circuit 404, and the amplifier circuit 406 are representatively described in the jth group.
In the jth group, the latch circuit 402 latches the gradation level Vd corresponding to the subpixel 130 in the ith row and the jth column supplied from the control circuit 5 when the ith row is selected. The D/a conversion circuit 404 converts the gradation level Vd latched by the latch circuit 402 into a logic signal, and the amplifier circuit 406 amplifies the logic signal converted by the D/a conversion circuit 404 and outputs the amplified logic signal as a data signal sd (j). Here, the latch circuit 402, the D/a conversion circuit 404, and the amplifier circuit 406 have been described with reference to the j-th group, but the latch circuit 402, the D/a conversion circuit 404, and the amplifier circuit 406 other than the j-th group also operate in parallel with the j-th group at the same time.
The potential relationship of the data signal can be obtained in stages in a range from a potential V _0 having a gray level corresponding to 0 level to a potential V _255 having a gray level corresponding to 255 levels. Here, when the driving transistor for controlling the current flowing through the OLED is a P-channel type, the potential of the data signal decreases from the highest potential V _0 to the lowest potential V _255 as the driving transistor is brightly specified by the gray level.
The X selector 42 is provided corresponding to the grouped 3 data lines 14. Therefore, in the present embodiment, N X selectors 42 are provided.
The N X selectors 42 enable 1 of the 3 data lines 14 and disable the other 2 data lines, respectively, as instructed by the control circuit 5.
Specifically, the X selector 42 directly supplies the data signal from the data line driving circuit 40 to 1 enabled data line 14, while supplying a signal having a gray level of 0, that is, a potential V _0 corresponding to black display, to each of 2 disabled data lines 14.
In the initial state, each X selector 42 enables, for example, the leftmost 1 data line 14 out of 3 lines.
The enable for the data line 14 indicates a state in which a data signal is supplied from the data line drive circuit 40. The disabling of the data line 14 indicates a state in which a signal of the potential V _0 for black display is supplied without supplying a data signal from the data line driving circuit 40.
The control circuit 5, the scanning line driving circuit 20, the plurality of Y selectors 22, the data line driving circuit 40, and the plurality of X selectors 42 are examples of driving circuits.
Next, the relationship between the sub-pixel 130 and the unit circuit is described.
Fig. 3 is a diagram showing the arrangement of a unit circuit 1000 in the electro-optical device 10. The figure shows an arrangement of unit circuits 1000 corresponding to the subpixels 130 in i row and j column, the subpixels 130 in i row and (j +1) column, and the subpixels 130 in i row and (j +2) column, respectively.
As shown in the figure, the unit circuit 1000 is provided corresponding to the intersection of 1 scan line 12 and 1 data line 14. Therefore, 9 unit circuits 1000 correspond to the sub-pixels 130, and the sub-pixels 130 are disposed at intersections of 3 scan lines and 3 data lines after the grouping.
In fig. 3, signals supplied from the Y selector 22 to the 3 scanning lines 12 corresponding to the subpixels 130 in the ith row are denoted by G (i) _ a, G (i) _ b, and G (i) _ c, respectively.
Similarly, signals supplied from the X selector 42 to the 3 data lines 14 corresponding to the sub-pixel 130 in the j-th column are denoted by S (j) a, S (j) b, and S (j) c, signals supplied to the 3 data lines 14 corresponding to the sub-pixel 130 in the (j +1) -th column are denoted by S (j +1) a, S (j +1) b, and S (j +1) c, and signals supplied to the 3 data lines 14 corresponding to the sub-pixel 130 in the (j +2) -th column are denoted by S (j +2) a, S (j +2) b, and S (j +2) c, respectively.
Fig. 4 is a diagram showing an electrical structure of 1 subpixel 130. In the present embodiment, 1 OLED150 and 9 unit circuits 1000 are provided in 1 subpixel 130. Fig. 4 is a diagram showing only an equivalent circuit of the unit circuit 1000 and the like, and does not reflect an actual circuit layout.
As shown in the figure, a total of 9 unit circuits 1000 are provided corresponding to respective intersections of 3 scanning lines 12 and 3 data lines 14 corresponding to the sub-pixels 130.
The 1 unit circuit 1000 includes transistors 121 and 122 of a P channel type and a capacitor Cpix.
The transistor 122 has a gate node connected to the scanning line 12, one of a drain and a source node connected to the data line 14, and the other connected to the gate node of the transistor 121 and one end of the capacitor Cpix. In the transistor 121 as an example of the driving transistor, a source node is connected to the power supply line 116. The power supply line 116 is supplied with a potential Vel on the high side of the power supply of the OLED 150.
Although the other end of the capacitor Cpix is connected to the feeder 116 in the present embodiment, it may be connected to a feeder of another potential if the capacitor Cpix is kept at a constant potential.
The 9 unit circuits 1000 have electrically the same configuration. The drain nodes of the transistors 121 in the 9 unit circuits 1000 are commonly connected to each other and the anode of the OLED 150. The cathode of the OLED150 is connected to the supply line 118. The power supply line 118 is supplied with a potential Vct on the lower side of the power supply of the OLED 150.
The operation of the electro-optical device 10 will be described with reference to the timing chart of fig. 5.
As shown in the drawing, the scanning signals G (1) to G (M) are sequentially switched to the low level over a period of 1 frame (F), and the subpixels 130 in the 1 st to M th rows are sequentially scanned every 1 horizontal scanning period (H).
In the initial state, the M Y selectors 22 enable only the uppermost 1 of the 3 scanning lines 12. Therefore, in the case of the i-th row, the Y selector 22 changes the signal G (i) _ a among the signals G (i) _ a, G (i) _ b, and G (i) _ c supplied to the 3 scanning lines 12 corresponding to the i-th row to the scanning signal G (i) output from the scanning line driving circuit 20, and changes the signals G (i) _ b and G (i) _ c to the high level of the non-selection signal. Note that, although the description is given of the ith row, the same applies to the other rows.
In the initial state, the N X selectors 42 enable only the leftmost 1 of the 3 data lines 14. Therefore, in the j-th column, the X selector 42 changes the signal S (j) _ a among the signals S (j) _ a, S (j) _ b, S (j) _ c supplied to the 3 data lines 14 corresponding to the j-th column to the data signal S (j) output from the data line driving circuit 40, and changes the signals S (j) _ b, S (j) _ c to the potential V _ 0.
Note that, although the description is given for the j-th column, the same applies to other columns.
Here, when the scanning signal g (i) becomes low level in accordance with the selection of the ith row, the data signal s (j) in the jth column becomes a voltage corresponding to the gray level (i, j) in the ith row and the jth column.
When the scanning signal g (i) is at a low level, the transistor 122 is turned on in 3 unit circuits 1000 corresponding to the uppermost scanning line 12 out of the 9 unit circuits corresponding to the subpixels 130 in i, row and j, but the transistor 122 is turned off in 6 unit circuits 1000 corresponding to the central and lowermost scanning lines 12.
Therefore, of the 9 unit circuits 1000 corresponding to the subpixels 130 in i row and j column, 3 unit circuits 1000 corresponding to the uppermost scanning line 12 hold the voltage of the signal s (j) in the capacitance Cpix of the leftmost unit circuit 1000, while the potential V _0 is held in the capacitances Cpix of the central and rightmost unit circuits 1000, respectively.
In the leftmost unit circuit 1000 of the 3 unit circuits, even if the signal g (i) _ a changes from low level to high level, the gate node of the transistor 121 is held at the voltage of the signal s (j) by the capacitor Cpix, and therefore the transistor 121 continues to flow a current corresponding to the voltage through the OLED 150.
In the unit circuit 1000 located at the center and the rightmost among the 3 unit circuits, even if the signal g (i) _ a changes from low level to high level, the gate node of the transistor 121 is held at the potential V _0 by the capacitor Cpix, and therefore the transistor 121 does not flow a current through the OLED 150.
In the 6 unit circuits 1000 corresponding to the central and lowermost scanning lines 12 out of the 9 unit circuits corresponding to the OLEDs 150 in i row and j column, the transistor 121 is not turned on, and therefore, the signal via the data line 14 is not held in the capacitor Cpix. Specifically, one end of the capacitor Cpix, that is, the gate node of the transistor 121 is substantially at the potential Vel due to leakage. Therefore, in the 6 unit circuits 1000, the transistor 121 does not flow a current through the OLED 150.
Therefore, of the 9 unit circuits 1000 corresponding to the subpixels 130 in i row and j column, the unit circuit for flowing the current through the OLED150 is only the unit circuit 1000 corresponding to the uppermost scan line 12 that becomes enabled among the 3 scan lines 12 and the leftmost data line 14 that becomes enabled among the 3 data lines 14, and the OLED150 in the subpixel 130 in i row and j column emits light in accordance with the current.
Although the subpixel 130 in i row and j column is described here, the same applies to the other subpixels 130, and only the unit circuit 1000 corresponding to the uppermost scanning line 12 of the 3 scanning lines and the leftmost data line 14 of the 3 data lines 14 flows the current corresponding to the holding voltage of the capacitor Cpix to the corresponding OLED 150.
However, if all the unit circuits 1000 corresponding to the scanning lines 12 enabled by the Y selectors 22 and the data lines 14 enabled by the X selectors 42 are normal in the initial state, the display quality is not degraded.
However, as described above, a defect may occur after the initial state in the unit circuit 1000 of 1 row in the unit of the scanning line 12 or the unit circuit 1000 of 1 column in the unit of the data line 14.
After the initial state, for example, when the ith row becomes a display defect, the uppermost scan line 12 that is enabled among the 3 scan lines 12 corresponding to the subpixel 130 in the ith row or the unit circuit 1000 corresponding to the uppermost scan line 12 may become defective.
Therefore, in this embodiment, the control circuit 5 instructs the Y selector 22 in the i-th row to switch the enabled scan line 12 among the 3 scan lines 12 corresponding to the sub-pixel 130 in the i-th row to the uppermost scan line 12 other than the enabled scan line 12, for example, the center scan line.
In response to this instruction, the Y selector 22 corresponding to the i-th row supplies the scanning signal g (i) from the scanning line driving circuit 20 to the scan line 12 that is the center of the enabled scan lines 12 among the 3 scan lines 12 corresponding to the sub-pixels 130 in the i-th row, and supplies the non-selection signal to the uppermost and lowermost scan lines 12.
Here, as shown in fig. 6, when the scanning signal G (i) goes low, the signal G (i) _ b goes low, but the signals G (i) _ a and G (i) _ c go high.
Therefore, in the case of i rows and j columns, the transistor 122 is turned on in 3 unit circuits 1000 corresponding to the central scanning line 12 out of the 9 unit circuits corresponding to the sub-pixel 130, but the transistor 122 is turned off in 6 unit circuits 1000 corresponding to the uppermost and lowermost scanning lines 12.
On the other hand, when the signal g (i) _ b is at a low level, the signal s (j) of the gray level for the OLED150 in i row and j column is supplied to the leftmost data line 14 among the 3 data lines 14 corresponding to j column, and the potential V _0 is supplied to the other 2 data lines 14, which is the same as the initial state.
Therefore, of the 9 unit circuits 1000 corresponding to the sub-pixels 130 in i row and j column, the unit circuit 1000 that causes a current to flow through the OLED150 is only the unit circuit 1000 corresponding to the scan line 12 in the center of the 3 scan lines 12 that becomes enabled and the leftmost data line 14 of the 3 data lines 14 that becomes enabled, and the OLED150 in i row and j column emits light in accordance with the current.
Although the description is given of the subpixels 130 in i rows and j columns, the same applies to the subpixels 130 in i rows and other columns, and only the unit circuit 1000 corresponding to the central scanning line 12 of the 3 scanning lines and the leftmost data line 14 of the 3 data lines 14 causes the current corresponding to the holding voltage of the capacitor Cpix to flow through the OLED150 in the corresponding subpixel 130.
Therefore, even when the uppermost scanning line 12 among the 3 scanning lines 12 corresponding to the ith row or the unit circuit 1000 corresponding to the uppermost scanning line 12 is defective and the ith row becomes a display defect, the display defect can be repaired.
Further, if a display defect occurs even if the uppermost or central scanning line 12 among the 3 scanning lines 12 corresponding to the i-th row is enabled, the lowermost scanning line 12 may be enabled.
On the other hand, in the case where a display defect occurs in the column direction instead of the row direction after the initial state, for example, in the case where the j-th column becomes a display defect, the control circuit 5 instructs the X selector 42 in the j-th column to switch the enabled data line 14 of the 3 data lines 14 corresponding to the sub-pixel 130 in the j-th column to the data line 14 other than the leftmost data line 14 in the center, for example.
According to this instruction, as shown in fig. 7, the X selector 42 corresponding to the j-th column supplies the data signal s (j) from the data line driving circuit 40 as the signal s (j) _ b to the data line 14 that is the center of the 3 data lines 14 corresponding to the OLED150 in the j-th column, supplies the signal of the potential V _0 as the signal s (j) _ a to the leftmost data line 14, and supplies the signal of the potential V _0 as the signal s (j) _ c to the rightmost data line 14.
Therefore, of the 9 unit circuits 1000 corresponding to the subpixels 130 in i row and j column, the unit circuit through which current flows to the OLED150 is only the unit circuit 1000 corresponding to the uppermost scan line 12 of the 3 scan lines 12 that is enabled and the central data line 14 of the 3 data lines 14 that is enabled, and the OLED150 in i row and j column emits light in accordance with the current.
Although the subpixels 130 in i, row, and column are described here, the subpixels 130 in other rows and j are similarly configured, and only the unit circuits 1000 corresponding to the uppermost scanning line 12 of the 3 scanning lines 12 and the central data line 14 of the 3 data lines 14 are formed, and the OLEDs 150 in i, row, and column emit light in accordance with the current.
Therefore, even if the leftmost data line 14 among the 3 data lines 14 corresponding to the j-th column or the unit circuit 1000 corresponding to the leftmost data line 14 becomes defective and the j-th column becomes a display defect, the display defect can be repaired.
Further, if a display defect occurs even if the leftmost and central data line 14 among the 3 data lines 14 corresponding to the j-th column is enabled, the rightmost data line 14 may be enabled.
As described above, according to the present embodiment, a display defect occurring after the fact along the row direction or the column direction can be easily repaired.
In embodiment 1, any 1 of 3 rows is used by enabling any one of 3 scanning lines 12 corresponding to 1 subpixel 130 and disabling the other 2. In addition, any 1 column of the 3 columns is used by enabling any one of the 3 data lines 14 corresponding to 1 subpixel 130 and disabling the other two. Further, the configuration is such that the current is caused to flow through the OLED150 by using 1 unit circuit 1000 corresponding to the intersection of the scan line 12 to be enabled and the data line 14 to be enabled, and the other 8 unit circuits 1000 are not used. That is, the unit circuit 1000 is configured to determine: by enabling only the scan line 12 of 1 row of the 3 rows and only the data line 14 of 1 column of the 3 columns, a current flows through 1 OLED 150.
Then, the determined 1 unit circuit 1000 drives the OLED150, and any one of the other 8 unit circuits 1000 can drive the OLED150 by changing the enabled scanning line 12 or data line 14 instead of the 1 unit circuit 1000.
In addition, the unit circuit 1000 that causes a current to flow through the OLED150 may have a configuration determined as follows.
For example, as shown in fig. 8, a transistor 123, which is an example of a light emission control transistor, may be provided between the transistor 121 and the OLED150 in each unit circuit 1000.
In the unit circuit 1000 of this structure, if the transistor 123 is off, the transistor 121 does not flow a current toward the OLED150, depending on the holding voltage of the capacitance Cpix.
Therefore, by supplying a control signal aligned in the row or column direction to the gate node of the transistor 123, the row or column of the unit circuit 1000 used for driving the OLED150 can be selected.
The control signal for the transistor 123 may be configured such that, for example, if the control signal is aligned in the row direction, the Y selector 22 supplies a signal for turning on the transistor 123 to 1 out of 3 rows by an instruction of the control circuit 5, and if the control signal is aligned in the column direction, the X selector 42 supplies a signal for turning on the transistor 123 to 1 out of 3 columns by an instruction of the control circuit 5.
In addition, when the alignment is performed in the column direction, the X selector 42 may be omitted and the data line driving circuit 40 may directly supply a signal to each of the data lines 14. In this configuration, the data line driving circuit 140 may receive information of the data line 14 to be enabled or disabled from the control circuit 5, and enable or disable the data line 14 in accordance with the information. That is, in this configuration, the data line driving circuit 140 supplies a data signal corresponding to the gradation level to the enabled data line 14, and supplies a signal corresponding to the potential V _0 for black display to the disabled data line 14.
Since the transistor 123 may be connected in series with the transistor 121 and the OLED150 in each unit circuit 1000, it is not limited to be provided between the transistor 121 and the OLED150, and may be provided between the power supply line 116 and the transistor 121, as shown in fig. 8.
In the unit circuit 1000, the potential relationship may be switched by channel type change of the transistors 121 and 122. When the potential relationship changes, a node described as a drain node may also be a source node, and a node described as a source node may also be a drain node. For example, one of a source node and a drain node of the transistor 121 may be electrically connected to the power supply line 116, and the other may be electrically connected to the anode of the OLED150 via the transistor 121.
The unit circuit 1000 is shown in fig. 4 or 8 simply, and may have a configuration other than the configuration shown in fig. 4 or 8. For example, in order to compensate for the threshold characteristics of the transistor 121, a transistor in which the transistor 121 is diode-connected, a transistor in which the anode of the OLED150 is set to a predetermined potential, or the like may be provided.
In embodiment 1, 1 OLED150 is driven by any one of 9 unit circuits 1000, but any configuration may be used as long as it is driven by any one of 2 or more unit circuits 1000. In this case, in the 2 or more unit circuits 1000, one of the scanning lines 12 and the data lines 14 may be set to be not shared. Specifically, the 1 OLED may be driven by any one of one unit circuit provided corresponding to an intersection of one scan line and one data line, another unit circuit provided corresponding to an intersection of one scan line and another data line, an intersection of another scan line and the one data line, or an intersection of the another scan line and the another data line, and the another unit circuit may be substituted for the one unit circuit.
More specifically, if the OLEDs 150 are arranged in M rows and N columns, the unit circuits 1000 may be arranged in M rows more than M rows and N columns more than N columns. In addition, when the unit circuits 1000 are arranged in m rows and n columns, the number of the scanning lines 12 is m, and the number of the data lines 14 is n.
In embodiment 1 described above, 1 OLED150 is driven by any 1 unit circuit 1000 out of 2 or more unit circuits 1000, and instead of one unit circuit 1000, the OLED150 may be driven by 1 other unit circuit 1000, but such a configuration may be a part of the display unit 100, not the whole.
Therefore, next, an embodiment in which 1 OLED150 is driven by any one of 2 or more unit circuits 1000 will be described with respect to a part of the display unit 100.
< embodiment 2 >
Fig. 9 is a diagram showing the display unit 100 of the electro-optical device 10 according to embodiment 2, and fig. 10 is a diagram simply showing the arrangement of the unit circuit 1000 and the sub-pixels 130 of the electro-optical device 10.
As shown in fig. 10, in embodiment 2, the size of the sub-pixels 130 in the left half area of the display unit 100 is 1.5 times the size of the sub-pixels 130 in the right half area in the row and column directions. Therefore, the density of the sub-pixels 130 in the left region is sparser than the density of the sub-pixels 130 in the right region, and therefore, in fig. 9, the left region is denoted as (1) a low-definition region and the right region is denoted as (2) a high-definition region.
The low-definition region in the left region is an example of the 1 st region, and the high-definition region in the right region is an example of the 2 nd region.
On the other hand, the density at which the unit circuits 1000 are arranged is the same in the right and left areas. Therefore, when the unit circuits 1000 are in one-to-one correspondence with the sub-pixels 130 in the right region of the display unit 100, the unit circuits 1000 are in excess of the sub-pixels 130 in the left region. Therefore, in embodiment 2, the unit circuit 1000 which is excessive in the left region is configured to be used when a defect occurs.
Specifically, with reference to fig. 10, the correspondence relationship with the sub-pixels 130 in the left region is described.
In fig. 10, a "→" mark on the left side of the display portion 100 indicates the position of the scanning line 12, and a "→" mark on the lower side of the display portion 100 indicates the position of the data line 14. Therefore, the unit circuits 1000 are arranged corresponding to the "→" mark and the "≠" mark.
In the left area, the unit circuit 1000 of the 1 st column corresponding to the data lines 14 of "R" and "%" is used for the 1 st column of the sub-pixel 130. In the left area, the 2 nd column unit circuit 1000 of the sub-pixel 130 uses the 3 rd column unit circuit 1000 corresponding to the data line 14 of "G" and "×" in preparation for the 2 nd column unit circuit 1000 corresponding to the "×" data line 14 without mark (space). In the left area, the 3 rd column of the sub-pixel 130 uses the unit circuit 1000 of the 4 th column corresponding to the data line 14 of "B" and "%" and prepares the unit circuit 1000 of the 5 th column corresponding to the data line 14 of "%" without a mark.
Further, in the left area, the 1 st row of the sub-pixels 130 uses the unit circuit 1000 of the 1 st row. The unit circuit 1000 in the 1 st row is used not only in the (1) low-definition region in the left region but also in the (2) high-definition region in the right region, and therefore (1) and (2) are added to the "→" mark indicating the position of the scanning line 12 in the 1 st row.
In addition, since the unit circuit 1000 in the 2 nd row is used not in the (1) low-definition region in the left region but only in the (2) high-definition region in the right region, only (2) is added to the "→" mark indicating the position of the scanning line 12 in the 2 nd row.
Fig. 11 is a diagram showing an electrical structure of 5 unit circuits 1000 and 3 sub-pixels 130 marked with black circles in fig. 10. Fig. 11 is a diagram for explaining an electrical configuration, and the pitch of the sub-pixels 130 is different from that of fig. 10 showing the arrangement.
As shown in fig. 11, in the row, the sub-pixel 130 of R of the 1 st column (left end) corresponds to only the unit circuit 1000 of the 1 st column, and the unit circuit 1000 causes a current to flow through the OLED150 of R. The sub-pixel 130 of G in the 2 nd column corresponds to the unit circuit 1000 of the 2 nd and 3 rd columns, and any one of the unit circuits 1000 causes a current to flow through the OLED150 of G. The sub-pixel 130 of B in the 3 rd column corresponds to the unit circuit 1000 of the 4 th and 5 th columns, and any one of the unit circuits 1000 causes a current to flow through the OLED150 of B.
Since the unit circuits 1000 in the 2 nd column and the 5 th column are preliminary, the data lines 14 in the 2 nd column and the 5 th column are disabled and the data lines 14 in the 1 st column, the 3 rd column, and the 4 th column are enabled in the initial state.
If a display defect occurs in the 3 rd column or the 4 th column in the initial state, the display defect can be repaired by enabling the data line 14 in the 2 nd column or the 5 th column.
Although not shown in fig. 11, the unit circuit 1000 in the 8 th column is also prepared as shown in fig. 10. Therefore, if a display defect occurs in the 7 th column in the initial state, the display defect can be repaired by enabling the data line 14 in the 8 th column.
In embodiment 2, the left area of the display unit 100 is set as the low-definition area and the right area is set as the high-definition area, but the opposite is also possible. The display unit 100 is equally divided into left and right portions, but may be divided into left and right portions at different ratios.
< embodiment 3 >
Fig. 12 is a diagram showing the display unit 100 of the electro-optical device 10 according to embodiment 3, and fig. 13 is a diagram simply showing the arrangement of the unit circuit 1000 and the sub-pixels 130 of the electro-optical device 10.
As shown in fig. 13, in embodiment 3, the size of the sub-pixel 130 in the upper half area of the display unit 100 is 1.5 times the size of the sub-pixel 130 in the lower half area in the row and column directions. Therefore, the density of the sub-pixels 130 in the upper region is less than the density of the sub-pixels 130 in the lower region, and therefore, in fig. 12, the upper region is denoted as (1) a low-definition region, and the lower region is denoted as (2) a high-definition region.
The low-resolution area in the upper area is an example of the 1 st area, and the high-resolution area in the lower area is an example of the 2 nd area.
On the other hand, the density of the unit circuits 1000 arranged is the same in the upper and lower regions. Therefore, when the unit circuits 1000 correspond to the sub-pixels 130 one by one in the lower region of the display unit 100, the unit circuits 1000 are in excess of the sub-pixels 130 in the upper region. Therefore, in embodiment 3, when a defect occurs, the unit circuit 1000 which is excessive in the upper region is used.
Specifically, the correspondence relationship with the sub-pixels 130 in the upper region is described with reference to fig. 13.
Specifically, the subpixel 130 in the 1 st row uses the unit circuit 1000 in the 1 st row, and the unit circuit 1000 in the 2 nd row is prepared. Therefore, a mark indicating "→" of the position of the scanning line 12 in the 1 st row is added with (1) based on the meaning of using the unit circuit 1000 in the 1 st row in the low-definition region, and a mark indicating "→" of the position of the scanning line 12 in the 2 nd row is added with no mark (blank) based on the meaning of using the unit circuit 1000 in the 2 nd row as a spare.
In addition, the subpixel 130 of the 2 nd row uses the unit circuit 1000 of the 3 rd row. Therefore, a mark "→" indicating the position of the scanning line 12 of the 3 rd row is attached with (1).
The subpixel 130(R) in the 1 st column in the upper region and the subpixel 130(R) in the 1 st column in the lower region use the unit circuit 1000 in the 1 st column. Therefore, "R" and "R" are attached to the mark "@" indicating the position of the data line 14 in the 1 st column. The top "R" of "R" and "R", i.e., the upper side in fig. 13, indicates that the sub-pixel 130(R) is used in the upper region of the display unit 100, and the bottom "R" of "R" and "R", i.e., the lower side in fig. 13, indicates that the sub-pixel 130(R) is used in the lower region of the display unit 100.
In the upper area, the subpixel 130(G) in the 2 nd column uses the unit circuit 1000 in the 3 rd column as a spare, with the unit circuit 1000 in the 2 nd column. On the other hand, in the lower region, the subpixel 130(G) of the 2 nd column uses the unit circuit 1000 of the 2 nd column. Therefore, "no mark (space)" G "is added to the mark"% "indicating the position of the data line 14 in the 2 nd column.
In the upper area, the unit circuit 1000 in the 3 rd column is used for the subpixel 130(G) in the 2 nd column, and the unit circuit 1000 in the 3 rd column is used for the subpixel 130(B) in the 3 rd column in the lower area. Therefore, "G" and "B" are attached to the mark "@" indicating the position of the data line 14 in the 3 rd column.
In the upper area, the subpixel 130(B) in the 3 rd column uses the unit circuit 1000 in the 3 rd column, and the unit circuit 1000 in the 4 th column is prepared. On the other hand, in the lower region, the subpixel 130(R) in the 4 th column uses the unit circuit 1000 in the 4 th column. Therefore, "B" and "R" are attached to the mark "≠ g" indicating the position of the data line 14 in the 4 th column.
In the upper area, the subpixel 130(B) in the 4 th column uses the unit circuit 1000 in the 5 th column as a spare, and uses the unit circuit 1000 in the 6 th column. On the other hand, in the lower region, the subpixel 130(G) of the 5 th column uses the unit circuit 1000 of the 5 th column. Therefore, "no mark (space)" G "is added to the mark"% "indicating the position of the data line 14 in the 5 th column.
In the initial state, if a display defect occurs in the 1 st row, the display defect can be repaired by enabling the scanning line 12 in the 2 nd row.
In embodiment 3, the upper region of the display unit 100 is set to be a low-definition region and the lower region is set to be a high-definition region, but the opposite is also possible. The display unit 100 is divided into equal parts in the upper and lower directions, but may be divided into different ratios in the upper and lower directions.
< embodiment 4 >
Fig. 14 is a diagram showing the display unit 100 of the electro-optical device 10 according to embodiment 4, and fig. 15 is a diagram simply showing the arrangement of the unit circuit 1000 and the sub-pixels 130 of the electro-optical device 10.
In this example, the display unit 100 is divided into an upper area, a middle area, and a lower area, and the upper area is (1) a low-definition area, (2) a high-definition area, and the lower area is (3) the same as the upper area.
Since embodiment 4 is located on the extension line of embodiment 3, a specific description thereof is not necessary.
In embodiment 4, if a display defect occurs in line 1 or line 6 in the initial state, the display defect can be repaired by enabling the scanning line 12 in line 2 or line 7.
In embodiment 4, the display unit 100 is divided into the upper region, the middle region, and the lower region along the upper and lower sides 3, but the left region, the middle region, and the right region may be divided into the left and right regions 3. The structure obtained by dividing the left and right 3 segments is also located on the extension line of embodiment 2, and therefore, a specific description thereof is not necessary.
The number of divisions is not limited to "3".
In short, the arrangement density of the sub-pixels 130 is preferably sparse from the middle region toward the peripheral region. This is because the visibility of a person is more sensitive towards the center and less sensitive towards the periphery.
In addition, according to embodiments 2 to 4, the image data supplied to the electro-optical device 10 can be reduced to the low-definition region.
Although the OLED150 is described as an example of the electro-optical element in embodiments 1 to 4, the electro-optical element may be an inorganic light Emitting diode, an led (light Emitting diode), or a liquid crystal element. In short, an element whose optical characteristics change in accordance with supply of electric energy (application of an electric field or supply of current) can be applied as an electro-optical element.
The embodiments described in the present specification may be used alone or in combination. The term "connected" and all variations of the term mean that 2 or more elements are connected or joined directly or indirectly, and include the case where 1 or more intermediate elements are present between 2 elements "connected" to each other. The combination or connection between the elements may be physical, logical, or a combination thereof.
< electronic apparatus >
Next, an electronic apparatus to which the electro-optical device 10 of the embodiment and the like is applied will be described. The electro-optical device 10 is intended for use in a display in which pixels are small in size and high in definition. Therefore, the electronic device will be described by taking a head mounted display as an example.
Fig. 16 is a diagram showing an external appearance of a head-mounted display, and fig. 17 is a diagram showing an optical structure of the head-mounted display.
First, as shown in fig. 16, the head-mounted display 300 includes legs 310, a beam 320, and lenses 301L and 301R in appearance similar to general eyeglasses. As shown in fig. 17, the head-mounted display 300 includes an electro-optical device 10L for the left eye and an electro-optical device 10R for the right eye provided near the beam 320 and on the back side (lower side in the drawing) of the lenses 301L and 301R.
The image display surface of the electro-optical device 10L is arranged on the left side in fig. 17. In this way, the display image of the electro-optical device 10L is emitted in the 9 o' clock direction in the figure via the optical lens 302L. The half mirror 303L reflects the display image of the electro-optical device 10L in the 6 o 'clock direction, and transmits light incident from the 12 o' clock direction.
The image display surface of the electro-optical device 10R is arranged on the right side opposite to the electro-optical device 10L. In this way, the display image of the electro-optical device 10R is emitted in the 3 o' clock direction in the figure via the optical lens 302R. The half mirror 303R reflects the display image of the electro-optical device 10R in the 6 o 'clock direction and transmits light incident from the 12 o' clock direction.
In this configuration, the wearer of the head mounted display 300 can observe the display images of the electro- optical devices 10L and 10R in a see-through state overlapping with the external situation.
In the head mounted display 300, when the left-eye image of the binocular images accompanied by parallax is displayed on the electro-optical device 10L and the right-eye image is displayed on the electro-optical device 10R, the wearer can perceive the displayed images as if they have depth or stereoscopic effect.
The electro-optical device 10 can be applied to an electronic viewfinder in a video camera, a lens-interchangeable digital camera, or the like, in addition to the head-mounted display 300.
Claims (10)
1. An electro-optical device, comprising:
the 1 st scanning line and the 2 nd scanning line;
a 1 st data line and a 2 nd data line;
a 1 st unit circuit provided corresponding to an intersection of the 1 st scan line and the 1 st data line;
a 2 nd unit circuit provided corresponding to any one of an intersection of the 1 st scan line and the 2 nd data line, an intersection of the 2 nd scan line and the 1 st data line, or an intersection of the 2 nd scan line and the 2 nd data line;
an electro-optical element electrically connected to the 1 st unit circuit and the 2 nd unit circuit; and
a drive circuit for driving the drive circuit,
the drive circuit supplies a scanning signal for driving the unit circuit to one of the 1 st scanning line and the 2 nd scanning line and supplies a signal for not driving the unit circuit to the other,
the driving circuit supplies a data signal for driving the unit circuit to one of the 1 st data line and the 2 nd data line and supplies a signal for not driving the unit circuit to the other,
the electro-optical element is configured to be driven by either the 1 st unit circuit or the 2 nd unit circuit.
2. The electro-optic device of claim 1,
the 2 nd unit circuit is disposed corresponding to an intersection of the 2 nd scan line and the 1 st data line.
3. The electro-optic device of claim 2,
the 1 st unit circuit includes a 1 st driving transistor and a 1 st emission control transistor,
the 1 st drive transistor is capable of controlling the current through the electro-optical element,
the 1 st emission control transistor is connected in series with the 1 st drive transistor and the electro-optical element,
the 2 nd unit circuit includes a 2 nd driving transistor and a 2 nd emission control transistor,
the 2 nd drive transistor is capable of controlling a current flowing through the electro-optical element,
the 2 nd emission control transistor is connected in series with the 2 nd drive transistor and the electro-optical element,
the drive circuit turns on one of the 1 st emission control transistor and the 2 nd emission control transistor and turns off the other of the 1 st emission control transistor and the 2 nd emission control transistor.
4. The electro-optic device of claim 2, further comprising:
a 3 rd unit circuit provided corresponding to an intersection of the 1 st scan line and the 2 nd data line;
a 4 th unit circuit provided corresponding to an intersection of the 2 nd scan line and the 2 nd data line;
the electro-optical element is driven by any one of the 1 st unit circuit, the 2 nd unit circuit, the 3 rd unit circuit, or the 4 th unit circuit.
5. An electro-optical device, comprising:
a plurality of scanning lines including a 1 st scanning line and a 2 nd scanning line;
a plurality of data lines including a 1 st data line and a 2 nd data line;
a plurality of unit circuits including a 1 st unit circuit and a 2 nd unit circuit provided corresponding to intersections of the plurality of scanning lines and the plurality of data lines;
a plurality of electro-optical elements including the 1 st electro-optical element; and
a drive circuit for driving the drive circuit,
the 1 st unit circuit is disposed corresponding to an intersection of the 1 st scan line and the 1 st data line,
the 2 nd unit circuit is provided corresponding to any one of an intersection of the 1 st scan line and the 2 nd data line, an intersection of the 2 nd scan line and the 1 st data line, or an intersection of the 2 nd scan line and the 2 nd data line,
the 1 st electro-optical element is electrically connected to the 1 st unit circuit and the 2 nd unit circuit,
the drive circuit supplies a scanning signal for driving the unit circuit to one of the 1 st scanning line and the 2 nd scanning line and supplies a signal for not driving the unit circuit to the other,
the driving circuit supplies a data signal for driving the unit circuit to one of the 1 st data line and the 2 nd data line and supplies a signal for not driving the unit circuit to the other,
the 1 st electro-optical element is configured to be driven by either the 1 st unit circuit or the 2 nd unit circuit.
6. The electro-optic device of claim 5,
the plurality of scanning lines are m, m is an integer of 3 or more,
the plurality of data lines are n, n is an integer of 3 or more,
the plurality of unit circuits are arranged in m rows and n columns corresponding to intersections of the m scan lines and the n data lines,
the plurality of electro-optical elements are arranged in M rows and N columns, M is an integer of 2 or more satisfying M < M, and N is an integer of 2 or more satisfying N < N.
7. The electro-optic device of claim 5 or 6,
the electro-optical elements arranged in the 1 st area among the plurality of electro-optical elements have a density lower than that of the electro-optical elements arranged in the 2 nd area.
8. An electro-optical device, comprising:
the 1 st scanning line and the 2 nd scanning line;
a 1 st data line and a 2 nd data line;
a 1 st unit circuit provided corresponding to an intersection of the 1 st scan line and the 1 st data line;
a 2 nd unit circuit provided corresponding to any one of an intersection of the 1 st scan line and the 2 nd data line, an intersection of the 2 nd scan line and the 1 st data line, or an intersection of the 2 nd scan line and the 2 nd data line;
an electro-optical element electrically connected to the 1 st unit circuit and the 2 nd unit circuit; and
a drive circuit for driving the drive circuit,
the drive circuit supplies a scanning signal for driving the unit circuit to one of the 1 st scanning line and the 2 nd scanning line and supplies a signal for not driving the unit circuit to the other,
the driving circuit supplies a data signal for driving the unit circuit to one of the 1 st data line and the 2 nd data line and supplies a signal for not driving the unit circuit to the other, and the electro-optical element is driven by either the 1 st unit circuit or the 2 nd unit circuit.
9. The electro-optic device of claim 8,
the 1 st unit circuit includes a 1 st driving transistor and a 1 st emission control transistor,
the 1 st drive transistor is capable of controlling the current through the electro-optical element,
the 1 st emission control transistor is connected in series with the 1 st drive transistor and the electro-optical element,
the 2 nd unit circuit includes a 2 nd driving transistor and a 2 nd emission control transistor,
the 2 nd drive transistor is capable of controlling a current flowing through the electro-optical element,
the 2 nd emission control transistor is connected in series with the 2 nd drive transistor and the electro-optical element,
one of the 1 st emission control transistor and the 2 nd emission control transistor is turned on, and the other of the 1 st emission control transistor and the 2 nd emission control transistor is turned off,
the electro-optical element is driven by either the 1 st unit circuit or the 2 nd unit circuit.
10. An electronic apparatus having the electro-optical device according to any one of claims 1 to 9.
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JP2018152174 | 2018-08-13 | ||
JP2018-152174 | 2018-08-13 | ||
JP2019072489A JP2020027270A (en) | 2018-08-13 | 2019-04-05 | Electro-optical device and electronic apparatus |
JP2019-072489 | 2019-04-05 |
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JPH05334973A (en) * | 1992-06-02 | 1993-12-17 | Nec Kagoshima Ltd | Fluorescent character display panel controlled by thin film transistor |
JPH08129358A (en) * | 1994-10-31 | 1996-05-21 | Tdk Corp | Electroluminescence display device |
JP2001202032A (en) * | 2000-01-17 | 2001-07-27 | Sanyo Electric Co Ltd | Active matrix type display device |
JP4736954B2 (en) * | 2006-05-29 | 2011-07-27 | セイコーエプソン株式会社 | Unit circuit, electro-optical device, and electronic apparatus |
JP5359141B2 (en) * | 2008-02-06 | 2013-12-04 | セイコーエプソン株式会社 | Electro-optical device, driving method thereof, and electronic apparatus |
JP2010139833A (en) * | 2008-12-12 | 2010-06-24 | Sony Corp | Image display device, method for driving image display device and method for manufacturing image display device |
JP2010249920A (en) * | 2009-04-13 | 2010-11-04 | Seiko Epson Corp | Electro-optical device, method of driving the same, and electronic device |
JP2013117553A (en) * | 2011-12-01 | 2013-06-13 | Panasonic Corp | Image display device |
JP5821685B2 (en) * | 2012-02-22 | 2015-11-24 | セイコーエプソン株式会社 | Electro-optical device and electronic apparatus |
KR20150142820A (en) * | 2014-06-11 | 2015-12-23 | 삼성디스플레이 주식회사 | Pixel, display device comprising the same and driving method thereof |
JP2017044768A (en) * | 2015-08-25 | 2017-03-02 | 株式会社ジャパンディスプレイ | Display device and head-mounted display device |
JP2017058671A (en) * | 2015-09-14 | 2017-03-23 | 株式会社ジャパンディスプレイ | Display unit |
CN205080892U (en) * | 2015-09-28 | 2016-03-09 | 合肥鑫晟光电科技有限公司 | Pixel drive circuit , Pixel circuit , display panel and display device |
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TWI713009B (en) | 2020-12-11 |
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