CN110782709B - High-precision clock redundancy backup method for civil aviation ADS-B ground station system - Google Patents

High-precision clock redundancy backup method for civil aviation ADS-B ground station system Download PDF

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CN110782709B
CN110782709B CN201911064194.0A CN201911064194A CN110782709B CN 110782709 B CN110782709 B CN 110782709B CN 201911064194 A CN201911064194 A CN 201911064194A CN 110782709 B CN110782709 B CN 110782709B
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time
ads
ground station
precision
fpga
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CN110782709A (en
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付磊
安强
李家蓬
于琦
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Sichuan Jiuzhou ATC Technology Co Ltd
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Sichuan Jiuzhou ATC Technology Co Ltd
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    • GPHYSICS
    • G08SIGNALLING
    • G08GTRAFFIC CONTROL SYSTEMS
    • G08G5/00Traffic control systems for aircraft, e.g. air-traffic control [ATC]
    • G08G5/0017Arrangements for implementing traffic-related aircraft activities, e.g. arrangements for generating, displaying, acquiring or managing traffic information
    • G08G5/0026Arrangements for implementing traffic-related aircraft activities, e.g. arrangements for generating, displaying, acquiring or managing traffic information located on the ground
    • GPHYSICS
    • G08SIGNALLING
    • G08GTRAFFIC CONTROL SYSTEMS
    • G08G5/00Traffic control systems for aircraft, e.g. air-traffic control [ATC]
    • G08G5/0073Surveillance aids
    • G08G5/0082Surveillance aids for monitoring traffic from a ground station
    • GPHYSICS
    • G08SIGNALLING
    • G08GTRAFFIC CONTROL SYSTEMS
    • G08G5/00Traffic control systems for aircraft, e.g. air-traffic control [ATC]
    • G08G5/06Traffic control systems for aircraft, e.g. air-traffic control [ATC] for control when on the ground

Abstract

The invention discloses a high-precision clock redundancy backup method for a civil aviation ADS-B ground station system.3 ground stations are arranged in the civil aviation ADS-B ground station system, and each ground station comprises a GPS receiver, an FPGA and a CPU; and 3 ground stations realize high-precision clock redundancy backup by means of sharing pulse per second and UTC time. The technical scheme of the invention realizes a high-precision clock redundancy backup design method for a civil aviation ADS-B ground station system, and the method enables other ground stations of the whole system to normally work under the condition that only one ADS-B ground station GPS normally works by sharing UTC time through network multicast and sharing second pulse technology through discrete lines, thereby greatly improving the reliability of the system. Under the condition that a plurality of devices are locked by GPS, the method simultaneously utilizes the high-precision time mean value design to eliminate the error generated by the second pulse jitter of a single GPS receiver, so that the time stamp of the output message is more accurate.

Description

High-precision clock redundancy backup method for civil aviation ADS-B ground station system
Technical Field
The invention relates to a high-precision clock redundancy backup method for a civil aviation ADS-B ground station system.
Background
The civil aviation greatly promotes the technical change of a monitoring system, strives to construct a sky, air and ground integrated ADS-B operation system, actively promotes the ADS-B construction and operation, basically completes the ADS-B ground facility layout by 2017 and starts the initial operation; by the year 2020, airborne equipment modification and ground ADS-B network construction are completed comprehensively, a complete civil aviation ADS-B operation monitoring system and information service system are constructed, a full airspace monitoring means is provided for air traffic, and ADS-B information service is provided for aviation enterprises comprehensively; by the end of 2025, according to the experience of ADS-B operation and implementation, the layout of ADS-B ground facilities and ground ADS-B network construction is continuously perfected, and the civil aviation safety level, airspace capacity, operation efficiency and service capability are integrally improved.
According to ED129B, the message output by ADS-B ground station is required to meet ASTERIX CAT021V2.1 standard, which specifies the requirement of ADS-B ground station for message receiving time. The empty pipe data station calculates the position of the airplane by using a hyperboloid positioning algorithm based on TDOA (time of arrival) difference of time of arrival (TOA) of the reply signals sent by the airplane to each ground receiving station. The position is compared with position information issued by an ADS-B machine to calculate, so that false targets can be filtered to achieve the purpose of preventing cheating by the ADS-B. Therefore, how to determine the message receiving time in the ADS-B ground station system is crucial to the calculation of the position accuracy. In addition, the Mean Time Between Failure (MTBF) of indoor equipment of the ADS-B ground station system of the civil aviation air traffic control system is not less than 20000h, and the mean time between failure Maintenance (MTTR) of the indoor equipment is not more than 30 min. The device can continuously work for 7 multiplied by 24 hours, and the design life of the device is more than 15 years. Therefore, the use of a redundant design to improve the stability of the system is a necessary means in the development process of the empty pipe equipment.
The ADS-B ground station system comprises three sets of ADS-B ground stations, and the three sets of equipment can work independently. In the actual operation process, the two omnidirectional ground stations are mutually main and standby machines, and the directional ground stations work independently. In the use process of the high-precision GPS, the ADS-B ground station device uses UTC time output by a serial port of the GPS receiver as a time reference of each second, uses a pulse-per-second signal of the GPS receiver as a reset signal of the high-precision time, and uses a 100M input clock of the GPS receiver as a counting signal of the high-precision time.
At present, each set of equipment in a multi-machine large-scale system using a high-precision GPS uses an independent GPS receiver, when the GPS receiver of the machine A fails, the machine A stops working, and the system is switched. Each device operates independently when all GPS receivers are normally locked. The disadvantages of this approach are as follows:
(1) when the system is used by the main machine and the standby machine, if the GPS receiver of the machine A is abnormal, the system can only be switched to the machine B, and if other modules (non-GPS receivers) of the machine B are abnormal, the system cannot work normally. The redundancy design is not completely embodied, and the system reliability is reduced.
(2) Because the pulse per second signal output by the high-precision GPS receiver has jitter, when a plurality of devices in the system work normally at the same time, the pulse per second of the devices is independent, so that the data receiving time calculated by different devices in the same system has great fluctuation for the receiving time of the same signal.
Disclosure of Invention
The invention provides a design method for high-precision clock redundancy backup of a civil aviation ADS-B ground station system.
The purpose of the invention is realized by the following technical scheme:
a high-precision clock redundancy backup method for a civil aviation ADS-B ground station system is characterized in that 3 ground stations are arranged in the civil aviation ADS-B ground station system, and each ground station comprises a GPS receiver, an FPGA and a CPU; and 3 ground stations realize high-precision clock redundancy backup by means of sharing pulse per second and UTC time.
Preferably, the 3 ground stations share UTC time through a network and share PPS second pulse through a discrete TTL interface.
Preferably, the connection relationship among the GPS receiver, the FPGA and the CPU of the ADS-B ground station is as follows:
a) the GPS receiver outputs a 100Mhz clock signal to the FPGA;
b) the GPS receiver outputs a path of second pulse signal of TTL level and simultaneously accesses the FPGA and the CPU;
c) the GPS receiver outputs a serial port signal of RS232 level to the CPU;
the external interface of the ADS-B ground station is as follows:
a) the ADS-B ground station outputs a path of 100Mhz Ethernet signal;
b) the ADS-B ground station outputs 1 path of second pulse signals of TTL level;
c) and the ADS-B ground station accesses two paths of second pulse signals of TTL level.
Preferably, in order to implement multi-station high-precision clock redundancy processing, a time processing module running inside the CPU and a high-precision time stamping module running inside the FPGA are required to be matched. The time processing module comprises two functions of time source processing and second pulse processing, wherein the time source processing completes the analysis of NEMA0183 format messages of the GPS and the maintenance of time source states, and the second pulse processing completes the writing of the CPU to the UTC time of the FPGA. And the FPGA high-precision time marking module is used for finishing the calculation of high-precision time.
As a preferred mode, the ADS-B ground station time processing module divides time information into a local time source and a system time source, wherein the local time source reflects the state of the GPS receiver of the equipment, and the system time source reflects the comprehensive state of all the GPS receivers in the whole system; and the time processing module receives the GPS message through the serial port to process and maintain the local time source.
As a preferred mode, the specific steps of the time processing module receiving the GPS message through the serial port to process and maintain the local time source are as follows:
step 1: the ADS-B ground station time processing module receives the message of the GPS receiver conforming to the NEMA0183 format through the serial port and caches the message;
step 2: the ADS-B ground station time processing module checks the received message and extracts a message type mark for the checked message;
and step 3: the ADS-B ground station time processing module obtains the taming state of the GPS receiver as a local time source state by solving the TOD message;
and 4, step 4: the ADS-B ground station time processing module obtains UTC time by solving the message GGA and updates the local time according to the local time source state;
and 5: the ADS-B ground station time processing module uses multicast technology to send local time source information to other ADS-B ground stations through a network, wherein the local time source information comprises UTC time of a GPS receiver and a GPS tame state;
step 6: the ADS-B ground station time processing module receives time source information sent by other ADS-B ground stations through a network multicast technology, and selects the locked GPS receiver time as a system time source. If the GPS receivers of a plurality of devices are in a locking state, the GPS time of the IP smaller device is selected as a system time source.
As a preferred mode, the ADS-B ground station outputs a message using standard UTC time, and the FPGA introduces only the pulse-per-second signal of the GPS receiver and cannot acquire the current UTC time, so the ADS-B ground station time processing module needs to provide the current UTC time to the FPGA when the pulse-per-second is interrupted, and the specific steps are as follows:
the ADS-B ground station time processing module receives the second pulse interruption of the GPS receiver and releases the semaphore, and waits for the processing thread of the semaphore to process;
if the local time source state is effective, the ADS-B ground station time processing module preferentially selects the GPS time of the equipment and maintains the GPS time;
if the local time source is invalid and the system time source is valid, the ADS-B ground station time processing module selects the system time source as the GPS time of the equipment and maintains the equipment;
and if the local time source and the system time source are invalid, the ADS-B ground station time processing module enters GPS failure maintenance by utilizing the relation between time continuity and pulse per second.
And the ADS-B ground station time processing module acquires the GPS state of the equipment and the GPS states of other equipment and writes the UTC time into the FPGA through a data bus.
As a preferred mode, considering the error probability of data transmission, the FPGA needs to perform continuous judgment and range judgment on the time written by the time processing module; and judging that the UTC time is updated through the FPGA, otherwise, automatically updating the time by the FPGA by using a pulse per second signal.
As a preferred mode, according to the requirements of ED129B standard, the low-precision time requirement of the message output by the ADS-B ground station is 1/128s, and the high-precision jitter is less than 200 ns. The ADS-B ground station cannot calculate the message high-precision time through software, so the message time of the ADS-B ground station is acquired by an FPGA of a decoding module. In order to improve the time precision, the FPGA high-precision time marking module uses a 100MHz standard clock provided by a GPS receiver as a clock source; the FPGA high-precision time marking module acquires UTC time from the CPU through a bus, and meanwhile, a pulse per second signal is used as high-precision counting trigger.
As a preferred mode, considering that the state of a GPS receiver influences the accuracy of pulse per second, an FPGA high-precision time marking module needs to judge the states of 3 GPS receivers in an ADS-B ground station system of a civil aviation air traffic control; on the premise that a plurality of GPS are in a locking state, in order to eliminate jitter errors, the FPGA needs to perform mean value processing on high-precision counts, and the method specifically comprises the following steps:
the FPGA simultaneously accesses a second pulse signal of a GPS receiver of the ground station and second pulse signals of two other ground station GPS receivers, and simultaneously uses three counters corresponding to the 3 GPS receivers, and the counters use a clock source to provide 100M clocks for the local machine;
after the FPGA high-precision time marking module receives the pulse per second, the pulse per second corresponding to the counter is cleared and counting is restarted; suppose the arrival times of the three second pulses are T1, T2 and T3 respectively; the time counts of the first two second pulses when the 3 rd second pulse arrives are N1, N2; then the time of FPGA use is
Figure DEST_PATH_IMAGE002
(ii) a High precision count is
Figure DEST_PATH_IMAGE004
(ii) a The precision time is equal to the product of the high-precision count and the clock period;
and after the ADS-B message is successfully decoded, the FPGA high-precision time marking module adds the UTC time written by the CPU and the high-precision time to be used as the receiving time of the message, generates a DMA interrupt request to the CPU and waits for the CPU to read data.
The invention has the beneficial effects that:
the technical scheme of the invention realizes a high-precision clock redundancy backup design method for a civil aviation ADS-B ground station system, and the method enables other ground stations of the whole system to normally work under the condition that only one ADS-B ground station GPS normally works by sharing UTC time through network multicast and sharing second pulse technology through discrete lines, thereby greatly improving the reliability of the system.
Under the condition that a plurality of devices are locked by GPS, the method simultaneously utilizes the high-precision time mean value design to eliminate the error generated by the second pulse jitter of a single GPS receiver, so that the time stamp of the output message is more accurate.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings that are required to be used in the embodiments will be briefly described below, it should be understood that the following drawings only illustrate some embodiments of the present invention and therefore should not be considered as limiting the scope, and for those skilled in the art, other related drawings can be obtained according to the drawings without inventive efforts.
FIG. 1 is a clock sharing connection block diagram of a civil aviation ADS-B ground station system;
FIG. 2 is a time source processing flow diagram of an ADS-B ground station time processing module;
FIG. 3 is a flow chart of pulse per second processing of an ADS-B ground station time processing module;
FIG. 4 is a flow chart of FPGA high-precision time-stamping module processing.
Detailed Description
The technical solutions of the present invention are further described in detail below with reference to the accompanying drawings, but the scope of the present invention is not limited to the following.
In order to make the objects, technical solutions and advantages of the embodiments of the present invention more apparent, the technical solutions of the embodiments of the present invention will be described clearly and completely with reference to the accompanying drawings of the embodiments of the present invention, and it is obvious that the described embodiments are some, but not all embodiments of the present invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention. Thus, the following detailed description of the embodiments of the present invention, presented in the figures, is not intended to limit the scope of the invention, as claimed, but is merely representative of selected embodiments of the invention. All other embodiments, which can be obtained by a person skilled in the art without any inventive step based on the embodiments of the present invention, are within the scope of the present invention.
As shown in fig. 1, a high-precision clock redundancy backup method for a civil aviation ADS-B ground station system, the high-precision clock redundancy backup design connection diagram of the civil aviation ADS-B ground station system is shown in fig. 1, 3 ground stations (such as a ground station a, a ground station B and a ground station C in fig. 1) are arranged in the civil aviation ADS-B ground station system, and each ground station comprises a GPS receiver, an FPGA and a CPU; 3, realizing high-precision clock redundancy backup by sharing pulse per second and UTC time by the ground stations; under the condition that only one ground station GPS receiver works normally, other ground stations of the whole system can work normally through a sharing technology.
Designing a high-precision time average value: the multiple ADS-B devices can detect pulse-per-second signals of all the devices in the system through a pulse-per-second sharing technology through the FPGA. After the plurality of ground station GPS receivers are locked, the pulse-per-second jitter error is removed using an average of the pulse-per-second arrival time counts.
High-precision clock redundancy backup: the three ADS-B devices share UTC time through a network, share pulse per second through discrete signals, and enable other ground stations of the whole system to work normally through a sharing technology under the condition that only one ground station GPS receiver works normally. The redundancy design of the system is increased, and the reliability of the system is improved.
And 3 ground stations share UTC time through a network and share PPS second pulse through a discrete TTL interface.
The connection relation among the GPS receiver, the FPGA and the CPU of the ADS-B ground station is as follows:
a) the GPS receiver outputs a 100Mhz clock signal to the FPGA;
b) the GPS receiver outputs a path of second pulse signal of TTL level and simultaneously accesses the FPGA and the CPU;
c) the GPS receiver outputs a serial port signal of RS232 level to the CPU;
the external interface of the ADS-B ground station is as follows:
a) the ADS-B ground station outputs a path of 100Mhz Ethernet signal;
b) the ADS-B ground station outputs 1 path of second pulse signals of TTL level;
c) and the ADS-B ground station accesses two paths of second pulse signals of TTL level.
In order to realize multi-station high-precision clock redundancy processing, a time processing module running in a CPU and a high-precision time marking module running in an FPGA are matched to complete the multi-station high-precision clock redundancy processing. The time processing module comprises two functions of time source processing and second pulse processing, wherein the time source processing completes the analysis of NEMA0183 format messages of the GPS and the maintenance of time source states, and the second pulse processing completes the writing of the CPU to the UTC time of the FPGA. And the FPGA high-precision time marking module is used for finishing the calculation of high-precision time.
The ADS-B ground station time processing module divides the time information into a local time source and a system time source, wherein the local time source reflects the state of the GPS receiver of the equipment, and the system time source reflects the comprehensive state of all the GPS receivers in the whole system; and the time processing module receives the GPS message through the serial port to process and maintain the local time source.
The specific steps of the time processing module receiving the GPS packet through the serial port to perform the processing and maintenance of the local time source are as follows (as shown in fig. 2):
step 1: the ADS-B ground station time processing module receives the message of the GPS receiver conforming to the NEMA0183 format through the serial port and caches the message;
step 2: the ADS-B ground station time processing module checks the received message and extracts a message type mark for the checked message;
and step 3: the ADS-B ground station time processing module obtains the taming state of the GPS receiver as a local time source state by solving the TOD message;
and 4, step 4: the ADS-B ground station time processing module obtains UTC time by solving the message GGA and updates the local time according to the local time source state;
and 5: the ADS-B ground station time processing module uses multicast technology to send local time source information to other ADS-B ground stations through a network, wherein the local time source information comprises UTC time of a GPS receiver and a GPS tame state;
step 6: the ADS-B ground station time processing module receives time source information sent by other ADS-B ground stations through a network multicast technology, and selects the locked GPS receiver time as a system time source. If the GPS receivers of a plurality of devices are in a locking state, the GPS time of the IP smaller device is selected as a system time source.
The ADS-B ground station outputs a message using standard UTC time, and the FPGA only introduces the pulse-per-second signal of the GPS receiver and cannot acquire the current UTC time, so the ADS-B ground station time processing module needs to provide the current UTC time to the FPGA when the pulse-per-second is interrupted, as shown in fig. 3, the specific steps are as follows:
the ADS-B ground station time processing module receives the second pulse interruption of the GPS receiver and releases the semaphore, and waits for the processing thread of the semaphore to process;
if the local time source state is effective, the ADS-B ground station time processing module preferentially selects the GPS time of the equipment and maintains the GPS time;
if the local time source is invalid and the system time source is valid, the ADS-B ground station time processing module selects the system time source as the GPS time of the equipment and maintains the equipment;
and if the local time source and the system time source are invalid, the ADS-B ground station time processing module enters GPS failure maintenance by utilizing the relation between time continuity and pulse per second.
And the ADS-B ground station time processing module acquires the GPS state of the equipment and the GPS states of other equipment and writes the UTC time into the FPGA through a data bus.
Considering the error probability of data transmission, the FPGA needs to continuously judge the time written in by the time processing module and judge the range; and judging that the UTC time is updated through the FPGA, otherwise, automatically updating the time by the FPGA by using a pulse per second signal.
According to the ED129B standard requirement, the low-precision time requirement of the message output by the ADS-B ground station is 1/128s, and the high-precision jitter is less than 200 ns. The ADS-B ground station cannot calculate the message high-precision time through software, so the message time of the ADS-B ground station is acquired by an FPGA of a decoding module. In order to improve the time precision, the FPGA high-precision time marking module uses a 100MHz standard clock provided by a GPS receiver as a clock source; the FPGA high-precision time marking module acquires UTC time from the CPU through a bus, and meanwhile, a pulse per second signal is used as high-precision counting trigger.
Considering that the state of a GPS receiver influences the accuracy of pulse per second, an FPGA high-precision time marking module needs to judge the states of 3 GPS receivers in an ADS-B ground station system of a civil aviation air traffic control; on the premise that a plurality of GPS are in a locked state, the FPGA high-precision time stamp module needs to perform mean processing on the high-precision counts in order to eliminate jitter errors, as shown in fig. 4, the specific steps are as follows:
the FPGA simultaneously accesses a second pulse signal of a GPS receiver of the ground station and second pulse signals of two other ground station GPS receivers, and simultaneously uses three counters corresponding to the 3 GPS receivers, and the counters use a clock source to provide 100M clocks for the local machine;
after the FPGA high-precision time marking module receives the pulse per second, the pulse per second corresponding to the counter is cleared and counting is restarted; suppose the arrival times of the three second pulses are T1, T2 and T3 respectively; the time counts of the first two second pulses when the 3 rd second pulse arrives are N1, N2; then the time of FPGA use is
Figure DEST_PATH_IMAGE006
(ii) a High precision count is
Figure DEST_PATH_IMAGE008
(ii) a The high-precision time is equal to the product of the high-precision count and the clock period;
and after the ADS-B message is successfully decoded, the FPGA high-precision time marking module adds the UTC time written by the CPU and the high-precision time to be used as the receiving time of the message, generates a DMA interrupt request to the CPU and waits for the CPU to read data.
The invention realizes high-precision time mean value design and high-precision time backup design by means of sharing pulse per second and UTC time. The high-precision time average value design is that after a plurality of ground stations are locked by a GPS, the jitter error of the pulse per second is removed by using the average value of pulse per second arrival time counting. The high-precision time backup design enables other ground stations of the whole system to work normally through a sharing technology under the condition that only one ground station GPS works normally, and the reliability index of the equipment is greatly improved.
While preferred embodiments of the present invention have been described, additional variations and modifications in those embodiments may occur to those skilled in the art once they learn of the basic inventive concepts. Therefore, it is intended that the appended claims be interpreted as including preferred embodiments and all such alterations and modifications as fall within the scope of the invention. The above description is only for the purpose of illustrating the preferred embodiments of the present invention and is not to be construed as limiting the invention, it should be noted that any modifications, equivalents and improvements made within the spirit and principle of the present invention should be included in the scope of the present invention.

Claims (6)

1. A high-precision clock redundancy backup method for a civil aviation ADS-B ground station system is characterized by comprising the following steps:
3 ground stations are arranged in an ADS-B ground station system of the civil aviation air traffic control system, and each ground station comprises a GPS receiver, an FPGA and a CPU; 3, realizing high-precision clock redundancy backup by sharing pulse per second and UTC time by the ground stations; the multi-station high-precision redundant processing needs to be completed by matching a time processing module running in a CPU (Central processing Unit) with a high-precision time marking module running in an FPGA (field programmable Gate array); the time processing module comprises two functions of time source processing and second pulse processing, wherein the time source processing completes the analysis of NEMA0183 format messages of the GPS and the maintenance of time source states, and the second pulse processing completes the writing of the CPU to UTC time of the FPGA high-precision time marking module; the FPGA high-precision time marking module is used for finishing the calculation of high-precision time;
the ADS-B ground station time processing module divides the time information into a local time source and a system time source, wherein the local time source reflects the state of the GPS receiver of the equipment, and the system time source reflects the comprehensive state of all the GPS receivers in the whole system; the time processing module receives the GPS message through the serial port to process and maintain a local time source;
the specific steps of the time processing module receiving the GPS message through the serial port to process and maintain the local time source are as follows:
step 1: the ADS-B ground station time processing module receives the message of the GPS receiver conforming to the NEMA0183 format through the serial port and caches the message;
step 2: the ADS-B ground station time processing module checks the received message and extracts a message type mark for the checked message;
and step 3: the ADS-B ground station time processing module obtains the taming state of the GPS receiver as a local time source state by solving the TOD message;
and 4, step 4: the ADS-B ground station time processing module obtains UTC time by solving the message GGA and updates the local time according to the local time source state;
and 5: the ADS-B ground station time processing module uses multicast technology to send local time source information to other ADS-B ground stations through a network, wherein the local time source information comprises UTC time of a GPS receiver and a GPS tame state;
step 6: the ADS-B ground station time processing module receives time source information sent by other ADS-B ground stations through a network multicast technology, and selects the locked GPS receiver time as a system time source;
the ADS-B ground station time processing module needs to provide the current UTC time for the FPGA when the pulse per second is interrupted, and the specific steps are as follows:
the ADS-B ground station time processing module receives the second pulse interruption of the GPS receiver and releases the semaphore, and waits for the processing thread of the semaphore to process;
if the local time source state is effective, the ADS-B ground station time processing module preferentially selects the GPS time of the equipment and maintains the GPS time;
if the local time source is invalid and the system time source is valid, the ADS-B ground station time processing module selects the system time source as the GPS time of the equipment and maintains the equipment;
if the local time source and the system time source are invalid, the ADS-B ground station time processing module enters GPS failure maintenance by utilizing the relation between time continuity and pulse per second;
and the ADS-B ground station time processing module acquires the GPS state of the equipment and the GPS states of other equipment and writes the UTC time into the FPGA through a data bus.
2. The high-precision clock redundancy backup method for the civil aviation ADS-B ground station system according to claim 1, characterized in that: and 3 ground stations share UTC time through a network and share PPS second pulse through a discrete TTL interface.
3. The high-precision clock redundancy backup method for the civil aviation ADS-B ground station system according to claim 1, characterized in that: the connection relation among the GPS receiver, the FPGA and the CPU of the ADS-B ground station is as follows:
a) the GPS receiver outputs a 100Mhz clock signal to the FPGA;
b) the GPS receiver outputs a path of second pulse signal of TTL level and simultaneously accesses the FPGA and the CPU;
c) the GPS receiver outputs a serial port signal of RS232 level to the CPU;
the external interface of the ADS-B ground station is as follows:
a) the ADS-B ground station outputs a path of 100Mhz Ethernet signal;
b) the ADS-B ground station outputs 1 path of second pulse signals of TTL level;
c) and the ADS-B ground station accesses two paths of second pulse signals of TTL level.
4. The high-precision clock redundancy backup method for the civil aviation ADS-B ground station system according to claim 1, characterized in that: the FPGA needs to continuously judge the time written in by the time processing module and judge the range; and judging that the UTC time is updated through the FPGA, otherwise, automatically updating the time by the FPGA by using a pulse per second signal.
5. The high-precision clock redundancy backup method for the civil aviation ADS-B ground station system according to claim 4, characterized in that: the FPGA high-precision time marking module uses a 100MHz standard clock provided by a GPS receiver as a clock source; the FPGA high-precision time marking module acquires UTC time from the CPU through a bus, and meanwhile, a pulse per second signal is used as high-precision counting trigger.
6. The high-precision clock redundancy backup method for the civil aviation ADS-B ground station system according to claim 5, characterized in that: the FPGA high-precision time marking module is used for judging the states of 3 GPS receivers in an ADS-B ground station system of the civil aviation air traffic control system; on the premise that a plurality of GPS are in a locking state, in order to eliminate jitter errors, the FPGA needs to perform mean value processing on high-precision counts, and the method specifically comprises the following steps:
the FPGA is simultaneously accessed to a GPS receiver second pulse signal of the ground station and two paths of GPS receiver second pulse signals of other ground stations, three counters are simultaneously used for corresponding to 3 paths of GPS receivers, and the counters use a clock source to provide a 100Mhz clock for the local machine;
after the FPGA high-precision time marking module receives the pulse per second, the pulse per second corresponding to the counter is cleared and counting is restarted; suppose the arrival times of the three second pulses are T1, T2 and T3 respectively; the time counts of the first two second pulses when the 3 rd second pulse arrives are N1, N2; then the time of FPGA use is
Figure 143521DEST_PATH_IMAGE002
(ii) a High precision count is
Figure 529503DEST_PATH_IMAGE004
(ii) a The high-precision time is equal to the product of the high-precision counter value and the clock period;
and after the ADS-B message is successfully decoded, the FPGA high-precision time marking module adds the UTC time written by the CPU and the high-precision time to be used as the receiving time of the message, generates a DMA interrupt request to the CPU and waits for the CPU to read data.
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